Nanolithography system based on electric current
The nanolithography system addresses productivity and control complexities by using an array of electrically conductive tips controlled by a spatial light beam, achieving high-resolution patterning on large areas with low voltages and simplified electronics, supporting diverse patterning methods.
Patent Information
- Application Number
- PCT/RO2025/000001
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-03-29
- Filing Date
- 2025-03-20
- Publication Date
- 2025-10-02
AI Technical Summary
Existing nanolithography techniques face challenges such as low productivity, complex control systems, high energy consumption, and limited applicability to non-electrono-resist materials, along with accuracy issues due to secondary electron interactions and high voltage requirements.
A nanolithography system using an array of electrically conductive tips controlled by a spatially modulated light beam, allowing independent patterning across a large area with low voltages and simplified electronics, enabling various patterning methods including local oxidation, chemical bond breaking, and electrochemical deposition.
Enables high-resolution patterning on large surfaces with reduced energy consumption and simplified control systems, supporting a wide range of patterning technologies without high acceleration voltages, and achieving spatial resolutions of 10 nm or better.
Smart Images

Figure RO2025000001_02102025_PF_FP_ABST
Abstract
Description
[0001] NANOLITHOGRAPHY SYSTEM BASED ON ELECTRIC CURRENT
[0002] The invention refers to a nanolithography system based on electric current that uses an array of electrically conductive sharp tips that emit electrons using the electric field emission phenomenon.
[0003] It is known from prior art a nanolithography technique that uses an electron beam consisting in the emission of electrons from an electrode, followed by the acceleration of electrons in an electric field, scanning of the said electron beam along a certain pattern with the help of electric and magnetic fields, focusing of the said electron beam with the aid of another set of electric and magnetic fields and the application of the said focused electron beam on a material called electrono-resist deposited onto a substrate. The said electron beam breaks the molecular bonds of the said electrono-resist material, the thus irradiated zones acquiring different solubility properties than the non -irradiated zones of the said electrono-resist material. The development of the electrono-resist material is acquired by submerging the electrono-resist covered substrate into the specific selective solvent followed by the selective removal of the soluble parts of the said electrono-resist according to the said electron beam irradiation pattern.
[0004] The drawbacks of the nanolithography using a scanning electron beam are:
[0005] - it has a low productivity, being hard to independently control a big number of said electron beams that are able to efficiently scan across a large exposure area
[0006] - the said electron beam contains electrons having an energy of at least tens of keV; at such energies secondary electrons are generated in the exposed regions of the said electrono-resist material, secondary electrons that are further interacting with the said electrono-resist material outside of the desired irradiation pattern and thus compromising the accuracy of the said pattern
[0007] - it can work only with said electrono-resist material, any other kind of use being impossible to achieve
[0008] - it uses high acceleration voltages for the said electron beam, from around few kV up to 300 kV, thus necessitating supplementary safety measures
[0009] It is known from prior art a nanolithography technique named massively parallel electron beam direct write (MPEBDW) lithography. MPEBDW uses an array of electrons-emitting tips consisting of regions having Silicon nanocolumns or nanodots as electron emitters, their electron emitting surface being covered with an ultrathin Titanium / Gold bi-layer with a total thickness of 10 nm. The electron beams that are emitted are subsequently processed with an electron optics system that is necessary for correcting electron beams’ aberrations and for their focusing. The electron beams optics consists of sets of three arrays of annular-type electrodes - the emitting sources situated at the same radial distance from the symmetry axis of the array being controlled by the same condenser electrostatic lens electrode, anode and objective electrostatic lens electrode. Each electron emitter including its corresponding electrostatic lenses, is actively controlled by an LSI (Large Scale Integrated) CMOS array.
[0010] The drawbacks of the massively parallel electron beam direct write (MPEBDW) lithography are:
[0011] - the manufacturing of electron beam emitter structures and of the corresponding control matrix is very costly, necessitating numerous technological steps
[0012] - the emitters and their corresponding electronic control consume a lot of energy
[0013] - the correction of the electrons beams' aberrations is complex and necessitates a standalone computing system dedicated to this task
[0014] - the emitters need to use voltages of a minimum of 5 kV
[0015] - it is applicable only for traditional electron beam nanolithography It is known from the prior art the electrically assisted dip pen nanolithography (e-DPN) that uses an Atomic Force Microscopy (AFM) set-up; this AFM set-up contains an electrically conductive cantilever that scans over a conductive substrate. The said conductive substrate could be bare or could be covered with material that is sensitive to electron beams. Sensing of the cantilever approach to the substrate is achieved by monitoring the variation of the cantilever’s resonance frequency. A water meniscus appears spontaneously once the cantilever’s tip and the substrate are in close proximity. An electric field is applied between the cantilever tip and the substrate, electric field that may have one or more of at least the following effects: local oxidation of the substrate, oxidation of an ultra-thin layer deposited onto the substrate, removal by dielectrophoresis of the molecules situated on the substrate. This way, the substrate or the ultra-thin film deposited on it may be patterned by scanning the cantilever over the substrate surface and by applying an electric field between them just where needed. Moreover, if an electrolyte solution is used, local deposition of metals on the substrate can take place.
[0016] The drawbacks of the e-DPN are:
[0017] - it uses a small number of cantilevers, which reduces productivity
[0018] - even in the case when a large array of cantilevers is used, the whole cantilever-containing structure will be very sensitive from the mechanical point of view since the cantilevers can easily break away
[0019] - the respective large cantilevers array would require a complex electronic circuitry for the real-time, individual command and control of each of its cantilevers
[0020] The problem solved by our invention consists in the fact that it ensures patterning over a large work area with the possibility of real-time and independent patterning on each individual region while allowing the use of a large number of pattering technologies / mechanisms. Moreover, the invention allows for the substantial simplification of the command-and-control electronics without jeopardizing the performance of the nanolithography process. The voltages that are used are low, exceeding few hundred volts only in certain situations.
[0021] The solution, according to the invention, consists in using an array of electrically conductive tips, said tips having the same height and shape and being situated in the same plane; the said tips are simultaneously and independently controlled with the help of a spatially modulated light beam, the spatial modulation of the said light beam being achieved with a spatial light modulator, for example as is a LCD projector. The said tips array is moving across the XY (horizontal) plane at a constant height from the substrate, the movement taking place on a length equal to that of the distance between two consecutive tips.
[0022] The advantages of the nanolithography system based on electric current according to the invention are:
[0023] - it can pattern with nanometer-scale resolution on large planar surface area, for example on the entire surface of a 12” (30 cm) diameter wafer
[0024] - it does not need high voltages, only in some exceptional situations when traditional electrono-resists are used a voltage of around 1 kV being necessary
[0025] - it allows the use of a large palette of patterning methods such as: local anodic oxidation of the substrate, local oxidation of a monomolecular electrono-resist layer deposited onto the substrate, local breaking of chemical bonds in the substrate, local breaking of the chemical bonds inside an electrono-resist, local electric breakdown of a thin layer of electrono-resist, local amorphization / crystallization of a solid layer of insulating material, local plasma etching of the substrate or of the thin resist layer deposited on it, local 3D electrochemical deposition
[0026] - it may attain spatial resolution of around 10 nm or better
[0027] - it is fast
[0028] - does not need a complex command and control electronics As compared to the massively parallel electron beam direct write (MPEBDW) lithography, our invention brings the following advantages:
[0029] - it significantly simplifies the system that implements the nanolithography process
[0030] - it reduces the electric energy consumption
[0031] - does not need the system for controlling the electron beam focusing
[0032] - it does not make use of the focusing of electron beams, our nanolithography process being run with the tips in the close proximity of the substrate
[0033] - does not need high acceleration voltages, only in some specific situations do the used voltages reaching values of 1 kV
[0034] - it can implement a large number of nanolithography processes based on electric current / electron beam
[0035] We present in the following the description of the invention in relation with figures 1..5 that represent:
[0036] - figure 1 : the system architecture
[0037] - figure 2: the architecture of the writing block
[0038] - figure 3: sketch detailing the elements of the tips array: a) the homogeneous photosensitive material version; b) the photosensitive material version that contains either a p-n junction or a heterojunction
[0039] - figure 4: sketch detailing the elements of the tips array used for electrochemical deposition: a) the homogeneous photosensitive material version; b) the photosensitive material version that contains either a p- n junction or a heterojunction
[0040] - figure 5: the logic scheme of the algorithm used for the parallelization of the tips array with respect to the substrate
[0041] - figure 6: the logic scheme of the algorithm used for correcting the variability of tips in the tip array
[0042] The system consists of several blocks, as follows. The writing block 1 comprises the tips array 2 above which are placed the light spatial modulator 3, the collimation optics 4 of the light beam emitted by the light source 5, the collimation optics 4 allowing to apply a light beam that is sufficiently parallel, uniform and homogeneous as regards intensity across the whole surface of the spatial light modulator 3. The collimation optics 4 consists of one or several optical elements like lenses, mirrors, spatial filters and beam homogenizers. Also, the system comprises the in-plane / horizontal XY translation block 6 of the substrate 7, translation block 6 that includes the electro-mechanical part of movement as well as the movement feedback control electronics, the block 8 for vertical translation movement of either the writing block 1 or the substrate 7.
[0043] The system also comprises the source 9 of electric voltage that applies the electric voltage between tips array 2 and substrate 7, the block 10 for reading of the voltage between some of the tips in the tips array 2 and substrate 7 - these some of the tips being used for the purpose of making parallel the tips array 2 with the substrate 7. Furthermore, the system comprises the controller 11 for the management and monitoring of all blocks ensemble functioning including source 9 of electric voltage. The system also comprises the computer 12 which, with the help of specific software packages, controls the system and allows editing, conversion and translation of CAD models representing the desired 2D patterns and 3D objects into the commands specific to each individual block.
[0044] The system according to the invention comprises also the necessary software used for commanding the spatial light modulator 3 and the source 9 of electric voltage according to the pattern that must be drawn. The source 9 of voltage may supply an electric voltage that is either constant with time or variable in time according to a specific rule or in the shape of voltage pulses, the voltage pulses having the same duration or having a duration that varies overtime, a constant time duration between consecutive pulses or a time duration between consecutive pulses that varies with time according to a specific rule. Also, the time varying voltage may have an amplitude and a frequency that are constant with time or time-varying. Moreover, source 9 of electric voltage may supply a voltage regime that is a combination of at least two of these said regimes. All these voltage regimes and parameters are precisely controlled and correlated with the desired technological process performed by the system.
[0045] The tips array 2 consists of a set of sharp tips, the tips having the same height and being situated in the same horizontal plane while being placed at a certain horizontal distance from each other. For example, but without limiting generality, these tips could have the shape of a pyramid with a square base.
[0046] These tips could be placed according to the vertexes of a square or rectangle grid, or triangle grid or a grid formed of other regulated geometrical shapes. Each tip consists of a metal layer 13, the respective metal being one of the Pt, Au, Ir, Rh, Pd, W, Re or alloys of at least two of them. On the outer surface of the tip, atop the metal layer 13, a monomolecular layer of alkali oxide such as CS2O, Rb2O or earth-alkali oxide such as fi BaO, SrO or a ferroelectric layer of a transitional metal oxide such as HfO2, ZrO2 could be deposited with the aim of lowering the workfunction of the metal layer 13. Atop metal layer 13 and opposed to the outer surface of this said layer a metal layer 14 is deposited for ensuring a good adhesion for the photosensitive material 15. The metal layer 14 could be, in certain situations and without limiting generality, Ti. The photosensitive material 15 is one of the following materials, namely a large bandgap crystalline semiconductor material or an amorphous semiconductor or a nanocrystalline semiconductor, in all these instances the condition being that its dark electrical resistivity be very high. For example, but without limiting generality, the photosensitive material 15 could be amorphous Silicon or intrinsic SiC or high resistivity ZnO.
[0047] Atop of the photosensitive material 15 layer there is the semi-transparent electrode 16 that lets pass the light beams that have a photon energy high enough for photogenerating free charge carriers inside the photosensitive material 15. The metal layers 13 and 14 are deposited only in the tips' regions while the photosensitive material 15 and the semi-transparent electrode 16 are deposited over the entire surface of the tips array 2. The semi-transparent electrode 16 could be, but without limiting generality, a Ti / Au bilayer with a total thickness under 20 nm or a transparent semiconductor such as ITO (Indium Tin Oxide) or Cui (Copper(l) Iodide).
[0048] Atop the semi-transparent electrode 16 lays the electrically insulating material layer 17 having the role to offer mechanical strength and stiffness to the tips array 2. The material layer 17 is transparent to the light used for photogenerating free charge carriers in the photosensitive material 15.
[0049] Also, the tips array 2 contains a passivation layer 18 having the role to chemically and electrically insulate the photosensitive material 15 from the environment. The passivation layer could be, without limiting generality, SiO2, SisN4, Silicon oxynitride, Aluminium oxide or other electrically insulating material. The thickness of the passivation layer 18 is always less than the height of the tips, for example of the pyramid that forms the tip, preferably under one fifth of the tip’s height.
[0050] Each pixel of the spatial light modulator s illuminates only one tip, always the same tip, of the tips array 2
[0051] The metal layers 13 and 14 of some of the tips, for example but without limiting generality of the tips situated in the corners of the tips array 2, can be electrically accessed from outside and separately from the rest of the tips. The purpose for this separate electrical access is for reading the electric voltage between the respective metal layers 13 of their corresponding tips and substrate 7 during the process of parallelization of tips array 2 with respect to substrate 7. These tips that are accessible from outside are the tips for the parallelization of tips array 2 with substrate 7. All the other tips have their metal layers 13 and 14 as floating electrodes.
[0052] For the case of using the tips array 2 for electrochemical deposition, the tips array 2 has a set of vertical channels 19 located from place to place. These said channels 19 allow the electrolyte solution 20 to access the tips part of the tips array 2, thus preventing the depletion of the electrolyte solution 20 of its metal ions in the region of electrochemical deposition. The electrolyte solution 20 is located in a horizontal channel bounded between the material layer 17 at its bottom towards the tips and cover 21 at its top, respectively. The cover 21 is electrically insulating while being transparent for the light beam used for photogenerating free charge carriers inside the photosensitive material 15. The vertical channels 19 have their inner walls covered with an electrically insulating, chemically inert material with respect to the electrolyte solution 20. These inner walls coverage of channels 19 is necessary for avoiding any electrical and chemical contact between the electrolyte solution 20 and the rest of the layers through which it passes.
[0053] Above the cover 21 there is the spatial light modulator 3. This spatial light modulator is mounted either in intimate contact with cover 21 or with a certain gap between them. Above the spatial light modulator 3 is the collimation optics 4 and, further, the light source 5.
[0054] The semi-transparent electrode 16 is always electrically polarized at a negative voltage with respect to the substrate 7 except for the case of electrochemical deposition. For the case of electrochemical deposition, the semi-transparent electrode 16 is electrically polarized at a positive voltage with respect to the substrate 7.
[0055] The photosensitive material 15 may be a homogeneous one from the chemical point of view or, in other situations, may be an inhomogeneous one. In the homogeneous case, the photosensitive material 15 acts like a photoconductor, its local electrical conductivity increasing with the applied light intensity. When the photosensitive material 15 is illuminated, its increase in electrical conductivity determines the application of most of the semi-transparent electrode 16 - substrate 7 voltage onto the metal layer 13 - substrate 7 pair. The consequence of this increase of the voltage drop between metal layer 13 - substrate 7 pair is an increase of the electric current emitted only by the tip from (below) the illuminated region.
[0056] In the case when the photosensitive material 15 is chemically inhomogeneous, we may have two situations. In the first case, the base composition of the material is the same, for example but without limiting generality is Silicon. What varies along the thickness of the photosensitive material 15 is its doping with impurities. In one embodiment, the region of the photosensitive material 15 in proximity of the semi-transparent electrode 16 has a n-type doping while the region of the same material 15 in proximity of the metal layer 14 has a p-type doping. In another embodiment, the situation is reversed as regards the doping of the respective regions of the photosensitive material 15. In both these embodiments we have a p-n junction in the photosensitive material 15, the plane of the p-n junction being parallel with the semi-transparent electrode 16. In the case of the p-n junction, the voltage applied between the semi-transparent electrode 16 and the substrate 7 is changed with an amount equal to the voltage generated through the photovoltaic effect in the junction when the photosensitive material 15 is locally illuminated. The voltage change may be either to increase or to decrease the voltage applied between the semi-transparent electrode 16 and the substrate 7 depending on junction orientation.
[0057] In the second case the photosensitive material 15 is formed by two chemically homogeneous but different photosensitive materials, each of these being of any p-type or n-type. These two materials form a heterojunction at their contact. Under illumination with a light beam having an appropriate photon energy for generating free charge carriers in at least one of the two said materials, a photovoltaic effect appears, its effect being the same as for the case of homogeneous p-n junction.
[0058] In both homogeneous p-n junction and heterojunction cases, the photosensitive material(s) 15 is deposited solely in the tips regions in the form of islands that completely cover the metal layers 13 and 14. Between these islands and having a thickness equal to the overall thickness of the metal layers 13, 14 and the photosensitive material 15 taken together sits the insulating material 18.
[0059] The light beam source 5 can be a lamp, a photoluminescent diode of the LED type, a laser diode or any other sort of laser source or can be a VCSEL device (Vertical Cavity Surface Emitting Laser), in all these cases the light emission being made in a spectral range that contains the spectral domain to which the photosensitive material 15 responds by photo-generating free charge carriers (electron and hole pairs).
[0060] The use of the nanolithography system is as follows:
[0061] - the tips array 2 is approaching substrate 7 in such a way that keeps them always parallel, the parallelization procedure being described further; the approach is made either by a linear translation of the writing block 1 along a direction normal to the substrate 7 or by a linear translation of the substrate 7 along that said direction.
[0062] - a voltage is applied between the semi-transparent electrode 16 and substrate 7 by the voltage source 9, the voltage being either constant over time or variable over time, the temporal variation of the voltage depending on the intended application.
[0063] - the light source 5 is started and uniformly illuminates the spatial light modulator 3 with the help of the collimating optics 4; the spatial light modulator 3 is initially opaque.
[0064] - the spatial light modulator 3 establishes a spatial distribution of its optical transmissivity by commanding each of its pixels according to the commands received from the computer 12 through the means of the controller 11; each pixel, having its own value of optical transmissivity, illuminates one tip, always one and the same, from the tips array 2.
[0065] - either the writing block 1 or preferably the substrate 7 are moved in the horizontal XY plane parallel to each other and to the substrate 7 and, in some situations, also along the vertical / normal to the substrate 7 direction while the optical transmissivity of the spatial light modulator’s 3 pixels and the voltage supplied by the voltage source 9 are modulated in correspondence with the 2D patterns or 3D structures that have to be produced.
[0066] - once the production job is finished, the voltage source 9 brings its voltage to zero while the spatial light modulator 3 brings all of its pixels to their opaque state. Also, the light source 5 is turned off.
[0067] - the writing bloc 1 is moved away from the substrate 7.
[0068] There are several possibilities to apply the system for electric current based nanolithography, among which we mention: a) local anodic oxidation of the conductive or semiconductive substrate 7. In this case, the process takes place either in ambient conditions, in air enriched with oxygen or even in pure oxygen, preferably in the presence of water vapours. For example, if substrate 7 is made of Silicon, then an ultra-thin SiC>2 layer is formed in the region just beneath the tip, the shape of the oxide having its maximum thickness just beneath the tip's apex. By moving array 2 of tips in a plane parallel to the substrate 7 and by controlling the local illumination of the photosensitive material 15, the desired patterns of SiOz can be obtained. The oxide may remain as is on the substrate 7 or it may serve as an etch mask for the surrounding Silicon - the Silicon etching being made on a shallow depth - or, in another situation, the oxide may be etched away with a HF solution, leaving behind a trench having the same geometry as that of the initial S1O2 track. In the case of using a Copper layer deposited atop the substrate 7, then CuO is locally obtained. The CuO may serve as a mask for further electrochemical deposition in the non-oxidized Copper regions or may be selectively etched away by using anhydrous acetic acid. b) local oxidation of a monomolecular layer. In this case, a monomolecular layer of calixarene molecules is deposited onto the substrate 7. In another version, when substrate 7 is covered with a Gold layer, a monomolecular layer of thiols are deposited onto Gold. In any of these two cases, the local anodic oxidation of the monomolecular layer is taking place under the effect of the electric current emitted by the tips of the array 2 under ambient conditions. In the places where local oxidation of calixarene or thiol molecules is taking place, substrate 7 becomes exposed and either subsequent selective etch of it or selective electrochemical deposition onto it can be performed. The desired patterning of the monomolecular layer is obtained by moving the tips array 2 in a plane parallel to the substrate 7 and by controlling the local illumination of the photosensitive material 15. c) the dielectric breakdown of a polymer. In this case, a thin polymer or monomer layer is deposited onto the substrate 7, the deposited layer being electrically insulating while substate 7 being electrically conductive or a semiconductor. The electric currents emitted by some of the tips of the tips array 2 locally breakdown the polymer thus altering its local chemical reactivity with respect to some substances. The alteration could be either of chemical bond breaking type or could be a polymerization of the resulting free radicals if the initial material deposited onto substrate 7 is a monomer. The said substances could either selectively wet etch some of the layer regions or could selectively dissolve those said regions or could selectively etch away the said regions in plasma dry etch process. If we consider a wet chemical etch process or a process of dissolving, then either the un-modified polymer or the electrically-breakdown modified one can be selectively removed depending on the etchant / solvent used for that purpose. The rest of the layer regions that do not react with the said etchant / solvent remain onto the substrate 7. This way, positive-tone as well as negative-tone lithography can be performed, depending on the etchant / solvent used. A similar situation may be considered for the selective plasma etching when, depending on the plasma type used, either the un-modified or the modified part of the said layer can be selectively removed. The desired patterns are obtained by moving the tips array 2 in a plane parallel to the substrate 7 and by controlling the local illumination of the photosensitive material 15. d) local electrical breakdown of an inorganic material with local amorphization and / or recrystallization. In this case, a thin layer of dielectric inorganic material is deposited onto the electrically conductive substrate 7. For example, but without limiting generality, the inorganic layer can be made up of a chalcogenide compound. The electric current emitted by some of the tips of the tips array 2 locally breakdown the said inorganic layer, producing in it either a recrystallization if the said dielectric layer is initially amorphous or glass-type or amorphization if the said dielectric layer is initially crystalline. The desired patterns are obtained by moving the tips array 2 in a plane parallel to the substrate 7 and by controlling the local illumination of the photosensitive material 15. The regions affected by the electrical breakdown phenomenon will have a different etch rate than the un-affected regions, thus allowing to perform positive-tone as well as negative-tone lithography depending on the etchant used. The etch process could be either wet or dry / plasma etc. . e) change of the chemical properties of an electronoresist, similar to the case of traditional electron beam lithography. In this case, the material used and deposited onto substrate 7 is the same as the electrono- resists used in electron beam lithography. The necessary voltages in this case are of a minimum of 1 kV. The difference as compared to traditional electron beam lithography consists in the large number of electric current sources of the tips array 2 combined with the lack of focusing elements for the multitude of electron beams. In our case, the spatial confinement of the electron beam is achieved due to the proximity between the tips of the tips array 2 and the substrate 7 and to the highly non-uniform character of the electric field at the tip. The desired patterns are obtained by moving the tips array 2 in a plane parallel to the substrate 7 and by controlling the local illumination of the photosensitive material 15. f) electrochemical deposition. In this case, we consider the fabrication of 3D metallic or metalcomposite structures by using electrochemical deposition techniques. The semitransparent electrode 16 is connected to the positive voltage while substrate 7 is connected to the negative voltage or to ground. An electrolyte solution 20 fills the space region between tips array 2 and substrate 7. The electrochemical deposition process, including the time variation of the applied voltage, is that known in the state-of-the-art. The desired 3D structures are obtained by moving tips array 2 in a plane parallel to the substrate 7 but also along the vertical / normal direction to that plane in a way that allows the deposition of the intended 3D structure and by controlling the local illumination of the photosensitive material 15. The way the tips array 2 moves in the plane parallel to substrate 7 and along the normal to it is dictated by the geometry and shape of the 3D structures that must be produced. The independent control of illumination for each tip in the tips array 2 allows that each tip deposits its own 3D structure. The deposition is made in a layer-by-layer fashion starting from the substrate 7 and moving upward from it.
[0069] The optical control of tips array 2 can be achieved in two ways: ON / OFF and grey levels, respectively. In the ON / OFF regime, the light intensity applied on a pixel corresponding to one tip is the same for all pixels / tips. In the OFF regime the light intensity is zero while in the ON regime is at its chosen value - only one level of intensity is allowed in this case. The change of voltage between any of the tips and substrate 7 is the same for all the tips. In the grey level regime, the light intensity can be varied in at least three steps, each pixel being illuminated with one specific intensity value according to the processing needs. This way, the modulation of the voltage drop between any of the tips and substrate 7 can be varied finer than in the ON / OFF regime and can have different values for different tips. In the grey level regime, the rate at which processes take place under each of the tips can differ from one tip to another. For example, the electric current and hence the metal deposition rate onto substrate 7 may differ from tip to tip in the case of electrochemical deposition according to the illumination pattern / map.
[0070] The control of the voltage between any of the tips of the tips array 2 and substate 7 can be achieved in several ways: either by varying the voltage supplied by the voltage source 9 or by varying the light intensity applied to the respective / selected tips or by using a combination of these two control techniques. The electric voltage between any of the tips of the tips array 2 and the substrate 7 can be modulated in time according to a certain variation law that allows to achieve the desired processing for the considered pattern.
[0071] The parameters that control the technological process are: the electric voltage supplied by the voltage source 9, the light intensity projected onto each of the tips by the corresponding pixels of the spatial light modulator 3, the relative scanning speed of the tips array 2 and substrate 7 in the XY (horizontal / parallel) plane and the vertical distance between the tips I metal layer 13 and substrate 7, respectively; the said vertical distance may be constant or variable in time according to a certain rule; in a particular case, the said vertical distance can vary according to a sinusoidal rule having a certain frequency and amplitude around the average distance between the metal layer 13 - substrate 7.
[0072] Preferably, the metal layer 14 and the semi-transparent electrode 16 form ohmic contacts with the photosensitive material 15.
[0073] For achieving the nanolithography process on a large area, as is the case when the chip size exceeds the distance between two consecutive tips along X direction, the system scans either the substrate 7 or the writing block 1; the scanning is first made along the X direction on a distance equal to that between two consecutive tips and then the Y coordinate is modified with step equal to the minimum feature size that has to be obtained and then the scanning along X direction is repeated; this X-Y cycle is repeated until the whole distance between two consecutive tips along the Y direction is covered. This way, the connection of geometrical patterns that are larger than the distance between two consecutive tips is ensured, each of the components / sub-patterns of the said patterns being realized by different tips. The voltage applied to the tips array 2 as well as the light intensity transmitted by each individual pixel are varied during the whole pattern writing cycle according to the patterns that must be realized. A similar approach is used when the size of the pattern along the Y direction exceeds the distance between two consecutive tips along this same direction, the roles of the X and Y axes being interchanged.
[0074] The horizontal alignment with respect to previous elements on the substrate is achieved by state-of- the-art optical alignment techniques that are specific to the microelectronics field. In one such embodiment, alignment marks are patterned on both the substrate 7 and tips array 2 outside of the area containing the tips. The alignment marks can be of two types: those that use superposition of identical or complementary patterns and those that are made of diffractive patterns; by superposing two such diffractive patterns, a Moir6 interference pattern is obtained. In this latter case, the alignment accuracy may reach 1 nm. According to literature, the Moire interference method may also ensure alignment as regards the relative inclination angle between the two diffractive patterns, allowing angular adjustment at the 10-4radians level. A more accurate parallelization of tip arrays 2 with respect to substrate 7 is described in the next paragraph.
[0075] For the aim to parallelize tips array 2 with substrate 7, we will use three non-colinear tips placed in three consecutive corners of the said array. For example, if tips array 2 has a square shape, then we will use three specially produced tips in three of the corners. These specially built tips for alignment purposes are called parallelization tips and have the metal layer 13 directly addressable from the external circuitry. The parallelization tips have the same size and are situated in the same plane as all the other tips of the tips array 2. Except the alignment tips, all the other tips that are used for the lithography process have the metal layer 13 floating from the electrical point of view and not connected to the external circuitry.
[0076] The parallelization method consists in bringing all the parallelization tips at the same distance with respect to substrate 7, in which case all the tips of the tips array 2 will be at the same distance from substrate 7.
[0077] First, we will bring at least one of the parallelization tips at a distance less than 5 microns from the substrate 7. This distance can be determined with the help of a microscope objective temporarily attached to the system or a capacitive method, at the level of the entire tips array 2, can be used. Then, the tips array 2 is approaching substrate 7 step-by-step, with steps less than 100 nm, after each such step the distance between the three parallelization tips and substrate 7 being determined. If the respective three distances differ, then the tips array 2 is rotated around at least one of the rotation axes that is contained in its plane is such a way that the difference between the three distances is lowered.
[0078] For measuring the distance of each of three parallelization tips with respect to substrate 7, first a capacitive method is used. For this purpose, a voltage is applied between the semi-transparent electrode 16 and substrate 7. In this case, we have two serially connected capacitors: the fixed-value capacitor having as electrodes the semi-transparent electrode 16 and metal layer 13 and having as a dielectric the photosensitive material 15 and the variable capacitor formed by the metal layer 13 and the substrate 7 and having as dielectric the air or vacuum. The capacitance of the latter capacitor depends on the distance between the tip / metal layer 13 and substrate 7. There are two ways to determine the distance between the tip of the metal layer 13 and the substrate 7: a) the capacitance of the either the two serially connected capacitors or of that of the variable capacitor is measured. b) a known voltage, either constant or time-variable, is applied between semi-transparent electrode 16 and substrate 7 and the voltage drop between metal layer 13 and substrate 7 is measured. If a time-harmonic voltage is applied, then a lock-in measurement scheme may be used for the highly accurate determination of the said voltage drop between the metal layer 13 and the substrate 7 and, implicitly, of the distance between the tip of the metal layer 13 and substrate 7.
[0079] According to simulations, we may reach tip-substrate distances of 25 nm by using these methods. The rotation of the tips array 2 around the two rotation axes lying in its plane is achieved through a fast feedback loop 22 and a precision electro-mechanical system 23.
[0080] For further reducing the tip-substrate distance and for increasing the parallelization accuracy, a light beam is applied on each photosensitive material 15 zone that corresponds to the parallelization tips simultaneously with the application of a DC voltage between the semi-transparent electrode 16 and the substrate 7. The voltage has such a value as to allow the emergence of an electric current from the tip of metal layer 13 to substrate 7. The electronic circuit 10 reads the value of the current emitted by each of the three parallelization tips and, through the fast feedback loop 22 and precision electro-mechanical system 23, rotates the tips array 2 around at least one of the rotation axes lying in its plane in such a way as to equalize the three respective currents. Moreover, the value of the field-emission current depends in an exponential manner on the applied electric field and thus on the distance between the metal layer 13 tip and the substrate 7. This way, the tips can be brought with high accuracy at the intended tip-substrate distance. For even smaller tip-substrate distances, the tunnel current may be used, in which case the accuracy of distance determination between the metal layer 13 tip and the substrate 7 may reach sub-Angstrom values. When all the three currents emitted by the parallelization tips are equal to each other, then the tips array 2 is fully parallel to the substrate 7.
[0081] Once the parallelization is achieved and the parallelization tips are brought at the intended distance with respect to substrate 7 then the illumination of the photosensitive material regions corresponding to the parallelization tips is switched off. For periodically checking the distance between the parallelization tips and the substrate 7, the photosensitive material 15 is illuminated in the regions corresponding to the parallelization tips and their emitted currents are compared to each other; if necessary, the tips array 2 is re-aligned parallel to the substrate 7 as described above.
[0082] The electric current based nanolithography system can work standalone or combined with other lithography techniques. For example, but without limiting generality, the geometric shapes of poorer resolution I large size can be patterned with the help of photolithography while the high resolution I small size shapes are patterned with the help of the present system.
[0083] During the manufacturing process of the tips array 2 it may happen that not all the tips result identical. A first inspection could be made by using advanced microscopy techniques such as scanning electron microscopy for determining the tips quality and the eventual deviations of their geometrical parameters. If the deviations are significant and cannot be corrected by technology processes such as focused ion beam milling, then the tips array 2 is considered faulty and is removed. If the deviations are within reasonable limits, then the next step consists in evaluating their geometry, for example by patterning a dot and a line as in the T letter, by illuminating all the tips with the same light intensity. Since the illumination and the applied voltage are the same for all the tips, then any small deviation in their geometry will be noticed as a difference between the patterns made. Identifying those differences allows to determine how should each tip be electrically polarized in such a way that all the tips generate the same identical pattern when a certain voltage is applied between the semitransparent electrode 16 and substrate 7. This control of polarization for each tip is achieved by spatially modulating the light intensity distribution with the help of the spatial light modulator 3 in such a way that, due to the differentiated illumination of each tip, the electric field between the tip and substrate 7 be the same for all the tips. This method of defining a light intensity map with the spatial light modulator 3 for compensating tip variability within the array can be done for several values of the electric field considered in the proximity of the tips. The illumination corrections thus determined are then applied to the electric current-based lithography processes that must be executed by the system. The procedure for correction of tip variability consists in the following steps:
[0084] - the tips array 2 is approached to substrate 7 down to the distance at which the desired electric current lithography can take place.
[0085] - a voltage is applied between the semi-transparent electrode 16 and the substrate 7.
[0086] - the photosensitive material 15 is illuminated with the help of the spatial light modulator 3 with a light intensity that is uniform across its entire surface.
[0087] - a 2D test pattern is produced onto substrate 7 by the desired electric current lithography, for example either by local anodic oxidation of the said substrate 7 or by local electro-oxidation of a monomolecular layer of resists or by any other form of electric current-driven lithography.
[0088] - the produced 2D test patterns are analysed.
[0089] - the necessary correction of the light intensity distribution provided by the spatial light modulator 3 is computed by the computer 12, the correction being based on the differential modulation of the light transmission of said modulator 3 corresponding to each tip in such a way as to achieve the same value for the electric field between any of the tips and the substrate 7.
[0090] - the computed light transmissivity distribution that ensures the same electric field value between any of the tips and the substrate 7 is applied to the spatial light modulator 3.
[0091] - the above steps are repeated for different values of the electric field in the proximity of the tips, the different values of the electric field being obtained with the help of the voltage source 9.
[0092] - the correction factors thus determined for different values of the electric field in the proximity of the tips are used in all the subsequent processes of the electric current-driven lithography that was considered.
[0093] In the following, we give an example of invention embodiment.
[0094] The tips array 2 consists of 100 x 100 tips having the shape of a pyramid with square base, each pyramid having a height of 35 microns and base size of 50 microns, the distance between two consecutive tips being equal to 120 microns. The metal layer 13 is made of Platinum and has a thickness of 200 nm, while the metal layer 14 is made of Titanium and has a thickness of 100 nm. The photosensitive material 15 is made of nanocrystalline Silicon and has a thickness of 2 microns. Above it there is the semi-transparent electrode 16 made of Titanium / Gold bilayer having an overall thickness of 20 nm. The insulating material 17 is made of transparent epoxy resin and has a thickness of 1 cm. The support and passivation layer 18 is made of Silicon nitride and has a thickness of 250 nm, covering solely the metalized base of each of the pyramids. The tips array 2 contains a number of vertical channels 19 having a diameter of 25 microns. The said channels 19 are electrically insulated with respect to the materials through which they pass with the help of an ALD (Atomic Layer Deposition) deposited AI2O3 layer having a thickness of 150 nm. The light source 5 is a deuterium-filled lamp having a monochromator that lets pass only the green radiation from the said lamp. The collimation optics 4 is known from the state-of-the-art and collimates the light beam exiting the said monochromator of light source 5. After the collimating optics 4, the light beam enters the spatial light modulator 3 which consists of a liquid crystal projector working in transmission mode and that allows a number of 256 grey levels. The translation block 6 contains two linear translation stages mounted at an angle of 90° to each other, their maximum translation range being equal to 1 mm with a step of 10 nm. The vertical translation block 8 consists of a linear translation stage having a maximum travel distance of 5 cm and a step of 10 micron, to this a piezoelectric crystal transducer being added for ensuring ultrahigh precision control of the vertical movement. The voltage source 9 can supply up to 5 kV in both negative and positive polarity, the voltage being either in DC regime or time-varying according to a rule established by the user. The reading block 10 of the voltage drop between the parallelization tips and substrate 7 can read the voltage with an accuracy of 10 nV, the reading being made in both DC and harmonic regime; in this latter case, the block 10 is coupled to a lock-in system situated in the controller 11 . The voltage source 9, the spatial light modulator 3, the said translation blocks 6 and 8, the reading block 10 are all commanded by the controller 11 that communicates with the computer 12. Computer 12 is a PC and contains all the software packages that are needed for the design of the CAD models and their “slicing” when 3D objects are intended to be built, for the translation of the model contours into commands for the controller as well as for the transfer of the generated commands to the controller 11. Furthermore, the system contains the fast feedback loop 22 that is connected to the reading block 10 and to the substrate 7, the fast feedback loop 22 being a DSP (DSP = Digital Signal Processor) in one embodiment while in another embodiment is a FPGA (FPGA = Field Programmable Gate Array). The fast feedback loop 22 commands the electro-mechanical system 23. The electro-mechanical system 23 consists of two rotation stages. These two rotation stages are used for rotating the tips array 2 around the two orthogonal rotation axes that lie in its plane and that are crossing the middle of its perpendicular sides. The two rotation stages can rotate the tips array 2 with a maximum angle of + / - 15° with a step of 0,1 microrad. The cover 21 is made of quartz glass.
[0095] Substrate 7 can be, in one embodiment, a Silicon wafer provided with contacts for connecting it to the voltage source 9. In another embodiment, substrate 7 can be a metallized Silicon wafer, the metallization being either a thin bilayer of Titanium / Gold, Titanium / Copper or other metals. Also, substrate 7 can be made of a semiconducting wafer of Germanium, Gallium Arsenide or other A III - B V compounds, of graphite, glass, quartz, sapphire, Silicon carbide, diamond. In one such embodiment, the substrate 7 is deposited with a mono- or multi-layer graphene layer.
[0096] In one embodiment, the metal layer 13 is deposited on its external surface with a monomolecular Barium oxide layer, the role of the said monomolecular layer being to reduce the workfunction of the metal layer 13.
[0097] An example of electrolyte solution 20 is the prior art composition of a CuSO4 solution used for the electrochemical deposition of Copper.
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Claims
CLAIMS1. Nanolithography system based on electric current according to the invention characterized by that it consists of the writing bloc (1), the XY translation bloc (6) of the substrate (7) in the horizontal plane, the substrate (7), the translation block (8) along the vertical Z direction normal to the substrate (7) plane, the vertical translation being made either for the substrate (7) or for the writing block (1), the voltage source (9) supplying an electric voltage between the tips array (2) and the substrate (7), the block (10) for reading the voltage between some of the tips of the tips array (2) and the substrate (7), the controller (11) for the management and monitoring of how all these blocks and voltage source (9) work, the computer (12) that, with the help of specific software packages, controls the overall and whole ensemble and allows editing of CAD models, conversion of CAD model formats and translation of the 2D patterns / 3D objects to be fabricated from their CAD format to the commands specific to each of the said blocks, the system containing also a fast feedback loop (22), a high precision electromechanical system (23) that rotates the tips array (2) around of at least one of the rotation axes that lies in the plane of the said tips array, the software package ensuring also the command of the light spatial modulator (3) and of the voltage source (9) according to the pattern that must be created.
2. Nanolithography system based on electric current according to claim 1 characterized by that the writing block (1) consists of the tips array (2) above which the spatial light modulator (3) is placed, above the said spatial light modulator being placed the collimation optics (4) that collimates the light beam emitted by the light source (5), the collimation optics (4) allowing to apply a light beam that is parallel, uniform and homogeneous as regards intensity onto the whole surface of the spatial light modulator (3).
3. Nanolithography system based on electric current according to claim 1 characterized by that the tips array (2) consists of a set of sharp tips, tips that have the same shape and size and are placed in the same plane and at a certain distance one from each other, the tips being controlled simultaneously and independently of each other, each tip being made up of a metal layer (13), above said metal layer (13) being deposited a metal layer (14) for ensuring adhesion for the photosensitive material (15) deposited on it, above the said photosensitive material (15) being deposited a semi-transparent electrode (16) that lets pass the light beam that has photons with enough energy to generate free charge carriers inside the photosensitive material (15), above the said electrode (16) being deposited an electrically insulating material (17) that is transparent to the light beam that generates free charge carriers inside the photosensitive material (15), the tips array (2) containing also a passivation layer (18) having the purpose to electrically and chemically insulate the photosensitive material (15) from the outside environment, being preferable that the metal layer (14) and the semi-transparent electrode (16) form ohmic contacts with the photosensitive material (15).
4. Nanolithography system based on electric current according to claims 1 and 3 characterized by that the metal layer (13) is made up of one of the Pt, Au, lr, Rh, Pd, W, Re metals or of their alloys, in some embodiments a monomolecular layer of alkali oxide such as CS2O, Rb2O or earth-alkali oxide such as BaO, SrO or a ferroelectric transitional oxide such as HfO2, ZrO2 or alike being deposited on the external surface of the metal layer (13), the purpose of the deposition of the said monomolecular layer being the reduction of the workfunction of the metal layer (13).
5. Nanolithography system based on electric current according to claims 1 and 3 characterized by that the metal layer (14) is made up of, but without reducing generality, Ti.
6. Nanolithography system based on electric current according to claim 1 characterized by that the photosensitive material (15) is made up of a wide bandgap semiconductor material or of an amorphous semiconductor or of a nanocrystalline semiconductor in all these cases the condition being that the said material have a high dark electrical resistivity, the photosensitive material (15) being made up of, but without limiting generality, amorphous Silicon or of nanocrystalline Silicon or of intrinsic SiC or of high resistivity ZnO.
7. Nanolithography system based on electric current according to claims 1 , 3 and 6 characterized by that the photosensitive material (15) is homogeneous and acts like a photoresistor, its electrical conductivity increasing with the illumination intensity incident on it.
8. Nanolithography system based on electric current according to claims 1 , 3 and 6 characterized by that, in some embodiments, the photosensitive material (15) consists of a p-n junction, the p-n junction planebeing parallel to the semi-transparent electrode (16), the voltage applied between said electrode (16) and substrate (7) adding to or being subtracted from the photovoltage generated by photovoltaic effect when photosensitive material (15) is illuminated, the addition or subtraction of the voltage depending on which side of the junction, p-type or n-type, is in contact with the said electrode (16).
9. Nanolithography system based on electric current according to claims 1 , 3 and 6 characterized by that, in some embodiments, the photosensitive material (15) consists of two different semiconducting materials that form a heterojunction, the plane of the heterojunction being parallel to the semi-transparent electrode (16), the voltage applied between said electrode (16) and substrate (7) adding to or being subtracted from the photovoltage generated by photovoltaic effect when photosensitive material (15) is illuminated, the addition or subtraction of the voltage depending on which material is in contact with the said electrode (16).
10. Nanolithography system based on electric current according to claims 1 and 3 characterized by that the metal layers (13) and (14) are deposited only in the region of tips while the photosensitive material (15) and the semi-transparent electrode (16) are deposited over the whole surface area of the tips array (2).
11. Nanolithography system based on electric current according to claims 1 and 3 characterized by that, in the case when the photosensitive material (15) consists of either a p-n junction or a heterojunction, the metal layer (13), the metal layer (14) and the photosensitive material (15) are deposited only in the region of the tips while between the ensembles of layers (13), (14) and (15) of each of the tips there is the passivation layer (18), with the semi-transparent electrode (16) being deposited over the entire area of the tips array (2).
12. Nanolithography system based on electric current according to claims 1 and 3 characterized by that the semi-transparent electrode (16) can be, but without restraining generality, a metal bilayer such as Ti / Au having a thickness below 20 nm, a transparent semiconductor such as ITI (Indium Tin Oxide) or Cui (Copper (I Iodide), the semi-transparent electrode (16) being polarized negatively with respect to the substrate (7) in all cases excepting electrochemical deposition, in this latter case the semi-transparent electrode (16) being polarized positively with respect to the substrate (7).
13. Nanolithography system based on electric current according to claims 1 and 3 characterized by that the passivation layer (18) can be, but without restraining generality, SiO2, SiaN4, Silicon oxynitride, Aluminium oxide or other electrically insulating materials, the thickness of the said layer (18) always being less than the height of the tip, preferably at a fifth of the tip’s height.
14. Nanolithography system based on electric current according to claims 1 and 3 characterized by that the tips array (2) contains tips for the parallelization of the tips array (2) with respect to the substrate (7), the said parallelization tips having the same size and being placed within the same plane as the rest of all the other tips and being situated, preferably, in a non-colinear manner with respect to each other in at least three of the corners of the tips array (2) when the said array has a polygonal shape, the metal layers (13) and (14) of the said parallelization tips being electrically accessible from the exterior for allowing the reading of the electric voltage between the said layer (13) and the substrate (7).
15. Nanolithography system based on electric current according to claim 1 characterized by that the tips array (2), in the case when it is used for electrochemical deposition, will contain some vertical channels (19 from place to place, said channels (19) offering access of the electrolyte (20) to the region of the tips where the electrochemical deposition is taking place, each said channel (19) having the walls electrically and chemically insulated with respect to the semi-transparent electrode (16) and the photosensitive material (15), the electrolyte (20) being situated in a channel that is parallel with the plane of the tips of the said array (2) and being bounded at the bottom, towards the tips, by the material (17) and bounded above by the cover (21) that is electrically insulating and transparent to the light beam used for generating free charge carriers inside the photosensitive material (15), above the said cover (21) being the spatial light modulator (3), the said modulator (3 being mounted either in intimate contact with the cover (21) or with a certain gap between them, above the said modulator (3) being placed the collimation optics (4) and above said optics (4) being situated the light source (5).
16. Nanolithography system based on electric current according to claim 1 characterized by that the light source (5) can be either a lamp, an electroluminescent diode of the LED type, a laser diode or any otherkind of laser or a VCSEL (Vertical Cavity Surface Emitting Laser) type device, in all these cases the light emission being made in a spectral range that contains the spectral region to which the photosensitive material (15) generates free charge carriers by light absorption.
17. Nanolithography system based on electric current according to claim 1 characterized by that the horizontal alignment with respect to previous patterns created onto the substrate is made by techniques known from the state-of-the-art of microelectronics such as, but without restraining generality, through the patterning on the substrate (7) and on the tips array (2) outside the region of it that is covered with tips of the so-called alignment marks, the alignment being achieved either by superposing the respective marks or by using the Moir6 interference image that results from the superposition of the said marks.
18. Nanolithography system based on electric current according to claims 1 and 3 characterized by that the procedure for parallelization of the tips array (2) with respect to the substrate (7) is achieved as follows:- at least one of the said parallelization tips is brought at a distance of less than 5 microns with respect to the substrate (7), this distance being determined with the help of a microscope objective temporally attached to the system or by using a capacitive method for the whole tips array (2).- the tips array (2) is lowered towards the substrate (7) step by step, with steps less than 100 nm, the distance between the three parallelization tips and the substrate (7) being determined at each step.- the distance between each of the parallelization tips and the substrate (7) is determined by measuring the capacitance of the capacitor formed by the metal layer (13) of the respective parallelization tip and by the substrate (7), the capacitance being measured, for example, with the help of the circuit (10).- if the distances between each of the parallelization tips and substrate (7) differ from each other, then the tips array (2) is rotated with respect to at least one of the rotation axes that are contained in the plane of it by using the precision electromechanical system (23) controlled by the fast feedback loop (22) in such a manner that all the parallelization tips are brought at the same distance with respect to substrate (7).- for increasing the parallelization accuracy, a light beam is applied on each region of the photosensitive material (15) that correspond to the parallelization tips while simultaneously applying a DC voltage supplied by the voltage source (9) between the semi-transparent electrode (16) and the substrate (7), the voltage having such a magnitude as to allow the emergence of an electric current of the field-emission type from the layer (13) of each of the parallelization tips to the substrate (7).- the circuit (10) reads the current value emitted by each of the parallelization tips and, through the means of the fast feedback loop (22) and the precision electro-mechanical system (23), rotates the tips array (2) around of at least one of the rotation axes that are contained in the plane of the said array (2) until the currents emitted by the parallelization tips become equals to each other.- for even smaller distances between the parallelization tips' layer (13) and substrate (7), the tunnelling current may be used for the parallelization purposes.- once the parallelization is achieved and the parallelization tips are brought at the desired distance with respect to the substrate (7) then the illumination of the photosensitive material (15) corresponding to the parallelization tips is switched-off.- the tips array (2) is brought at the necessary distance with respect to the substrate (7) by a vertical translation movement.- for ensuring the periodic checking the distance between the parallelization tip’s layer (13) and substrate (7), then the photosensitive material (15) is illuminated in the regions corresponding to the parallelization tips at time intervals chosen by the user and the field-emission currents of each of the parallelization tips are compared to each other after which, if necessary, the parallelization procedure of the tips array (7) with respect to the substrate (7) is repeated.
19. Nanolithography system based on electric current according to claims 1 , 3 and 18 characterized by that, in another embodiment, the determination of the distance between the layer (13) of each of the parallelization tips with respect to the substrate (7) is achieved as follows:- a voltage of known value, either continuous or variable with respect to time, is applied between the semi-transparent electrode (16) and the substrate (7).- the voltage change between the layer (13) of each of the parallelization tips and the substrate (7) is monitored, this voltage being dependent on the distance between the layer (13) and the substrate (7).- in the case that a time-harmonic voltage is applied, then the lock-in detection is used for the high accuracy measurement of the voltage on the capacitor formed by the layer (13) and the substrate (7) and, implicitly, of the distance between the apex of the respective parallelization tip and substrate (7).
20. Nanolithography system based on electric current according to claim 1 characterized by that it may work standalone or in combination with other lithography techniques as for example, but without restraining generality, when the patterns of large size and / or of poor resolution are made by photolithography after which the fine size and / or high-resolution patterns are made with the help of the present system.
21. Nanolithography system based on electric current according to claim 1 characterized by that the optical command of the tips array (2) can be made with the help of the spatial light modulator (3) either in an ON / OFF regime or on a grey levels regime, in the latter case the light intensity varying from one pixel of the said modulator (3) to another pixel of it.
22. Nanolithography system based on electric current according to claim 1 characterized by that the control of the voltage between any of the tips of the tips array (2) and the substrate (7) can be achieved either by varying the voltage supplied by the voltage source (9), or by varying the light intensity applied by the pixels of the said modulator (3) to their corresponding tips, or by using these two said methods in a combined manner, the voltage between any of the tips of the tips array (2) and the substrate (7) being varied over time according to a mathematical formula that allows the realization of the desired patterns.
23. Nanolithography system based on electric current according to claim 1 characterized by that the system scans either the substrate (7) or the writing block (1), the scan being made first along the horizontal X direction / axis on a distance equal to the distance between two consecutive tips in the X direction, then the coordinate Y is modified with a step determined by the smallest step and the scan along the X axis is repeated, this entire scanning cycle being repeated until the whole distance between two consecutive tips along the Y axis has been crossed, both the voltage applied to the tips array (2) with respect to the substrate (7) and the light intensity transmitted by each of the pixels of the said modulator (3) being varied during the scan according to the patterns that have to be realized.
24. Nanolithography system based on electric current according to claim 1 characterized by that it allows implementation of the following technologies: a) local anodic oxidation of substrate (7), the said substrate being either an electrical conductor or a semiconductor, the anodic oxidation process taking place in ambient air or in oxygen-enriched ambient air or in oxygen, in all these cases being preferable to have water vapours in ambient. b) local oxidation of a monomolecular layer or organic molecules deposited onto substrate (7) such as, but without limiting generality, calixarene molecules, the process being that of local electro-oxidation of the monomolecular layer under the electric current emitted by the tips of the tips array (2) and under ambient conditions. c) local electrical breakdown of a thin insulating layer deposited onto substrate (7) such as, but without limiting generality, a thin polymer layer or a thin inorganic dielectric layer, the local electrical breakdown having as a consequence either the breaking of the chemical bonds or crystallization in the case that the thin layer is of amorphous or glassy structure or amorphization if the thin layer is initially crystalline.d) electron beam lithography similar to the traditional counterpart provided that an electrono-resist is used, the necessary voltages in this case being of at least 1 kV, the difference as compared to the traditional electron beam lithography being the presence of a multitude of current sources represented by the emitting tips and the lack of electron beam focusing. e) 2D and / or 3D electrochemical deposition of metals by using the electrolyte solution (20) placed between the tips array (2) and the substrate (7), the 3D structures being obtained by moving the tips array (2) in a plane parallel to the substrate (7) and also along the vertical that Is perpendicular to the substrate (7) and by controlling the local illumination of the photosensitive material (15), the independent control of each of the tips contained in the tips array (2) by its specific illumination allowing each said tip to build its own said 3D structure while the time variation of the electric voltage is known from the state-of-the-art.
25. Nanolithography system based on electric current according to claim 1 characterized by that the voltage source (9) may supply a constant voltage through time or a time-variable voltage according to a specific temporal profile or a voltage as a series of pulses, each such pulse having same duration or a duration that may vary from one pulse to the other while the time interval between pulses being the same or varying with time from one pulse to the other, while the pulse amplitude and frequency being either constant or variable through time and being well controlled and correlated with the specific technological process, or may supply a voltage that is a combination of at least two of the mentioned voltage regimes.
26. Nanolithography system based on electric current according to claim 1 characterized by that the procedure for correction of the tips variability in the tips array (2) consists in the following steps:- the tips array (2) is approached to substrate (7) down to the distance at which the desired electric current lithography can take place.- a voltage is applied between the semi-transparent electrode (16) and the substrate (7).- the photosensitive material (15) is illuminated with the help of the spatial light modulator (3) with a light intensity that is uniform across its entire surface.- a 2D test pattern is produced onto substrate (7) by the desired electric current lithography, for example either by local anodic oxidation of the said substrate (7) or by local electro-oxidation of a monomolecular layer of resists or by any other form of electric current-driven lithography.- the produced 2D test patterns are analysed.- the necessary correction of the light intensity distribution provided by the spatial light modulator (3) is computed by the computer (12), the correction being based on the differential modulation of the light transmission of said modulator (3) corresponding to each tip in such a way as to achieve the same value for the electric field between any of the tips and the substrate (7).- the computed light transmissivity distribution that ensures the same electric field value between any of the tips and the substrate (7) is applied to the spatial light modulator (3) .- the above steps are repeated for different values of the electric field in the proximity of the tips, the different values of the electric field being obtained with the help of the voltage source (9).- the correction factors thus determined for different values of the electric field in the proximity of the tips are used in all the subsequent processes of the electric current-driven lithography that was considered.
27. Nanolithography system based on electric current according to claim 1 characterized by that the parameters that control the local charge density deposited through exposure to the electric current are the voltage supplied by the voltage source (9), the light intensity provided by the pixels of the spatial light modulator (3) on their corresponding tips, the relative scanning speed between tips array (2) and substrate (7) in the XY plane and the vertical distance between the tips and the substrate (7), the said vertical distance being constant through time or can be varied in time according to a certain rule, in a particular case the said variation of thesaid vertical distance being of sinusoidal type having a certain frequency and amplitude around the average distance between layer (13) - substrate (7).
28. Nanolithography system based on electric current according to claims 1 , 18 and 19 characterized by that the way of use of the nanolithography system is as follows:- the tips array (2) is approached to substrate (7) and made parallel to it, the approach being made either by translating the entire writing block (1) in a direction perpendicular to the substrate (7) or by translating the substrate (7) along the same direction.- a constant or time-varying voltage is applied between the semitransparent electrode (16) and the substrate (7) by the voltage source (9), the temporal variation of it depending on the intended application.- the light source (5) is switched on and it uniformly illuminates, through the optical system (4), the spatial light modulator (3), the said modulator (3) being initially in its off / opaque state with all its pixels.- the spatial light modulator (3) establishes a spatial distribution of its optical transmissivity for each of its pixels in accordance with the commands received from computer (12) through the controller (11), each pixel that has its own optical transmissivity illuminating only one tip, always one and the same, of the tips array (2).- either the writing block (1) or, preferably, the substrate (7) are displaced with respect to each other in a XY plane parallel to substrate (7) and, in certain cases, also along the normal to substrate (7) direction, while the optical transmissivity of the pixels of the spatial light modulator (3) and the voltage supplied by the voltage source (9) are varied according to the 2D or 3D structures to be made.- once the patterning job is accomplished, the voltage source (9) brings its voltage to zero while the spatial light modulator (3) switches all its pixels to the opaque state and the light source (5) is switched off.- the writing block (1) is distanced away from the substrate (7).
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