Epoxy-containing material planarization layer for thin film encapsulation of inkjet printed quantum dot displays

Abstract

The present disclosure generally provides devices and methods thereof. The devices include a backplane. At least three light emitting diodes (LEDs) are disposed on the backplane. Subpixel isolation (SI) structures are disposed on an upper surface of the backplane between the at least three LEDs. Adjacent SI structures define wells of subpixels. The wells of each of the subpixels have a color conversion material disposed therein. A planarization layer is disposed in the wells over the color conversion material and over the SI structures. The devices include a thin film encapsulation layer stack. The thin film encapsulation layer stack includes a first inorganic silicon-containing layer disposed over the planarization layer. An organosilicon-containing layer is disposed over the first inorganic silicon-containing layer. A second inorganic silicon-containing layer is disposed over the organosilicon-containing layer.

Description

EPOXY-CONTAINING MATERIAL PLANARIZATION LAYER FOR THIN FILM ENCAPSULATION OF INKJET PRINTED QUANTUM DOT DISPLAYSBACKGROUNDField

[0001] Embodiments of the present disclosure generally relate to an LED display including color conversion materials and techniques for coating the display with epoxy-containing material.Description of the Related Art

[0002] A light-emitting diode (LED) panel uses an array of LEDs, with individual LEDs providing the individually controllable pixel elements. Such an LED panel can be used for a computer, touch panel device, personal digital assistant (PDA), cell phone, television monitor, and the like.

[0003] An LED panel that uses micron-scale LEDs based on lll-V semiconductor technology (also called microLEDs or micro-LEDs) would have a variety of advantages as compared to organic LEDs (OLEDs), e.g., higher energy efficiency, brightness, and lifetime, as well as fewer material layers in the display stack, which can simplify manufacturing. However, there are challenges to fabrication of microLED panels. MicroLEDs having different color emissions (e.g., red, green, and blue pixels) need to be fabricated on different substrates through separate processes. Integration of the multiple colors of microLED devices onto a single panel requires a pick-and- place step to transfer the microLED devices from their original donor substrates to a destination substrate. This often involves modification of the LED structure or fabrication process, such as introducing sacrificial layers to ease die release. In addition, stringent requirements on placement accuracy (e.g., less than 1 pm) limit either the throughput, the final yield, or both.

[0004] An alternative approach to bypass the pick-and-place step is to selectively deposit color conversion agents (e.g., quantum dots (QDs), nanostructures, photoluminescent materials, or organic substances) at specific pixel locations on a substrate fabricated with monochrome LEDs. The monochrome LEDs can generate relatively short wavelength light, e.g., ultraviolet (UV) or blue light, and the colorconversion agents can convert this short wavelength light into longer wavelength light, e.g., red or green light for red or green pixels. The selective deposition of the color conversion agents can be performed using high-resolution shadow masks, controllable inkjet printing, or aerosol jet printing.SUMMARY

[0005] The present disclosure generally relates to a microLED display including color conversion materials and techniques for coating the display with epoxycontaining material.

[0006] The present disclosure generally provides devices. The devices include a backplane. At least three light emitting diodes (LEDs) are disposed on the backplane. Subpixel isolation (SI) structures are disposed on an upper surface of the backplane between the at least three LEDs. Adjacent SI structures define wells of subpixels. The wells of each of the subpixels have a color conversion material disposed therein. A planarization layer is disposed in the wells over the color conversion material and over the SI structures. The devices include a thin film encapsulation layer stack. The thin film encapsulation layer stack includes a first inorganic silicon-containing layer disposed over the planarization layer. An organosilicon-containing layer is disposed over the first inorganic silicon-containing layer. A second inorganic silicon-containing layer is disposed over the organosilicon-containing layer.

[0007] The present disclosure also generally provides devices. The devices include a backplane. At least three light emitting diodes (LEDs) are disposed on the backplane. Subpixel isolation (SI) structures are disposed on an upper surface of the backplane between the at least three LEDs. Adjacent SI structures define wells of subpixels. The wells of each of the subpixels have a color conversion material disposed therein. A planarization layer is disposed in the wells over the color conversion material and over the SI structures. The devices include a thin film encapsulation layer stack.

[0008] The present disclosure also generally provides methods for applying a thin film encapsulation layer to an LED display. The methods include forming a subpixel isolation (SI) structure disposed on an upper surface of a backplane. The SI structuresdisposed between at least three light emitting diodes (LEDs). Adjacent SI structures define wells of subpixels over the at least three LEDs. Each of the subpixels have a color conversion material disposed in the wells. A planarization layer including an epoxy-containing material is deposited over the SI structures. The planarization layer fills the wells of subpixels over the at least three LEDs. The planarization layer includes at least a planar upper surface over the SI structures and the wells.BRIEF DESCRIPTION OF THE DRAWINGS

[0009] So that the manner in which the above-recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments of the present disclosure and are therefore not to be considered limiting of its scope, may admit to other equally effective embodiments.

[0010] Figure 1 is a schematic, cross-sectional view of a device, according to embodiments of the present disclosure.

[0011] Figure 2 is a flow diagram of a method of applying a thin film encapsulation to a LED display, according to embodiments of the present disclosure.

[0012] Figures 3A-3G are schematic, cross-sectional views of a device during the method of Figure 2, according to embodiments of the present disclosure.

[0013] Figure 4 is a cross-sectional scanning electron microscope (SEM) image of a device, according to embodiments of the present disclosure.

[0014] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.DETAILED DESCRIPTION

[0015] The present disclosure generally relates to an LED display including color conversion materials and techniques for coating the display with epoxy-containing material.

[0016] Improving lifetime, stability, and chromaticity of quantum dots (QDs) is desirable in ultraviolet (UV) / blue emissive LED display fabrication. A challenge associated with the use of QDs is their high instability under ambient conditions, especially blue QDs. They are highly sensitive to oxygen, moisture, heat, and light and may lose their color if not encapsulated or stored under inert atmosphere. Degradation of QDs in ambient environments can significantly affect the performance of the display panels and cause a complete failure.

[0017] Thin film encapsulation (TFE) is a technique to deposit a thin layer (e.g., 1 pm or less) of organic and inorganic materials (e.g., metals, metal oxides, nitrides, polymers, etc.) in tandem over photo- and electro-active materials to preserve their properties. Deposition techniques such as physical vapor deposition (PVD), chemical vapor deposition (CVD), initiated chemical vapor deposition (iCVD), plasma enhanced chemical vapor deposition (PECVD), etc., are typically involved in creating TFEs; however, these deposition techniques frequently involve use of high temperatures, reactive precursors, high energy particles, or plasma that are detrimental to QDs. In order to prevent degradation of QDs, it is desirable to create a protective layer or encapsulation over the QDs before beginning a TFE process. In addition to encapsulation, it is desirable for such a layer to be capable of planarizing the typically uneven topography of the color conversion layer (CCL) and facilitating a uniform and stress-free deposition of the TFE.

[0018] In aspects of the present disclosure, to planarize and create a protective layer on QD pixel arrays, a resin may be spin coated on to the QD pixel arrays and then cured (e.g., by exposure to ultraviolet light). It is desirable for the resin to be chemically inert to the QDs and to not involve harsh conditions (e.g., high temperatures or plasma) for curing. It is also desirable for the resin to form a smooth, uniform coating and for the resin to wet the entire pixel array uniformly. Having a low surface energy and high chemical compatibility with QDs, silicon nitrides (SiNx), andother materials of a display may enable the resin coating to wet the entire pixel array uniformly.

[0019] According to aspects of the present disclosure, LEDs may incorporate color conversion materials and epoxy-containing materials over the color conversion materials. For example, QDs may be deposited in wells of LEDs of a display and epoxy-based polymeric materials may then be spin-coated on the display.

[0020] Figure 1 is a schematic, cross-sectional view of a device 100. The device 100 includes color conversion materials 114a, 114b, and 114c for at least three LEDs 104 disposed on a backplane 102. In some embodiments, the LEDs 104 may be microLEDs. The micro-LEDs 104 are integrated with backplane circuitry so that each micro-LED 104 can be individually addressed. For example, the circuity of the backplane 102 can include a thin film transistor (TFT) active matrix array with a thin- film transistor and a storage capacitor (not illustrated) for each micro-LED, column address and row address lines, column and row drivers, to drive the micro-LEDs 104. Alternatively, the micro-LEDs 104 can be driven by a passive matrix in the backplane 102 circuitry. The backplane 102 can be fabricated using conventional complementary metal-oxide silicon (CMOS) processes. The micro-LEDs 104 are connected to the backplane 102 via backplane electrodes 106 and micro-LED electrodes 108.

[0021] Subpixel isolation (SI) structures 110 are disposed on the backplane 102 and between the LEDs 104a, 104b, and 104c. In some embodiments, the SI structures 110 may be created by photo-patterning epoxy-containing material (e.g., epoxy-based polymeric materials, such as an epoxy-based photoresist, such as SU- 8) on the backplane 102. Adjacent subpixel isolation structures 110 define the respective wells 113 of at least three subpixels 112. The subpixels 112 include a red subpixel 112a with a red color conversion material 114a disposed in the well 113a of the red subpixel 112a, a green subpixel 112b with a green color conversion material 114b disposed in the well 113b of the green subpixel 112b, and a blue subpixel 112c with a blue color conversion material 114c disposed in the well 113c of the blue subpixel 112c. When a micro-LED 104a of the red subpixel 112a is turned on, the red color conversion material 114a will convert the light emitted from micro-LED 104a intored light. When a micro-LED 104c of the blue subpixel 112c is turned on, the blue color conversion material 114c will convert the light emitted from micro-LED 104c into blue light.

[0022] In some embodiments, the color conversion material 114 may be quantum dots. The quantum dots may be sized to produce wavelengths corresponding to different colors. In one embodiment, the red color conversion material 114a may have quantum dots approximately 6 nm in size. The blue color conversion material 114c may have quantum dots approximately 2 nm in size. The green color conversion material 114b may have quantum dots approximately 4 nm in size. In other embodiments, the color conversion material 114 may be nanostructures, photoluminescent materials, or organic substances. In some embodiments, emission surfaces (e.g. , upper surfaces in FIG. 1 ) of the color conversion materials 114a, 114b, and 114c may be arcuate and / or non-planar. For example, the emission surfaces may be concave, as illustrated in FIG. 1 , convex, or a different shape.

[0023] In some embodiments, the device 100 can include a metal-containing layer 140. The metal-containing layer 140 can be disposed over the sidewalls and top surface of the SI structures 110. The metal-containing layer 140 may be selectively deposited on the walls of the SI structures 110 using angular PVD. The metalcontaining layer 140 can be reflective to reduce light cross-talk between neighboring subpixels 112. For example, the metal-containing layer 140 can include a reflectivity of about 80% to about 100%, e.g., about 80% to about 99, about 85% to about 95%, or about 88% to about 92%. As a further example, the metal-containing layer 140 can include aluminum. In some embodiments, the metal-containing layer 140 can include a thickness of about 0.1 pm to about 10 pm, e.g., about 0.1 pm to about 8 pm, about 0.5 pm to about 5 pm, or about 0.5 pm to about 1 pm.

[0024] The device 100 can include an inorganic layer 150. The inorganic layer 150 can be disposed over the sidewalls and top surface of the SI structures 110. The inorganic layer 150 has a thickness of about 0.1 pm to about 1 pm, e.g., about 0.1 pm to about 0.8 pm, about 0.4 pm to about 0.6 pm, or about 0.45 pm to about 0.55 pm. In some embodiments, the inorganic layer 150 is disposed over or on the metalcontaining layer 140. The inorganic layer 150 can include a silicon-containingmaterial. The silicon-containing material can include silicon nitride (SiNx). The inorganic layer 150 can be deposited over the metal-containing layer 140 to serve as an insulator in order to prevent shorting of the back plane of the display through the metal-containing layer 140.

[0025] In embodiments of the present disclosure, a planarization layer 141 is disposed over the SI structures 110 and the color conversion materials 114a, 114b, and 114c. The planarization layer 141 may protect the color conversion materials 114a, 114b, and 114c of the sub-pixels 112a, 112b, and 112c from exposure to oxygen, moisture, heat, and / or light. Without being bound by theory, by protecting the color conversion materials 114a, 114b, and 114c from exposure to oxygen, moisture, heat, and / or light, the stability of the color conversion material may increase. The planarization layer 141 can include an upper surface 142 that is substantially planar. The planarization layer 141 can fill one or more portions of the wells 113a, 113b, and 113c (e.g., portions above the color conversion materials 114a, 114b, and 114c) and form a continuous planar upper surface 142 above the sub-pixels 112a, 112b, and 112c.

[0026] In some embodiments, the planarization layer 141 can include an epoxy containing material, an acrylic-based resin, or a thiolene based resin. In some embodiments, the planarization layer 141 can be a crosslinked polymeric system or a non-crossl inked polymeric system. In some embodiments, the planarization layer 141 can include an epoxy-containing material. In some embodiments, the epoxycontaining material can include a thickness of about 1 p to about 5 pm. In some embodiments, the epoxy-containing material is chemically compatible with the color conversion materials 114a, 114b, and 114c and / or the other materials of the display (e.g., silicon nitrides). In some embodiments, the epoxy-containing material can have a low surface energy, thereby allowing the epoxy-containing material to wet the pixel array of a display uniformly, causing the planarization layer 141 to form a uniformly flat surface over the display. For example, the epoxy-containing material may include Sil-8, an epoxy-containing negative photoresist.

[0027] In some embodiments, the planarization layer 141 may form a uniformly flat upper surface 142 over the device 100 by spin-coating the epoxy-containing materialon a display including the device 100. For example, the display may be contained in a chamber filled with an inert gas (e.g., argon) while the epoxy-containing material of the planarization layer 141 is deposited (e.g. by spin-coating) and cured (e.g., by exposure to UV light). The inert gas may prevent the color conversion materials 114a, 114b, and 114c from being exposed to oxygen while the epoxy-containing material of the planarization layer 141 is being applied to the display and while the epoxy- containing material of the planarization layer 141 is being cured.

[0028] In some embodiments, a thin film encapsulation (TFE) layer 130 may be disposed over the planarization layer 141 on a display including the device 100 and the planarization layer 141. The TFE 130 can include a first inorganic silicon- containing layer 134, an organosilicon-containing layer 136, and a second inorganic silicon-containing layer 138. The organosilicon-containing layer 136 may be between the first inorganic silicon-containing layer 134 and the second inorganic silicon- containing layer 138. In some embodiments, the first inorganic silicon-containing layer 134 and the second inorganic silicon-containing layer 138 may include silicon nitrides. In some embodiments, the organosilicon-containing layer 136 may include hexamethyldisiloxane (HMDSO). In some embodiments, the layer 136 includes an epoxy-based polymeric material. In some embodiments, the organosilicon-containing layer 136 includes a photoresist.

[0029] In some embodiments, each of the first and second inorganic-containing layers can have a thickness of about 0.1 pm to about 1 pm, e.g., about 0.1 pm to about 0.8 pm, about 0.2 pm to about 0.5 pm, about 0.5 pm to about 0.9 pm, or about 0.9 pm to about 1 pm. In some embodiments, the organosilicon-containing layer 136 can have a thickness of about 1 pm to about 3 pm, e.g., about 1.1 pm to about 2.8 pm, about 1 .2 pm to about 2.5 pm, about 1 .5 pm to about 1 .9 pm, or about 1 .5 pm to about 1 .6 pm.

[0030] In some embodiments, the TFE 130 may include a number of layers other than the three layers 134, 136, and 138 as illustrated in Figure 1. In some embodiments, layers of the TFE 130 may have varying thicknesses. For example, the first inorganic-containing layer can include a first thickness that differs from a second thickness of the second inorganic-containing layer and / or a third thickness of theorganosilicon-containing layer. As a further example, the first inorganic-containing layer can include a first thickness that is similar to a second thickness of the second inorganic-containing layer and / or a third thickness of the organosilicon-containing layer.

[0031] Figure 2 is a flow diagram of a method 200 of applying a thin film encapsulation to an LED display, such as a LED display including the device 100 described herein. Figures 3A-3G are schematic, cross-sectional views of the backplane 102 during the method 200 of forming the subpixels 112. At operation 202, as shown in FIG. 3A, a color conversion material 114 is deposited in a well 113 of subpixel 112 of an LED display including the device 100. In some embodiments, the color conversion material 114 can be deposited in the well 113 by ink jet printing the color conversion material into the well. In some embodiments, the first color conversion material is a red color conversion material for the red subpixel 112a.

[0032] At operation 204 the first color conversion material of a first subpixel is cured. In some embodiments, the first subpixel may correspond to the red subpixel 112a. In some embodiments, operation 204 can include repeating operations 202 and 204 for a second color conversion material of a second subpixel and for a third color conversion material of a third subpixel, as shown in FIG. 3B. The first, second, and third conversion materials are cured via UV curing, e.g., a 385 nm UV LED, and are removed via washing. In one embodiment, the second color conversion material is a green color conversion material for the green subpixel 112b and the third color conversion material is a blue color conversion material for the blue subpixel 112c. In some embodiments, operations 202 and 204 may be repeated for the fourth subpixel (not shown).

[0033] Operation 206, as shown in FIG. 3C, a planarization layer 141 is deposited on the LED display. The planarization layer 141 can be deposited by spin coating one or more epoxy resins on the display. For example, spin coating can include coating the LED display with the planarization layer 141 while spinning the LED display at about 2000 revolutions per minute rpm to about 4000 rpm, e.g., about 2000 rpm to about 3800 rpm, about 2500 rpm to about 3500 rpm, or about 2800 rpm to about 3200 rpm. In some embodiments, the LED display may be spun at an acceleration of about200 meters per second (m / s) to about 800 m / s, e.g., about 200 m / s to about 600 m / s, about 300 m / s to about 600 m / s, or about 400 m / s to about 550 m / s.

[0034] Operation 206 can include spinning the LED display for about 10 seconds (s) to about 50 s, e.g., about 10 s to about 40 s, about 20 s to about 35 s, or about 25 s to about 30 s. Without being bound by theory, by applying the planarization layer 141 to the LED display for about 30 s while spinning at about 3000 rpm, the planarization layer 141 can planarize while concurrently filling in the wells 113 of the LED device, thereby protecting the conversion materials 114. In some embodiments, operating 206 can include heating the LED display to a temperature of about 25 °C to about 80 °C in an inert gas and / or under a reduced pressure for a period of about 1 min to about 10 min.

[0035] At operation 208, the planarization layer 141 can be cured. The planarization layer 141 can be cured using a UV curing station, e.g., broad band UV curing operating at about 280 mJ / cm2The UV curing station can be operated at a power of about 0% to about 100%. The UV curing station can be operated at a speed of 19 rpm, in which the LED display may be passed through the UV curing station about 1 to about 10 times, e.g., about 1 time. The planarization layer 141 can be cured in the presence of an inert gas, e.g., argon, thereby protecting the color conversion materials 114 from photobleaching. The planarization layer 141 can then be baked at a temperature of about 80 °C to about 120 °C in an inert gas and / or under a reduced pressure for a period of about 1 min to about 10 min. Without being bound by theory, the planarization layer 141 canprotect the color conversion materials 114a, 114b, and 114c, from high temperatures, reactive precursors, high energy particles, and / or plasmas used in PVD, CVD, iCVD, and / or PECVD processes used in later processing steps, e.g., 210-214.

[0036] At operation 210, as shown in FIG. 3D, a first inorganic silicon-containing layer 134 can be deposited over the planarization layer 141. The first inorganic silicon- containing one or more silicon nitrides. In some embodiments, the first silicon- containing material 134, may be deposited via one or more PVD, CVD, iCVD, and / or PECVD processes.

[0037] At operation 212, as shown in FIG. 3E, an organosilicon-containing layer 136 can be deposited over the first inorganic silicon-containing layer 134. The organosilicon-containing layer 136 can include one or more siloxanes. In some embodiments, the organosilicon-containing layer 136 may include hexamethyldisiloxane (HMDSO). In some embodiments, the organosilicon-containing layer 136, may be deposited via one or more PVD, CVD, iCVD, and / or PECVD processes.

[0038] At operation 214, as shown in FIG. 3F, a second inorganic silicon- containing layer 138 can be deposited over the organosilicon-containing layer 136. The second inorganic silicon-containing layer 138 including one or more silicon nitrides. In some embodiments, the second inorganic silicon-containing layer 138, may be deposited via one or more PVD, CVD, iCVD, and / or PECVD processes.

[0039] EXAMPLES

[0040] Figure 4 is a cross-sectional scanning electron microscope (SEM) image of a device 400. The device was produced in a glovebox, a planarization layer 440, e.g., Sil-8, was spin coated on the device at 3000 rpm for 30s at 500 rpm / s acceleration. The device was visually inspected for defects and after confirming that there is no dewetting, the device was pre-baked on a hotplate for 2 mins at 100 °C and cured using a UV curing station (broad band UV, 280 mJ / cm2) with 50% power, 19 rpm speed and 1 pass. The UV curing was performed in an argon filled bag to protect the color conversion materials from photobleaching. The cured film was later post-baked inside the glovebox on a hot plate for 2 mins at 100 °C.

[0041] The device included a TFE 430 disposed on and / or over a portion of a blue subpixel 412a and a portion of a green subpixel 412b. The blue subpixel 412a included a well 413a that included a blue color conversion material 422, and the green subpixel 412b had a well 413b that included a green color conversion material 424. In the blue subpixel 412a, the upper surface 423 of the blue conversion material 422 was substantially concave, while in the green subpixel 412b, the upper surface 425 of the green color conversion material 424 was substantially level.

[0042] As shown in FIG. 4, the upper surface 423 of the blue color conversion material 422, the upper surface of the green color conversion material 424, and the upper surface 411 of the SI structure 410 were not level with each other. The uneven topography of the device was caused by the blue color conversion material 422 only partially filling the well 413a and / or the green color conversion material 424 only partially filling the well 413b. The planarization layer 440, e.g., Sll-8, was deposited over the upper surface 423 of the blue color conversion material 422, the upper surface of the green color conversion material 424, and the upper surface 411 of the SI structure 410, in which the planarization layer 440 had a thickness of about 4 pm.

[0043] The planarization layer 440 of the TFE 430 had planarized the uneven topography of the device by filling the remaining portion of the well 413a and / or the well 413b such that a uniform protective coating was produced having a uniform topography along an upper surface 441 .

[0044] A first inorganic silicon-containing layer 434, e.g., SiNx, was deposited over the upper surface 441 of the planarization layer 440, in which the first inorganic silicon- containing layer 434 had a thickness of about 1 pm. An organosilicon-containing layer 436, e.g., hexamethyldisiloxane (HMDSO), was deposited over the first inorganic silicon-containing layer 434, in which the organosilicon-containing layer 436 had a thickness of about 1 .5 pm. A second inorganic silicon-containing layer 438, e.g., SiNx, was deposited over the organosilicon-containing layer 436, in which the second inorganic silicon-containing layer 438 had a thickness of about 1 pm.

[0045] Overall, the present disclosure provides an LED display including color conversion materials that are coated with a planazaring epoxy-containing material. The epoxy-material can provide a uniform topography of the device for future encapsulation layers to be coated onto, while concurrently filling any non-planar surfaces or voids produced during a filling of a well with the color conversion material. Moreover, the epoxy-containing material can provide a barrier, thereby protecting the color conversion materials from elevated temperatures, reactive precursors, high energy particles or plasma as a result of a later processing step when forming a thin film encapsulation layer stack over the device.

[0046] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims

What is claimed is:

1. A device, comprising: a backplane, at least three light emitting diodes (LEDs) disposed on the backplane; subpixel isolation (SI) structures disposed on an upper surface of the backplane between the at least three LEDs, adjacent SI structures defining wells of subpixels, the wells of each of the subpixels having a color conversion material disposed therein; and a planarization layer disposed in the wells over the color conversion material and over the SI structures; and a thin film encapsulation layer stack, the thin film encapsulation layer stack comprising: a first inorganic silicon-containing layer disposed over the planarization layer; an organosilicon-containing layer disposed over the first inorganic silicon-containing layer; and a second inorganic silicon-containing layer disposed over the organosilicon-containing layer.

2. The device of claim 1 , further comprising a metal-containing layer disposed over the SI structures.

3. The device of claim 1 , further comprising an inorganic layer disposed over the SI structures.

4. The device of claim 1 , wherein the planarization layer comprises an epoxycontaining material.

5. The device of claim 1 , wherein the planarization layer comprises a thickness of about 1 pm to about 5 pm.

6. The device of claim 1 , wherein the first inorganic silicon-containing layer and the second inorganic silicon-containing layer comprises a silicon nitride material.

7. The device of claim 1 , wherein the first inorganic silicon-containing layer and the second inorganic silicon-containing layer comprises a thickness of about 0.1 pm to about 1 pm.

8. The device of claim 1 , wherein the organosilicon-containing layer comprises a thickness of about 1 pm to about 3 pm.

9. A device, comprising: a backplane, at least three light emitting diodes (LEDs) disposed on the backplane; between the at least three LEDs, adjacent SI structures defining wells of subpixels, the wells of each of the subpixels having a color conversion material disposed therein; and a planarization layer disposed in the wells over the color conversion material and over the SI structures; and a thin film encapsulation layer stack.

10. The device of claim 9, wherein the thin film encapsulation layer stack comprises: a first inorganic silicon-containing layer disposed over the planarization layer; an organosilicon-containing layer disposed over the first inorganic silicon- containing layer; and a second inorganic silicon-containing layer disposed over the organosilicon- containing layer.11 . The device of claim 10, wherein the first inorganic silicon-containing layer and the second inorganic silicon-containing layer comprises a silicon nitride material.

12. The device of claim 10, wherein the first inorganic silicon-containing layer and the second inorganic silicon-containing layer comprises a thickness of about 0.1 pm to about 1 pm.

13. The device of claim 10, wherein the organosilicon-containing layer comprises a thickness of about 1 pm to about 3 pm.

14. The device of claim 9, further comprising a metal-containing layer disposed over the SI structures.

15. The device of claim 14, further comprising an inorganic layer disposed over the SI structures .

16. The device of claim 9, wherein the planarization layer comprises an epoxycontaining material.

17. The device of claim 9, wherein the planarization layer comprises a thickness of about 1 pm to about 5 pm.

18. A method for applying a thin film encapsulation to a LED display, the method comprising: forming subpixel isolation (SI) structures disposed on an upper surface of a backplane, the SI structures disposed between at least three light emitting diodes (LEDs), wherein adjacent SI structures define wells of subpixels over the at least three LEDs, each of the subpixels having a color conversion material disposed in wells; and depositing a planarization layer comprising an epoxy-containing material over the SI structures, wherein the planarization layer fills the wells of subpixels over the at least three LEDs, and wherein the planarization layer comprises at least a planar upper surface over the SI structures and the wells.

19. The method of claim 18, further comprising depositing a thin film encapsulation layer stack, wherein depositing the thin film encapsulation layer stack comprises: depositing a first inorganic silicon-containing layer over the planarization layer; depositing an organosilicon-containing layer over the first inorganic silicon- containing layer; anddepositing a second inorganic silicon-containing layer over the organosilicon- containing layer.

20. The method of claim 18, wherein depositing the planarization layer comprises spin-coating the epoxy-containing material.

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