Computing device

Abstract

The present application provides a computing device, comprising a mainboard and a PCIE card module, wherein the mainboard comprises a first connector; the first connector is used for inserting the PCIE card module or a first PCIE card; when the PCIE card module is inserted into the first connector, the PCIE card module is used for electrically connecting a second PCIE card to the mainboard; and the type of the first PCIE card is different from the type of the second PCIE card. Thus, switching of different types of PCIE cards can be achieved by means of the PCIE card module.

Description

Computing device

[0001] The present application claims priority from the Chinese patent application No. 202410472334.2 filed on April 18, 2024, and entitled "Computing device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the field of computing device, and in particular, to a computing device. BACKGROUND

[0003] PCIE (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard, which is widely used in computer systems. PCIE card refers to hardware (such as network card, graphics card, etc.) with PCIE port, which can be inserted into the PCIE slot of the mainboard of computing devices such as host, server and network switch, and communicates with the mainboard through PCIE bus to increase the storage capacity, network function or other hardware performance of the computing device.

[0004] In the current server, different Internet companies have different requirements for the type of PCIE card, such as OCP (Open Compute Project) card, PCIE CEM (Card Electromechanical) card, etc. There are also different requirements for the PCIE port of the slot, such as different requirements for CPU (Central Processing Unit) direct port or PCIE switch expansion port.

[0005] Because the CPU can support limited PCIE ports, the same model can only choose one type between OCP card or PCIE CEM card for development, therefore, if the whole machine is configured as OCP card, and the customer demand is PCIE CEM card, it cannot meet the customer demand, and vice versa.

[0006] Therefore, how to realize the switching of PCIE card is a problem to be solved. SUMMARY

[0007] The purpose of the present application is to provide a computing device to realize the switching of PCIE card.

[0008] In a first aspect, the present application discloses a computing device, comprising a mainboard and a PCIE card module, the mainboard comprising a first connector, the first connector being configured to insert the PCIE card module or a first PCIE card; in the case that the first connector inserts the PCIE card module, the PCIE card module is configured to electrically connect a second PCIE card with the mainboard; the first PCIE card and the second PCIE card are of different types.

[0009] Optionally, the PCIE card module comprises a first adapter board and a second adapter board, the first adapter board and the second adapter board being electrically connected; the first adapter board is electrically connected with the first connector, and the second PCIE card is inserted on the second adapter board.

[0010] In the computing device provided by the embodiment, the PCIE card module comprises a first adapter board and a second adapter board, the first adapter board is electrically connected with the first connector and the second adapter board, and the second PCIE card is inserted on the second adapter board, so as to electrically connect the mainboard with the second PCIE card, thereby realizing switching of different types of PCIE cards through the first adapter board and the second adapter board.

[0011] Optionally, the PCIE card module further comprises an external cable.

[0012] The first adapter board and the second adapter board are electrically connected through the external cable.

[0013] In the computing device provided by the embodiment, the PCIE card module further comprises an external cable, and the first adapter board and the second adapter board are electrically connected through the external cable.

[0014] Optionally, the first adapter board comprises a third connector, and the second adapter board comprises a second connector and a fourth connector.

[0015] The third connector and the fourth connector are connected through the external cable, so as to electrically connect the first adapter board and the second adapter board.

[0016] The second connector and the fourth connector are connected, and the second PCIE card is inserted on the second connector.

[0017] In the computing device provided by the embodiment, the first adapter board comprises a third connector, the second adapter board comprises a second connector and a fourth connector, the third connector and the fourth connector are connected through the external cable, so as to electrically connect the first adapter board and the second adapter board, and the second PCIE card is inserted on the second connector of the first adapter board, thereby realizing electrical connection between the mainboard and the second PCIE card.

[0018] Optionally, the first adapter board comprises a signal enhancement chip.

[0019] The signal enhancement chip is connected to the third connector, and the signal enhancement chip is configured to enhance the strength of the signal transmitted from the mainboard to the first adapter board.

[0020] In the computing device provided by the embodiment, the first adapter board comprises a signal enhancement chip, the signal enhancement chip is connected to the third connector and the first connector, and the signal enhancement chip is capable of enhancing the strength of the signal transmitted from the mainboard to the first adapter board.

[0021] Optionally, the first adapter board is an OCP adapter board, the second adapter board is a PCIE CEM adapter board, the first PCIE card is an OCP card, and the second PCIE card is a PCIE CEM card; the OCP adapter board has the same form and size as the OCP card.

[0022] Alternatively, the first adapter board is a PCIE CEM adapter board, the second adapter board is an OCP adapter board, the first PCIE card is a PCIE CEM card, and the second PCIE card is an OCP card; the PCIE CEM adapter board has the same form and size as the PCIE CEM card.

[0023] In the computing device provided by the embodiment, the first PCIE card is an OCP card, and the second PCIE card is a PCIE CEM card, or the first PCIE card is a PCIE CEM card, and the second PCIE card is an OCP card, so that the switching between the OCP card and the PCIE CEM card can be realized.

[0024] Optionally, the mainboard comprises a clock buffer.

[0025] The clock buffer provides a clock for the signal enhancement chip.

[0026] The clock buffer provides another clock for the second connector through the third connector, the external cable, and the fourth connector.

[0027] Optionally, the mainboard comprises a complex programmable logic device.

[0028] In the case where the first connector is plugged into the first PCIE card, the complex programmable logic device receives a first signal transmitted from the first PCIE card through an OCP protocol, and determines the type of the first PCIE card according to the first signal.

[0029] In a case that the first connector is inserted into the PCIE card module, the complex programmable logic device receives a second signal transmitted by the first adapter board through the OCP protocol, and judges the type of the first adapter board according to the second signal.

[0030] The computing device provided by the embodiment comprises a mainboard, a signal enhancement chip and a second connector. The mainboard comprises a clock buffer and / or a complex programmable logic device. The clock buffer can provide a clock signal for the signal enhancement chip and the second connector, so as to ensure that the signal enhancement chip and the second connector are in a working state. The complex programmable logic device can receive a signal transmitted by the first PCIE card or the first adapter board through the OCP protocol, so as to judge the type of the first PCIE card or the first adapter board according to the signal.

[0031] Optionally, the computing device further comprises a middle backboard.

[0032] The middle backboard is connected to the second adapter board, and the middle backboard is configured to provide at least one of a power supply signal, a clock signal and an integrated circuit bus signal for the second adapter board.

[0033] The computing device provided by the embodiment comprises a middle backboard, and the middle backboard is connected to the second adapter board, so as to provide the second adapter board with a power supply signal, a clock signal and / or an integrated circuit bus signal through the middle backboard.

[0034] Optionally, the first adapter board comprises a power supply chip, the power supply chip is connected to the first connector and the signal enhancement chip, and the power supply chip is configured to convert a power supply provided by the mainboard through the first connector and supply power to the signal enhancement chip.

[0035] The computing device provided by the embodiment comprises a power supply chip in the first adapter board, and the power supply chip is connected to the first connector and the signal enhancement chip, so as to convert the power supply provided by the mainboard through the first connector into a voltage required by the signal enhancement chip.

[0036] Optionally, the second adapter board comprises a power supply chip, the power supply chip is connected to the middle backboard and the second connector, and the power supply chip is configured to convert a power supply provided by the middle backboard and supply power to the second connector.

[0037] The computing device provided by the embodiment comprises a power supply chip in the second adapter board, and the power supply chip is connected to the middle backboard and the second connector, so as to convert the power supply provided by the middle backboard into a voltage required by the second connector.

[0038] In combination with the above technical solution, the computing device disclosed in the present application comprises a mainboard and a PCIE card module, the mainboard comprises a first connector, the first connector is used for inserting the PCIE card module or a first PCIE card, in the case of inserting the PCIE card module in the first connector, the PCIE card module is used for realizing the electrical connection between a second PCIE card and the mainboard, and the types of the first PCIE card and the second PCIE card are different, so that the switching of different types of PCIE cards can be realized through the PCIE card module. BRIEF DESCRIPTION OF DRAWINGS

[0039] Fig. 1 is a structural schematic diagram of a computing device provided by an embodiment;

[0040] Fig. 2 is a structural schematic diagram of a computing device provided by another embodiment;

[0041] Fig. 3 is an architectural schematic diagram of a computing device provided by an embodiment of the present application;

[0042] Fig. 4 is a schematic diagram of the back side of a server provided by an embodiment of the present application;

[0043] Fig. 5 is a structural schematic diagram of a computing device provided by an embodiment of the present application;

[0044] Fig. 6 is a structural schematic diagram of another computing device provided by an embodiment of the present application;

[0045] Fig. 7 is a structural schematic diagram of a computing device provided by another embodiment of the present application;

[0046] Fig. 8 is a structural schematic diagram of another computing device provided by another embodiment of the present application;

[0047] Fig. 9 is a structural schematic diagram of a computing device provided by still another embodiment of the present application;

[0048] Fig. 10 is a structural schematic diagram of a PCIE card module provided by an embodiment of the present application. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solutions and advantages of the present application more clear, the technical solutions in the present application will be described clearly and completely below in combination with the drawings in the present application. Obviously, the described embodiments are some embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0050] PCIE (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard, which is widely used in computer systems.

[0051] The PCIE card refers to hardware (for example, a network card, a GPU card, an SSD card, etc.) with a PCIE port, which can be inserted into a PCIE slot in the mainboard of a computing device such as a computer, a server, and a network switch, and communicates with the mainboard through a PCIE bus to increase the storage capacity, network function, or other hardware performance of the computing device.

[0052] In the current server, different Internet companies have different requirements for the types of PCIE cards, for example, there are OCP (Open Compute Project) cards, PCIE CEM (Card Electromechanical) cards, and the like. The PCIE CEM card includes CEM cards with different power consumptions, such as DPU (Data Processing Unit) cards (the power consumption of the DPU card is higher than that of the ordinary CEM card), ordinary network cards, IB (InfiniBand) cards, and the like; the OCP card has the advantages of high performance, high stability, and low power consumption, and the PCIE CEM card has the advantages of fast transmission speed, high bandwidth, and fast processing capability, but the PCIE CEM card supports PCIE cards with relatively high power consumption.

[0053] And there are different requirements for the PCIE ports of the slots, such as different requirements for CPU direct ports or PCIE switch expansion ports. Taking the CPU direct port as an example, the CPU can support a limited number of PCIE ports, and the same model can only select one type between OCP cards or PCIE CEM cards for development, therefore, if the whole machine is configured as an OCP card, and the customer demand is a PCIE CEM card, the customer demand cannot be met, similarly, if the whole machine is configured as a PCIE CEM card, and the customer demand is an OCP card, the customer demand cannot be met.

[0054] In addition, PCIE cards supported by different slots have different power consumptions, for example, the power consumption of the OCP card supported by the OCP slot is lower than that of the PCIE card supported by the PCIE CEM slot, and the general design value of the ventilation volume in the OCP slot area is small. In the same structural space, if the OCP slot is converted into a PCIE CEM slot, the heat dissipation demand of the high-power card cannot be met.

[0055] In one possible implementation, multiple adapter boards are developed in the development stage, which respectively support different PCIE cards, for example, respectively support OCP cards or PCIE CEM cards, and then the adapter board is replaced according to the demand to realize the conversion of different PCIE cards.

[0056] Fig. 1 shows a structural schematic diagram of a computing device, and Fig. 2 shows a structural schematic diagram of another computing device. As shown in Figs. 1 and 2, the adapter board 102 is connected with the OCP card 103 through the 4C+ connector 1021, and when the OCP card 103 needs to be used, the corresponding adapter board 102 of the OCP card 103 is connected with the processor 1011 on the mainboard 101 through the connector 1012, so as to realize the connection between the mainboard 101 and the OCP card 103; the mainboard 101 is connected with the PCIE CEM card 113 through the connector 1012 and the CEM connector 1121, and when the PCIE CEM card 113 needs to be used, the PCIE CEM card 113 can be inserted into the CEM connector 1121 of the adapter board 112, and then connected with the mainboard 101 through the connector 1012, so as to realize the connection between the mainboard 101 and the PCIE CEM card 113.

[0057] Further, when the OCP card 103 needs to be switched into the PCIE CEM card 113 or the PCIE CEM card 113 needs to be switched into the OCP card 103, it is usually necessary to disassemble the computing device and then replace the adapter board and structural parts (such as the 4C+ connector, the OCP card, or the CEM connector, the PCIE CEM card, etc.), and the switching mode is relatively complicated and difficult, and since the adapter board 102 and the adapter 112 share space when designed, the ventilation volume is limited, and if the adapter board 102 of the OCP card 103 is replaced by the adapter board 112 of the PCIE CEM card 113, the heat dissipation requirement of the high-power card cannot be met.

[0058] Therefore, how to realize the switching of the PCIE card is a relatively important problem.

[0059] Therefore, how to realize the switching of the PCIE card is a relatively important problem.

[0060] The technical solutions of the present application will be described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes can not be described in detail in some embodiments.

[0061] Figure 3 shows a structural schematic diagram of a computing device according to an embodiment of the present application. As shown in Figure 3, the computing device (e.g., a computer, a server, a network switch, etc.) includes a mainboard 101 and a PCIE card module 201, and the mainboard 101 is connected to the PCIE card module 201. The PCIE card module 201 can include a first PCIE card, or the PCIE card module 201 can include a first adapter board and a second adapter board, the first adapter board is used to connect the mainboard and the second adapter board, and the second adapter board is used to plug a second PCIE card.

[0062] When the PCIE card module 201 includes the first PCIE card, the mainboard 101 is connected to the first PCIE card to realize communication between the mainboard 101 and the first PCIE card. When the PCIE card module 201 includes the first adapter board and the second adapter board, the mainboard 101 can be connected to the second PCIE card through the first adapter board and the second adapter board to realize communication between the mainboard 101 and the second PCIE card.

[0063] It should be noted that for a server, a test device, a computer, or an industrial control device, the computing device is built-in with the mainboard 101, and the mainboard 101 is used to realize corresponding requirements, for example, for a server, the mainboard 101 can perform corresponding computing requirements, or for a computer, the mainboard 101 can execute user's usage requirements, or for a test device, the mainboard 101 can execute corresponding test requirements, or for an industrial control device, the mainboard 101 can ensure that the device with the industrial control device works normally.

[0064] The second adapter board can support ordinary cards and high-power cards, and the second adapter board is not limited by slot space and air volume, and can meet the heat dissipation requirements of high-power cards.

[0065] Optionally, when the card slot on the mainboard is originally used to insert an OCP card, the first PCIE card is an OCP card, the first adapter board is an OCP adapter board, the second adapter board is a PCIE CEM adapter board, and the second PCIE card is a PCIE CEM card. If communication between the mainboard and the OCP card is required, the OCP card is directly inserted into the card slot on the mainboard, and at this time, the OCP card does not need to be connected to the PCIE CEM adapter board. If communication between the mainboard and the PCIE CEM card is required, the OCP adapter board can be inserted into the card slot on the mainboard, and the OCP adapter board and the PCIE CEM adapter board are connected through an external cable, and the PCIE CEM card is inserted into the card slot of the PCIE CEM adapter board, so as to realize communication between the mainboard and the PCIE CEM card.

[0066] Figure 4 shows a schematic view of the back side of the server according to an embodiment of the present application. As shown in Figure 4, the OCP riser card 2110 is inserted into the slot on the back side of the server and connected with the mainboard. The slot on the back side of the server is originally used for inserting the OCP card. The server is further provided with a PCIE CEM riser card 2210, and the PCIE CEM card can be inserted into the PCIE CEM riser card 2210.

[0067] The CDFP (400Gb / s (16X25Gb / s) Pluggable Transceiver) connector 2120 is arranged on the OCP riser card 2110, and the CDFP connector 2230 is arranged on the PCIE CEM riser card 2210. The CDFP connector 2120 on the OCP riser card 2110 is connected with the CDFP connector 2230 on the PCIE CEM riser card 2210 through a cable outside the server, so as to realize the communication between the mainboard and the PCIE CEM card.

[0068] Based on this, the embodiment of the present application designs a mode that can flexibly replace the OCP card and the PCIE CEM card. When the card slot of the mainboard is originally used for inserting the OCP card, a first riser card (OCP riser card) which has the same size, shape and connection interface with the OCP card is designed. When the card slot of the mainboard is originally used for inserting the PCIE CEM card, a first riser card (PCIE CEM riser card) which has the same size, shape and connection interface with the PCIE CEM card is designed.

[0069] Continuing to refer to Figures 5 and 6, the computing device provided by the embodiment of the present application can include:

[0070] The mainboard 101 is used for connecting the first PCIE card 214 or the first riser card 211, the first riser card 211 is used for connecting the second riser card 221, and the second riser card 221 is used for inserting the second PCIE card 224.

[0071] In the embodiment, when the mainboard 101 connects the first PCIE card 214, the communication between the mainboard 101 and the first PCIE card 214 can be realized as shown in Figure 6. When the mainboard 101 connects the first PCIE card 214, the first PCIE card 214 does not need to be connected with the second riser card 221.

[0072] When the mainboard 101 connects the first riser card 211, the first riser card 211 is connected with the second riser card 221, and the second riser card 221 is used for inserting the second PCIE card 224, so as to realize the communication between the mainboard 101 and the second PCIE card 224 as shown in Figure 5.

[0073] Optionally, as shown in FIGS. 7 and 8, the mainboard 101 can be provided with a processor 1011 for parsing instructions, processing data, etc. The processor 1011 can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), etc.

[0074] Optionally, as shown in FIGS. 7 and 8, the mainboard 101 can be provided with a first connector 1013 connected to the first PCIE card 214 or the first adapter plate 211, and the first adapter plate 211 can be connected to the second adapter plate 221, so as to switch the type of the PCIE card connected to the mainboard 101, and realize the communication between the mainboard 101 and different PCIE cards. The type of the first connector 1013 can be determined according to the type of the first PCIE card 214, for example, when the first PCIE card 214 is an OCP card, the first connector 1013 can be a 4C+ connector, and when the first PCIE card 214 is a PCIE CEM card, the first connector 1013 can be a CEM connector.

[0075] For example, as shown in FIG. 8, the first connector 1013 can be used to connect the processor 1011 on the mainboard 101 and the first PCIE card 214, so as to realize the communication between the processor 1011 and the first PCIE card 214, and in this case, the first PCIE card 214 does not need to be connected to the second adapter plate 221. For example, the first connector 1013 can transmit the PCIE high-speed signal sent by the processor 1011, the clock signal sent by the clock chip on the mainboard 101, the power signal on the mainboard 101, etc. to the first PCIE card 214.

[0076] Alternatively, as shown in FIG. 7, the first connector 1013 can be used to connect the processor 1011 on the mainboard 101 and the first adapter plate 211, and through the connection of the first adapter plate 211 and the second adapter plate 221, the communication between the processor 1011 and the second PCIE card 224 is realized. For example, the first connector 1013 can transmit the PCIE high-speed signal sent by the processor 1011, the clock signal sent by the clock chip on the mainboard 101, the power signal on the mainboard 101, etc. to the first adapter plate 211, the third connector 212 on the first adapter plate 211 transmits the received signal to the fourth connector 223 on the second adapter plate 221, the fourth connector 223 transmits the received signal to the second connector 222, and the second connector 222 transmits the received signal to the second PCIE card 224, so as to transmit the signals of the processor 1011 and the mainboard 101 to the second PCIE card 224. Similarly, the signals of the second PCIE card 224 can also be transmitted to the processor 1011.

[0077] It should be noted that the first connector 1013 can provide a plug-in connection, facilitating the conversion of the first PCIE card 214 and the first adapter plate 211, so that the conversion of the PCIE card can be realized by plugging in or pulling out the PCIE card and the adapter plate outside the whole machine, without disassembling operation, simplifying the conversion operation.

[0078] In actual application, the first connector 1013 can be a first card slot on the mainboard 101, which can be used to insert the first PCIE card 214 or the first adapter plate 211. When the second PCIE card 224 is needed, the first adapter plate 211 can be inserted into the first card slot, and the second PCIE card 224 can be inserted into the second adapter plate 221, so that the conversion of the PCIE card type can be realized through the original card slot, without disassembling operation.

[0079] For example, if the first PCIE card 214 needs to be switched to the second PCIE card 224, the first PCIE card 214 is pulled out of the first card slot, and the first adapter plate 211 is inserted into the first card slot; if the second PCIE card 224 needs to be switched to the first PCIE card 214, the first adapter plate 211 is pulled out of the first card slot, and the first PCIE card 214 is inserted into the first card slot.

[0080] As a possible implementation manner, the first adapter plate 211 can have the same size as the first PCIE card 214, facilitating the plug-in operation in the first card slot.

[0081] In other embodiments, the size of the first adapter plate 211 can also be smaller than that of the first PCIE card 214, so as to be able to be inserted into the first card slot.

[0082] In this embodiment, when the first adapter plate 211 replaces the first PCIE card 214 to connect the mainboard 101, the first adapter plate 211 also connects the second adapter plate 221, so as to realize the communication between the mainboard 101 and the second PCIE card 224 through the first adapter plate 211 and the second adapter plate 221.

[0083] Optionally, as shown in FIG. 7, the third connector 212 is arranged on the first adapter board 211, and the fourth connector 223 is arranged on the second adapter board 221. When the mainboard 101 is connected to the first adapter board 211, the third connector 212 and the fourth connector 223 are connected through the external cable 226 to realize the connection between the first adapter board 211 and the second adapter board 221. Correspondingly, the signal on the mainboard 101 can be transmitted to the third connector 212 on the first adapter board 211, and then transmitted to the fourth connector 223 on the second adapter board 221 through the third connector 212. The fourth connector 223 transmits the signal to the second connector 222 on the second adapter board 221, and the second connector 222 transmits the signal to the second PCIE card 224 to realize the communication between the mainboard 101 and the second PCIE card 224.

[0084] As an implementation manner, the third connector 212 and the fourth connector 223 can be CDFP (400Gb / s (16X25Gb / s) Pluggable Transceiver) connectors. The third connector 212 and the fourth connector 223 can be connected together through a CDFP high-speed cable to realize the connection between the first adapter board 211 and the second adapter board 221, so as to realize the transmission of the signal, for example, the transmission of the PCIE high-speed signal, the clock signal, the I2C signal, etc.

[0085] Of course, in other embodiments, the third connector 212 and the fourth connector 223 can also be other connectors, for example, FPC (Flexible Printed Circuit Connector) connectors.

[0086] Optionally, the first adapter board 211 is provided with a gold finger, and the gold finger is connected with the first connector 1013 on the mainboard 101, for example, inserted into the first card slot (the first connector 1013) on the mainboard 101 to realize the connection between the first adapter board 211 and the mainboard 101.

[0087] Optionally, as shown in FIG. 7, the first adapter board 211 can be provided with a signal enhancement chip 213, which can be, for example, a retimer chip, a redriver chip, etc. The signal enhancement chip 213 is connected to the first connector 1013 on the mainboard 101, for example, by electrically connecting the gold fingers on the first adapter board 211 to achieve electrical connection with the first connector 1013 on the mainboard 101, so as to receive the PCIE signal sent by the mainboard 101, enhance the strength of the PCIE signal sent by the mainboard 101, and ensure that the signal integrity (SI) of the PCIE signal meets the protocol requirements. Then, the PCIE signal with enhanced driving capability can be transmitted to the second adapter board 221. Specifically, the signal enhancement chip 213 is also connected to the third connector 212 on the first adapter board 211, and the PCIE signal with enhanced driving capability is transmitted to the fourth connector 223 on the second adapter board 221 through the third connector 212. It should be noted that when the signal integrity of the PCIE signal meets the protocol requirements, the signal enhancement chip 213 can be omitted.

[0088] As a possible implementation, as shown in FIG. 9, the mainboard 101 can supply power to the signal enhancement chip 213, for example, the 12V power supply and 3V3 power supply of the first card slot are converted by the power supply chip 216 to supply power to the signal enhancement chip 213.

[0089] As a possible implementation, as shown in FIG. 9, the mainboard 101 is provided with a clock buffer 1014 (CLK Buffer). As shown in FIG. 9, the clock buffer 1014 can provide multiple clock signals, for example, four 100M clock signals. One clock signal can be selected to be provided to the signal enhancement chip 213, and another clock signal can be selected to be provided to the fourth connector 223 through the third connector 212 and the external cable 226, and then provided to the second connector 222 through the fourth connector 223, so as to provide a clock signal to the second PCIE card 224.

[0090] As a possible implementation, the mainboard 101 can be provided with a complex programmable logic device (CPLD) 1015, when the mainboard 101 is connected to the first PCIE card, the complex programmable logic device 1015 is used to receive a first signal from the PRSNTB# pin of the first PCIE card, so as to determine the type of the first PCIE card 214. For example, the complex programmable logic device 1015 and the first PCIE card can transmit signals through the OCP protocol, and the PRSNTB# pin includes four pins, the first pin transmits the PRSNTB0 signal through the OCP protocol, the second pin transmits the PRSNTB1 signal through the OCP protocol, the third pin transmits the PRSNTB2 pin through the OCP protocol, and the fourth pin transmits the PRSNTB3 signal through the OCP protocol. Since each pin can be grounded through a resistor or left hanging, the PRSNTB signal transmitted by the pin grounded through the resistor can be marked as 1, and the PRSNTB signal transmitted by the pin left hanging can be marked as 0, so that the type of the first PCIE card can be determined by the signal combination of the four pins, for example, when the signal combination of the four pins is 1000, the first PCIE card is an OCP card.

[0091] Correspondingly, when the mainboard 101 is connected to the first adapter plate, the complex programmable logic device 1015 can receive a second signal from the PRSNTB# pin of the first adapter plate, so as to determine the type of the first adapter plate, for example, the type of the first adapter plate 211 can be determined by an unused combination in the OCP protocol, which is used for the identification of the OCP adapter plate by the whole machine and the control of the management signal by the CPLD software. For example, there are 1000, 1100, and 1110 in the OCP protocol to represent the type of the first PCIE card, but there is no combination of 1111, which can be used to represent that the first adapter plate is an OCP adapter plate.

[0092] Optionally, as shown in FIGS. 7-9, the second adapter plate 221 is provided with a second connector 222, and the second connector 222 is used to plug the second PCIE card 224. When the second PCIE card 224 needs to be used, the mainboard 101 needs to be connected to the first adapter plate 211, and the second PCIE card also needs to be inserted into the second connector 222. The second connector 222 can also provide plug-in connection, so as to facilitate the insertion and extraction of the second PCIE card 224. The type of the second connector 222 can be determined according to the type of the second PCIE card 224, for example, when the second PCIE card 224 is an OCP card, the second connector 222 can be a 4C+ connector, and when the second PCIE card 224 is a PCIE CEM card, the second connector 222 can be a CEM connector.

[0093] As a possible implementation, the form of the second connector 222 can be a second card slot on the second adapter board 221, and the second card slot is used for inserting the second PCIE card 224. When the second PCIE card 224 needs to be used, the mainboard 101 can be connected to the first adapter board 211, and the second PCIE card 224 can be inserted into the second card slot. When the second PCIE card 224 does not need to be used, the second PCIE card 224 can be pulled out of the second card slot. Of course, the second PCIE card 224 can also not be pulled out of the second card slot. At this time, the first adapter board 211 can be pulled out of the first connector 1013.

[0094] Optionally, as shown in FIG. 9, the second adapter board 221 can be connected to the mid-backboard 301, and the mid-backboard 301 is arranged in the computing device. The mid-backboard 301 can be used to provide power supply signals, clock signals, I2C (Inter-Integrated Circuit) signals, etc. for the second adapter board 221. The power supply signals can be output to the power supply chip 225 through the fifth connector 302, and converted into power supplies required by the second connector 222, such as 12V, 3V3 power supplies, through the power supply chip 225. The I2C signals and the clock signals required by the second connector 222 on the second adapter board 221 can be obtained through the mid-backboard 301 or the fourth connector 223, to support a standard second PCIE card slot.

[0095] Optionally, the number of the first connectors 1013 can be one or more, such as two, three, four, etc. Each first connector 1013 can be connected to one first PCIE card 214, to realize the communication between each first PCIE card 214 and the mainboard 101. In actual application, the mainboard 101 can include a plurality of first card slots, and each first card slot is used for inserting one first PCIE card 214.

[0096] Correspondingly, the number of the first adapter boards 211 can also be one or more. The number of the first adapter boards 211 can be the same as the number of the first connectors 1013, or can be less than the number of the first connectors 1013, and each first adapter board 211 is connected to one first connector 1013.

[0097] Further, the number of the second adapter boards 221 can also be multiple, each second adapter board 221 is connected to one first adapter board 211, and each second adapter board 221 is connected to one second PCIE card 224, to realize the communication between the mainboard 101 and the multiple second PCIE cards 224. Alternatively, the number of the second adapter boards 221 can also be one, and the number of the second connectors 222 on the second adapter board 221 is multiple, each first adapter board 211 is connected to one second connector 222, to realize the communication between the mainboard 101 and the multiple second PCIE cards 224.

[0098] In order to facilitate understanding of the technical solutions of the present application, the following will be described in detail in combination with two specific embodiments.

[0099] Embodiment one

[0100] As shown in FIG. 5 and FIG. 7, the computing device can include a mainboard 101, a first adapter board 211, a second adapter board 221 and a second PCIE card 224. The mainboard 101 is connected to the first adapter board 211, the first adapter board 211 is connected to the second adapter board 221, and the second adapter board 221 is connected to the second PCIE card 224, so as to realize switching of the PCIE card type connected to the mainboard 101 to the second PCIE card 224, and further realize communication between the mainboard 101 and the second PCIE card 224.

[0101] Optionally, the mainboard 101 can be installed with a processor 1011 and a first connector 1013, the first connector 1013 is connected to the processor 1011 and the first adapter board 211, and the first adapter board 211 is connected to the second adapter board 221, and the second adapter board 221 is connected to the second PCIE card 224, so as to realize communication between the processor 1011 and the second PCIE card 224. For example, when the first PCIE card 214 is an OCP card, the first connector 1013 can be a 4C+ connector, and when the first PCIE card 214 is a PCIE CEM card, the first connector 1013 can be a CEM connector.

[0102] In actual application, the first connector 1013 can be a first card slot on the mainboard 101, and the first card slot is used for inserting the first PCIE card 214. The first adapter board 211 is directly inserted outside the whole machine by using the original first card slot, so as to realize communication between the mainboard 101 and the second PCIE card 224, without the need of disassembling the machine and other operations, thereby simplifying the switching operation of the PCIE card. Moreover, the second adapter board 221 is not limited by the slot space and the ventilation volume, and supports a PCIE card with high power consumption.

[0103] As a possible implementation manner, the first adapter board 211 has the same size as the first PCIE card 214, and has the same structure as the first PCIE card 214 for connecting to the mainboard 101, so as to realize connection to the mainboard 101.

[0104] Optionally, the second adapter board 221 is provided with a second connector 222, and the second connector 222 is connected to the second PCIE card 224.

[0105] For example, the first connector 1013 on the mainboard is originally used for plugging the OCP card, the first PCIE card is the OCP card, the first connector 1013 can be a 4C+ connector, and the first adapter plate is an OCP adapter plate; correspondingly, the second adapter plate is a PCIE CEM adapter plate, the second connector 222 can be a CEM connector, and the second PCIE card is a PCIE CEM card.

[0106] If it is necessary to realize the communication between the mainboard and the OCP card, the OCP card is directly plugged on the 4C+ connector on the mainboard, at this time, the OCP adapter plate and the PCIE CEM adapter plate do not need to be connected; if it is necessary to realize the communication between the mainboard and the PCIE CEM card, the OCP adapter plate can be plugged on the 4C+ connector, and the OCP adapter plate and the PCIE CEM adapter plate are connected through an external cable, and the PCIE CEM card is plugged on the CEM adapter of the PCIE CEM adapter plate, so as to realize the communication between the mainboard and the PCIE CEM card.

[0107] For example, the first connector 1013 on the mainboard is originally used for plugging the PCIE CEM card, the first PCIE card is the PCIE CEM card, the first connector 1013 can be a CEM connector, and the first adapter plate is a PCIE CEM adapter plate; correspondingly, the second adapter plate is an OCP adapter plate, the second connector 222 can be a 4C+ connector, and the second PCIE card is an OCP card.

[0108] If it is necessary to realize the communication between the mainboard and the PCIE CEM card, the PCIE CEM card is directly plugged on the CEM connector on the mainboard, at this time, the first adapter plate and the second adapter plate do not need to be connected; if it is necessary to realize the communication between the mainboard and the OCP card, the PCIE CEM adapter plate can be plugged on the first connector (the CEM connector), and the PCIE CEM adapter plate and the OCP adapter plate are connected through an external cable, and the OCP card is plugged on the second connector (the 4C+ connector) of the OCP adapter plate, so as to realize the communication between the mainboard and the OCP card.

[0109] In actual application, the form of the second connector 222 can be a second card slot on the second adapter plate 221, the second card slot is used for inserting the second PCIE card 224, when the second PCIE card 224 needs to be used, the second PCIE card 224 can be inserted into the second card slot, when the second PCIE card 224 does not need to be used, the second PCIE card 224 can be pulled out of the second card slot, or can not be pulled out of the second card slot, by pulling out the first adapter plate 211 from the first connector 1013, the communication between the mainboard and the second PCIE card is disconnected.

[0110] Optionally, the third connector 212 is arranged on the first adapter board 211, and the fourth connector 223 is arranged on the second adapter board 221. When the mainboard 101 is connected to the first adapter board 211, the third connector 212 and the fourth connector 223 are connected through the external cable 226 to realize the connection between the first adapter board 211 and the second adapter board 221. Correspondingly, the signal on the mainboard 101 can be transmitted to the second PCIE card 224 through the third connector 212 on the first adapter board 211 and the external cable 226 between the third connector 212 and the fourth connector 223. Similarly, the signal of the second PCIE card 224 can also be transmitted to the mainboard 101 through the connector and the external cable.

[0111] As an implementation manner, the third connector 212 and the fourth connector 223 can be CDFP (400 Gb / s (16X25 Gb / s) Pluggable Transceiver) connectors. The third connector 212 and the fourth connector 223 can be connected together through a CDFP high-speed cable to realize the transmission of high-speed signals. Of course, in other embodiments, the third connector 212 and the fourth connector 223 can also be other connectors, and the CDFP high-speed cable can also be other high-speed cables. For example, the other connector can be an FPC (Flexible Printed Circuit Connector) connector.

[0112] Optionally, the first adapter board 211 is provided with a gold finger, and the gold finger is connected to the first connector 1013 on the mainboard 101, for example, inserted into the first card slot on the mainboard 101 to realize the connection between the first adapter board 211 and the mainboard 101.

[0113] Optionally, the first adapter board 211 can be provided with a signal enhancement chip 213. The signal enhancement chip 213 can be, for example, a retimer chip, a redriver chip, etc. The signal enhancement chip 213 is used to enhance the strength of the PCIE signal sent by the mainboard 101 to ensure that the signal integrity (SI) of the PCIE signal meets the protocol requirements. Then, the PCIE signal with enhanced driving capability can be transmitted to the second adapter board 221.

[0114] It should be noted that when the second PCIE card 224 needs to be switched to the first PCIE card 214, the connection between the mainboard 101 and the first adapter board 211 can be disconnected, and the mainboard 101 can be connected to the first PCIE card 214 to realize the communication between the mainboard 101 and the first PCIE card 214. Specifically, the first adapter board 211 can be pulled out of the first card slot, and then the first PCIE card 214 can be inserted into the first card slot.

[0115] The computing device provided in the embodiment includes a mainboard, a first adapter board, a second adapter board and a second PCIE card, and the conversion from the first PCIE card interface to the second PCIE card interface is realized through the first adapter board and the second adapter board.

[0116] Embodiment two

[0117] As shown in FIG. 8, the computing device includes a mainboard 101, a first PCIE card 214 and a second adapter board 221 (not shown in the figure), the mainboard 101 is connected to the first PCIE card 214, the first PCIE card 214 and the second adapter board 221 are not connected, and the second adapter board 221 is used to plug in a second PCIE card when the first PCIE card needs to be switched to the second PCIE card.

[0118] Optionally, a processor 1011 and a first connector 1013 can be installed on the mainboard 101, the first connector 1013 is connected to the processor 1011 and the first PCIE card 214, so as to realize the communication between the processor 1011 and the first PCIE card 214.

[0119] For example, the first connector 1013 on the mainboard is originally used for plugging in an OCP card, the first PCIE card is an OCP card, and the first connector 1013 can be a 4C+ connector; correspondingly, the second adapter board can be a PCIE CEM adapter board, and the second adapter board is used for plugging in a PCIE CEM card.

[0120] For example, the first connector 1013 on the mainboard is originally used for plugging in a PCIE CEM card, the first PCIE card is a PCIE CEM card, the first connector 1013 can be a CEM connector, and the first adapter board is a PCIE CEM adapter board; correspondingly, the second adapter board is an OCP adapter board, and the second adapter board is used for plugging in an OCP card.

[0121] In actual application, the first connector 1013 can be a first card slot on the mainboard 101, and the first PCIE card 214 is inserted into the first card slot.

[0122] The computing device provided in the embodiment includes a mainboard, a first PCIE card and a second adapter board, realizes the communication between the mainboard and the first PCIE card, and the conversion of the PCIE card can be realized through the second adapter board.

[0123] The application also provides a PCIE card module, as shown in FIG. 10, the PCIE card module provided in the embodiment includes:

[0124] The first adapter board 211 is used for connecting the mainboard, and the second adapter board 221 is used for plugging in a second PCIE card.

[0125] Optionally, the first adapter board 211 is provided with a gold finger 215, which is used to connect the mainboard to realize the connection between the PCIE card module and the mainboard. Specifically, the first connector on the mainboard can be connected, for example, inserted into the first card slot of the first connector.

[0126] For example, when the mainboard is originally used to insert the OCP card, the first adapter board 211 is an OCP adapter board, and the second adapter board 221 can be a PCIE CEM adapter board, which is used to insert the PCIE CEM card. When the mainboard is originally used to insert the PCIE CEM card, the first adapter board 211 is a PCIE CEM adapter board, and the second adapter board 221 is an OCP adapter board, which is used to insert the OCP card.

[0127] Optionally, the first adapter board 211 is provided with a third connector 212, and the second adapter board 221 is provided with a fourth connector 223. The third connector 212 and the fourth connector 223 are connected by an external cable to realize the connection between the first adapter board 211 and the second adapter board 221.

[0128] Correspondingly, the signals on the mainboard can be transmitted to the second PCIE card 224 through the third connector 212 on the first adapter board 211 and the external cable 226 between the third connector 212 and the fourth connector 223. Similarly, the signals of the second PCIE card 224 can also be transmitted to the mainboard 101 through the connector and the external cable.

[0129] As an implementation manner, the third connector 212 and the fourth connector 223 can be CDFP (400Gb / s (16X25Gb / s) Pluggable Transceiver) connectors. The third connector 212 and the fourth connector 223 can be connected together by a CDFP high-speed cable to realize the transmission of high-speed signals. Of course, in other embodiments, the third connector 212 and the fourth connector 223 can also be other connectors, and the CDFP high-speed cable can also be other high-speed cables. Other connectors can be, for example, FPC (Flexible Printed Circuit Connector) connectors.

[0130] Optionally, the mainboard is provided with a first connector, which is used to connect the first PCIE card. Specifically, the form of the first connector can be a first card slot, which is used to insert the first PCIE card. The size, form and mainboard connection interface of the first adapter board 211 are the same as those of the first PCIE card, so as to realize the connection between the first adapter board and the mainboard by using the original card slot.

[0131] Optionally, the first adapter board 211 can be provided with a signal enhancement chip 213, which can be a retimer chip, a redriver chip, etc. The signal enhancement chip 213 is used to enhance the strength of the PCIE signal transmitted by the mainboard 101, so as to ensure that the signal integrity (SI) of the PCIE signal meets the protocol requirements. Then, the PCIE signal with enhanced driving capability can be transmitted to the second adapter board 221.

[0132] Optionally, the second adapter board 221 is provided with a second connector 222, and the second connector 222 is connected to the second PCIE card 224.

[0133] In actual application, the second connector 222 can be a second card slot on the second adapter board 221, and the second card slot is used to insert the second PCIE card 224. When the second PCIE card 224 is needed to be used, the second PCIE card 224 can be inserted into the second card slot. When the second PCIE card 224 is not needed to be used, the second PCIE card 224 can be pulled out of the second card slot, or can not be pulled out of the second card slot. By pulling out the first adapter board 211 from the first connector 1013, the communication between the mainboard and the second PCIE card is disconnected.

[0134] The PCIE card module provided by the embodiment includes a first adapter board and a second adapter board, and the second adapter board is used to connect a second PCIE card, so as to realize the conversion of the PCIE card type through the first adapter board and the second adapter board.

[0135] In the description of the present application, it should be noted that, unless otherwise explicitly specified and limited, the terms “mounting”, “connection” and “connection” should be understood in a broad sense, for example, it can be fixed connection, or indirect connection through an intermediate medium, or internal communication of two elements or interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0136] In the present application or the device or element implied by the present application must have a specific orientation, and the specific orientation is constructed and operated, so it cannot be understood as a limitation of the present application. In the description of the present application, the meaning of “multiple” is two or more, unless otherwise specified.

[0137] The terms "first", "second", etc. (if any) in the description and claims of this application and above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that data thus used can be interchanged, where appropriate, so that the embodiments of the application described herein can be carried out in other than the order shown or described herein. Furthermore, the terms "comprising" and "including" and any variations thereof are intended to cover a non-exclusive inclusion, for example, a process, method, system, product or apparatus that comprises a list of steps or units can not necessarily be limited to those steps or units that are clearly listed, but can include other not clearly listed steps or units that are a part of the process, method, product or apparatus.

[0138] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A computing device, wherein, The computing device comprises a mainboard and a PCIE card module, the mainboard comprises a first connector, the first connector is used for inserting the PCIE card module or a first PCIE card; in the case that the first connector inserts the PCIE card module, the PCIE card module is used for realizing electrical connection between a second PCIE card and the mainboard; the first PCIE card and the second PCIE card are different in type.

2. The computing device of claim 1, wherein, The PCIE card module comprises a first adapter board and a second adapter board, the first adapter board and the second adapter board are electrically connected; the first adapter board is electrically connected with the first connector, and the second PCIE card is inserted on the second adapter board.

3. The computing device of claim 2, wherein, The PCIE card module further comprises an external cable; The first adapter board and the second adapter board are electrically connected through the external cable.

4. The computing device of claim 3, wherein, The first adapter board comprises a third connector, and the second adapter board comprises a second connector and a fourth connector; The third connector and the fourth connector are connected through the external cable to electrically connect the first adapter board and the second adapter board; The second connector and the fourth connector are connected, and the second PCIE card is inserted on the second connector.

5. The computing device of claim 4, wherein, The first adapter board comprises a signal enhancement chip; The signal enhancement chip is connected with the third connector, and the signal enhancement chip is used for enhancing the strength of the signal transmitted by the mainboard to the first adapter board.

6. The computing device of any of claims 2-5, wherein, The first adapter board is an OCP adapter board, the second adapter board is a PCIE CEM adapter board, the first PCIE card is an OCP card, and the second PCIE card is a PCIE CEM card; the OCP adapter board is identical in form and size with the OCP card; Alternatively, the first adapter board is a PCIE CEM adapter board, the second adapter board is an OCP adapter board, the first PCIE card is a PCIE CEM card, and the second PCIE card is an OCP card; the PCIE CEM adapter board is identical in form and size with the PCIE CEM card.

7. The computing device of claim 5, wherein, The mainboard comprises a clock buffer; The clock buffer provides one clock for the signal enhancement chip; The clock buffer provides another clock for the second connector through the third connector, the external cable and the fourth connector; And / or, the mainboard comprises a complex programmable logic device; In the case that the first connector inserts the first PCIE card, the complex programmable logic device receives a first signal transmitted by the first PCIE card through an OCP protocol, and judges the type of the first PCIE card according to the first signal; In the case that the first connector inserts the PCIE card module, the complex programmable logic device receives a second signal transmitted by the first adapter board through an OCP protocol, and judges the type of the first adapter board according to the second signal.

8. The computing device of any of claims 2-7, wherein, The computing device further comprises an interposed backboard; The middle backboard is connected with the second adapter board, and is used for providing at least one of a power supply signal, a clock signal and an integrated circuit bus signal for the second adapter board.

9. The computing device of claim 5 or 7, wherein, The first adapter board comprises a power supply chip connected with the first connector and a signal enhancement chip, and is used for converting the power supply provided by the main board through the first connector and supplying power for the signal enhancement chip.

10. The computing device of claim 8, wherein, The second adapter board comprises a power supply chip connected with the middle backboard and a second connector, and is used for converting the power supply provided by the middle backboard and supplying power for the second connector.

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