Power supply device

The power supply device's contamination detection circuit, using resistor elements and varying widths/spacings, addresses dust-related issues in uninterruptible power supplies, enhancing reliability by accurately detecting contamination and enabling preventive maintenance.

WO2025224946A1PCT designated stage Publication Date: 2025-10-30TMEIC CORP
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Patent Information

Application Number
PCT/JP2024/016317
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-04-25
Publication Date
2025-10-30

AI Technical Summary

Technical Problem

Dust accumulation on circuit boards in power supplies, particularly in uninterruptible power supplies, leads to increased risk of short circuits and open circuits due to smaller and denser components, and existing contamination detection systems face placement restrictions and accuracy issues in varying brightness environments.

Method used

A power supply device with a contamination detection circuit that includes a housing with an air flow passage, a power supply unit, and a contamination detection circuit with a first substrate and voltage divider circuit, utilizing resistor elements and wiring patterns of varying widths and spacings to accurately detect contamination states.

Benefits of technology

The solution allows for precise detection of contamination on circuit boards, reducing placement restrictions and improving power supply reliability by enabling timely maintenance, thus preventing fatal accidents.

✦ Generated by Eureka AI based on patent content.

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Abstract

A contamination state detection circuit (10) for detecting the contamination state of a first board of a power supply unit includes a first voltage divider circuit (22) for outputting a first divided voltage (V1) to a first node (N11). The first voltage divider circuit (22) includes a first resistance circuit (24) connected between a first power supply terminal (18) and the first node (N11), and a first resistance element (R1) connected between the first node (N11) and a second power supply terminal (20). The first resistance circuit (24) includes a plurality of second wiring patterns (WP1 to WP4) formed on a second board (11), and a plurality of second resistance elements (RA1 to RA4) having mutually different resistance values. The plurality of second wiring patterns (WP1 to WP4) have mutually different wiring widths equal to or less than the wiring width of a first wiring pattern formed on the first board. The plurality of second resistance elements (RA1 to RA4) are respectively connected in series with the plurality of second wiring patterns (WP1 to WP4) between the first power supply terminal (18) and the first node (N11). The contamination state detection circuit (10) detects the contamination state of the first wiring pattern on the basis of the first divided voltage (V1).
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Description

power supply

[0001] The present disclosure relates to a power supply device.

[0002] In power supplies that are operated continuously for long periods of time, such as uninterruptible power supplies, dust may accumulate on the circuit boards installed in the power supply depending on the installation environment. Such dust can be removed during maintenance. However, depending on the maintenance cycle, the accumulated dust may cause short circuits or open circuits on the circuit boards. In recent years, as power supplies have become smaller, the components mounted on the circuit boards have become smaller and denser, which has tended to increase the impact of dust as a cause of circuit failure on the circuit boards.

[0003] As a countermeasure against this, for example, Japanese Patent Laid-Open Publication No. 2023-3970 (Patent Document 1) discloses an uninterruptible power supply system equipped with a processing unit that detects the contamination state of a substrate installed in an uninterruptible power supply. In this uninterruptible power supply system, at least one light-emitting sensor is disposed on the substrate, and at least one light-receiving sensor is disposed on an opposing member disposed opposite the substrate. Each of the at least one light-receiving sensor is disposed opposite a corresponding one of the at least one light-emitting sensor. The processing unit is configured to detect the contamination state of the substrate based on the detection value of the at least one light-receiving sensor.

[0004] Japanese Patent Application Laid-Open No. 2023-3970

[0005] In the uninterruptible power supply system described in Patent Document 1, there is a concern that as the density of the boards increases, restrictions will be placed on the placement of at least one light-emitting sensor on the board. Also, as the power supply device becomes smaller, restrictions may be placed on the placement of an opposing member that faces the board.

[0006] Furthermore, in the uninterruptible power supply system described in Patent Document 1, the detection value of the light receiving sensor may be affected by the brightness around the power supply device. Therefore, in an installation environment where the brightness around the power supply device is likely to change, there is a concern that the detection accuracy of the processing unit may decrease.

[0007] The present disclosure has been made to solve these problems, and its first object is to reduce restrictions on the placement of a contamination detection circuit within a power supply device that includes a contamination detection circuit for detecting the contamination state of a circuit board, and its second object is to detect the contamination state of a circuit board with high accuracy.

[0008] A power supply device according to the present disclosure includes a housing, a power supply unit, and a contamination detection circuit. The housing has an air flow passage formed therein. The power supply unit is provided within the housing and includes a first substrate on which a plurality of electronic components are mounted. The contamination detection circuit is provided within the housing and detects a contamination state of the first substrate. A first wiring pattern is formed on the first substrate for electrically connecting the electronic components. The contamination detection circuit includes a first power supply terminal that receives a first power supply voltage, a second power supply terminal that receives a second power supply voltage, and a first voltage divider circuit. The first voltage divider circuit is connected between the first power supply terminal and the second power supply terminal and outputs a first divided voltage to a first node.

[0009] The first voltage divider circuit includes a first resistor circuit connected between the first power supply terminal and the first node, and a first resistor element connected between the first node and the second power supply terminal. The first resistor circuit includes a plurality of second wiring patterns and a plurality of second resistor elements. The plurality of second wiring patterns are formed on the second substrate and have different wiring widths that are equal to or less than the wiring width of the first wiring pattern. The plurality of second resistor elements have different resistance values. The plurality of second resistor elements are connected in series with the plurality of second wiring patterns, respectively, between the first power supply terminal and the first node. The contamination state detection circuit further includes a detector that detects a contamination state of the first wiring pattern based on the first divided voltage output to the first node.

[0010] According to the present disclosure, in a power supply device equipped with a contamination detection circuit that detects the contamination state of a circuit board, it is possible to reduce restrictions on the placement of the contamination detection circuit within the power supply device. Furthermore, according to the present disclosure, the contamination detection circuit can detect the contamination state of the circuit board with high accuracy, thereby improving the power supply reliability of the power supply device.

[0011] Fig. 7 is a circuit block diagram showing the configuration of an uninterruptible power supply according to an embodiment. Fig. 8 is a cross-sectional view showing the layout of the uninterruptible power supply. Fig. 9 is a diagram showing a schematic configuration example of a converter, a bidirectional chopper, and an inverter. Fig. 10 is a circuit diagram showing an example configuration of a contamination state detection circuit. Fig. 11 is a circuit diagram showing a detailed configuration of the voltage divider circuit shown in Fig. 4. Fig. 12 is a diagram for explaining the operation of the voltage divider circuit shown in Fig. 5. Fig. 13 is a circuit diagram showing a detailed configuration of the voltage divider circuit shown in Fig. 4. Fig. 14 is a diagram for explaining the operation of the voltage divider circuit shown in Fig. 7. Fig. 15 is a diagram showing an example of a contamination determination value stored in a memory. Fig. 16 is a diagram showing another installation example of the contamination state detection circuit.

[0012] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following, the same or corresponding parts in the drawings will be denoted by the same reference numerals, and their description will not be repeated in principle.

[0013] 1 is a circuit block diagram showing the configuration of an uninterruptible power supply according to an embodiment of the present disclosure, the uninterruptible power supply including a housing 1, a dust filter 2, a cooling fan 3, a power supply unit 5, an operation unit 12, a control device 13, and a contamination detection circuit 10.

[0014] The housing 1 is provided with an air intake 1a and an exhaust 1b. The dust filter 2 is provided to close the air intake 1a. The cooling fan 3 includes a fan 3a provided in the exhaust 1b and a motor 3b for driving the fan 3a to rotate. The motor 3b is driven by AC power supplied from the power supply unit 5. The fan 3a may be provided in the air intake 1a.

[0015] The housing 1 is placed indoors or outdoors depending on the type of load 53. When the cooling fan 3 is driven, air is drawn into the housing 1 from outside through the dust filter 2, flows through a circulation path formed inside the housing 1, and cools the power supply unit 5 and other components, and is then expelled outside the housing 1 by the cooling fan 3.

[0016] The power supply unit 5 includes an input terminal T1, a DC terminal T2, an output terminal T3, switches S1 to S4, current detectors CD1 to CD3, capacitors C1 to C3, reactors L1 to L3, a converter 6, a DC line 7, a bidirectional chopper 8, and an inverter 9.

[0017] Input terminal T1 receives commercial frequency AC power supplied from commercial AC power supply 51. The instantaneous value of AC voltage VI at input terminal T1 is detected by control device 13. Control device 13 determines whether a power outage has occurred in commercial AC power supply 51 based on AC voltage VI, and controls power supply unit 5 based on the determination result.

[0018] The DC terminal T2 is connected to a battery 52 (power storage device). The battery 52 stores DC power. A capacitor may be connected instead of the battery 52. ​​The DC voltage VB at the DC terminal T2 is detected by the control device 13.

[0019] The output terminal T3 is connected to a load 53. The load 53 is driven by AC power supplied from the power supply unit 5. The instantaneous value of the AC voltage VO at the output terminal T3 is detected by the control device 13.

[0020] The switch S1 and the reactor L1 are connected in series between the input terminal T1 and the AC node of the converter 6. The capacitor C1 is connected to a node N1 between the switch S1 and the reactor L1. The switch S1 is controlled by the control device 13, and is turned on when the commercial AC power supply 51 is operating normally, and is turned off when the commercial AC power supply 51 is in a power outage.

[0021] Capacitor C1 and reactor L2 constitute AC filter F1. AC filter F1 is a low-pass filter that passes commercial frequency AC power from commercial AC power supply 51 to converter 6 and prevents signals of a switching frequency generated in converter 6 from passing to commercial AC power supply 51. Current detector CD1 detects the current flowing through switch S1, i.e., the current I1 that flows from commercial AC power supply 51 mainly to converter 6, and outputs a signal I1f indicative of the detected value to control device 13.

[0022] The converter 6 is controlled by the control device 13. When the commercial AC power supply 51 is operating normally, the converter 6 converts AC power supplied from the commercial AC power supply 51 into DC power and outputs the DC power to the DC line 7. When the commercial AC power supply 51 experiences a power outage, the operation of the converter 6 is stopped.

[0023] Capacitor C2 is connected to DC line 7 and smoothes voltage VD of DC line 7. DC voltage VD appearing on DC line 7 is detected by control device 13. DC line 7 is connected to a high-voltage side node of bidirectional chopper 8, and a low-voltage side node of bidirectional chopper 8 is connected to DC terminal T2 via reactor L2 and switch S2.

[0024] The switch S2 is controlled by the control device 13, and is turned on when the uninterruptible power supply is in use, and is turned off during maintenance of the battery 52, etc. The current detector CD2 detects a current I2 flowing between the bidirectional chopper 8 and the battery 52, and outputs a signal I2f indicating the detected value to the control device 13.

[0025] The bidirectional chopper 8 is controlled by the control device 13. When the commercial AC power supply 51 is operating normally, the bidirectional chopper 8 stores DC power supplied from the converter 6 via the DC line 7 in the battery 52. ​​When the commercial AC power supply 51 experiences a power outage, the bidirectional chopper 8 supplies DC power from the battery 52 to the inverter 9 via the DC line 7.

[0026] The inverter 9 is controlled by the control device 13. When the commercial AC power supply 51 is operating normally, the inverter 9 converts DC power supplied from the converter 6 via the DC line 7 into AC power. When the commercial AC power supply 51 experiences a power outage, the inverter 9 converts DC power supplied from the battery 52 via the bidirectional chopper 8 into AC power.

[0027] An AC node of the inverter 9 is connected to a first terminal of a reactor L3, and a second terminal (node ​​N2) of the reactor L3 is connected to an output terminal T3 via a switch S3. A capacitor C3 is connected to node N2. The reactor L3 and capacitor C3 constitute an AC filter F2.

[0028] The AC filter F2 is a low-pass filter that passes the commercial frequency AC power generated by the inverter 9 to the output terminal T3 and prevents the switching frequency signal generated by the inverter 9 from passing to the output terminal T3. The AC filter F2 converts the voltage pulse train output from the AC node of the inverter 9 into a sinusoidal AC voltage VO and outputs it to the node N2.

[0029] The switch S3 is controlled by the control device 13, and is turned on when the uninterruptible power supply is in use, and is turned off during maintenance of the inverter 9, etc. The current detector CD3 detects the current I3 flowing through the switch S3, and outputs a signal I3f indicating the detected value to the control device 13.

[0030] The switch S4 is connected between the output terminal T3 and the motor 3b of the cooling fan 3. The switch S4 is controlled by the control device 13, and is turned on when the power supply unit 5 is operating, and is turned off when maintenance of the cooling fan 3 is being performed, for example.

[0031] The operation unit 12 includes a plurality of buttons operated by a user of the uninterruptible power supply, a display that displays various information, etc. By operating the operation unit 12, the user of the uninterruptible power supply can operate the uninterruptible power supply manually or automatically.

[0032] The control device 13 controls the entire power supply unit 5 based on signals from the operation unit 12, AC voltages VI and VO, DC voltages VB and VD, and detection signals I1f to I3f from the current detectors CD1 to CD3.

[0033] The power supply unit 5 includes a circuit board mounted with multiple electronic components, such as a converter 6, a bidirectional chopper 8, and an inverter 9. Depending on the installation environment of the housing 1, the amount of dust that accumulates on the circuit board may increase as the uninterruptible power supply's operating time increases. This accumulated dust may cause short circuits or open circuits in the circuits on the circuit board. If the power supply unit 5 fails, its operation is stopped, and the power supply from the power supply unit 5 to the load 53 is stopped. In this case, the uninterruptible power supply switches to a commercial power supply that supplies AC power from the commercial AC power source 51 to the load 53 via a bypass circuit. However, if the power supply unit 5 is shut down for a period of time or if repairs are required, there is a concern that the reliability of the power supply from the uninterruptible power supply may be reduced when an abnormality occurs in the commercial AC power source 51.

[0034] The contamination detection circuit 10 is provided in the housing 1 and detects the contamination state of the circuit board. The contamination detection circuit 10 outputs a detection signal DET indicating the detected contamination state of the circuit board to the control device 13. Based on the detection signal DET, the control device 13 notifies the user of the uninterruptible power supply of the contamination state of the circuit board using a display of the operation unit 12 or the like.

[0035] Fig. 2 is a cross-sectional view showing the layout of the uninterruptible power supply. As shown in Fig. 2, the housing 1 is formed in the shape of a vertically long rectangular parallelepiped. An air intake 1a is provided at the bottom end of the right side of the housing 1 in the drawing, and an exhaust 1b is provided at the left end of the ceiling of the housing 1 in the drawing. A dust filter 2 is provided to close the air intake 1a of the housing 1.

[0036] A partition plate 14 is erected in the center of the housing 1, dividing the housing 1 into left and right sections. An opening 14a for air passage is provided at the bottom end of the partition plate 14. A shelf board 15 is provided horizontally above the opening 14a on the surface of the partition plate 14 on the right side in the drawing. This forms an L-shaped air flow passage 16 within the housing 1, extending from the air intake port 1a to the air exhaust port 1b.

[0037] When a current flows through the electronic components that make up the power supply unit 5 (particularly the converter 6, bidirectional chopper 8, inverter 9, and reactors L1 to L3), heat is generated, causing the temperature of the electronic components to rise. If the temperature of the electronic components rises excessively, there is a risk that the electronic components themselves or the surrounding electronic components may malfunction. Therefore, the electronic components are arranged in the flow path 16 and are cooled by airflow.

[0038] In FIG. 2, the converter 6, the bidirectional chopper 8, and the inverter 9 are arranged in the flow passage 16 so as to face the rear surface of the dust filter 2, and the reactors L1 to L3 are arranged in the flow passage 16 below the cooling fan 3 in the vertical direction in the figure.

[0039] Fig. 3 is a diagram schematically illustrating an example configuration of the converter 6, bidirectional chopper 8, and inverter 9. As shown in Fig. 3, each of the converter 6, bidirectional chopper 8, and inverter 9 is provided with a substrate 40 on which a plurality of electronic components 42 are mounted, cooling fins (not shown) for dissipating heat generated by the plurality of electronic components 42, and a contamination detection circuit 10 for detecting the contamination state of the substrate 40. The substrate 40 corresponds to one example of a "first substrate."

[0040] The substrate 40 has a wiring pattern 44 and a plurality of pads 46 formed thereon for electrically connecting the electronic components 42. For example, the wiring pattern 44 and the plurality of pads 46 are copper foil printed on the substrate 40. The wiring width W and thickness of the wiring pattern 44 and the spacing D between the plurality of pads 46 are designed based on factors such as the magnitude of the current flowing through each electronic component. The wiring pattern 44 corresponds to an example of a "first wiring pattern," and the pads 46 correspond to an example of a "first pad."

[0041] During operation of the uninterruptible power supply, dust contained in the air flowing through the flow path 16 continues to accumulate on the substrate 40, corroding the wiring pattern 44 and potentially causing a break in the wiring pattern 44. If the air contains a corrosive gas or has high air humidity, corrosion of the wiring pattern 44 will progress more quickly. Furthermore, if the dust contains water-soluble components, the dust may adhere between two adjacent pads 46, causing a short circuit between the two pads 46.

[0042] The contamination detection circuit 10 is configured to detect contamination of the wiring pattern 44 and the plurality of pads 46. In one aspect, the contamination detection circuit 10 can be formed by utilizing a portion of the substrate 40. Note that the contamination detection circuit 10 only needs to be provided in a portion of the substrate 40 of at least one of the converter 6, the bidirectional chopper 8, and the inverter 9.

[0043] 2, capacitors C1 to C3 are provided on shelf board 15, and operation unit 12 and control device 13 are provided above them. A portion of operation unit 12 is exposed on the surface of housing 1 so that a plurality of buttons included in operation unit 12 can be operated from outside housing 1 and images displayed on a display included in operation unit 12 can be viewed from outside housing 1. The image displayed on the display includes information indicating the contamination state of the board detected by contamination state detection circuit 10.

[0044] <Configuration of Contamination State Detection Circuit> Fig. 4 is a circuit diagram showing an example configuration of the contamination state detection circuit 10. As shown in Fig. 4, the contamination state detection circuit 10 includes a substrate 11, a power supply terminal 18, a ground terminal 20, a voltage divider circuit 22, a voltage divider circuit 26, and a detector 30.

[0045] Substrate 11 corresponds to an embodiment of a "second substrate." In the example of FIG. 3, substrate 11 is a portion of substrate 40. Power supply terminal 18 receives power supply voltage VDD. Ground terminal 20 receives ground voltage GND. Power supply voltage VDD corresponds to an embodiment of a "first power supply voltage," and ground voltage GND corresponds to an embodiment of a "second power supply voltage." Power supply terminal 18 corresponds to an embodiment of a "first power supply terminal," and ground terminal 20 corresponds to an embodiment of a "second power supply terminal."

[0046] The voltage divider circuit 22 is connected between the power supply terminal 18 and the ground terminal 20, and outputs a divided voltage V1 to a node N11 (first node). The voltage divider circuit 22 includes a resistance circuit 24 and a resistance element R1. The resistance circuit 24 is connected between the power supply terminal 18 and the node N11. The resistance element R1 is connected between the node N1 and the ground terminal 20. The resistance circuit 24 corresponds to an example of a "first resistance circuit," and the resistance element R1 corresponds to an example of a "first resistance element."

[0047] The resistance circuit 24 includes a plurality of wiring patterns WP1 to WP4 formed on the substrate 11 and a plurality of resistance elements RA1 to RA4. In the following description, the plurality of wiring patterns WP1 to WP4 will also be collectively referred to as "wiring patterns WP." The plurality of resistance elements RA1 to RA4 will also be collectively referred to as "resistance elements RA." The wiring pattern WP corresponds to an example of a "second wiring pattern," and the resistance element RA corresponds to an example of a "second resistance element." Note that the number of wiring patterns WP and the number of resistance elements RA need only be the same, and are not limited to four. FIG. 5 is a circuit diagram showing a detailed configuration of the voltage divider circuit 22 shown in FIG. 4.

[0048] 5, the multiple wiring patterns WP1 to WP4 included in the resistance circuit 24 have different wiring widths W1 to W4. The wiring widths W1 to W4 have a relationship of W1<W2<W3<W4. The wiring widths W1 to W4 are set to be equal to or less than the wiring width W of the wiring pattern 44 formed on the substrate 40. For example, the wiring width W4 of the wiring pattern WP4 is equal to the wiring width W of the wiring pattern 44. The wiring widths W1 to W4 of the wiring patterns WP1 to WP3 are less than the wiring width W of the wiring pattern 44.

[0049] The thickness of the wiring patterns WP1 to WP4 is equal to the thickness of the wiring pattern 44. When the substrate 11 is a part of the substrate 40, the wiring patterns WP1 to WP4 and the wiring pattern 44 can be formed in the same process.

[0050] The plurality of resistor elements RA1 to RA4 are connected in series with the plurality of wiring patterns WP1 to WP4, respectively, between the power supply terminal 18 and the node N11. The plurality of resistor elements RA1 to RA4 have different resistance values. The resistor elements RA1 to RA4 are, for example, chip resistors or lead resistors.

[0051] The resistance values ​​of the wiring patterns WP1 to WP4 are negligibly small compared to the resistance values ​​of the resistor elements RA1 to RA4. Therefore, the resistance value of the resistor circuit 24 is equal to the combined resistance of the resistor elements RA1 to RA4 connected in parallel. This combined resistance is calculated as the sum of the reciprocals of the resistance values ​​of the resistor elements RA1 to RA4. If the resistance value of the resistor circuit 24 is RA0 and the resistance values ​​of the resistor elements RA1 to RA4 are RA1 to RA4, then RA0 can be expressed by the formula 1 / RA0 = 1 / RA1 + 1 / RA2 + 1 / RA3 + 1 / RA4.

[0052] A divided voltage V1, which is a power supply voltage VDD, is output to node N11 of voltage divider circuit 22 according to the ratio of the resistance value RA0 of resistor circuit 24 to the resistance value R1 of resistor element R1. The divided voltage V1 is given by the following equation: V1=VDD·R1 / (RA0+R1) (1) Now, as shown in FIG. 6, assume that wiring pattern WP1, which has the smallest wiring width among multiple wiring patterns WP1-WP4, is broken due to corrosion. In this case, resistor element RA1 is electrically disconnected from node N11, and therefore resistance value RA0 of resistor circuit 24 becomes equal to the combined resistance of resistor elements RA2-RA4 connected in parallel. That is, RA0 can be expressed by the equation 1 / RA0=1 / RA2+1 / RA3+1 / RA4.

[0053] Although not shown, if the wiring pattern WP2 is broken due to corrosion, the resistance element RA2 is electrically disconnected from the node N1. Therefore, the resistance value RA0 of the resistance circuit 24 is equal to the combined resistance of the parallel-connected resistance elements RA1, RA3, and RA4. That is, RA0 is expressed by the formula 1 / RA0=1 / RA1+1 / RA3+1 / RA4.

[0054] In this way, when one of the wiring patterns WP1 to WP4 becomes disconnected, the resistance value RA0 of the resistance circuit 24 changes. The change in the resistance value RA0 of the resistance circuit 24 also changes the divided voltage V1 output to the node N11 of the voltage divider circuit 22. This makes it possible to detect which of the wiring patterns WP1 to WP4 is disconnected, from the divided voltage V1 output to the node N11.

[0055] In this embodiment, the multiple wiring patterns WP1 to WP4 have different wiring widths W1 to W4 that are equal to or less than the wiring width W of the wiring pattern 44 formed on the substrate 40. As corrosion of the wiring patterns WP1 to WP4 progresses, the smaller the wiring width of the wiring pattern WP, the higher the likelihood of a break. By making the wiring widths W1 to W4 of the wiring patterns WP1 to WP4 equal to or less than the wiring width W of the wiring pattern 44, it is possible to determine the state of contamination (corrosion) of the wiring pattern 44 from the broken wiring pattern WP. This makes it possible to determine whether or not there is a possibility of a break in the wiring pattern 44, allowing the user of the uninterruptible power supply to take appropriate measures for preventive maintenance and to avoid fatal accidents.

[0056] 4 , voltage-dividing circuit 26 is connected between node N11 and ground terminal 20, and outputs divided voltage V2 to node N12 (second node). Voltage-dividing circuit 26 includes a resistive element R2 and a resistive circuit 28. Resistive element R2 is connected between node N11 and node N12. Resistive circuit 28 is connected between node N12 and ground terminal 20. Resistive element R2 corresponds to an example of a "third resistive element," and resistive circuit 28 corresponds to an example of a "second resistive circuit."

[0057] The resistance circuit 28 includes multiple sets of pads P1 to P3 and multiple resistance elements RB1 to RB3 formed on the substrate 11. In the following description, the multiple sets of pads P1 to P3 will also be collectively referred to as a "set of pads P." The multiple resistance elements RB1 to RB3 will also be collectively referred to as a "resistance element RB." The pads P correspond to an example of a "second pad," and the resistance elements RB correspond to an example of a "fourth resistance element."

[0058] A set of pads P consists of two pads spaced apart from each other. The number of pads P in a set and the number of resistor elements RB need only be the same, and are not limited to three. Figure 7 is a circuit diagram showing a detailed configuration of the voltage divider circuit 26 shown in Figure 4.

[0059] 7, the multiple sets of pads P1 to P3 included in the resistor circuit 28 each have a different pad spacing D1 to D3. The pad spacings D1 to D3 have the relationship D1<D2<D3. The pad spacings D1 to D3 are set to be equal to or less than the pad spacing D of the multiple pads 46 formed on the substrate 40. For example, the pad spacing D3 of the set of pads P3 is equal to the pad spacing D of the multiple pads 46. The pad spacings D1 and D2 of the two sets of pads P1 and P2 are less than the pad spacing D of the multiple pads 46.

[0060] The shapes of the pads P1 to P3 are substantially the same as the shape of the pad 46. When the substrate 11 is a part of the substrate 40, the pads P1 to P3 and the pad 46 can be formed in the same process.

[0061] The plurality of resistor elements RB1 to RB3 are connected in series with the plurality of sets of pads P1 to P3, respectively, between the node N11 and the ground terminal 20. The plurality of resistor elements RB1 to RB3 have the same resistance value. The resistor elements RB1 to RB3 are, for example, chip resistors or lead resistors.

[0062] 7, when none of the multiple sets of pads P1 to P3 are short-circuited, node N12 and ground terminal 20 are electrically isolated. That is, resistance circuit 28 is disconnected from voltage-dividing circuit 26. If the resistance value of resistance circuit 28 is RB0, then RB0 is essentially infinite. In this case, the divided voltage V2 output to node N12 of voltage-dividing circuit 26 is equal to the divided voltage V1 output to node N11 (V2=V1).

[0063] 8, it is assumed that pad P1, which is the set of pads P1 to P3 with the smallest pad spacing, is short-circuited due to dust. In this case, resistive element RB1 is electrically connected between node N12 and ground terminal 20, so that resistance value RB0 of resistor circuit 28 is equal to the resistance value of resistive element RB1. If the resistance value of resistive elements RB1 to RB3 is RB, then RB0 = RB.

[0064] A divided voltage V2, which is a ratio of the voltage V1 at node N11 to the resistance value RB0 of resistor circuit 28, is output to node N12 of voltage divider circuit 26. The divided voltage V2 is given by the following equation: V2=V1·RB0 / (R2+RB0) (2) Although not shown, if two pairs of pads P1 and P2 are shorted due to dust, resistor elements RB1 and RB2 will be electrically connected between node N12 and ground terminal 20. The resistance value RB0 of resistor circuit 28 is equal to the combined resistance of resistor elements RB1 and RB2 connected in parallel. The combined resistance is calculated as the sum of the reciprocals of the resistance values ​​of resistor elements RB1 and RB2. RB0 is expressed by the equation 1 / RB0=1 / RB+1 / RB. That is, RB0=RB / 2.

[0065] As the number of short-circuited pad pairs increases in this manner, the resistance value RB0 of the resistor circuit 28 changes. The change in the resistance value RB0 of the resistor circuit 28 also changes the divided voltage V2 output to the node N12 of the voltage divider circuit 26. This makes it possible to detect which of the multiple sets of pads P1 to P3 is short-circuited, based on the divided voltage V2 output to the node N12.

[0066] In this embodiment, the multiple sets of pads P1-P3 have mutually different pad spacings D1-D3 that are equal to or less than the pad spacing D between the multiple pads 46 formed on the substrate 40. As the amount of dust that accumulates on the multiple sets of pads P1-P3 increases, the sets of pads P with smaller pad spacing become more likely to short-circuit. By making the pad spacings D1-D3 between the multiple sets of pads P1-P3 equal to or less than the pad spacing D between the multiple pads 46, it is possible to determine the contamination state (dust accumulation state) of the multiple pads 46 from the short-circuited set of pads P. This makes it possible to determine whether or not the multiple pads 46 are likely to short-circuit, allowing the user of the uninterruptible power supply to take appropriate measures for preventive maintenance and to avoid fatal accidents.

[0067] 4, the detector 30 is connected to the node N12 and detects the divided voltage V2 appearing at the node N12. The detector 30 detects the contamination state of the wiring pattern 44 and the pads 46 formed on the substrate 40 based on the detected divided voltage V2.

[0068] Specifically, the detector 30 includes an A / D converter 32, a memory 34, a comparator 36, and a determination unit 38. The A / D converter 32 converts the divided voltage V2, which is analog data, into digital data and outputs the digital data to the comparator 36. The memory 34 stores a contamination determination value. The contamination determination value is used to determine the contamination state of the wiring pattern 44 and the plurality of pads 46 from the divided voltage V2.

[0069] 9 is a diagram showing an example of the contamination determination value stored in memory 34. As shown in FIG. 9, the contamination determination value is generated based on a divided voltage V2 output to node N12 in accordance with the contamination state (disconnection state) of the plurality of wiring patterns WP1 to WP4 and the contamination state (short circuit state) of the plurality of sets of pads P1 to P3. The divided voltage V2 is calculated by substituting the power supply voltage VDD, the resistance value RA0 of resistor circuit 24, the resistance value RB0 of resistor circuit 28, the resistance value R1 of resistor element R1, and the resistance value R2 of resistor element R2 into the above equations (1) and (2).

[0070] 9 shows the value of the divided voltage V2 when VDD=5 V, RA1=1 kΩ, RA2=2 kΩ, RA3=3 kΩ, RA4=5 kΩ, RB=100 kΩ, R1=5 kΩ, and R2=100 kΩ. As shown in Fig. 9, when the multiple wiring patterns WP1 to WP4 are normal and not disconnected, and the multiple sets of pads P1 to P3 are normal and not short-circuited, the divided voltage V2 at node N12 is equal to the divided voltage V1 at node N11, that is, 4.55 V.

[0071] In contrast, if multiple sets of pads P1 to P3 are normal and the wiring pattern WP1 is broken, the divided voltage V2 changes to 4.19 V. If multiple wiring patterns WP1 to WP4 are normal and one set of pads P1 is short-circuited, the divided voltage V2 changes to 2.28 V.

[0072] 5 and 6, the resistance value RA0 of the resistance circuit 24 changes when one of the wiring patterns WP1 to WP4 is broken. As described in FIGS. 7 and 8, the resistance value RB0 of the resistance circuit 28 changes when at least one set of pads P among the sets of pads P1 to P3 is short-circuited. Therefore, the divided voltage V2 changes depending on the number of broken wiring patterns WP and short-circuited sets of pads P.

[0073] The comparator 36 detects which of the wiring patterns WP1 to WP4 is disconnected by comparing the divided voltage V2 with the contamination determination value shown in Fig. 9. The comparator 36 also detects which of the sets of pads P1 to P3 is short-circuited by comparing the divided voltage V2 with the contamination determination value.

[0074] The determination unit 38 determines the contamination state of the wiring pattern 44 and the plurality of pads 46 based on the output signal of the comparator 36. Specifically, the determination unit 38 determines the contamination level of the wiring pattern 44 from the wiring pattern WP that is disconnected. In the example of FIG. 9 , if the wiring pattern WP1, which has the smallest wiring width W, is disconnected, the contamination level of the wiring pattern 44 is determined to be "1." If the wiring pattern WP4, which has the largest wiring width W, is disconnected, the contamination level of the wiring pattern 44 is determined to be "4." The contamination level of the wiring pattern 44 indicates a higher value as the degree of contamination (corrosion) of the wiring pattern 44 increases.

[0075] The determining unit 38 also determines the contamination level of the pads 46 from the short-circuited set of pads P. In the example of Fig. 9, if pad P1 of the set with the smallest pad spacing is short-circuited, the contamination level of the pads 46 is determined to be "1." If multiple sets of pads P1 to P3 are short-circuited, the contamination level of the pads 46 is determined to be "3." The contamination level of the pads 46 indicates a higher value as the degree of contamination (dust accumulation) of the pads 46 increases.

[0076] The determination unit 38 generates a detection signal DET based on the determination result and outputs the generated detection signal DET to the control device 13. The detection signal DET includes information indicating the contamination level of the wiring pattern 44 and the plurality of pads 46. Based on the detection signal DET, the control device 13 notifies the user of the uninterruptible power supply of the contamination state of the board 40 (the contamination level of the wiring pattern 44 and the plurality of pads 46) using a display or the like of the operation unit 12. The control device 13 may also transmit information indicating the contamination state of the board 40 to an external management device or the like via a communication network such as the Internet.

[0077] <Effects> As described above, according to this embodiment, the contamination state detection circuit 10 can detect the contamination state of the substrate 40 of the power supply unit 5, making it possible to perform maintenance on the power supply device before a break or short circuit occurs in the circuit of the power supply unit 5. This can improve the power supply reliability of the power supply device.

[0078] The contamination detection circuit 10 includes a plurality of wiring patterns WP1-WP4 having different wiring widths W1-W4, each of which is equal to or less than the wiring width W of the wiring pattern 44 formed on the substrate 40, and a plurality of sets of pads P1-P3 having different pad spacings D1-D2, each of which is equal to or less than the pad spacing D of the plurality of pads 46 formed on the substrate 40. The contamination detection circuit 10 can determine the degree of contamination (contamination level) of the wiring pattern 44 and the plurality of pads 46 based on the occurrence of breaks in the wiring patterns WP1-WP4 and the occurrence of short circuits in the plurality of sets of pads P1-P3. Because the contamination detection circuit 10 can detect the contamination state of the substrate 40 with high accuracy, maintenance of the power supply device can be performed at an appropriate time. This improves the power supply reliability of the power supply device and extends the device life of the power supply device.

[0079] Furthermore, according to this embodiment, the contamination detection circuit 10 can detect the contamination state of the substrate 40 without installing a light-emitting sensor or a light-receiving sensor, which reduces restrictions on the placement of the contamination detection circuit 10 within the housing 1.

[0080] <Other Configuration Examples> (1) In the above-described embodiment, a configuration example (see FIG. 3 ) has been described in which the substrate 11 (second substrate) of the contamination detection circuit 10 is part of the substrate 40 (first substrate) of the power supply unit 5. However, the substrate 11 may be provided independently of the substrate 40. FIG. 10 shows another installation example of the contamination detection circuit 10. As shown in FIG. 10 , for example, the contamination detection circuit 10 may be installed in a location within the housing 1 where dust is likely to accumulate. This makes it possible to more quickly determine the possibility of a break in the wiring pattern 44 formed on the substrate 40 and a short circuit among multiple pads 46. The contamination detection circuit 10 can also be installed within the housing of an existing power supply device.

[0081] (2) In the above-described embodiment, an example configuration of the contamination state detection circuit 10 (see FIG. 4) was described in which the “first power supply voltage” is the power supply voltage VDD and the “second power supply voltage” is the ground voltage GND. However, the same effect as in the above-described embodiment can also be obtained in a case in which the “first power supply voltage” is the ground voltage GND and the “second power supply voltage” is the power supply voltage VDD.

[0082] (3) In the above-described embodiment, the voltage-dividing circuit 22 for detecting the contamination state of the wiring pattern 44 and the voltage-dividing circuit 26 for detecting the contamination state of the pads 46 are integrated together. However, the voltage-dividing circuit 22 and the voltage-dividing circuit 26 may be provided independently of each other.

[0083] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0084] 1 Housing, 1a Intake port, 1b Exhaust port, 2 Dustproof filter, 3 Cooling fan, 3a Fan, 3b Motor, 5 Power supply unit, 6 Converter, 7 DC line, 8 Bidirectional chopper, 9 Inverter, 10 Contamination state detection circuit, 11, 40 Board, 12 Operation unit, 13 Control device, 14 Partition plate, 14a Opening, 16 Flow path, 18 Power supply terminal, 20 Ground terminal, 22, 26 Voltage divider circuit, 24, 28 Resistance circuit, 30 Detector, 32 A / D converter, 34 Memory, 36 Comparator, 38 Judgment unit, 42 Electronic components, 44, WP1 to WP4 Wiring patterns, 46, P1 to P3 Pads, 51 Commercial AC power supply, 52 Battery, 53 Load, T1 Input terminal, T2 DC terminal, T3 Output terminal, C1 to C3 Capacitor, S1 to S4 switches, L1 to L3 reactors, F1, F2 AC filters, CD1 to CD3 current detectors, W, W1 to W4 wiring width, D, D1 to D3 pad spacing, R1, R2, RA1 to RA4, RB1 to RB3 resistive elements.

Claims

1. A device comprising: a housing having an air flow passage formed therein; a power supply unit provided within the housing and including a first substrate on which a plurality of electronic components are mounted; and a contamination detection circuit provided within the housing for detecting a contamination state of the first substrate, wherein a first wiring pattern for electrically connecting each electronic component is formed on the first substrate, the contamination detection circuit including: a first power supply terminal for receiving a first power supply voltage; a second power supply terminal for receiving a second power supply voltage; and a first voltage divider circuit connected between the first power supply terminal and the second power supply terminal and for outputting a first divided voltage to a first node, the first voltage divider circuit including: a first resistance circuit connected between the first power supply terminal and the first node; and a first resistance element connected between the first node and the second power supply terminal, the first resistance circuit including: a plurality of second wiring patterns formed on a second substrate and having different wiring widths each equal to or less than the wiring width of the first wiring pattern; a plurality of second resistance elements having different resistance values, the plurality of second resistance elements being connected in series with the plurality of second wiring patterns between the first power supply terminal and the first node, and the contamination state detection circuit further including a detector that detects a contamination state of the first wiring pattern based on the first divided voltage output to the first node.

2. The power supply device according to claim 1, wherein the detector is configured to compare the first divided voltage output to the first node with a plurality of first contamination determination values ​​and detect the contamination state of the first wiring pattern based on the comparison result, and the plurality of first contamination determination values ​​are generated based on the first divided voltage output to the first node when each of the plurality of second wiring patterns is broken.

3. A power supply device as described in claim 2, wherein the detector has a plurality of contamination levels set corresponding to the plurality of first contamination determination values, and determines the contamination level of the first wiring pattern based on the comparison result.

4. The power supply device of claim 1, wherein the first substrate is further formed with a plurality of first pads, the contamination detection circuit further includes a second voltage divider circuit connected between the first node and the second power supply terminal and outputting a second divided voltage to the second node, the second voltage divider circuit including: a third resistive element connected between the first node and the second node; and a second resistive circuit connected between the second node and the second power supply terminal, the second resistive circuit including: a plurality of sets of second pads formed on the second substrate and having different pad spacings that are equal to or less than the pad spacing of the plurality of first pads; and a plurality of fourth resistive elements having equal resistance values, the plurality of fourth resistive elements being connected in series with the plurality of sets of second pads between the second node and the second power supply terminal, and the detector detects the contamination state of the plurality of first pads based on the second divided voltage output to the second node.

5. The power supply device according to claim 4, wherein the detector is configured to compare the second divided voltage output to the second node with a plurality of second contamination determination values ​​and detect the contamination state of the plurality of first pads based on the comparison result, and the plurality of second contamination determination values ​​are generated based on the second divided voltage output to the second node when each of the plurality of sets of second pads is short-circuited.

6. A power supply device as described in claim 5, wherein the detector has a plurality of contamination levels set corresponding to the plurality of second contamination determination values, and determines the contamination levels of the plurality of first pads based on the comparison results.

7. A power supply device according to any one of claims 1 to 6, wherein the second board is a part of the first board.

8. The power supply device according to any one of claims 1 to 6, wherein the second board is provided independently from the first board within the housing.

9. The power supply device according to any one of claims 1 to 6, wherein the housing is provided with an intake port and an exhaust port, and further comprising a cooling fan provided in the exhaust port.

Citation Information

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