Silicon carbide schottky barrier diode and manufacturing method therefor

Abstract

Provided in the present application are a silicon carbide Schottky barrier diode and a manufacturing method therefor. The silicon carbide Schottky barrier diode comprises: a substrate (110), having a first conductivity type; a first epitaxial layer (132), having the first conductivity type and located above the substrate (110); a second epitaxial layer (134), having the first conductivity type, located on the first epitaxial layer (132) and having a doping concentration greater than the doping concentration of the first epitaxial layer (132); doped regions (142), having a second conductivity type and extending downwards from the top of the second epitaxial layer (134); trenches (141), extending from the tops of the doped regions (142) to the insides of the doped regions (142) and formed in the silicon carbide Schottky barrier diode, the first conductivity type and the second conductivity type being opposite conductivity types; and a Schottky metal layer (152), located on the doped regions (142) and filling the trenches (141). The present application can reduce the VF without sacrificing the BV of devices.

Description

Silicon carbide Schottky barrier diode and manufacturing method thereof

[0001] This application claims priority to the Chinese patent application No. 2024106537841, filed on May 23, 2024, entitled “Silicon carbide Schottky barrier diode and manufacturing method thereof”, the entire content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the field of semiconductor manufacturing, and in particular to a silicon carbide Schottky barrier diode and a manufacturing method thereof. BACKGROUND

[0003] Silicon carbide metal oxide semiconductor field effect transistor (SiC MOS) has a wider band gap than Si MOS, so it has higher breakdown voltage (BV, breakdown voltage) at the same epitaxial layer thickness, and lower on-resistance at the same BV.

[0004] Silicon carbide Schottky barrier (JBS) diode has both excellent forward conduction characteristics of Schottky diode and reverse voltage withstand characteristics of PN junction barrier.

[0005] The on-voltage VF is an important parameter of the silicon carbide Schottky barrier diode, and reducing the VF of the silicon carbide Schottky barrier diode can improve the performance of the device.

[0006] SUMMARY

[0007] Therefore, it is necessary to provide a silicon carbide Schottky barrier diode with lower VF.

[0008] A silicon carbide Schottky barrier diode, comprising: a substrate having a first conductivity type; a first epitaxial layer having a first conductivity type located above the substrate; a second epitaxial layer having a first conductivity type located on the first epitaxial layer, and the doping concentration of the second epitaxial layer is greater than the doping concentration of the first epitaxial layer; a doped region having a second conductivity type extending downward from the top of the second epitaxial layer; the silicon carbide Schottky barrier diode is further formed with a trench extending from the top of the doped region to the inside of the doped region; the first conductivity type and the second conductivity type are opposite conductivity types; a Schottky metal layer is located on the doped region and fills the trench.

[0009] The double-layer epitaxial structure of the epitaxial layer, the higher doping concentration of the second epitaxial layer on the top than the first epitaxial layer on the bottom, can effectively reduce the on-resistance of the silicon carbide Schottky barrier diode when it is turned on. And because the doping of the silicon carbide epitaxial layer is more uniform than the silicon carbide layer by ion implantation, the resistance can be reduced more effectively. Because the doping concentration of the first epitaxial layer is lower, the VF can be reduced without sacrificing the BV.

[0010] In one embodiment, the doping concentration of the second epitaxial layer is 1E16-6E16 / cm 3 .

[0011] In one embodiment, the thickness of the second epitaxial layer accounts for 10-30% of the total thickness of the first and second epitaxial layers.

[0012] In one embodiment, the thickness of the second epitaxial layer is 1-3 microns.

[0013] In one embodiment, the bottom of the doped region extends into the first epitaxial layer.

[0014] In one embodiment, the depth of the trench is less than the depth of the first epitaxial layer.

[0015] In one embodiment, the silicon carbide Schottky barrier diode further comprises a cathode metal layer on the back of the substrate, the back of the substrate being the side of the substrate away from the first epitaxial layer, and the Schottky metal layer serving as the anode metal layer of the silicon carbide Schottky barrier diode.

[0016] In one embodiment, the silicon carbide Schottky barrier diode further comprises a buffer layer between the substrate and the first epitaxial layer, the buffer layer having the first conductivity type and a doping concentration greater than that of the second epitaxial layer.

[0017] In one embodiment, the second epitaxial layer has a gradual concentration distribution with high central doping concentration and low top and bottom doping concentrations.

[0018] In one embodiment, the first conductivity type is N-type and the second conductivity type is P-type.

[0019] It is also necessary to provide a method for manufacturing a silicon carbide Schottky barrier diode.

[0020] A method for manufacturing a silicon carbide Schottky barrier diode, comprising: obtaining a substrate, the substrate having a first conductivity type; forming a first epitaxial layer on the substrate by an epitaxial process, the first epitaxial layer having the first conductivity type; forming a second epitaxial layer on the first epitaxial layer by an epitaxial process, the second epitaxial layer having the first conductivity type, the second epitaxial layer having a higher doping concentration than the first epitaxial layer; etching the second epitaxial layer to form a trench; forming a doped region extending downward from a top of the second epitaxial layer, the doped region having a second conductivity type, the doped region surrounding a periphery and a bottom of the trench; the first conductivity type and the second conductivity type being opposite conductivity types.

[0021] The method for manufacturing a silicon carbide Schottky barrier diode, the epitaxial layer adopts a double-layer epitaxial structure, the second epitaxial layer at the top has a higher doping concentration than the first epitaxial layer at the bottom, which can effectively reduce the on-resistance of the silicon carbide Schottky barrier diode when conducting. And because the doping of the silicon carbide epitaxial layer is more uniform than the silicon carbide layer using ion implantation, the resistance can be reduced more effectively. Because the doping concentration of the first epitaxial layer is lower, VF can be reduced without sacrificing BV.

[0022] In one of the embodiments, the obtained substrate has a buffer layer of the first conductivity type formed on the front surface of the substrate, the buffer layer having a doping concentration greater than that of the second epitaxial layer; the step of forming the first epitaxial layer on the substrate by an epitaxial process is to form the first epitaxial layer on the buffer layer.

[0023] In one of the embodiments, the second epitaxial layer has a gradually changing concentration distribution with a high central doping concentration and low top and bottom doping concentrations. BRIEF DESCRIPTION OF DRAWINGS

[0024] For better describing and illustrating the embodiments and / or examples of the inventions disclosed herein, reference can be made to one or more drawings. Additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the presently described embodiments and / or examples, and the best mode presently understood of these inventions.

[0025] Fig. 1 is a schematic diagram of a partial structure of a silicon carbide Schottky barrier diode in an embodiment of the present application;

[0026] Fig. 2 is a schematic diagram of a structure of a silicon carbide Schottky barrier diode in an embodiment of the present application;

[0027] Fig. 3 is a reverse breakdown curve of a silicon carbide Schottky barrier diode in an embodiment of the present application and a comparative example;

[0028] Figure 4 is a turn-on curve of a silicon carbide Schottky barrier diode and a comparative example in an embodiment of the present application;

[0029] Figure 5 is a flow chart of a method of manufacturing a silicon carbide Schottky barrier diode in an embodiment of the present application. DETAILED DESCRIPTION

[0030] For the purposes of this application, reference will be made to the accompanying drawings in which preferred embodiments of the application are shown. The application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and fully convey the scope of the application to those skilled in the art.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0032] It will be understood that when an element or layer is referred to as being "on" or "adjacent" or "connected" or "coupled" to another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer or one or more intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on," "directly adjacent," "directly connected" or "directly coupled" to another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application.

[0033] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is inverted, then a dependent element or feature described as "below" or "beneath" another element or feature is oriented "above" or "over" the other element or feature. Thus, the exemplary term "below" or "beneath" can encompass both an orientation of above and below. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0034] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0035] Embodiments of the application are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the application. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, embodiments of the application should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and / or a gradient of implant concentration at its edges rather than a binary change between implanted and non-implanted regions. As used herein, the term "substantially" is used to describe an aspect that is expected to be within a certain tolerance range. Thus, for example, an element that is "substantially flat" is expected to be flat within a certain tolerance range. Similarly, an element that is "substantially perpendicular" is expected to be perpendicular within a certain tolerance range. Furthermore, to the extent that the terms "comprise", "comprising", "include", "including" and "includes" are used in the detailed description and / or the claims, such terms are intended to be inclusive in a manner similar to the term "comprise" as "comprising" has been interpreted by the United States Patent and Trademark Office in its decision on Reexamination Application No. B1 RE38, 809, this interpretation also being in accord with a broadest reasonable interpretation of the term "comprise" as understood by those skilled in the art.

[0036] As used herein, semiconductor art terms are used by those skilled in the art, for example, P-type and N-type impurities are used to distinguish doping concentrations, simply P+ type represents heavily doped P-type, P-type represents medium doped P-type, P- type represents lightly doped P-type, N+ type represents heavily doped N-type, N-type represents medium doped N-type, N- type represents lightly doped N-type.

[0037] For silicon carbide Schottky barrier diode, with the chip area shrinking, an exemplary process path is to use trench structure, and to change the injection depth by etching to change the generation.

[0038] An exemplary method to reduce VF is to change the barrier metal. However, the process is difficult to reproduce, has a long time period, and has an unknown success rate, and is not suitable for normal product evolution iteration period.

[0039] Another exemplary method is to increase the doping concentration of the epitaxial layer, which can also effectively reduce VF. However, this method is accompanied by a significant reduction in breakdown voltage, which is not suitable for the original BV requirement of the product, and cannot meet the original parameter requirement of the product.

[0040] There is also a double-layer epitaxial structure silicon carbide Schottky barrier diode, the top epitaxial layer uses normal epitaxial concentration, and the thickness accounts for 70% to 90% of the total thickness of the EPI (epitaxial layer); the bottom epitaxial layer is a concentrated EPI. The principle is that the reverse withstand voltage electric field distribution of JBS is inverted trapezoidal, and the electric field area is smaller at the bottom epitaxial layer, which has a smaller impact on BV than the top EPI. Therefore, by reducing the bottom EPI withstand voltage and reducing BV, VF is improved.

[0041] The present application proposes a trench type silicon carbide Schottky barrier diode, which further greatly reduces the chip area on the basis of the traditional Trench JBS, without sacrificing the reverse leakage and forward voltage, i.e. without sacrificing VF, and can greatly reduce the on-state voltage VF under the same chip size.

[0042] Figure 1 is a schematic diagram of a partial structure of a SiC Schottky barrier diode according to an embodiment of the present application. The SiC JBS is a trench SiC Schottky barrier diode, which includes a substrate 110, a first epitaxial layer 132, a second epitaxial layer 134, and a doped region 142. The substrate 110 has a first conductivity type. The first epitaxial layer 132 has the first conductivity type and is located above the substrate 110. The second epitaxial layer 134 has the first conductivity type, is located above the first epitaxial layer 132, and has a higher doping concentration than the first epitaxial layer 132. The doped region 142 has a second conductivity type and extends downward from the top of the second epitaxial layer 134. The SiC Schottky barrier diode shown in Figure 1 is a trench SiC Schottky barrier diode, which has a trench 141 extending from the top of the doped region 142 to the inside of the doped region 142. The SiC Schottky barrier diode further includes a Schottky metal layer 152 (not shown in Figure 1), which is located on the doped region 142 and fills the trench 141. The Schottky metal layer 152 serves as an anode metal layer of the SiC Schottky barrier diode, and the bottom of the Schottky metal layer 152 forms a Schottky barrier contact with the top of the second epitaxial layer 134. Figure 2 is a schematic diagram of a structure of a SiC Schottky barrier diode according to an embodiment of the present application, which further includes a cathode metal layer 154 located on the back of the substrate 110 based on the structure shown in Figure 1. The back of the substrate 110 refers to the side of the substrate 110 facing away from the first epitaxial layer 132. In the embodiment shown in Figure 1, the first conductivity type is N-type and the second conductivity type is P-type; in other embodiments, the first conductivity type can be P-type and the second conductivity type can be N-type.

[0043] The SiC Schottky barrier diode described above uses a double-layer epitaxial structure for the epitaxial layer, and the doping concentration of the second epitaxial layer at the top is higher than that of the first epitaxial layer at the bottom, which can effectively reduce the on-resistance of the SiC Schottky barrier diode when it is turned on. In the traditional scheme of multiple implantations to form a JFET, the JFET ion implantation is limited by the difficulty in uniformly gradient diffusion of the implanted impurity ions through thermal engineering in the SiC process, and only multiple implantations can be used to try to adjust the N-type concentration gradient to be uniform. However, the doping of the SiC double-layer epitaxial layer according to the present application is more uniform than that of the SiC layer using ion implantation, and thus can more effectively reduce the specific on-resistance Rsp compared to the traditional JFET ion implantation scheme. On the other hand, for the traditional JFET ion implantation scheme, when the implantation depth exceeds the implantation peak depth of the doped region 142, the aluminum ions implanted in the scattered part will be cut off at the junction, becoming a bottom Floating P-region, which will significantly affect the reverse voltage of the device. However, the present application can avoid such phenomena by increasing the doping concentration of the second epitaxial layer 134 to make the doping very uniform. Since the doping concentration of the first epitaxial layer is low, the VF can be reduced without sacrificing the BV.

[0044] In one embodiment of the present application, the doping concentration of the second epitaxial layer 134 is 1E16-6E16 / cm 3 .

[0045] In one embodiment of the present application, the second epitaxial layer 134 adopts a gradual concentration distribution with high central doping concentration and low top and bottom doping concentration. In one embodiment of the present application, the doping concentration of the second epitaxial layer 134 at the center ranges from 1E16 to 6E16 / cm 3 . The second epitaxial layer 134 adopts gradual concentration doping, in combination with the distribution of the doping region 142 injection dose, which can more effectively reduce Rsp, while also reducing the device surface electric field strength.

[0046] In one embodiment of the present application, the thickness d2 of the second epitaxial layer 134 accounts for 10% to 30% of the total thickness (d1+d2) of the first epitaxial layer 132 (thickness d1) and the second epitaxial layer 134. In one embodiment of the present application, the thickness of the second epitaxial layer 134 is 1-3 microns.

[0047] In one embodiment of the present application, the bottom of the doping region 142 extends into the first epitaxial layer 132, i.e., the depth of the doping region 142 is greater than the depth of the second epitaxial layer 134. Setting the depth of the doping region 142 to be greater than the depth of the second epitaxial layer 134 can effectively suppress the increase of the device surface electric field and reduce the reverse leakage current. In the embodiment shown in FIG. 1, the doping region 142 is a P+ region.

[0048] In one embodiment of the present application, the depth of the trench 141 is less than the depth of the first epitaxial layer 132.

[0049] In the embodiments shown in FIG. 1 and FIG. 2, the silicon carbide Schottky barrier diode further includes a buffer layer 120 between the substrate 110 and the first epitaxial layer 132. The buffer layer 120 has the first conductivity type, and its doping concentration is greater than the doping concentration of the second epitaxial layer 134. In one embodiment of the present application, the doping concentration of the buffer layer 120 is greater than 1E17 / cm 3 . In one embodiment of the present application, the thickness of the buffer layer 120 is less than 2 microns.

[0050] Based on all the above embodiments, the present application adopts a double-layer epitaxial silicon carbide Schottky barrier diode structure, which further reduces the resistance of the JFET and SPREAD regions without sacrificing BV, or even improves BV. The adjustability is higher through epitaxial means rather than ion implantation means, effectively reduces VF without obvious reduction of BV, without process bottleneck and difficulty, and without impact on production cycle.

[0051] Figure 3 is a reverse breakdown curve of the silicon carbide Schottky barrier diode of an embodiment of the present application and comparative examples. The vertical axis is the reverse current of the JBS in amperes, and the horizontal axis is the reverse voltage of the JBS in volts. Comparative Example 1 is a trench-type silicon carbide Schottky barrier diode in which VF is reduced by increasing the doping concentration of the epitaxial layer, and Comparative Example 2 is a trench-type silicon carbide Schottky barrier diode in which the top epitaxial layer is of normal epitaxial concentration and the bottom epitaxial layer is of increased concentration. As can be seen from Figure 3, the BV of the embodiment of the present application is higher than that of Comparative Example 2. Figure 4 is a forward conduction curve of the silicon carbide Schottky barrier diode of an embodiment of the present application and comparative examples (the curve of the embodiment of the present application and that of Comparative Example 2 coincide in most of Figure 4). The vertical axis is the forward current of the JBS in amperes, and the horizontal axis is the forward voltage of the JBS in volts. As can be seen from Figure 4, the VF of the embodiment of the present application is lower than that of Comparative Example 1. In summary, the embodiment of the present application is able to achieve a low VF while maintaining a high BV.

[0052] The present application also provides a method for manufacturing the silicon carbide Schottky barrier diode. Figure 5 is a flow chart of a method for manufacturing the silicon carbide Schottky barrier diode of an embodiment of the present application, comprising the following steps:

[0053] S510, obtaining a substrate.

[0054] The substrate 110 has a first conductivity type. In one embodiment of the present application, the first conductivity type is N-type and the second conductivity type is P-type; in other embodiments, the first conductivity type can also be P-type and the second conductivity type can also be N-type.

[0055] S520, forming a first epitaxial layer on the substrate by epitaxial process.

[0056] The first epitaxial layer 132 has the first conductivity type.

[0057] In one embodiment of the present application, the front surface of the substrate 110 is formed with a buffer layer 120 of the first conductivity type. Step S520 forms the first epitaxial layer 132 on the buffer layer 120.

[0058] In one embodiment of the present application, the buffer layer 120 can be formed by ion implantation (implanting ions of the first conductivity type) on the front surface of the substrate 110. In one embodiment of the present application, the doping concentration of the buffer layer 120 is greater than 1E17 / cm 3 In one embodiment of the present application, the thickness of the buffer layer 120 is less than 2 microns.

[0059] S530, forming a second epitaxial layer on the first epitaxial layer by epitaxial process.

[0060] The second epitaxial layer 134 has the first conductivity type, and the doping concentration of the second epitaxial layer 134 is greater than the doping concentration of the first epitaxial layer 132. In an embodiment of the present application, the doping concentration of the buffer layer 120 is greater than the doping concentration of the second epitaxial layer 134.

[0061] S540, etching the first epitaxial layer to form a trench.

[0062] In an embodiment of the present application, the trench 141 can be formed in the second epitaxial layer 134 by patterning (e.g. photolithography) and etching. In an embodiment of the present application, the depth of the trench 141 is less than the depth of the first epitaxial layer 132.

[0063] S550, forming a doped region extending downward from the top of the second epitaxial layer.

[0064] The doped region 142 has the second conductivity type. In an embodiment of the present application, the doped region 142 can be formed by ion implantation. The doped region 142 surrounds the four sides and the bottom of the trench 141.

[0065] The manufacturing method of the silicon carbide Schottky barrier diode described above adopts a double-layer epitaxial structure, the doping concentration of the second epitaxial layer at the top is higher than that of the first epitaxial layer at the bottom, which can effectively reduce the on-resistance of the silicon carbide Schottky barrier diode when it is turned on. In the traditional scheme of forming a JFET by multiple implantations, the JFET ion implantation is limited by the difficulty in uniformly diffusing the implanted impurity ions by thermal engineering in the SiC process, and can only be adjusted to be as uniform as possible by multiple implantations. The doping of the silicon carbide double-layer epitaxial layer in the present application is more uniform than the silicon carbide layer formed by ion implantation, so it can more effectively reduce the specific on-resistance Rsp compared to the traditional JFET ion implantation scheme. On the other hand, for the traditional JFET ion implantation scheme, when the implantation depth exceeds the peak implantation depth of the doped region 142, the aluminum ions implanted in the scattered part will be cut off and become a bottom Floating P-region, which will obviously affect the reverse voltage of the device. The present application avoids such phenomenon by increasing the doping concentration of the second epitaxial layer 134 to make the doping very uniform. Since the doping concentration of the first epitaxial layer is low, the VF can be reduced without sacrificing the BV.

[0066] In an embodiment of the present application, the doping concentration of the second epitaxial layer 134 is 1E16-6E16 / cm 3 .

[0067] In one embodiment of the present application, the second epitaxial layer 134 adopts a graded concentration distribution with high central doping concentration and low top and bottom doping concentration. In one embodiment of the present application, the doping concentration of the second epitaxial layer 134 at the center ranges from 1E16 to 6E16 / cm 3 The second epitaxial layer 134 adopts graded concentration doping, in combination with the distribution of the implantation dose of the doped region 142, which can more effectively reduce the Rsp, while also reducing the surface electric field strength of the device.

[0068] In one embodiment of the present application, the thickness d2 of the second epitaxial layer 134 accounts for 10% to 30% of the total thickness (d1+d2) of the first epitaxial layer 132 (thickness d1) and the second epitaxial layer 134. In one embodiment of the present application, the thickness of the second epitaxial layer 134 is 1 to 3 microns.

[0069] The manufacturing method of the silicon carbide Schottky barrier diode of the present application and the silicon carbide Schottky barrier diode are based on the same inventive concept, and the contents not specifically described in the manufacturing method of the silicon carbide Schottky barrier diode can be referred to the foregoing description of the silicon carbide Schottky barrier diode.

[0070] It should be understood that, although each step in the flowchart of the present application is displayed in sequence according to the direction of the arrow, these steps are not necessarily executed in sequence according to the direction of the arrow. Unless otherwise specified herein, the execution of these steps is not strictly limited in sequence, and these steps can be executed in other sequences. Moreover, at least part of the steps in the flowchart of the present application can include multiple steps or multiple stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution sequence of these steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least part of other steps or steps or stages in other steps.

[0071] In the description of the present specification, the description of the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example.

[0072] Each technical feature of the above-described embodiments can be combined arbitrarily, and in order to make the description concise, not all possible combinations of the technical features of the above-described embodiments are described, however, as long as the combination of the technical features does not exist contradictory, it should be considered as the scope of the present specification.

[0073] The above-described embodiments are merely illustrative of several embodiments of the present application, which are described in more detail and in a specific manner, but should not be construed as limiting the scope of the patent application. It should be noted that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A silicon carbide Schottky barrier diode, comprising: a substrate having a first conductivity type; a first epitaxial layer having the first conductivity type over the substrate; a second epitaxial layer having the first conductivity type over the first epitaxial layer, and having a doping concentration greater than a doping concentration of the first epitaxial layer; a doped region having a second conductivity type extending downward from a top of the second epitaxial layer; the silicon carbide Schottky barrier diode is further formed with a trench extending from the top of the doped region to an interior of the doped region; the first and second conductivity types are opposite conductivity types; a Schottky metal layer over the doped region and filling the trench.

2. The silicon carbide Schottky barrier diode of Claim 1 wherein, The second epitaxial layer has a doping concentration of 1E16 to 6E16 / cm 3 .

3. The silicon carbide Schottky barrier diode of Claim 1 wherein, The second epitaxial layer has a thickness of 10% to 30% of a total thickness of the first and second epitaxial layers.

4. The silicon carbide Schottky barrier diode of Claim 1 wherein, The second epitaxial layer has a thickness of 1 to 3 microns.

5. The silicon carbide Schottky barrier diode of Claim 1 wherein, A bottom of the doped region extends into the first epitaxial layer.

6. The silicon carbide Schottky barrier diode of Claim 1 wherein, The trench has a depth less than a depth of the first epitaxial layer.

7. The silicon carbide Schottky barrier diode of Claim 1 wherein, The second epitaxial layer has a graded concentration profile with a high central doping concentration and low top and bottom doping concentrations.

8. The silicon carbide Schottky barrier diode of claim 1, further comprising a cathode metal layer over a back surface of the substrate, the back surface being a surface of the substrate facing away from the first epitaxial layer, the Schottky metal layer being an anode metal layer of the silicon carbide Schottky barrier diode.

9. The silicon carbide Schottky barrier diode of claim 1, further comprising a buffer layer between the substrate and the first epitaxial layer, the buffer layer having the first conductivity type and having a doping concentration greater than a doping concentration of the second epitaxial layer.

10. The silicon carbide Schottky barrier diode of Claim 1 wherein, The second epitaxial layer has a graded concentration profile with a high central doping concentration and low top and bottom doping concentrations.

11. The silicon carbide Schottky barrier diode of Claim 1 wherein, The first conductivity type is N-type and the second conductivity type is P-type.

12. A method of manufacturing a silicon carbide Schottky barrier diode, comprising: obtaining a substrate having a first conductivity type; forming a first epitaxial layer over the substrate by an epitaxial process, the first epitaxial layer having the first conductivity type; forming a second epitaxial layer over the first epitaxial layer by an epitaxial process, the second epitaxial layer having the first conductivity type, the second epitaxial layer having a doping concentration greater than a doping concentration of the first epitaxial layer; etching the second epitaxial layer to form a trench; forming a doped region extending downward from a top of the second epitaxial layer, the doped region having a second conductivity type, the doped region surrounding a perimeter and a bottom of the trench; the first and second conductivity types being opposite conductivity types.

13. The method of producing a silicon carbide Schottky barrier diode according to claim 12, wherein The obtained substrate has a buffer layer of the first conductivity type formed over a front surface of the substrate, the buffer layer having a doping concentration greater than a doping concentration of the second epitaxial layer; the step of forming the first epitaxial layer over the substrate by an epitaxial process is forming the first epitaxial layer over the buffer layer.

14. The method of producing a silicon carbide Schottky barrier diode according to claim 12, wherein The second epitaxial layer has a graded concentration profile with a high central doping concentration and low top and bottom doping concentrations.

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