Wiring board and mounting structure

Abstract

A wiring substrate (10) according to the present disclosure includes: a core layer (1) which has a first surface (S1) and a second surface (S2) located on the side opposite to the first surface (S1); and a first build-up layer (2) which is located on the first surface (S1) and has a third surface (S3) on the side opposite to the first surface (S1). Mounting regions (R) for components are located on the third surface (S3). The core layer (1) and the first build-up layer (2) have a cut-out part (5) extending in a direction toward the mounting regions (R) from the periphery of the core layer (1) and the first build-up layer (2). The cut-out part (5) has: a first bottom section (51); a second bottom section (52) which is located on the side closer to the periphery as compared to the first bottom section (51), and is located at a portion deeper from the third surface (S3) as compared to the first bottom section (51); and a first lateral section (5a) which is located from the first bottom section (51) to the second bottom section (52). The arithmetic mean roughness Ra2 of the first lateral section (5a) is greater than the arithmetic mean roughness Ra1 of the first bottom section (51).

Description

Wiring board and mounting structure

[0001] The present disclosure relates to a wiring board and a mounting structure using the wiring board.

[0002] A wiring board may have a cavity in which components such as electronic components are mounted. The cavity may not only be surrounded by a wall, but also have an opening (side opening) at the periphery of the wiring board, as described in Patent Document 1, for example.

[0003] Japanese Patent Application Laid-Open No. 2022-162487

[0004] The wiring board according to the present disclosure includes a core layer having a first surface and a second surface opposite the first surface, and a first buildup layer located on the first surface and having a third surface opposite the first surface. A component mounting area is located on the third surface. The core layer and the first buildup layer have cutouts extending from the periphery of the core layer and the first buildup layer toward the mounting area. The cutout has a first bottom, a second bottom located closer to the periphery than the first bottom and deeper from the third surface than the first bottom, and a first side located from the first bottom to the second bottom. The arithmetic mean roughness Ra2 of the first side is greater than the arithmetic mean roughness Ra1 of the first bottom.

[0005] The mounting structure according to the present disclosure includes the above-mentioned wiring board, a component located in the mounting area of ​​the wiring board, an optical fiber located within the cutout portion, and adhesive located between the optical fiber and the first bottom and first side portion.

[0006] 1A is a plan view of a wiring board according to an embodiment of the present disclosure, viewed from the direction of arrow A shown in FIG. 1A; FIG. 2A is a diagram illustrating a cross section, and FIG. 2B is a diagram illustrating a plan view; FIG. 3A is a diagram illustrating a cross section, and FIG. 3B is a diagram illustrating a plan view; FIG. 4A is a diagram illustrating a cross section, and FIG. 4B is a diagram illustrating a plan view; FIG. 5A is a diagram illustrating a cross section, and FIG. 5B is a diagram illustrating a plan view; FIG. 6A is a diagram illustrating a cross section, and FIG. 6B is a diagram illustrating a plan view; and FIG. 6B is a diagram illustrating a cross section of a mounting structure according to an embodiment of the present disclosure. 7B is a plan view of the mounting structure according to the embodiment of the present disclosure, as viewed in the direction of arrow B shown in FIG. 7A.

[0007] Cavities having openings (side openings) on the periphery of a wiring board are used to mount not only electronic components but also components, such as optical fibers, that partially protrude from the periphery of the wiring board. Components that partially protrude like this are supported less by the wiring board than components that are entirely mounted within the wiring board. This can result in poor adhesion between the components and the wiring board and a tendency for the components to be misaligned. Therefore, there is a demand for wiring boards that have excellent adhesion to components and reduce misalignment when mounting components that partially protrude from the periphery.

[0008] The wiring board according to the present disclosure has the configuration described in the section on means for solving the above problems, and thereby has excellent adhesion between the component and the wiring board when mounting a component whose portion protrudes from the peripheral portion, and also reduces misalignment of the component.

[0009] A wiring board according to an embodiment of the present disclosure will be described with reference to Figures 1A and 1B. Figure 1A is an explanatory diagram illustrating a cross section (cross section passing through line A-A in Figure 1B) of a wiring board 10 according to an embodiment of the present disclosure. Figure 1B is a plan view of the wiring board 10 according to an embodiment of the present disclosure, as viewed from the direction of arrow A shown in Figure 1A. The wiring board 10 according to the embodiment includes a core layer 1, a first buildup layer 2, and a second buildup layer 3.

[0010] The core layer 1 includes a core insulating layer 11 and a core conductor layer 12. The core insulating layer 11 is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. These resins may be used alone or in combination of two or more. The core insulating layer 11 has a thickness of, for example, 400 μm or more and 800 μm or less.

[0011] The core insulating layer 11 may contain a reinforcing material. Examples of reinforcing materials include insulating fabric materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Only one type of reinforcing material may be used, or two or more types may be used in combination. Furthermore, the core insulating layer 11 may contain an inorganic insulating filler. Examples of inorganic insulating fillers include silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of inorganic insulating filler may be used, or two or more types may be used in combination.

[0012] The core conductor layer 12 is located on the surface of the core insulating layer 11. The core conductor layer 12 is not particularly limited as long as it is made of a conductive material. Examples of conductive materials include metals such as copper. The core conductor layer 12 has a thickness of, for example, 5 μm or more and 25 μm or less.

[0013] A through-hole conductor is located in the core insulating layer 11 to electrically connect the upper and lower surfaces of the core insulating layer 11. The through-hole conductor is located in a through-hole that penetrates the upper and lower surfaces of the core insulating layer 11. The through-hole conductor is formed of a metal such as copper. The through-hole conductor may be the same metal as the core conductor layer 12, or a different metal. The through-hole conductor may be formed only on the inner wall surface, or may fill the through-hole. The through-hole conductor is connected to the core conductor layer 12 on the surface of the core insulating layer 11.

[0014] The first buildup layer 2 is located on a first surface S1 of the core layer 1. The first surface S1 and a second surface S2 (described later) of the core layer 1 refer to the surface of the core insulating layer 11 and, where the core conductor layer 12 is located, the surface of the core conductor layer 12. In other words, when the core layer 1 is viewed from above and below, the visible surfaces are the first surface S1 and the second surface S2.

[0015] The first buildup layer 2 has a structure in which at least one first buildup insulating layer 21 and at least one first buildup conductor layer 22 are laminated.

[0016] The first buildup insulating layer 21 is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. These resins may be used alone or in combination of two or more. The first buildup insulating layer 21 has a thickness of, for example, 10 μm or more and 50 μm or less.

[0017] The first buildup insulating layers 21 may be made of the same resin or different resins. The first buildup insulating layers 21 and the core insulating layer 11 may be made of the same resin or different resins. Furthermore, the first buildup insulating layers 21 may have the same thickness or different thicknesses.

[0018] The first build-up insulating layer 21 may contain a reinforcing material. Examples of reinforcing materials include insulating fabric materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Only one type of reinforcing material may be used, or two or more types may be used in combination. Furthermore, the first build-up insulating layer 21 may contain an inorganic insulating filler. Examples of inorganic insulating fillers include silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of inorganic insulating filler may be used, or two or more types may be used in combination.

[0019] The first buildup conductor layer 22 is located on the surface of the first buildup insulating layer 21. The first buildup conductor layer 22 is not particularly limited as long as it is made of a conductive material. Examples of conductive materials include metals such as copper. The first buildup conductor layer 22 has a thickness of, for example, 5 μm or more and 25 μm or less.

[0020] The first buildup conductor layers 22 and the core conductor layers 12 may be made of the same metal or different metals. Furthermore, the first buildup conductor layers 22 may have the same thickness or different thicknesses.

[0021] Via-hole conductors are located in the first build-up insulating layer 21 to electrically connect the top and bottom surfaces of the first build-up insulating layer 21. The via-hole conductors are located in via holes that penetrate the top and bottom surfaces of the first build-up insulating layer 21. The via-hole conductors are formed of a metal such as copper. The via-hole conductors may be made of the same metal as the first build-up conductor layer 22, or a different metal. The via-hole conductors are connected to the first build-up conductor layers 22 located on both sides of the first build-up insulating layer 21. The via-hole conductors may fill the via holes, or may be located only on the inner surfaces of the via holes.

[0022] The second buildup layer 3 is located on the second surface S2 of the core layer 1. The second buildup layer 3 has a structure in which at least one second buildup insulating layer 31 and at least one second buildup conductor layer 32 are stacked.

[0023] The second buildup insulating layer 31 is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. These resins may be used alone or in combination of two or more. The second buildup insulating layer 31 has a thickness of, for example, 10 μm or more and 50 μm or less.

[0024] The second buildup insulating layers 31 may be made of the same resin or different resins. The second buildup insulating layers 31 and the core insulating layers 11 may be made of the same resin or different resins. The second buildup insulating layers 31 and the first buildup insulating layers 21 may be made of the same resin or different resins. Furthermore, the second buildup insulating layers 31 may have the same thickness or different thicknesses.

[0025] The second build-up insulating layer 31 may contain a reinforcing material. Examples of reinforcing materials include insulating fabric materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Only one type of reinforcing material may be used, or two or more types may be used in combination. Furthermore, the second build-up insulating layer 31 may contain an inorganic insulating filler. Examples of inorganic insulating fillers include silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of inorganic insulating filler may be used, or two or more types may be used in combination.

[0026] The second buildup conductor layer 32 is located on the surface of the second buildup insulating layer 31. The second buildup conductor layer 32 is not particularly limited as long as it is made of a conductive material. Examples of conductive materials include metals such as copper. The second buildup conductor layer 32 has a thickness of, for example, 5 μm or more and 25 μm or less.

[0027] The second buildup conductor layer 32 and the core conductor layer 12 may be made of the same metal or different metals. Furthermore, the second buildup conductor layers 32 may have the same thickness or different thicknesses. The second buildup conductor layer 32 and the first buildup conductor layer 22 may be made of the same metal or different metals.

[0028] Via-hole conductors are located in the second build-up insulating layer 31 to electrically connect the top and bottom surfaces of the second build-up insulating layer 31. The via-hole conductors are as described above, and a detailed description will be omitted. The via-hole conductors are located in via holes that penetrate the top and bottom surfaces of the second build-up insulating layer 31. The via-hole conductors are connected to second build-up conductor layers 32 located on both sides of the second build-up insulating layer 31.

[0029] The first buildup layer 2 has a third surface S3 on the side opposite to the first surface S1 of the core layer 1. The third surface S3 of the first buildup layer 2 means the surface of the first buildup insulating layer 21 located in the outermost layer and the surface of the first buildup conductor layer 22 in the portion where the first buildup conductor layer 22 is located in the outermost layer. In other words, when the first buildup layer 2 is viewed from above, the surface that can be seen is the third surface S3.

[0030] As shown in Figures 1A and 1B, a component mounting region R is located on the third surface S3 of the first buildup layer 2. Connection pads 22a, which are part of the first buildup conductor layer 22, are located in the mounting region R. As shown in Figures 1A and 1B, the connection pads 22a are exposed from openings in the solder resist 4 located on the third surface S3 of the first buildup layer 2. The solder resist 4 is made of a resin. Examples of resins that form the solder resist 4 include acrylic-modified epoxy resins.

[0031] 1A, solder 6 is located on connection pad 22a for electrical connection to components, such as optical components such as silicon photonics devices, and electronic components such as application specific integrated circuits (ASICs) and ICs.

[0032] 1A and 1B, the core layer 1 and the first buildup layer 2 have cutout portions 5 that extend from the peripheries of the core layer 1 and the first buildup layer 2 toward the mounting region R. The cutout portions 5 do not need to extend toward the entire mounting region R, but rather, as shown in FIGS. 1A and 1B, they may extend toward at least a portion of the mounting region R. Specifically, the cutout portions 5 may extend toward the mounting region R for mounting a member that partially protrudes from the periphery of the wiring board 10 and a component that transmits electrical or optical signals.

[0033] The cutout portion 5 has a first bottom portion 51, a second bottom portion 52, and a first side portion 5a. The length (length in the extension direction of the cutout portion 5) and width (length in a direction perpendicular to the extension direction of the cutout portion 5) of the cutout portion 5 are not limited and are set appropriately depending on the component to be mounted in the cutout portion 5. The length of the cutout portion 5 may be, for example, 2 mm or more and 20 mm or less. The width of the cutout portion 5 may be, for example, 1 mm or more and 10 mm or less.

[0034] The first bottom 51 of the cutout 5 is not limited to a specific position as long as it is shallower than the second bottom 52, i.e., the depth from the third surface S3 of the first buildup layer 2 is shallower than the second bottom 52. For example, the first bottom 51 of the cutout 5 may be located on the first surface S1 of the core layer 1, as shown in FIG. 1A . In the region where the cutout 5 is located, the first surface S1 of the core layer 1 has many portions that are relatively smooth and have fewer irregularities than, for example, any portion in the thickness direction of the first buildup layer 2. Therefore, when the first bottom 51 is located on the first surface S1, misalignment of the component is further reduced.

[0035] A metal layer may be located on the first bottom 51. The metal layer may be, for example, the core conductor layer 12 included in the core layer 1, the first buildup conductor layer 22, or the second buildup conductor layer 32. Alternatively, a metal layer other than these may be separately provided. The surface of the metal layer is smoother and less uneven than the surface of the insulating layer (resin layer). Therefore, if a metal layer is located on the first bottom 51, misalignment of the components is further reduced.

[0036] The second bottom 52 of the cutout portion 5 is located closer to the periphery of the core layer 1 and the first buildup layer 2 than the first bottom 51, and is located in a portion deeper from the third surface S3 of the first buildup layer 2 than the first bottom 51. There are no limitations on the location of the second bottom 52, as long as it is located in a portion deeper from the third surface S3 than the first bottom 51. When viewed in cross section, the second bottom 52 may be located within the core insulating layer 11, the second surface S2, or the second buildup layer 3.

[0037] The first side 5 a of the cutout 5 is a side surface located from the first bottom 51 to the second bottom 52. That is, unlike the inner peripheral surface of the cutout 5, the first side 5 a is a side surface connecting the first bottom 51 and the second bottom 52.

[0038] The height of first side portion 5 a, i.e., the depth from first bottom portion 51 to second bottom portion 52, is not limited. In order to further improve the adhesiveness of a member that partially protrudes from the peripheral edge of wiring substrate 10, the depth from first bottom portion 51 to second bottom portion 52 may be, for example, 50 μm or more, or may be deep enough that second bottom portion 52 is located within second buildup layer 3. When the depth from first bottom portion 51 to second bottom portion 52 is relatively deep, the area of ​​the portion that exhibits the anchor effect becomes larger, and the adhesiveness of a member that partially protrudes from the peripheral edge of wiring substrate 10 is further improved.

[0039] The length from the periphery of the core layer 1 and the first buildup layer 2 to the first side portion 5 a, i.e., the length of the second bottom portion 52 (the length in the extending direction of the cutout portion 5), is not limited. The length from the periphery to the first side portion 5 a may be, for example, 300 μm to 500 μm, or 200 μm to 400 μm. When the length from the periphery to the first side portion 5 a is 300 μm to 500 μm, the lengths of the first bottom portion 51 and the second bottom portion 52 are well balanced, and the stability and adhesiveness of the member that protrudes from the periphery of the wiring substrate 10 are sufficiently exhibited.

[0040] In the wiring substrate 10, the arithmetic mean roughness Ra2 of the first side portion 5a is greater than the arithmetic mean roughness Ra1 of the first bottom portion 51. When the arithmetic mean roughness Ra2 of the first side portion 5a is greater than the arithmetic mean roughness Ra1 of the first bottom portion 51, the smoother first bottom portion 51 stabilizes the component with high precision, and the rougher first side portion 5a improves adhesion due to the anchor effect. As a result, even if a component is mounted with a portion that protrudes beyond the peripheral edge of the wiring substrate 10, adhesion between the component and the wiring substrate 10 is improved and misalignment of the component is reduced.

[0041] The arithmetic mean roughness Ra1 of the first bottom portion 51 and the arithmetic mean roughness Ra2 of the first side portion 5a are not limited as long as the arithmetic mean roughness Ra2 of the first side portion 5a is greater than the arithmetic mean roughness Ra1 of the first bottom portion 51. The arithmetic mean roughness Ra1 of the first bottom portion 51 may be, for example, 1 μm or less, or may be 0.3 μm or more and 0.6 μm or less. The arithmetic mean roughness Ra2 of the first side portion 5a may be 2 μm or more and 10 μm or less, or may be 3 μm or more and 6 μm or less.

[0042] In the wiring substrate 10, the arithmetic mean roughness Ra3 of the second bottom portion 52 may be larger than the arithmetic mean roughness Ra1 of the first bottom portion 51. When the arithmetic mean roughness Ra3 of the second bottom portion 52 is larger than the arithmetic mean roughness Ra1 of the first bottom portion 51, a sufficient anchor effect is also exhibited in the second bottom portion 52. As a result, the adhesion of the members is further improved, and misalignment of the members is further reduced.

[0043] The arithmetic mean roughness Ra3 of the second bottom portion 52 is not limited and may be, for example, 10 μm to 100 μm, or 30 μm to 60 μm. The arithmetic mean roughness Ra3 of the second bottom portion 52 may be greater than the arithmetic mean roughness Ra2 of the first side portion 5 a.

[0044] The method for manufacturing the wiring substrate 10 is not limited. One embodiment of the method for manufacturing the wiring substrate 10 will be described with reference to FIGS. 2 to 6. FIGS. 2 to 6 are explanatory views for describing an example of a method for manufacturing the wiring substrate 10 according to an embodiment of the present disclosure. In FIGS. 2 to 6, FIGS. 2A, 3A, 4A, 5A, and 6A are explanatory views for explaining cross sections, and FIGS. 2B, 3B, 4B, 5B, and 6B are explanatory views in plan view.

[0045] First, as shown in Figures 2A and 2B, a laminate is prepared in which a first buildup layer 2 is laminated on a first surface S1 of a core layer 1 and a second buildup layer 3 is laminated on a second surface S2 of the core layer 1. Typically, multiple such laminates are formed on a single large substrate. In this specification, only one laminate will be shown and described.

[0046] 3A and 3B, a laser is applied along the periphery of the region where the cutout 5 is to be formed. By applying the laser in this manner, the region where the cutout 5 is to be formed is specified. The method of applying the laser is not limited, and for example, the laser may be applied with a beam diameter of 100 μm and at a pitch of 25 μm.

[0047] After irradiating the laser along the periphery of the region where the cutout 5 is to be formed, as shown in Figures 4A and 4B, the laser is irradiated over the entire region where the cutout 5 is to be formed. There are no particular limitations on the method for irradiating the entire region where the cutout 5 is to be formed with the laser, and the laser may be irradiated more roughly than the laser irradiation used to specify the region where the cutout 5 is to be formed. For example, the laser may be irradiated with a beam diameter of 100 µm at a pitch of 50 µm.

[0048] For example, if the core conductor layer 12 is located in the portion corresponding to the first bottom 51 of the cutout portion 5, the core conductor layer 12 will not be removed by laser irradiation. Therefore, the first bottom 51 becomes the core conductor layer 12 (first surface S1). On the other hand, the core conductor layer 12 is not usually located in the portion corresponding to the second bottom 52 of the cutout portion 5. Therefore, the laser excavates deeper than the first bottom 51, forming the second bottom 52. Alternatively, the depth of the first bottom 51 and the second bottom 52 may be adjusted by adjusting the laser output.

[0049] The first bottom portion 51 may be coated with a surface-treated metal. The surface-treated metal is formed by, for example, Ni-Pd-Au plating. When the first bottom portion 51 is coated with the surface-treated metal, oxidation and corrosion of the core conductor layer 12 corresponding to the first bottom portion 51 are reduced.

[0050] 5A and 5B, solder 6 is formed on the connection pads 22a in the mounting region R located on the third surface S3 of the first buildup layer 2. After the solder 6 is formed, the wiring substrate 10 is obtained by cutting the wiring substrate 10 using a dicing process, as shown in FIGS.

[0051] Next, a mounting structure according to the present disclosure will be described with reference to Figures 7A and 7B. Figure 7A is an explanatory diagram illustrating a cross section of a mounting structure 20 according to an embodiment of the present disclosure. Figure 7B is a plan view of the mounting structure 20 according to an embodiment of the present disclosure, as viewed from the direction of arrow B shown in Figure 7A. As shown in Figure 1, the mounting structure 20 according to an embodiment includes a wiring board 10, a component 7, and an optical fiber 8.

[0052] The component 7 is mounted in a mounting region R located on the third surface S3 of the first buildup layer 2. Specifically, the component 7 is electrically connected to a connection pad 22a located in the mounting region R via solder 6. The connection pad 22a is part of the first buildup conductor layer 22 located on the outermost layer. As described above, examples of the component 7 include optical components such as silicon photonics devices, and electronic components such as ASICs (Application Specific Integrated Circuits) and ICs.

[0053] The optical fiber 8 is located in the cutout 5 of the wiring substrate 10. Specifically, the optical fiber 8 is fixed to the cutout 5 with an adhesive 81. As described above, in the cutout 5, the arithmetic mean roughness Ra2 of the first side portion 5a is greater than the arithmetic mean roughness Ra1 of the first bottom portion 51. Therefore, the adhesion between the optical fiber 8 and the wiring substrate 10 is excellent, and misalignment of the optical fiber 8 is also reduced. As a result, optical signals are efficiently transmitted between the component 7, such as a silicon photonics device, and the optical fiber 8.

[0054] In the mounting structure 20 according to one embodiment, for example, a motherboard or a component 7 may be located on the surface on the second buildup layer 3 side.

[0055] The embodiments of the present disclosure have been described above. However, the invention according to the present disclosure is not limited to the above-described embodiments, and various modifications and improvements are possible within the scope of the present disclosure as shown in (1) to (10) below.

[0056] (1) A wiring board according to the present disclosure includes a core layer having a first surface and a second surface opposite the first surface, and a first buildup layer located on the first surface and having a third surface opposite the first surface. A component mounting area is located on the third surface. The core layer and the first buildup layer have cutouts extending from the periphery of the core layer and the first buildup layer toward the mounting area. The cutouts have a first bottom, a second bottom located closer to the periphery than the first bottom and deeper from the third surface than the first bottom, and a first side located from the first bottom to the second bottom. The arithmetic mean roughness Ra2 of the first side is greater than the arithmetic mean roughness Ra1 of the first bottom. (2) In the wiring board described in (1) above, the first bottom is located on the first surface of the core layer. (3) In the wiring board described in (1) or (2) above, the arithmetic mean roughness Ra2 of the first side portion is 2 μm or more and 10 μm or less. (4) In the wiring board described in any of (1) to (3) above, the arithmetic mean roughness Ra1 of the first bottom portion is 1 μm or less. (5) In the wiring board described in any of (1) to (4) above, the arithmetic mean roughness Ra3 of the second bottom portion is greater than the arithmetic mean roughness Ra1 of the first bottom portion. (6) In the wiring board described in (5) above, the arithmetic mean roughness Ra3 of the second bottom portion is 10 μm or more and 100 μm or less. (7) In the wiring board described in any of (1) to (6) above, the wiring board further includes a second buildup layer located on the second surface, and the second bottom portion is located on the second buildup layer. (8) In the wiring board according to any one of (1) to (7) above, the length from the periphery to the first side is 300 μm or more and 500 μm or less. (9) In the wiring board according to any one of (1) to (8) above, a metal layer is located on the first bottom. (10) A mounting structure according to the present disclosure includes the wiring board according to any one of (1) to (9) above, a component located in a mounting region of the wiring board, an optical fiber located in the cutout, and an adhesive located between the optical fiber and the first bottom and first side.

[0057] REFERENCE SIGNS LIST 1 Core layer 11 Core insulating layer 12 Core conductor layer 2 First buildup layer 21 First buildup insulating layer 22 First buildup conductor layer 22a Connection pad 3 Second buildup layer 31 Second buildup insulating layer 32 Second buildup conductor layer 4 Solder resist 5 Notch 51 First bottom 52 Second bottom 5a First side 6 Solder 7 Component 8 Optical fiber 81 Adhesive 10 Wiring board 20 Mounting structure S1 First surface S2 Second surface S3 Third surface R Mounting area

Claims

1. A wiring board comprising: a core layer having a first surface and a second surface located opposite the first surface; and a first buildup layer located on the first surface and having a third surface opposite the first surface, wherein a component mounting area is located on the third surface, and the core layer and the first buildup layer have cutouts extending from the periphery of the core layer and the first buildup layer toward the mounting area, the cutout having a first bottom, a second bottom located closer to the periphery than the first bottom and at a greater depth from the third surface than the first bottom, and a first side located from the first bottom to the second bottom, and wherein the arithmetic mean roughness Ra2 of the first side is greater than the arithmetic mean roughness Ra1 of the first bottom.

2. The wiring board according to claim 1, wherein the first bottom portion is located on the first surface of the core layer.

3. The wiring board according to claim 1 or 2, wherein the arithmetic mean roughness Ra2 of the first side portion is 2 μm or more and 10 μm or less.

4. The wiring board according to any one of claims 1 to 3, wherein the arithmetic mean roughness Ra1 of the first bottom portion is 1 μm or less.

5. The wiring board according to any one of claims 1 to 4, wherein the arithmetic mean roughness Ra3 of the second bottom portion is greater than the arithmetic mean roughness Ra1 of the first bottom portion.

6. The wiring board according to claim 5, wherein the arithmetic mean roughness Ra3 of the second bottom portion is 10 μm or more and 100 μm or less.

7. The wiring board according to any one of claims 1 to 6, further comprising a second buildup layer located on the second surface, wherein the second bottom is located on the second buildup layer.

8. The wiring board according to any one of claims 1 to 7, wherein the length from the periphery to the first side portion is 300 μm or more and 500 μm or less.

9. The wiring board according to any one of claims 1 to 8, wherein a metal layer is located on the first bottom portion.

10. A mounting structure comprising: a wiring board according to any one of claims 1 to 9; a component located in the mounting area of ​​the wiring board; an optical fiber located in the cutout; and an adhesive located between the optical fiber and the first bottom and first side.

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