Full-color nano-led array

Abstract

The present disclosure provides a full-color Nano-LED array, comprising: a sapphire substrate; an N-type gallium nitride layer and a dielectric layer which are sequentially stacked on the sapphire substrate; nanowires, each nanowire being grown in a corresponding nano circular hole reserved in the dielectric layer; a transparent electrical insulating layer, filled between the plurality of nanowires; P electrodes, each P electrode being correspondingly arranged on each nanowire; first scanning lines, arranged on the plurality of P electrodes in a first direction, wherein a plurality of first scanning lines are provided, and the plurality of first scanning lines are arranged in parallel in a second direction; N electrodes, each N electrode being arranged on the lower surface of the sapphire substrate, wherein the position of each N electrode corresponds to that of each nanowire; and second scanning lines, arranged on the lower surfaces of the plurality of N electrodes in the second direction, wherein a plurality of second scanning lines are provided, and the plurality of second scanning lines are arranged in parallel in the first direction.

Description

A full-color Nano-LED array TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of semiconductor materials, in particular to a full-color Nano-LED array. BACKGROUND

[0002] RGB three primary colors can be synthesized into most of the colors in nature through certain proportioning. Similarly, for red, green and blue LEDs, different currents can be applied to control the brightness values, so as to realize the combination of three primary colors and achieve the effect of full-color display.

[0003] At present, full-color display is mainly achieved by packaging red, green and blue three primary color LED chips into white light LED, and another way is to use a single LED chip with fluorescent powder. The full-color LED using fluorescent powder has problems such as low energy conversion efficiency, poor color rendering index, and temperature stability of fluorescent powder. In addition, after the chip manufacturing is completed, the micron-sized crystal grains need to be transferred to the driving circuit substrate. Whether it is a TV screen or a mobile phone screen, the number of transfer is quite large, and the display product has very low tolerance for pixel errors, and the existing process is difficult to achieve.

[0004] Display is very important for the improvement of user experience and visual perception. The reduction of display pixel size can provide higher resolution and more delicate image details, and more realistic restoration of the real world. In recent years, the demand for AR, VR and other near-eye display technologies has been growing, and the resolution requirements of display have been increasing. Developing nanoscale pixel units has become an inevitable trend in the future, so it is extremely important to realize nanoscale full-color display pixel units.

[0005] However, when the size of the LED device is reduced to the nanoscale, the electrode array required by the traditional direct current drive and the electrical interconnection between Nano-LEDs are difficult to realize. The method of realizing RGB full-color display by transferring LED chips of different epitaxial wafers has also become unfeasible. Therefore, a new driving mode is urgently needed to monolithically integrate multi-color Nano-LEDs on the same chip.

[0006] SUMMARY

[0007] This disclosure provides a full-color Nano-LED array, comprising: a sapphire substrate; an N-type gallium nitride layer and a dielectric layer sequentially stacked on the sapphire substrate; nanowires, each nanowire being grown on a pre-reserved nanocircular hole in the dielectric layer; a transparent electrically insulating layer filling between multiple nanowires; P electrodes, each P electrode being correspondingly disposed on each nanowire; a first scan line, the first scan line being disposed on multiple P electrodes along a first direction, wherein the first scan line includes multiple P electrodes, and the multiple first scan lines are arranged in parallel along a second direction; an N electrode, each N electrode being disposed on the lower surface of the sapphire substrate, wherein the position of each N electrode corresponds to each nanowire; and a second scan line, the second scan line being disposed on the lower surface of multiple N electrodes (10) along a second direction, wherein the second scan line includes multiple N electrodes, and the multiple second scan lines are arranged in parallel along the first direction.

[0008] Optionally, the diameter of the nanopores ranges from 100 nm to 1000 nm, and the distance between nanopores of different diameters ranges from 0.5 μm to 3 μm.

[0009] Optionally, each nanowire includes: an N-type gallium nitride pillar grown on a nanocircular hole, wherein the N-type gallium nitride pillar is a hexagonal prism with a height ranging from 2 μm to 4 μm and a diameter ranging from 150 nm to 1200 nm; a multi-quantum well active layer coaxially grown on the N-type gallium nitride pillar; and a P-type gallium nitride layer coaxially grown on the multi-quantum well active layer.

[0010] Optionally, the diameter of the nanowires ranges from 300 nm to 1500 nm, the spacing between nanowires of different diameters ranges from 0.5 μm to 3 μm, and multiple nanowires are arranged in a square or prismatic pattern.

[0011] Optionally, four nanowires of different diameters constitute a nanowire pixel, which is square or prismatic; multiple nanowire pixels are arranged with a spacing period of 1-2 μm.

[0012] Optionally, the transparent electrical insulating layer is made of any one of a polyimide layer, a parylene layer, a polyurethane layer, and a polydimethylsiloxane layer.

[0013] Optionally, the size of each P-electrode is matched to the cross-sectional size of a single nanowire, and the P-electrode is fabricated on a transparent electrically insulating layer.

[0014] Optionally, the first scan line is interconnected with the P electrode to realize current driving of the array along the first direction.

[0015] Alternatively, the size of the N electrode can be matched to the cross-sectional size of a single nanowire.

[0016] Optionally, the second scan line is interconnected with the N electrode to enable current driving of the array along the second direction. Attached Figure Description

[0017] Figure 1 shows a schematic diagram of a full-color Nano-LED array according to an embodiment of the present disclosure;

[0018] Figure 2 shows a schematic diagram of the light-emitting structure in a full-color Nano-LED array according to an embodiment of the present disclosure;

[0019] Figure 3 schematically shows a top view of a full-color Nano-LED array according to an embodiment of the present disclosure;

[0020] Figure 4 schematically shows a bottom view of a full-color Nano-LED array according to an embodiment of the present disclosure. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0022] Figure 1 shows a schematic diagram of a full-color Nano-LED array according to an embodiment of the present disclosure. Figure 2 shows a schematic diagram of the light-emitting structure in a full-color Nano-LED array according to an embodiment of the present disclosure.

[0023] Please refer to Figures 1 and 2 for details. This embodiment of the present disclosure provides a full-color Nano-LED array, including: a sapphire substrate 5; an N-type gallium nitride layer 6 and a dielectric layer 1 sequentially stacked on the sapphire substrate 5; nanowires 2, each nanowire 2 grown on a pre-reserved nanocircular hole in the dielectric layer 1; a transparent electrically insulating layer 7 filling between multiple nanowires 2; P-electrodes 8, each P-electrode 8 correspondingly disposed on each nanowire 2; first scan lines 9, the first scan lines 9 are arranged along a first direction X1 on multiple P-electrodes 8, wherein multiple first scan lines 9 are arranged in parallel along a second direction X2; N-electrodes 10, each N-electrode 10 disposed on the lower surface of the sapphire substrate 5, wherein the position of each N-electrode 10 corresponds to each nanowire; and second scan lines 4, the second scan lines 4 are arranged along a second direction X2 on the lower surface of multiple N-electrodes 10, wherein multiple second scan lines 4 are arranged in parallel along the first direction X1.

[0024] In embodiments of this disclosure, the full-color Nano-LED array includes a light-emitting structure and an AC driving structure. The light-emitting structure is used to realize monolithic integrated full-color nano-LEDs and mainly includes a sapphire substrate 5, an N-type gallium nitride layer 6, a dielectric layer 1, and multiple nanowires 2. The AC driving structure includes a transparent electrically insulating layer 7 filled between the multiple nanowires 2, multiple P electrodes 8, a first scan line 9, multiple N electrodes 10, and a second scan line 4.

[0025] Specifically, a high-quality N-type gallium nitride (GaN) layer 6, with a thickness of 4 μm, is deposited on a sapphire substrate 5 using MOCVD to form an array substrate. A dielectric layer 1, made of SiO2 or SiNx, with a thickness of 30 nm-90 nm, is deposited on the array substrate using PECVD. Electron beam lithography and dry etching are used to fabricate the dielectric layer 1 into a patterned mask with nanocircular holes of different diameters, providing selectivity for the growth of N-type GaN pillars. The nanocircular holes have diameters of 100-1000 nm, with a spacing of 0.5-3 μm, arranged in a square or rhomboid pattern. By changing the diameter of the nanocircular holes, the diameter of the nanowires 2 grown epitaxially in selected areas can be precisely controlled, achieving full-color pixel units. Changing the spacing of the nanocircular holes allows adjustment of the size of the nanowire pixels 3.

[0026] In the embodiments of this disclosure, the diameter of the nanowire 2 ranges from 300 nm to 1500 nm, the spacing between nanowires 2 of different diameters is from 0.5 μm to 3 μm, and the multiple nanowires are arranged in a square or prismatic shape.

[0027] In embodiments of this disclosure, each nanowire 2 includes: an N-type gallium nitride pillar grown on a nanocircular hole, wherein the N-type gallium nitride pillar is a hexagonal prism, the height of the N-type gallium nitride pillar ranges from 2 μm to 4 μm, and the diameter of the N-type gallium nitride pillar ranges from 150 nm to 1200 nm; a multi-quantum well active layer coaxially grown on the N-type gallium nitride pillar; and a P-type gallium nitride layer coaxially grown on the multi-quantum well active layer.

[0028] Specifically, N-type gallium nitride (GaN) pillars are epitaxially grown within the aforementioned nanopores of varying diameters. This forms N-type GaN nanowires with a hexagonal prism shape, featuring a faceted top and faceted sidewalls. The height of the N-type GaN pillars ranges from 2 to 4 μm, and their diameter from 150 to 1200 nm. N-type doping is achieved using silane at doping concentrations of 10¹⁸ cm⁻³ to 10¹⁹ cm⁻³. This provides support for subsequent multi-quantum-well and P-type GaN coating growth.

[0029] For example, a multi-quantum-well active layer is coaxially grown on an N-type gallium nitride pillar, serving as the light-emitting functional layer. The multi-quantum-well active region material is InxGa1-xN / GaN, where x is 0.15-0.4, and the emission wavelength range is 440-630 nm. The emission wavelength is inversely proportional to the diameter of the nanowire; as the diameter increases, the emission wavelength decreases. The thickness of the InxGa1-xN layer is 3-4 nm, and the thickness of the GaN layer is 10-15 nm. A P-type gallium nitride layer is coaxially grown on the multi-quantum-well active region. The P-type gallium nitride is obtained by doping with Mg, with a doping concentration of 10¹⁷ cm⁻³-10¹⁸ cm⁻³.

[0030] Please refer to Figure 2. Four nanowires 2 of different diameters constitute a nanowire pixel 3. The nanowire pixel 3 is square or prismatic. Multiple nanowire pixels 3 are arranged with a spacing period of 1-2 μm.

[0031] Please refer to Figure 1. After the light-emitting structure is formed epitaxially, a transparent electrically insulating layer 7 is spin-coated to achieve electrical insulation between nanowires 2 of different diameters, as well as to provide planarization and protection.

[0032] The transparent electrical insulating layer 7 is prepared by spin coating. The material is one of polyimide layer, parylene layer, polyurethane layer, or polydimethylsiloxane layer. The spin coating thickness is such that the nanowires 2 are completely buried and the top is flat.

[0033] Through embodiments of this disclosure, a monolithically integrated full-color Nano-LED with adjustable nanowire diameter and In composition is formed.

[0034] Figure 3 schematically shows a top view of a full-color Nano-LED array according to an embodiment of the present disclosure.

[0035] Please refer to Figure 3. P electrode 8, each P electrode 8 is correspondingly disposed on each nanowire 2; first scan line 9, the first scan line 9 is arranged on multiple P electrodes 8 along the first direction X1, wherein the first scan line 9 includes multiple, and the multiple first scan lines 9 are arranged in parallel along the second direction X2.

[0036] The metal system of P electrode 8 is indium tin oxide, or it can be other materials that have both high transmittance and high conductivity. It can be prepared on the transparent electrically insulating layer 7 by thermal evaporation, deposition or electron evaporation. The size of each P electrode 8 matches the cross-sectional size of a single nanowire 2.

[0037] As shown in Figure 3, the first scan line 9 is interconnected with the P electrode 8 to realize the current drive of the array along the first direction X1. For example, the first scan line 9, which realizes the interconnection of the P electrode 8 in the first direction X1, can be prepared by one or any combination of metals commonly used in semiconductor processes such as Au, Ag, Cu, Pt, Cr, Ni, Al, and Ti.

[0038] Figure 4 schematically shows a bottom view of a full-color Nano-LED array according to an embodiment of the present disclosure.

[0039] Please refer to Figure 4. Each N electrode 10 is disposed on the lower surface of the sapphire substrate 5, and the position of each N electrode 10 corresponds to each nanowire. The second scan line 4 is arranged along the second direction X2 on the lower surface of the multiple N electrodes 10, and the multiple second scan lines 4 are arranged in parallel along the first direction X1.

[0040] The N-electrode 10 metal system is indium tin oxide, or it can be other materials that have both high transmittance and high conductivity. It can be prepared on the lower surface of the thinned sapphire substrate 5 by thermal evaporation, deposition or electron evaporation. The size of the N-electrode 10 matches the cross-sectional size of the single nanowire 2.

[0041] As shown in Figure 4, the second scan line is interconnected with the N electrode 10 to realize the current drive of the array along the second direction X2. It can be prepared by one or any combination of metals commonly used in semiconductor processes such as Au, Ag, Cu, Pt, Cr, Ni, Al, and Ti.

[0042] By applying alternating current to the designated first scan line 9 and second scan line 4, the nanowires 2 at their perpendicular intersection points are illuminated under the drive of the alternating electric field, thus achieving precise control of submicron pixels.

[0043] Through the embodiments of this disclosure, a novel driving mode for AC drive is adopted, avoiding complex electrode fabrication and electrical interconnection at the nanoscale, and achieving individual and precise control of submicron pixels through the vertical intersection of the first scan line and the second scan line.

[0044] Through the embodiments of this disclosure, a new driving mode is proposed. This method, which integrates multi-color Nano-LEDs on a single chip, is the optimal solution for ultra-high resolution display screens with a pixel density of tens of thousands.

[0045] Those skilled in the art will understand that although this disclosure has been shown and described with reference to specific exemplary embodiments thereof, they should understand that various changes in form and detail may be made to this disclosure without departing from the spirit and scope of the disclosure as defined by the appended claims and their equivalents. Therefore, the scope of this disclosure should not be limited to the above embodiments, but should be determined not only by the appended claims, but also by their equivalents.

[0046] The above specific embodiments further illustrate the purpose, technical solutions and beneficial effects of this disclosure. It should be understood that the above are only specific embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A full-color Nano-LED array, characterized in that, include: Sapphire substrate (5); An N-type gallium nitride layer (6) and a dielectric layer (1) are sequentially stacked on the sapphire substrate (5); Nanowires (2), each of the nanowires (2) is grown on a nano-circular hole reserved in the dielectric layer (1); A transparent electrically insulating layer (7) is filled between the plurality of nanowires (2); P electrode (8), each of the P electrode (8) is correspondingly disposed on each of the nanowires (2); A first scan line (9) is arranged along a first direction on a plurality of P electrodes (8), wherein the first scan line (9) includes a plurality of first scan lines (9) arranged in parallel along a second direction; N electrode (10), each of the N electrodes (10) is disposed on the lower surface of the sapphire substrate (5), wherein the position of each N electrode (10) corresponds to each of the nanowires; The second scan line (4) is arranged along the second direction on the lower surface of the plurality of N electrodes (10), wherein the second scan line includes a plurality of the plurality of the second scan lines (4) arranged in parallel along the first direction.

2. The full-color Nano-LED array according to claim 1, characterized in that, The diameter of the nanopores ranges from 100 nm to 1000 nm, and the distance between nanopores of different diameters ranges from 0.5 μm to 3 μm.

3. The full-color Nano-LED array according to claim 1 or 2, characterized in that, Each of the nanowires (2) comprises: N-type gallium nitride pillars are grown on the nanocircular holes, wherein the N-type gallium nitride pillars are hexagonal prisms, the height of the N-type gallium nitride pillars ranges from 2 μm to 4 μm, and the diameter of the N-type gallium nitride pillars ranges from 150 nm to 1200 nm. A multi-quantum-well active layer is coaxially grown on the N-type gallium nitride pillar; A P-type gallium nitride layer is coaxially grown on the multi-quantum-well active layer.

4. The full-color Nano-LED array according to claim 3, characterized in that, The diameter of the nanowires (2) ranges from 300 nm to 1500 nm, the spacing between nanowires (2) of different diameters is from 0.5 μm to 3 μm, and the nanowires are arranged in a square or prismatic shape.

5. The full-color Nano-LED array according to claim 4, characterized in that, Four different diameter nanowires (2) constitute a nanowire pixel (3), and the nanowire pixel (3) is square or prismatic; Multiple nanowire pixels (3) are arranged with a spacing period of 1-2 μm.

6. The full-color Nano-LED array according to claim 1, characterized in that, The transparent electrical insulating layer (7) is made of any one of the following: polyimide layer, parylene layer, polyurethane layer, and polydimethylsiloxane layer.

7. The full-color Nano-LED array according to claim 1, characterized in that, The size of each of the P electrodes (8) is matched with the cross-sectional size of a single nanowire (2), and the P electrodes (8) are fabricated on the transparent electrically insulating layer (7).

8. The full-color Nano-LED array according to claim 1, characterized in that, The first scan line (9) is interconnected with the P electrode (8) to realize the current drive of the array along the first direction.

9. The full-color Nano-LED array according to claim 1, characterized in that, The size of the N electrode (10) matches the cross-sectional size of a single nanowire (2).

10. The full-color Nano-LED array according to claim 1, characterized in that, The second scan line is interconnected with the N electrode (10) to realize the current drive of the array along the second direction.

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