Computing system

Abstract

The present invention relates to a computing system, comprising a plurality of computing devices. Each of the computing devices is configured with a plurality of computing modules and a plurality of optical interconnect expansion cards, and each of the optical interconnect expansion cards is provided with an on-chip optical switch and at least one first optical switching unit. The optical interconnect expansion cards of the plurality of computing devices communicate by means of optical fiber connections; moreover, by means of controlling the first optical switching units and / or the on-chip optical switches, a first part of the plurality of computing devices forms a first super node, with the topology of a communication link of the first super node comprising a two-dimensional torus topology. The two-dimensional torus topology may be configured to comprise first ring topologies, where the computing devices in the first part form a one-dimensional torus in a first direction; at least two first ring topologies are arranged in a second direction; and at least some of the computing devices in the at least two first ring topologies form second ring topologies with a one-dimensional torus in the second direction, where the second direction intersects the first direction.

Description

Computing system

[0001] Cross-reference to related patent applications

[0002] This application claims priority to and the benefit of, and incorporates herein by reference in its entirety, Chinese Patent Application No. 2024106783564, filed May 28, 2024, entitled “Chip, Module for Optical Interconnect, Apparatus and System Using Optical Interconnect Module,” and Chinese Patent Application No. 2024112158838, filed August 30, 2024, entitled “Computing System.” TECHNICAL FIELD

[0003] The present invention relates to a computing system. BACKGROUND

[0004] According to OpenAI data, the growth rate of artificial intelligence model computation is much higher than that of computing hardware computing power. As AI (Artificial Intelligence) accelerators obtain continuous computing power improvement through process iteration and chip architecture innovation, the interconnection bandwidth between AI accelerators is also increasing. The AI accelerator interconnection network has become the key to improving overall computing power. The Open Compute Project (OCP) has launched the OCP Accelerator Module (OAM) with a universal form factor, which has been adopted by leading GPU (Graphics Processing Unit) vendors. Currently, in order to enhance communication between computing modules, 8 computing modules are connected through PCB (Printed Circuit Board) traces on a universal base board (UBB) to achieve point-to-point full interconnection. Due to the need to use longer PCB traces, computing modules generally need to use a CEI long-range (LR) SerDes interface, and for full connection, each SerDes interface needs to access a specific single computing module, which further reduces the bandwidth between each pair of computing modules.

[0005] In addition, the way of improving overall computing power by expanding the cluster size horizontally is limited by the fact that the global batch size cannot grow indefinitely, resulting in a significant decrease in effective computing power when the cluster size increases to a certain extent. SUMMARY

[0006] The present invention provides a computing system that uses a two-dimensional wraparound topology constructed with a reconfigurable optical interconnect expansion card and optical fibers to expand the cluster size of computing devices / modules vertically and improve system computing power.

[0007] According to embodiments, a computing system of the present application comprises a plurality of computing devices, each of which is configured with a plurality of computing modules and a plurality of optical interconnect expansion cards, each of which is provided with an optical switch on chip and at least one first optical switch unit.

[0008] The optical interconnect expansion cards of the plurality of computing devices communicate through fiber connections, and by controlling the first optical switch units and / or the optical switches on chip on the optical interconnect expansion cards of the plurality of computing devices, a first part of the plurality of computing devices of the computing system forms a first supernode, and the topology of the communication links of the first supernode comprises a two-dimensional ring topology.

[0009] The two-dimensional ring topology can be configured to comprise a first ring topology in which a first part of the plurality of computing devices forms a one-dimensional ring in a first direction, at least two of the first ring topologies are arranged in a second direction, and at least a part of the computing devices in the at least two first ring topologies form a second ring topology in a one-dimensional ring in a second direction, wherein the second direction intersects the first direction.

[0010] In some embodiments, each computing device of the first supernode is configured such that at least one first ring topology passes through the computing device, and at least one second ring topology also passes through the computing device.

[0011] In some embodiments, a second part of the plurality of computing devices of the computing system forms a second supernode, and the topology of the communication links of the second supernode comprises a one-dimensional ring topology.

[0012] In some embodiments, the two-dimensional ring topology comprises a plurality of the second ring topologies, and at least one second ring topology serves as a backup ring topology, all of the computing devices in the backup ring topology are backup devices, and the remaining computing devices in the two-dimensional ring topology are normally operating working devices.

[0013] When one or more of the plurality of working devices fails, the connection topology of the computing devices is reconfigured by controlling the first optical switch units and / or the optical switches on chip on the optical interconnect expansion cards of the plurality of computing devices of the computing system to isolate all of the computing devices in the second ring topology in which the working device that fails is located, and to enable an equal number of the computing devices in the backup ring topology to become normally operating working devices.

[0014] In some embodiments, the plurality of computing devices of the computing system are physically connected through optical fibers to form a two-dimensional ring connection structure.

[0015] The two-dimensional ring connection structure can be configured as a first one-dimensional ring connection structure in which a part of the plurality of computing devices form a one-dimensional ring in a first direction, at least two of the first one-dimensional ring connection structures are arranged in a second direction, and at least a part of the computing devices in the at least two first one-dimensional ring connection structures form a second one-dimensional ring connection structure in a second direction, wherein the second direction intersects the first direction.

[0016] In some embodiments, the first one-dimensional ring connection structure includes N computing devices, N being an integer greater than 2; and the N computing devices are ordered from 1 to N.

[0017] wherein, for any computing device M, M being an integer greater than 1 and less than N, a first part of the plurality of optical interconnection expansion cards of the computing device M is connected to a first part of the plurality of optical interconnection expansion cards of the computing device M-1 through optical fibers, and a second part of the plurality of optical interconnection expansion cards of the computing device M is connected to a second part of the plurality of optical interconnection expansion cards of the computing device M+1 through optical fibers; a first part of the plurality of optical interconnection expansion cards of the computing device N is connected to a first part of the plurality of optical interconnection expansion cards of the computing device N-1 through optical fibers, and a second part of the plurality of optical interconnection expansion cards of the computing device N is connected to a second part of the plurality of optical interconnection expansion cards of the computing device 1 through optical fibers; a first part of the plurality of optical interconnection expansion cards of the computing device 1 is connected to a first part of the plurality of optical interconnection expansion cards of the computing device N through optical fibers, and a second part of the plurality of optical interconnection expansion cards of the computing device 1 is connected to a second part of the plurality of optical interconnection expansion cards of the computing device 2 through optical fibers.

[0018] In some embodiments, the second one-dimensional ring connection structure includes n computing devices, n being an integer greater than 2; and the n computing devices are ordered from 1 to n.

[0019] wherein for any one computing device m, m is an integer greater than 1 and less than n, a third portion of the plurality of optical interconnect expansion cards of the computing device m is connected to a third portion of the plurality of optical interconnect expansion cards of the computing device m-1 through optical fibers, and a fourth portion of the plurality of optical interconnect expansion cards of the computing device m is connected to a fourth portion of the plurality of optical interconnect expansion cards of the computing device m+1 through optical fibers; a third portion of the plurality of optical interconnect expansion cards of the computing device n is connected to a third portion of the plurality of optical interconnect expansion cards of the computing device n-1 through optical fibers, and a fourth portion of the plurality of optical interconnect expansion cards of the computing device n is connected to a fourth portion of the plurality of optical interconnect expansion cards of the computing device 1 through optical fibers; a third portion of the plurality of optical interconnect expansion cards of the computing device 1 is connected to a third portion of the plurality of optical interconnect expansion cards of the computing device n through optical fibers, and a fourth portion of the plurality of optical interconnect expansion cards of the computing device 1 is connected to a fourth portion of the plurality of optical interconnect expansion cards of the computing device 2 through optical fibers.

[0020] In some embodiments, for each computing device, the number of the first portion, the second portion, the third portion and the fourth portion are equal, each being ¼ of the plurality of optical interconnect expansion cards of the corresponding computing device.

[0021] In some embodiments, the second one-dimensional wrap-around connection structure includes 2 computing devices. Wherein for each of the second one-dimensional wrap-around connection structure, in the second direction, a third portion of the plurality of optical interconnect expansion cards of the computing device 1 is connected to a third portion of the plurality of optical interconnect expansion cards of the computing device 2 through optical fibers

[0022] In some embodiments, the controlling of the first optical switching unit and / or the on-chip optical switch on the optical interconnect expansion cards of the plurality of computing devices comprises:

[0023] controlling the first optical switching unit to select transmission of signals from the computing module to the on-chip optical switch or the optical fiber;

[0024] controlling the on-chip optical switch to select transmission path for the plurality of computing modules within the same computing device to communicate with each other.

[0025] Further, according to an optional embodiment of the present application, a computing system includes a plurality of computing devices, each of the computing devices is configured with a plurality of computing modules and a plurality of optical interconnect expansion cards, each of the optical interconnect expansion cards is provided with an on-chip optical switch and at least one first optical switching unit.

[0026] The optical interconnect expansion cards of the plurality of computing devices communicate via fiber connections, and the first optical switch units and / or the on-chip optical switches on the optical interconnect expansion cards of the plurality of computing devices are controlled such that a first portion of the plurality of computing modules of the computing system forms a first supernode, and a topology of communication links of the first supernode comprises a two-dimensional wrap-around topology.

[0027] In some embodiments, the two-dimensional wrap-around topology can be configured such that a first portion of the plurality of computing modules of the computing system forms a first ring topology in which the computing modules are arranged in a one-dimensional wrap-around in a first direction, at least two of the first ring topologies are arranged in a second direction, and at least a portion of the computing modules in the at least two of the first ring topologies form a second ring topology in which the computing modules are arranged in a one-dimensional wrap-around in the second direction, wherein the second direction intersects the first direction.

[0028] In some embodiments, each computing module of the first supernode is configured such that at least one of the first ring topologies passes through the computing module, and at least one of the second ring topologies also passes through the computing module.

[0029] In some embodiments, a second portion of the plurality of computing modules of the computing system forms a second supernode, and a topology of communication links of the second supernode comprises a one-dimensional ring topology.

[0030] In some embodiments, the two-dimensional wrap-around topology comprises a plurality of the second ring topologies, and at least one of the second ring topologies is a spare ring topology in which all of the computing modules are spare modules, and the remaining computing modules in the two-dimensional wrap-around topology are working modules that are in normal operation.

[0031] When one or more of the working modules in the plurality of working modules fails, the connection topology of the computing modules is reconfigured by controlling the first optical switch units and / or the on-chip optical switches on the optical interconnect expansion cards of the plurality of computing devices to isolate all of the computing modules in the second ring topology in which the failed working module is located, and to enable an equal number of the spare modules in the spare ring topology to become working modules that are in normal operation.

[0032] In some embodiments, the plurality of computing devices of the computing system are physically connected via fiber to form a two-dimensional wrap-around connection structure.

[0033] The two-dimensional ring connection structure can be configured as a first one-dimensional ring connection structure in which a part of the plurality of computing devices form a one-dimensional ring in a first direction, at least two of the first one-dimensional ring connection structures are arranged in a second direction, and at least a part of the computing devices in the at least two first one-dimensional ring connection structures form a second one-dimensional ring connection structure in the second direction, wherein the second direction intersects the first direction.

[0034] In some embodiments, the first one-dimensional ring connection structure includes N computing devices, N being an integer greater than 2; and the N computing devices are sorted in the order of 1 to N.

[0035] wherein, for any computing device M, M being an integer greater than 1 and less than N, a first part of the plurality of optical interconnection expansion cards of the computing device M is connected to a first part of the plurality of optical interconnection expansion cards of the computing device M-1 through optical fibers, and a second part of the plurality of optical interconnection expansion cards of the computing device M is connected to a second part of the plurality of optical interconnection expansion cards of the computing device M+1 through optical fibers; a first part of the plurality of optical interconnection expansion cards of the computing device N is connected to a first part of the plurality of optical interconnection expansion cards of the computing device N-1 through optical fibers, and a second part of the plurality of optical interconnection expansion cards of the computing device N is connected to a second part of the plurality of optical interconnection expansion cards of the computing device 1 through optical fibers; a first part of the plurality of optical interconnection expansion cards of the computing device 1 is connected to a first part of the plurality of optical interconnection expansion cards of the computing device N through optical fibers, and a second part of the plurality of optical interconnection expansion cards of the computing device 1 is connected to a second part of the plurality of optical interconnection expansion cards of the computing device 2 through optical fibers.

[0036] In some embodiments, the second one-dimensional ring connection structure includes n computing devices, n being an integer greater than 2; and the n computing devices are sorted in the order of 1 to n.

[0037] wherein, for any one computing device m, m is an integer greater than 1 and less than n, a third portion of the plurality of optical interconnection expansion cards of the computing device m is connected to a third portion of the plurality of optical interconnection expansion cards of the computing device m-1 through optical fibers, and a fourth portion of the plurality of optical interconnection expansion cards of the computing device m is connected to a fourth portion of the plurality of optical interconnection expansion cards of the computing device m+1 through optical fibers; a third portion of the plurality of optical interconnection expansion cards of the computing device n is connected to a third portion of the plurality of optical interconnection expansion cards of the computing device n-1 through optical fibers, and a fourth portion of the plurality of optical interconnection expansion cards of the computing device n is connected to a fourth portion of the plurality of optical interconnection expansion cards of the computing device 1 through optical fibers; a third portion of the plurality of optical interconnection expansion cards of the computing device 1 is connected to a third portion of the plurality of optical interconnection expansion cards of the computing device n through optical fibers, and a fourth portion of the plurality of optical interconnection expansion cards of the computing device 1 is connected to a fourth portion of the plurality of optical interconnection expansion cards of the computing device 2 through optical fibers.

[0038] In some embodiments, for each computing device, the number of the first portion, the second portion, the third portion and the fourth portion is equal, each being 1 / 4 of the plurality of optical interconnection expansion cards of the corresponding computing device.

[0039] In some embodiments, the second one-dimensional wrap-around connection structure includes 2 computing devices. Wherein, for each of the second one-dimensional wrap-around connection structure, in the second direction, a third portion of the plurality of optical interconnection expansion cards of the computing device 1 is connected to a third portion of the plurality of optical interconnection expansion cards of the computing device 2 through optical fibers.

[0040] In some embodiments, the control of the first optical switching unit and / or the on-chip optical switch on the optical interconnection expansion cards of the plurality of computing devices comprises:

[0041] controlling the first optical switching unit to select transmission of signals from the computing module to the on-chip optical switch or the optical fiber;

[0042] controlling the on-chip optical switch to select transmission paths for the plurality of computing modules within the same computing device to communicate with each other.

[0043] According to the embodiments of the present application, the reconfigurable optical interconnection through the optical interconnection expansion cards improves the system bandwidth and reduces the delay. The two-dimensional wrap-around topology not only expands the cluster size horizontally, but also expands the cluster size vertically, thereby significantly improving the system computing power.

[0044] The plurality of computing devices are connected through the reconfigurable optical interconnection expansion cards and the optical fibers, avoiding the use of external electrical switches and optical switches, thereby saving the interconnection cost.

[0045] According to the embodiments of the present application, the redundancy granularity can be a single computing device, a single computing module, or a computing device / module of the entire one-dimensional ring topology, reducing the deployment cost of the module. Moreover, by reconstructing the connection topology through the optical interconnection expansion card, the faulty computing device / module can be isolated / bypassed, without affecting the operation of the system. With the millisecond-level topology reset time of the present application, the latency is low, and the cluster operation efficiency is high.

[0046] In addition, the two-dimensional ring connection structure of the optical fiber of the present application breaks through the interconnection distance limit of the PCB board wiring, and through long-distance connection by optical fiber, the existing multi-card computing system can be decoupled, so that the computing power of the node, i.e., the node computing device, is no longer hierarchical, and the bandwidth between the nodes is more uniform, which is beneficial to the large-scale expansion of the computing module.

[0047] Moreover, the two-dimensional ring connection structure of the optical fiber of the present application can make the interconnection between the computing modules no longer fixed, but reconfigurable on site. This can bring many benefits, the most important of which is that the topology can be changed according to the specific artificial intelligence model. From the point of view of the topology structure, different artificial intelligence models have different requirements for data flow, which can be roughly divided into three categories, namely data parallelism, each chip loads the entire model, and different chips process different data in the data set; model parallelism, some layers in the model are particularly large, so each chip is only responsible for a part of the calculation in such a large layer; and pipeline parallelism, different layers in the model are assigned to different chips for calculation, and different data streams correspond to different computing interconnection topologies. Using reconfigurable optical interconnection can quickly switch the interconnection topology between different computing modules, which can effectively improve the bandwidth usage rate and the scalability of the artificial intelligence computing system, i.e., multiple computing modules can efficiently and reliably work together to speed up such a large model.

[0048] Various aspects, features, advantages of the embodiments of the present application will be described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0049] FIG. 1 is a cross-sectional schematic diagram showing an example structure of an optical interconnection module according to an embodiment of the present application.

[0050] FIG. 2A is a schematic diagram showing an example of a photonic circuit structure formed on a photonic integrated circuit chip in the optical interconnection module shown in FIG. 1; and FIG. 2B is a schematic diagram showing another example of a photonic circuit structure formed on a photonic integrated circuit chip in the optical interconnection module shown in FIG. 1.

[0051] FIG. 3 is a schematic diagram showing a photonic circuit structure of an on-chip optical switch in the photonic integrated circuit chip shown in FIGS. 2A and 2B.

[0052] FIG. 4 is a schematic diagram showing an example structure of the first optical switch unit on-chip of the photonic integrated circuit chip shown in FIGS. 2A and 2B.

[0053] FIG. 5 is a schematic diagram showing an example structure of the second optical switch unit in the optical switch on-chip shown in FIG. 3.

[0054] FIG. 6 is a schematic diagram showing a planar layout of a reconfigurable optical interconnect expansion card according to an embodiment of the present application.

[0055] FIG. 7 is a schematic diagram showing a packaging structure of the reconfigurable optical interconnect expansion card shown in FIG. 6.

[0056] FIG. 8 is a schematic diagram showing an example structure of a computing device according to an embodiment of the present application.

[0057] FIGS. 9A-9D are schematic diagrams showing reconfigurable topologies among various computing modules in a computing device according to an embodiment of the present application.

[0058] FIG. 10 is a schematic diagram showing an example structure of a computing system according to another embodiment of the present application.

[0059] FIG. 11 is a schematic diagram showing an example structure of a computing system according to another embodiment of the present application.

[0060] FIGS. 12A-12D are schematic diagrams showing changes in connection topologies of a computing system according to an embodiment of the present application.

[0061] FIGS. 13A-13D are schematic diagrams showing changes in connection topologies of a computing system according to another embodiment of the present application. DETAILED DESCRIPTION

[0062] Example embodiments will be described in greater detail below, with reference to the accompanying drawings. Certain terminology can be used in the description for the sake of clarity only. For example, the terms "top," "bottom," "front," "back," "position," "beneath," and "over" or derivations thereof can be used. Such terminology can be used for the purpose of explanation only and not of limitation, since the embodiments described are applicable to devices in any orientation. The terms "front," "back," "rear," "side," "outer" and "inner" can be used to describe various parts of components in a consistent but arbitrary manner relative to their use in a description of the component being discussed. The discussion of a component's text can clearly address its orientation and / or position as understood in connection with the accompanying drawings, and thus the use of these terms can not be critical. Unless specifically set forth herein, the terms "first," "second," and other similar

[0063] It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers can be present. In addition, it will be understood that when an element or layer is referred to as being between two elements or layers, it can be the only element or layer between the two elements or layers or one or more intervening elements or layers can also be present.

[0064] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. Such terminology can include words such as "about," "approximately," and the like which are understood by those skilled in the art to refer to the inherent variations in measurements of a variable by an instrument. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" "comprising," "includes" and "including" when used herein, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of," when preceding a list of two or more items, cover all of the individual items in the list and any combination of two or more individual items.

[0065] As used herein, "substantially," "about," and terms similarly equivalent are utilized to describe a circumstance that can exist within reasonable manufacturing, production, and / or other tolerances. As used herein, the terms "use," "using," and "used" can be considered synonymous with and interchangeable with the terms "utilize," "utilizing," and "utilized," respectively.

[0066] Referring to FIGS. 1-5, exemplary embodiments of an optical interconnect module to which the present application pertains are shown. In exemplary embodiments, the optical interconnect module includes a photonic integrated circuit chip 201 and a transceiver analog electrical chip 202. In some embodiments, as shown in FIG. 1, the photonic integrated circuit chip 201 is disposed on a substrate 204 and the transceiver analog electrical chip 202 is disposed on the photonic integrated circuit chip 201. As shown in FIG. 2A, the photonic integrated circuit chip includes one or more photonic integrated circuit sub-modules, each of which includes a plurality of modulators 302, a plurality of wavelength multiplexers 303, a plurality of first optical cross-connect units 304, at least one on-chip optical switch 300, a plurality of demultiplexers 305, a plurality of detectors 306, a first optical coupler 307, and a second optical coupler 308, among others.

[0067] In an exemplary embodiment, a group of modulators (may also be configured as "modulator array") in the plurality of modulators 302 are optically connected with a first optical switching unit 304 through a wavelength multiplexer 303. Specifically, the wavelength multiplexer 303 has a plurality of optical input ports and an optical output port, each of the optical input ports of the wavelength multiplexer 303 is connected with one of the modulators 302, and the optical output port of the wavelength multiplexer 303 is connected with one of the first optical switching units 304.

[0068] Each of the first optical switching units 304 is optically connected with a group of modulators 302 through a wavelength multiplexer 303. Specifically, each of the first optical switching units 304 includes a first optical input port, a first optical output port and a second optical output port, the first optical input port of the first optical switching unit 304 is connected with the optical output port of the wavelength multiplexer 303, the first optical output port of the first optical switching unit 304 is connected with a first optical coupler 307 configured to optically connect the first optical output port of the first optical switching unit 304 with an external optical fiber, and the second optical output port of the first optical switching unit 304 is connected with the optical interconnect switch 300. Each of the first optical switching units 304 is configured to selectively output an optical signal inputted through the first optical input port via the first optical output port or the second optical output port.

[0069] The optical interconnect switch 300 has a plurality of optical input ports and a plurality of optical output ports, the plurality of optical input ports of the optical interconnect switch 300 are respectively optically connected with the second optical output ports of the first optical switching units 304, and the optical interconnect switch 300 is configured to selectively output an optical signal inputted through any one of the optical input ports via at least one of the optical output ports, so as to change the output path of the optical signal and further change the topology of the optical transmission network. The plurality of optical output ports of the optical interconnect switch 300 are respectively connected with a plurality of demultiplexers 305, and each of the demultiplexers 305 is connected with a group of detectors (may also be configured as "detector array") in a plurality of detectors 306. Specifically, each of the demultiplexers 305 has an optical input port and a plurality of optical output ports, the optical input port of the demultiplexer 305 is connected with one of the optical output ports of the optical interconnect switch 300, and each of the optical output ports of the demultiplexer 305 is connected with one of the detectors 306.

[0070] In exemplary embodiments, each set of modulator arrays modulates light waves of different wavelengths, each modulator 302 modulating the input light 301 according to an electrical signal received from the transceiver analog electrical chip 202, thereby loading the information carried by the electrical signal into the input light to obtain an information-carrying optical signal. The wavelength multiplexer 303 integrates the optical signals of different wavelengths into one optical signal, which is routed through the first optical switching unit 304 and enters the first external fiber array (not shown) through the first optical coupler 307 or enters the on-chip switch 300. If it enters the on-chip optical switch 300, it is decomposed into optical signals of different wavelengths by the demultiplexer 305, and then the optical signals of different wavelengths are transmitted to different detectors 306 of a set of detector arrays for photoelectric conversion; if it enters the first external fiber array, it enters the demultiplexer and detector array on another chip through the external fiber. For example, in some embodiments, the present photonic integrated circuit chip 201 further comprises a second optical coupler 308 optically connected to the demultiplexer 305 and configured to transmit optical signals from a second external fiber array (not shown) into the demultiplexer and detector array in the present photonic integrated circuit chip 201.

[0071] In some embodiments, the transceiver analog electrical chip 202 is configured to convert the received first digital electrical signal into a driving analog electrical signal and transmit the driving analog electrical signal carrying the information to at least one of the plurality of modulators 302 in the photonic integrated circuit chip 201, or receive a received analog electrical signal output by at least one of the plurality of detectors 306 in the photonic integrated circuit chip 201 and convert the received analog electrical signal into a second digital electrical signal; the modulator 302 is configured to modulate the information carried by the driving analog electrical signal into the optical signal.

[0072] In some embodiments, as shown in FIG. 1, the transceiver analog electrical chip 202 is arranged above the photonic integrated circuit chip 201 and receives the first digital electrical signal and / or transmits the second digital electrical signal through the conductive vias penetrating through the photonic integrated circuit chip 201. Specifically, the transceiver analog electrical chip 202 is mounted on the other side of the photonic integrated circuit chip 201 relative to the substrate 204.

[0073] In optional embodiments, when the input light 301 is single-wavelength light, the photonic integrated circuit chip 201 can be configured without the need for a wavelength multiplexer 303 and a demultiplexer 305. Specifically, as shown in FIG. 2B, one first optical switching unit 304 corresponds to one modulator 302 and two detectors on the other side, one of which is directly connected to the on-chip optical switch 300, such as the detector 306 in the chip, and the other is connected to the first external fiber array connected to the first optical coupler 307. For example, the second optical coupler 308 can be directly connected to the detector 306, so that the detector 306 can be connected to the first optical switching unit of another chip through the second external fiber array.

[0074] In other embodiments, as shown in FIG. 2B, the photonic integrated circuit chip includes a plurality of photonic integrated circuit sub-modules, each of which has the same circuit structure.

[0075] In optional embodiments, the photonic integrated circuit chip 201 further includes a third optical coupler (not shown) and an optical power splitter (not shown). The third optical coupler is configured to input light from an off-chip light source into the photonic integrated circuit chip 201, and the optical power splitter is optically connected to the third optical coupler and is configured to split one input light into a plurality of output lights, each of which has substantially the same power, which are transmitted to the modulators 302.

[0076] In some embodiments, the first optical switching unit 304 can be a 1x2 optical switching unit. In some embodiments, the first optical switching unit 304 can be a MEMS optical path switching unit or a Mach-Zehnder interferometer (MZI) optical path switching unit. As shown in FIG. 4, the first optical switching unit 304 can adopt a Mach-Zehnder interferometer structure, specifically including: a first beam splitter 408 having one optical input port and two optical output ports; a second beam splitter 407 having two optical input ports and two optical output ports; and two phase shifters 406 connected between the two optical output ports of the first beam splitter 408 and the two optical input ports of the second beam splitter 407, respectively. In some embodiments, the phase shifters 406 are electro-optic or thermo-optic phase shifters, and by controlling the electro-optic or thermo-optic phase shifters 406 on the upper and lower arms, the phase of the optical signal can be changed and the output port of the optical signal can be selected by using the interference effect.

[0077] In some embodiments, as shown in FIG. 3, the on-chip optical switch 300 includes a plurality of second optical switching units 405. The optical interconnection module further includes an optical switch control analog electrical chip (not shown) configured to control the plurality of second optical switching units 405 to select a transmission path for an optical signal input to the on-chip optical switch, and to output the optical signal from at least one of a plurality of optical output ports of the on-chip optical switch. In some embodiments, the on-chip optical switch 300 is an 8x8 strictly non-blocking optical switch, which is composed of 64 2x2 optical switching units 405. By controlling the signal output ports of each switching unit, any combination of paths between the 8 input channels and 8 output channels in FIG. 3 can be achieved, and the insertion loss on each path is independent of the path. Thus, the topology of the input to the output in the system can be changed. In specific applications, the 8x8 silicon optical switch can be further repeated laterally to meet the demand of larger bandwidth switching. The optical switch structure in this embodiment is an exemplary structure, and any n x n structure of non-blocking optical switch can be used according to actual needs. The reconfigurable optical interconnection can change the network topology for different artificial intelligence applications, optimize the data migration efficiency, and improve the performance of the computing system.

[0078] In some embodiments, the second optical switching unit 405 can be an MZI optical switching unit.

[0079] In some embodiments, as shown in FIG. 5, the second optical switching unit employs an MZI optical switching unit, which includes two beam splitters 407, each of which has two optical input ports and two optical output ports; and two phase shifters 406, which are respectively connected between the two optical output ports of one beam splitter 407 and the two optical input ports of the other beam splitter 407. As can be seen, the second optical switching unit can also employ a Mach-Zehnder interferometer structure, and by controlling the phase shifters 406 of the upper and lower arms, the phase of the input optical signal can be changed and the output port of the output optical signal can be selected by using the interference effect.

[0080] In some embodiments, the modulator 302 includes at least one of a micro-ring modulator, a Mach-Zehnder modulator, and an electro-absorption modulator. The detector 306 includes a micro-ring detector or a photodiode.

[0081] In some embodiments, each of the photonic integrated circuit sub-modules further comprises a third optical interconnection unit (not shown), the detector or the demultiplexer is optically connected with the on-chip optical switch and the second optical coupler through the third optical interconnection unit, and the number of the detectors or detector arrays is equal to the number of the modulators or modulator arrays. Specifically, the third optical interconnection unit comprises a first optical input port, a second optical input port and an optical output port, the first optical input port of the third optical interconnection unit is connected with the second optical coupler, the second optical input port of the third optical interconnection unit is connected with one optical output port of the on-chip optical switch, and the optical output port of the third optical interconnection unit is connected with the detector or the demultiplexer, and by controlling the third optical interconnection unit to be in a conducting state between the first optical input port and the optical output port of the third optical interconnection unit or in a conducting state between the second optical input port and the optical output port of the third optical interconnection unit.

[0082] In some embodiments, the third optical interconnection unit is arranged on an optical path between the detector or detector array and the on-chip optical switch, and on an optical path between the detector or detector array and the second optical coupler.

[0083] In some embodiments, the third optical interconnection unit is a MEMS optical path interconnection unit or an MZI optical path interconnection unit. By arranging the third optical interconnection unit, one detector / detector array can be used to receive optical signals from the on-chip optical switch and optical signals from the second optical coupler at different times, and the number of detectors / detector arrays can be reduced.

[0084] Considering that the computing modules in the prior art are connected in point-to-point full interconnection through PCB wiring on a general motherboard, the PCB wiring cannot meet the bandwidth requirement between each pair of computing modules, the optical interconnection module can be used to make the bandwidth inside and between nodes more uniform, which is conducive to the large-scale expansion of the computing modules. In addition, the reconfigurable optical interconnection can change the network topology for different artificial intelligence applications, optimize the data migration efficiency and improve the performance of the computing system.

[0085] In some embodiments, the optical interconnection module described above can be arranged in an optical interconnection expansion card to be connected (e.g., plugged) with a corresponding computing device. FIGS. 6 and 7 show an exemplary embodiment of an optical interconnection expansion card. Since the optical interconnection module has the feature of reconfigurable optical interconnection, the optical interconnection expansion card can also be referred to as a reconfigurable optical interconnection expansion card. As shown in FIGS. 6 and 7, the reconfigurable optical interconnection expansion card 100 includes a PCB board 207, an optical interconnection module 200, a laser module 205, a fiber interface 206, an electrical communication interface (e.g., a high-speed interface 211), a retimer 208, a voltage regulation module 209 (e.g., 54V to 12V), a voltage regulation module 210 (12V to voltage rail (i.e., maximum voltage input range)), etc.

[0086] The optical interconnection module 200 is arranged on the PCB board 207, which can be any one of the embodiments or embodiments described above, including a photonic integrated circuit chip 201, a transceiver analog electrical chip 202, and a corresponding substrate 204. The laser module 205 is arranged on the PCB board 207 and is optically connected to the optical interconnection module 200 through the third fiber array 203 to input light to the optical interconnection module 200. The fiber interface 206 is arranged on the PCB board 207 and is optically connected to the optical interconnection module 200 through the first and second external fiber arrays to achieve optical communication with the optical interconnection module 200. The high-speed interface 211 is arranged on the PCB board 207 and is used to receive the first digital signal and / or transmit the second digital electrical signal. The retimer 208 is arranged on the PCB board 207 and is in communication with the high-speed interface 211 and the optical interconnection module 200, and is used to retime the first digital electrical signal and transmit the retimed electrical signal to the optical interconnection module 200; and / or retime the second digital electrical signal received from the optical interconnection module 200 and transmit it out through the electrical communication interface. Each of the retimers 208 has a plurality of communication channels, and the plurality of electrical communication interfaces has a plurality of communication channels, and the total number of communication channels of the retimers 208 is equal to the total number of electrical communication channels of the electrical communication interfaces. The retimers 208 are in communication with the optical interconnection module 200 through the PCB board wiring.

[0087] The high-speed interface 211 receives electrical signals from an information sending device, such as a computing module, and performs signal reconfiguration via the re-timer 208. The reconfigured high-speed electrical signals are transmitted to the edge of the optical interconnection module 200 through the traces on the packaging substrate and the traces on the shorter PCB 207, and further transmitted to the corresponding transceiving analog electrical chip 202 through the metal traces on the substrate 204 and the through-silicon vias 212. The signals are amplified and converted from electrical to optical through the components of the transceiving analog electrical chip 202 and the photonic integrated circuit chip 201, and then transmitted via optical fibers. The optical signals are reconstructed in the photonic integrated circuit chip 201. For example, the optical interconnection module 200 inputs laser generated by the laser module 205, and modulates the electrical signals received by the transceiving analog electrical chip 202 into the laser through the modulator to obtain optical signals with information. After the optical signals are reconstructed by the first optical cross-connect unit and the on-chip optical switch in the photonic integrated circuit chip, the optical signals are output to the communication opposite end (e.g., another computing module) through the optical fiber and the optical fiber interface 206. On the other hand, the optical signals received through the optical fiber interface 206 and the optical fiber are converted from optical to electrical through the detector of the optical interconnection module 200. The obtained electrical signals are transmitted to the receiving end (e.g., a computing module) through the transceiving analog electrical chip 202, the re-timer 208, and the high-speed interface 211.

[0088] In an exemplary embodiment, the optical interconnection expansion card 100 can be used to connect multiple computing modules to form a computing device. As shown in FIG. 8, the computing device includes multiple computing modules 101 (e.g., in the present embodiment, a computing module is formed by an OAM board card carrying one or more computing chips, and the example of FIG. 8 is eight OAMs carrying computing chips, numbered 0, 1, 2, 3, 4, 5, 6, and 7), multiple reconfigurable optical interconnection expansion cards 100 (e.g., eight optical interconnection expansion cards), and a PCB board 102. The PCB board 102 can be a UBB universal mainboard. In some embodiments, the eight computing modules 101 are connected to the reconfigurable optical interconnection expansion card 100 through the PCB board traces 103 on the PCB board 102 to form an eight-card system, and the computing module 101 is provided with a high-speed long-distance SerDes interface to communicate with the high-speed interface 211 of the reconfigurable optical interconnection expansion card 100. The connection topology between the eight computing modules 101 can be reconfigured by the reconfigurable optical interconnection expansion card 100 (specifically, the first optical switch unit 204 and the on-chip optical switch 200 therein), for example, the connection topology between the computing modules 101 (numbered 0, 1, 2, 3, 4, 5, 6, and 7) can be changed in real time to all external interconnections (FIG. 9A), all internal interconnections (FIG. 9B), a ring (FIG. 9C), or point-to-point (FIG. 9D). Therefore, the communication bandwidth between the computing module 0 and the computing module 1 can be switched in real time between the bandwidth B (FIG. 9B: all interconnections), the bandwidth 4B (FIG. 9C: ring), and the bandwidth 8B (FIG. 9D: point-to-point), so as to match the bandwidth requirements of different communication algorithms, improve the bandwidth utilization, and thus improve the overall operation efficiency of the artificial intelligence computing system.

[0089] In addition, in some embodiments of the present application, multiple computing devices are directly connected via corresponding optical interconnection expansion cards and optical fibers, without the need for external switches. The reconfigurable optical interconnection through the optical interconnection expansion card can also improve the bandwidth and reduce the delay, and the connection topology can be changed in real time through the on-chip optical switch and the optical switch unit to meet different computing requirements.

[0090] In an example embodiment, a computing system includes a plurality of computing devices, each of the computing devices is configured with a plurality of computing modules and a plurality of optical interconnect expansion cards, each of the optical interconnect expansion cards is provided with an optical switch on chip and at least one first optical switching unit. The optical interconnect expansion cards of the plurality of computing devices are in communication through fiber connections. The first optical switching unit is configured to selectively transmit signals from the computing modules to the optical switch on chip or the fiber. In some embodiments, the optical interconnect expansion card can be the optical interconnect expansion card 100 of any one of the above embodiments or implementations, or have the structure, configuration, etc. of the optical interconnect expansion card of any one of the above embodiments or implementations, which are not repeated here. In some implementations, the computing device can be the computing device of any one of the above embodiments or implementations, or have the structure, configuration, etc. of the computing device of any one of the above embodiments or implementations, which are not repeated here.

[0091] In some implementations, the plurality of computing devices of the computing system are physically connected through fibers to form a two-dimensional wrap-around connection structure. The two-dimensional wrap-around connection structure can be configured to include a first one-dimensional wrap-around connection structure in which a portion of the plurality of computing devices form a one-dimensional wrap-around in a first direction, at least two of the first one-dimensional wrap-around connection structures are arranged in a second direction, and at least a portion of the computing devices in the at least two of the first one-dimensional wrap-around connection structures form a one-dimensional wrap-around in the second direction, wherein the second direction intersects the first direction.

[0092] In some implementations, the first one-dimensional wrap-around connection structure includes N computing devices, N is an integer greater than 2; the N computing devices are sorted in the order of 1 to N. Wherein, for any computing device M, M is an integer greater than 1 and less than N, a first portion of the plurality of optical interconnect expansion cards of the computing device M is connected to a first portion of the plurality of optical interconnect expansion cards of the computing device M-1 through fibers, a second portion of the plurality of optical interconnect expansion cards of the computing device M is connected to a second portion of the plurality of optical interconnect expansion cards of the computing device M+1 through fibers; a first portion of the plurality of optical interconnect expansion cards of the computing device N is connected to a first portion of the plurality of optical interconnect expansion cards of the computing device N-1 through fibers, a second portion of the plurality of optical interconnect expansion cards of the computing device N is connected to a second portion of the plurality of optical interconnect expansion cards of the computing device 1 through fibers; a first portion of the plurality of optical interconnect expansion cards of the computing device 1 is connected to a first portion of the plurality of optical interconnect expansion cards of the computing device N through fibers, a second portion of the plurality of optical interconnect expansion cards of the computing device 1 is connected to a second portion of the plurality of optical interconnect expansion cards of the computing device 2 through fibers.

[0093] In some embodiments, the second one-dimensional wrap-around connection structure includes n computing devices, where n is an integer greater than 2; the n computing devices are ordered from 1 to n; and for any computing device m, where m is an integer greater than 1 and less than n, a third portion of the optical interconnect expansion cards of the computing device m are connected to a third portion of the optical interconnect expansion cards of the computing device m-1 via optical fibers, a fourth portion of the optical interconnect expansion cards of the computing device m are connected to a fourth portion of the optical interconnect expansion cards of the computing device m+1 via optical fibers; a third portion of the optical interconnect expansion cards of the computing device n are connected to a third portion of the optical interconnect expansion cards of the computing device n-1 via optical fibers, a fourth portion of the optical interconnect expansion cards of the computing device n are connected to a fourth portion of the optical interconnect expansion cards of the computing device 1 via optical fibers; a third portion of the optical interconnect expansion cards of the computing device 1 are connected to a third portion of the optical interconnect expansion cards of the computing device n via optical fibers, and a fourth portion of the optical interconnect expansion cards of the computing device 1 are connected to a fourth portion of the optical interconnect expansion cards of the computing device 2 via optical fibers.

[0094] In optional embodiments, for each computing device, the first portion, the second portion, the third portion and the fourth portion are equal in number, each being 1 / 4 of the optical interconnect expansion cards of the corresponding computing device.

[0095] In other embodiments, the second one-dimensional wrap-around connection structure includes 2 computing devices. For each of the second one-dimensional wrap-around connection structures, in the second direction, a third portion of the optical interconnect expansion cards of the computing device 1 are connected to a third portion of the optical interconnect expansion cards of the computing device 2 via optical fibers.

[0096] In some embodiments, the first portion of the plurality of computing devices of the computing system form a first supernode by controlling the first optical switch units on the optical interconnect expansion cards of the plurality of computing devices and / or the on-chip optical switches, and a topology of communication links of the first supernode includes a two-dimensional wrap-around topology. The two-dimensional wrap-around topology can be constructed to include a first ring topology in which a portion of the plurality of computing devices form a one-dimensional wrap-around in a first direction, at least two of the first ring topologies are arranged in a second direction, and at least a portion of the computing devices of the at least two of the first ring topologies form a second ring topology in which a one-dimensional wrap-around in the second direction, where the second direction intersects the first direction.

[0097] In some embodiments, each computing device in the first supernode is configured such that at least one first ring topology passes through the computing device and at least one second ring topology also passes through the computing device. That is, each computing device has a first ring topology and a second ring topology passing through it.

[0098] In some embodiments, a second portion of the plurality of computing devices of the computing system forms a second supernode, and a topology of communication links of the second supernode comprises a one-dimensional ring topology.

[0099] In some embodiments, the two-dimensional torus topology comprises a plurality of the second ring topologies, and at least one second ring topology serves as a spare ring topology, all computing devices in the spare ring topology being spare devices, and the remaining computing devices in the two-dimensional torus topology being normally operating working devices. When one or more of the working devices in the plurality of working devices fails, the connection topology of the computing devices is reconfigured by controlling the first optical switch units and / or the on-chip optical switches on the optical interconnect expansion cards of the plurality of computing devices to isolate all computing devices in the second ring topology in which the failed working device is located and to enable an equal number of the computing devices in the spare ring topology to become normally operating working devices.

[0100] In some embodiments, a second portion of the plurality of computing devices of the computing system forms a second supernode, and a topology of communication links of the second supernode comprises a one-dimensional ring topology.

[0101] In some embodiments, each computing device in the first supernode is configured such that at least one first ring topology passes through the computing device and at least one second ring topology also passes through the computing device. That is, each computing device has a first ring topology and a second ring topology passing through it.

[0102] In some embodiments, the two-dimensional wrap-around topology includes a plurality of the second ring topology, and at least one second ring topology is a backup ring topology, all the computing modules in the backup ring topology are backup modules, and the rest of the computing modules in the two-dimensional wrap-around topology are working modules in normal operation. When one or more of the working modules in the plurality of working modules fails, the connection topology of the computing modules is reconfigured by controlling the first optical switch unit and / or the on-chip optical switch on the optical interconnection expansion card of the plurality of computing devices of the computing system to isolate all the computing modules of the second ring topology in which the failed working module is located and enable an equal number of the backup modules of the backup ring topology to become working modules in normal operation.

[0103] FIG. 10 shows an example of a computing system based on a two-dimensional wrap-around connection structure of the present application. As shown in FIG. 10, the computing system includes 2N computing devices, N being an integer greater than 2. Each computing device includes 8 computing modules (OAMs) and 8 optical interconnection expansion cards 100, and the computing modules are connected to the corresponding optical interconnection expansion cards through metal wires. It should be understood that the present application is not limited thereto, and each computing device can include any number of computing modules and optical interconnection expansion cards. The 2N computing devices are connected through the corresponding optical interconnection expansion cards 100 and optical fibers to form a two-dimensional wrap-around connection structure. Specifically, N computing devices form a first one-dimensional wrap-around connection structure in a first direction, two first one-dimensional wrap-around connection structures are arranged in a second direction, and at least a portion of the computing devices in the two first one-dimensional wrap-around connection structures form a second one-dimensional wrap-around connection structure in the second direction, wherein the second direction intersects the first direction. If the two-dimensional wrap-around structure is placed in an XY coordinate system, the first direction can be the X direction (lateral direction), and the second direction can be the Y direction (vertical direction).

[0104] As shown in FIG. 10, in the transverse direction, the N computing devices are ordered from 1 to N, wherein a first portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device M is interconnected with a first portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device M-1 via optical fibers, a second portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device M is interconnected with a second portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device M+1 via optical fibers, wherein M is an integer greater than 1 and less than N. Also, a first portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device 1 is interconnected with a first portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device N via optical fibers, a second portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device 1 is interconnected with a second portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device 2 via optical fibers; a first portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device N is interconnected with a first portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device N-1 via optical fibers, a second portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device N is interconnected with a second portion (e.g., 1 / 4) of the plurality of optical interconnect expansion cards 100 of computing device 1 via optical fibers. Thus, the N computing devices are connected into a one-dimensional wrap-around connection structure. Also, two one-dimensional wrap-around connection structures are arranged in the longitudinal direction, and the corresponding numbered computing devices are connected into another one-dimensional wrap-around structure. For example, for any computing device M, 1 / 2 of the plurality of optical interconnect expansion cards 100 of computing device M on the upper side in the longitudinal direction is interconnected with 1 / 2 of the plurality of optical interconnect expansion cards 100 of computing device M on the lower side via optical fibers, thereby constituting the second one-dimensional wrap-around connection structure.

[0105] In FIG. 10, the second one-dimensional wrap-around connection structure in the longitudinal direction includes two computing devices. It should be understood that the present application is not limited thereto, and the number of computing devices in the second one-dimensional wrap-around connection structure in the longitudinal direction can be greater than 2, which is connected in a similar manner as the transverse connection structure. As shown in FIG. 11, the second one-dimensional wrap-around connection structure in the longitudinal direction includes three computing devices. That is, three first one-dimensional wrap-around connection structures in the transverse direction are arranged in the longitudinal direction. For example, for any one computing device M, 1 / 4 of the plurality of optical interconnection expansion cards 100 of the computing device M in the middle of the longitudinal direction are connected to 1 / 4 of the plurality of optical interconnection expansion cards 100 of the computing device M below through optical fibers, 1 / 4 of the plurality of optical interconnection expansion cards 100 of the computing device M in the middle of the longitudinal direction are connected to 1 / 4 of the plurality of optical interconnection expansion cards 100 of the computing device M above through optical fibers, and 1 / 4 of the plurality of optical interconnection expansion cards 100 of the computing device M in the upper side of the longitudinal direction are connected to 1 / 4 of the plurality of optical interconnection expansion cards 100 of the computing device M below through optical fibers, thereby forming the second one-dimensional wrap-around connection structure.

[0106] As can be understood from the above, when the second one-dimensional wrap-around connection structure includes n computing devices, n being an integer greater than 1; the n computing devices are sorted in the order of 1 to n; wherein for any one computing device m, m being an integer greater than 1 and less than n, a third part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device m is connected to a third part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device m-1 through optical fibers, a fourth part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device m is connected to a fourth part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device m+1 through optical fibers; a third part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device n is connected to a third part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device n-1 through optical fibers, a fourth part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device n is connected to a fourth part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device 1 through optical fibers; a third part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device 1 is connected to a third part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device n through optical fibers, and a fourth part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device 1 is connected to a fourth part (for example, 1 / 4) of the plurality of optical interconnection expansion cards of the computing device 2 through optical fibers. Moreover, the number of the first part, the second part, the third part and the fourth part is equal, and each is 1 / 4 of the plurality of optical interconnection expansion cards of the corresponding computing device.

[0107] In some embodiments, the topology of the communication links among the plurality of computing modules of the computing system can be changed by controlling the first optical switch unit and / or the on-chip optical switch of the optical interconnection expansion card of the plurality of computing devices of the computing system. That is, the transmission path among the plurality of computing devices or the plurality of computing modules can be changed by controlling the first optical switch unit and / or the on-chip optical switch of the optical interconnection expansion card of the plurality of computing devices. In exemplary embodiments, the controlling the first optical switch unit and / or the on-chip optical switch of the optical interconnection expansion card of the plurality of computing devices includes: controlling the first optical switch unit to select the transmission path of the signals from the computing module to the on-chip optical switch or the optical fiber; and controlling the on-chip optical switch to select the transmission path of the signals among the plurality of computing modules in the same computing device.

[0108] In some embodiments, the topology of the communication links among the plurality of computing modules of the computing system can be changed by controlling the first optical switch unit and / or the on-chip optical switch of the optical interconnection expansion card of the plurality of computing devices of the computing system. That is, the transmission path among the plurality of computing devices or the plurality of computing modules can be changed by controlling the first optical switch unit and / or the on-chip optical switch of the optical interconnection expansion card of the plurality of computing devices. In exemplary embodiments, the controlling the first optical switch unit and / or the on-chip optical switch of the optical interconnection expansion card of the plurality of computing devices includes: controlling the first optical switch unit to select the transmission path of the signals from the computing module to the on-chip optical switch or the optical fiber; and controlling the on-chip optical switch to select the transmission path of the signals among the plurality of computing modules in the same computing device.

[0109] As shown in FIG. 12A, 68 computing modules form a two-dimensional ring topology through the reconfigurable optical interconnection expansion card and the direct connection of optical fibers, including 64 main computing modules 300 and 4 standby computing modules 301. Among them, computing modules 0 to 31 and computing modules X0, X1 constitute a first ring topology. Computing modules 32 to 63 and computing modules X2, X3 constitute another first ring topology. The two one-dimensional ring topologies are vertically overlapped, and the computing modules at the corresponding positions constitute a second ring topology. For example, computing module 0 and computing module 32, …, computing module 31 and computing module 63 are connected to form a second ring topology, respectively. And computing module X0 and computing module X2, computing module X1 and computing module X3 constitute a standby ring topology, respectively.

[0110] Figure 12A shows that the 0-63 compute modules are in working mode, and the X0, X1, X2, X3 spare compute modules are in standby mode. In alternative embodiments, the compute modules in standby mode can also be placed out of communication outside the two-dimensional wrap-around topology by controlling the first optical switch unit and / or the on-chip optical switch on the optical interconnect expansion card of the compute device.

[0111] Figure 12B shows that one of the 32 compute modules in the upper ring topology is in failure mode, e.g., the 2ndcompute module. By controlling the first optical switch unit and / or the on-chip optical switch on the optical interconnect expansion card of the compute device, the 1stand 3rdcompute modules are re-routed around the failed 2ndcompute module, and the 33rdand 35thcompute modules are re-routed around the 34thcompute module in the same second ring topology as the 2ndcompute module (i.e., the 34thcompute module is isolated), and the spare compute modules X0 and X2 are brought from standby mode to working mode (i.e., the spare compute modules X0 and X2 in the spare ring topology are activated), so that the overall two-dimensional wrap-around topology of 64 compute modules remains in working mode. The example shown in the figure is with 64 compute modules and 4 spare compute modules per super-node, but in actual use, there can be any number of compute modules and any number of spare compute modules per super-node. Also, there can be any number of compute super-nodes in the compute cluster, and the topology of each compute super-node can be the same or different.

[0112] Figure 12C shows that two of the 32 compute modules in the upper ring topology are in failure mode (the two compute modules are in the same row (same one-dimensional ring topology), e.g., the 2ndand 25thcompute modules. By controlling the first optical switch unit and / or the on-chip optical switch on the optical interconnect expansion card of the compute device, the 1st, 3rdcompute modules are re-routed around the failed 2ndcompute module, and the 24th, 26thcompute modules are re-routed around the failed 25thcompute module, and the 33rd, 35thcompute modules are re-routed around the 34thcompute module in the same second ring topology as the 2ndcompute module (i.e., the 34thcompute module is isolated), and the 56th, 58thcompute modules are re-routed around the 57thcompute module in the same second ring topology as the 25thcompute module (i.e., the 57thcompute module is isolated), and the compute modules X0, X1 and X2, X3 in the two spare ring topologies are brought from standby mode to working mode, so that the overall two-dimensional wrap-around topology of 64 compute modules remains in working mode.

[0113] Figure 12D shows that two computing modules in different first ring topology, for example, computing module 2 in the upper first ring topology and computing module 57 in the lower first ring topology, are in failure mode. By controlling the first optical switch unit and / or the on-chip optical switch on the optical interconnection expansion card of the computing device, the interconnection reconfiguration is enabled between computing module 1 and 3 to bypass the failed computing module 2 (i.e., computing module 2 is isolated), and the interconnection reconfiguration is enabled between computing module 56 and 58 to bypass the failed computing module 57 (i.e., computing module 57 is isolated), and the interconnection reconfiguration is enabled between computing module 24 and 26 to bypass computing module 25 in the same second ring topology as computing module 57 (i.e., computing module 25 is isolated), and the interconnection reconfiguration is enabled between computing module 33 and 35 to bypass computing module 34 in the same second ring topology as computing module 2 (i.e., computing module 34 is isolated), and two spare ring topologies are enabled, i.e., spare computing modules X0 and X1 and computing modules X2 and X3 are enabled from standby mode to working mode, so that the 64 computing modules in the two-dimensional ring interconnection in working mode are maintained as a whole.

[0114] According to the above embodiment, when the failed module in the plurality of working modules belongs to two one-dimensional ring topologies in different directions, the connection topology of the computing modules is reconfigured by controlling the first optical switch unit and / or the on-chip optical switch on the optical interconnection expansion card of the computing device to isolate all computing modules in the second ring topology where the failed working module is located, and to enable an equal number of computing modules in the spare ring topology to become normally operating working modules.

[0115] Figures 12A to 12D are described by way of example with two one-dimensional ring topologies in the vertical direction. In actual use, the number of computing modules in the horizontal and vertical directions can be arbitrarily expanded. For example, as shown in Figures 13A to 13D, three first ring topologies are overlapped in the vertical direction, and the three computing modules at the corresponding positions in the vertical direction form a second ring topology.

[0116] As shown in FIG. 13A, 102 computing modules form a two-dimensional wrap-around topology through reconfigurable optical interconnect expansion cards and fiber direct interconnects, including 96 main computing modules 300 and 6 spare computing modules 301. Specifically, computing modules 0-31 and computing modules X0, X1 form a first first-ring topology. Computing modules 32-63 and computing modules X2, X3 form a second first-ring topology. Computing modules 64-95 and computing modules X4, X5 form a third first-ring topology. The three one-dimensional ring topologies are vertically overlapped, and the corresponding computing modules form a second-ring topology. For example, computing module 0, computing module 32 and computing module 64 form a first second-ring topology,..., computing module 31, computing module 63 and computing module 95 form a thirty-second second-ring topology, respectively. And, computing module X0, computing module X2 and computing module X4 form a spare ring topology, and computing module X1, computing module X3 and computing module X5 form another spare ring topology.

[0117] FIG. 13B shows that one computing module in the 32 main computing modules of the upper ring topology fails, for example, computing module 2 is in a failure mode. Through the control of the first optical switch unit on the optical interconnect expansion card of the computing device and / or the on-chip optical switch, the interconnection between computing modules 1 and 3 is reconfigured to bypass the failed computing module 2 (i.e., computing module 2 is isolated), and the interconnection between computing modules 33 and 35 is reconfigured to bypass computing module 34 in the same second-ring topology as computing module 2 (i.e., computing module 34 is isolated), and the interconnection between computing modules 65 and 67 is reconfigured to bypass computing module 66 in the same second-ring topology as computing module 2 (i.e., computing module 66 is isolated), and spare computing modules X0, X2 and X4 are switched from standby mode to working mode (i.e., the computing modules in a spare ring topology are enabled), so that the overall 96 computing modules in the two-dimensional wrap-around topology remain in working mode.

[0118] Figure 13C shows that 2 computing modules in the 32-computing module upper side torus topology are failed (2 computing modules are in the same row (same one-dimensional torus topology), e.g., computing modules 2 and 25 are in failed mode. By controlling the first optical switch unit on the optical interconnection expansion card and / or the on-chip optical switch of the plurality of computing devices, 1, 3 computing modules are bypassed around failed computing module 2 (i.e., computing module 2 is isolated) and 24, 26 computing modules are bypassed around failed computing module 25 (i.e., computing module 25 is isolated) through interconnection reconfiguration, while 33, 35 computing modules are bypassed around computing module 34 in the same second torus topology as computing module 2 (i.e., computing module 34 is isolated), 65, 67 computing modules are bypassed around computing module 66 in the same second torus topology as computing module 2 (i.e., computing module 66 is isolated), 56, 58 computing modules are bypassed around computing module 57 in the same second torus topology as computing module 25 (i.e., computing module 57 is isolated), and 88, 90 computing modules are bypassed around computing module 89 in the same second torus topology as computing module 25 (i.e., computing module 89 is isolated) through interconnection reconfiguration and computing modules X0, X2, X4 and computing modules X1, X3, X5 in the two backup torus topologies, respectively, are brought from standby mode to working mode, so that the overall 96 computing modules in two-dimensional wraparound interconnection in working mode are maintained.

[0119] Figure 13D shows that three computing modules in different first ring topology, for example, computing module 2 in the upper first ring topology, computing module 57 in the middle first ring topology, and computing module 89 in the lower first ring topology, are in failure mode. By controlling the first optical switch unit on the optical interconnection expansion card and / or the on-chip optical switch of the computing device, the interconnection reconfiguration is performed between computing module 1 and computing module 3 to bypass the failed computing module 2 (i.e., computing module 2 is isolated), between computing module 56 and computing module 58 to bypass the failed computing module 57 (i.e., computing module 57 is isolated), between computing module 88 and computing module 90 to bypass the failed computing module 89 (i.e., computing module 89 is isolated), between computing module 33 and computing module 35 to bypass computing module 34 in the same second ring topology as computing module 2 (i.e., computing module 34 is isolated), between computing module 65 and computing module 67 to bypass computing module 66 in the same second ring topology as computing module 2 (i.e., computing module 66 is isolated), and between computing module 24 and computing module 26 to bypass computing module 25 in the same second ring topology as computing module 57 and computing module 89 (i.e., computing module 25 is isolated), and two standby ring topologies are enabled, i.e., computing modules X0, X2, X4 and computing modules X1, X3, X5 are enabled from standby mode to working mode, so that the 96 computing modules in the two-dimensional ring interconnection in working mode are maintained as a whole.

[0120] The embodiment of the present application adopts a two-dimensional ring topology, which can reduce the delay in a large supernode model compared with a one-dimensional ring structure. Taking 64 computing modules as an example, the one-dimensional ring structure includes 64 computing modules connected horizontally, and the maximum number of hops for communication between the computing modules is 32 (for example, computing module 0 to computing module 32); while the two-dimensional ring topology is adopted, as shown in Figure 12A, there are 32 computing modules horizontally, and the maximum number of hops for communication between the computing modules is 16 (for example, computing module 0 to computing module 48, i.e., the first computing module in the upper first ring topology to the middle one in the lower first ring topology). When a four-row two-dimensional ring structure (i.e., four first ring topologies are arranged in overlap) is adopted, there are 16 computing modules horizontally, and the maximum number of hops for communication between the computing modules is 11 (for example, computing module 0 to computing module 57, i.e., the first computing module in the first row to the middle one in the fourth row). As can be seen, the delay of the two-dimensional ring topology is half or even less than that of the one-dimensional ring structure.

[0121] The above is described with a single computing module as the minimum redundancy unit, in actual use, it can also be a single computing device as the minimum redundancy unit. In this case, when a computing device fails, the above-mentioned similar way, through the interconnection reconfiguration bypasses the failure of the computing device and the rest of the computing device in the same column, the equivalent of standby device is enabled to the two-dimensional ring topology.

[0122] Alternatively, it can also be a node as the minimum redundancy unit. In this case, when a node fails, the above-mentioned similar way, through the interconnection reconfiguration bypasses the failure of the node and the rest of the node in the same column, the equivalent of standby node is enabled to the two-dimensional ring topology. In an example, the node includes one or more computing modules. In another example, the node includes one or more computing devices.

[0123] The skilled in the art should understand that the above disclosed is only an embodiment of the present application, of course, cannot be limited by the patent protection scope of the present application, the equivalent changes made by the embodiment of the present application, still belongs to the scope of the claims of the present application.

[0124] In addition, some technical solutions of the present disclosure can also be recorded as follows:

[0125] Embodiment 1: A photonic integrated circuit chip, comprising one or more photonic integrated circuit sub-modules, each of the photonic integrated circuit sub-modules comprising:

[0126] a plurality of first optical switching units, each of the first optical switching units comprising a first optical input port, a first optical output port and a second optical output port, and each of the first optical switching units being configured to selectively output an optical signal inputted through its first optical input port via its first optical output port or second optical output port;

[0127] at least one on-chip optical switch having a plurality of optical input ports and a plurality of optical output ports, the plurality of optical input ports being optically connected to the second optical output ports of the plurality of first optical switching units respectively, the on-chip optical switch being configured to selectively output an optical signal inputted through any one of its plurality of optical input ports via at least one of its plurality of optical output ports;

[0128] a plurality of modulators optically connected to the corresponding first optical input ports of the plurality of first optical switching units and configured to modulate information carried by an electrical signal into the optical signal;

[0129] a plurality of detectors, at least a part of the plurality of detectors being optically connected to the plurality of optical output ports of the on-chip optical switch;

[0130] a plurality of first optical couplers configured to optically connect first optical output ports of the plurality of first optical switching units with a first external fiber array; and

[0131] a second optical coupler optically connected with at least a portion of the plurality of detectors, configured to transmit optical signals from a second external fiber array to the portion of the plurality of detectors.

[0132] Embodiment 2: The photonic integrated circuit chip of embodiment 1, wherein each of the photonic integrated circuit sub-modules further comprises a plurality of wavelength multiplexers and a plurality of demultiplexers.

[0133] the plurality of modulators are configured as a plurality of modulator arrays, and the plurality of detectors are configured as a plurality of detector arrays;

[0134] the modulator arrays are optically connected with the corresponding first optical switching units through the wavelength multiplexers, wherein each of the wavelength multiplexers has a plurality of optical input ports and one optical output port, each of the plurality of optical input ports of the wavelength multiplexer is connected with the modulator in the modulator array, and the optical output port of the wavelength multiplexer is connected with the first optical input port of the first optical switching unit;

[0135] the detector arrays are optically connected with the corresponding optical output ports of the on-chip optical switch or the second optical coupler through the demultiplexers, wherein each of the demultiplexers has one optical input port and a plurality of optical output ports, the optical input port of the demultiplexer is connected with the optical output port of the on-chip optical switch or the second optical coupler, and each of the plurality of optical output ports of the demultiplexer is connected with the detector in the detector array.

[0136] Embodiment 3: The photonic integrated circuit chip of embodiment 1 or 2, wherein

[0137] the number of the detectors or detector arrays is twice the number of the modulators or modulator arrays, wherein a portion of the detectors or detector arrays are connected with the on-chip optical switch and another portion are connected with the second optical coupler.

[0138] Embodiment 4: The photonic integrated circuit chip of embodiment 1 or 2, wherein each of the photonic integrated circuit sub-modules further comprises a third optical switching unit, the detectors or demultiplexers are optically connected with the on-chip optical switch and the second optical coupler through the third optical switching unit, and the number of the detectors or detector arrays is equal to the number of the modulators or modulator arrays.

[0139] Embodiment 5: The photonic integrated circuit chip of embodiment 4, wherein the third optical switching unit comprises a first optical input port, a second optical input port, and an optical output port, the first optical input port of the third optical switching unit is connected with the second optical coupler, the second optical input port of the third optical switching unit is connected with one optical output port of the on-chip optical switch, the optical output port of the third optical switching unit is connected with the detector or the demultiplexer, and the first optical input port of the third optical switching unit and the optical output port of the third optical switching unit are connected in conduction or the second optical input port of the third optical switching unit and the optical output port of the third optical switching unit are connected in conduction by controlling the third optical switching unit.

[0140] Embodiment 6: The photonic integrated circuit chip of embodiment 4, wherein the third optical switching unit is arranged on an optical path connecting the detector or detector array with the on-chip optical switch, and arranged on an optical path connecting the detector or detector array with the second optical coupler.

[0141] Embodiment 7: The photonic integrated circuit chip of embodiment 4, wherein the third optical switching unit is a MEMS optical switching unit or a MZI optical switching unit.

[0142] Embodiment 8: The photonic integrated circuit chip of embodiment 1 or 2, wherein the on-chip optical switch comprises a plurality of second optical switching units;

[0143] The plurality of second optical switching units select a transmission path of an optical signal input to the on-chip optical switch, so that the optical signal is output from at least one of a plurality of optical output ports of the on-chip optical switch.

[0144] Embodiment 9: The photonic integrated circuit chip of embodiment 8, wherein the first optical switching unit is a MEMS optical switching unit or a MZI optical switching unit; and / or

[0145] The second optical switching unit is a MZI optical switching unit.

[0146] Embodiment 10: The photonic integrated circuit chip of embodiment 9, wherein the first optical switching unit is a MZI optical switching unit, comprising:

[0147] a first beam splitter having one optical input port and two optical output ports;

[0148] a second beam splitter having two optical input ports and two optical output ports; and

[0149] two phase shifters connected between the two optical output ports of the first beam splitter and the two optical input ports of the second beam splitter, respectively.

[0150] Embodiment 11: The photonic integrated circuit chip of embodiment 8, wherein the second optical switching unit comprises:

[0151] two beam splitters each having two optical input ports and two optical output ports, the two beam splitters comprising a first beam splitter and a second beam splitter;

[0152] two phase shifters connected between the two optical output ports of the first beam splitter and the two optical input ports of the second beam splitter, respectively.

[0153] Embodiment 12: The photonic integrated circuit chip of embodiment 1 or 2, wherein the modulators comprise at least one of the following: a micro-ring modulator, a Mach-Zehnder modulator, an electro-absorption modulator;

[0154] and / or the detectors comprise a micro-ring detector or a photo-diode.

[0155] Embodiment 13: The photonic integrated circuit chip of embodiment 1 or 2, wherein each of the photonic integrated circuit sub-modules further comprises:

[0156] a third optical coupler configured to input light from an off-chip light source into the photonic integrated circuit sub-module;

[0157] an optical power splitter optically connected to the third optical coupler and configured to split one input light into a plurality of output lights each having substantially the same power, the plurality of output lights being transmitted to the modulators.

[0158] Embodiment 14: An optical interconnection module comprising the photonic integrated circuit chip of any one of embodiments 1 to 13 and a transceiver analog electrical chip;

[0159] wherein the transceiver analog electrical chip is configured to convert a received first digital electrical signal into a driving analog electrical signal and transmit the driving analog electrical signal carrying the information to at least one of the plurality of modulators in the photonic integrated circuit chip, or receive a received analog electrical signal output by at least one of the plurality of detectors in the photonic integrated circuit chip and convert the received analog electrical signal into a second digital electrical signal;

[0160] the modulators are configured to modulate the information carried by the driving analog electrical signal into the optical signals.

[0161] Embodiment 15: The optical interconnection module of embodiment 14, wherein the transceiver analog electrical chip is disposed above the photonic integrated circuit chip, and receives the first digital electrical signal and / or transmits the second digital electrical signal through conductive vias that penetrate the photonic integrated circuit chip.

[0162] Embodiment 16: The optical interconnection module of embodiment 14, wherein the optical interconnection module further comprises an optical switch control analog electrical chip disposed in correspondence with an on-chip optical switch in the photonic integrated circuit chip, and configured to control a plurality of second optical switching units of the on-chip optical switch to select a preset transmission path for an optical signal input to the on-chip optical switch, so that the optical signal is output from a preset optical output port of a plurality of optical output ports of the on-chip optical switch.

[0163] Embodiment 17: The optical interconnection module of embodiment 16, wherein the optical switch control analog electrical chip is disposed above the photonic integrated circuit, and receives optical switch control analog signals through conductive vias that penetrate the photonic integrated circuit chip.

[0164] Embodiment 18: The optical interconnection module of embodiment 14, further comprising a substrate, wherein the photonic integrated circuit chip is mounted on the substrate, and the transceiver analog electrical chip is mounted on the photonic integrated circuit chip on the other side relative to the substrate.

[0165] Embodiment 19: An optical interconnection expansion card, comprising:

[0166] a first PCB board;

[0167] an optical interconnection module as described in any one of embodiments 14 to 18, disposed on the first PCB board;

[0168] a plurality of optical fiber interfaces disposed on the first PCB board, and optically connected with the optical interconnection module through the first external optical fiber array and the second external optical fiber array, to realize optical communication with the optical interconnection module

[0169] a plurality of electrical communication interfaces disposed on the first PCB board, for receiving the first digital electrical signal and / or transmitting the second digital electrical signal;

[0170] a plurality of retimers disposed on the first PCB board, and communicatively connected with the electrical communication interfaces and the optical interconnection module, for signal reconditioning of the first digital electrical signal and transmitting the reconditioned electrical signal to the optical interconnection module; and / or signal reconditioning of the second digital electrical signal received from the optical interconnection module and transmitting the reconditioned electrical signal out through the electrical communication interfaces.

[0171] Embodiment 20: The optical interconnection expansion card of embodiment 19, wherein,

[0172] Each of the retimer has a plurality of communication channels, the plurality of electrical communication interfaces has a plurality of communication channels, and the total number of communication channels of the retimer is equal to the total number of electrical communication channels of the electrical communication interfaces.

[0173] Embodiment 21: The optical interconnection expansion card of embodiment 19, wherein,

[0174] The retimer is communicatively connected to the optical interconnection module through the traces of the first PCB.

[0175] Embodiment 22: The optical interconnection expansion card of embodiment 19, further comprising a laser module disposed on the first PCB and optically connected to the optical interconnection module through a third optical fiber array to input a laser beam to the optical interconnection module.

[0176] Embodiment 23: A computing device, comprising:

[0177] a plurality of computing modules;

[0178] a plurality of optical interconnection expansion cards of any one of embodiments 19-22;

[0179] wherein the plurality of computing modules are communicatively connected to the plurality of optical interconnection expansion cards.

[0180] Embodiment 24: The computing device of embodiment 23, further comprising a second PCB,

[0181] the plurality of computing modules are disposed on the second PCB,

[0182] the plurality of optical interconnection expansion cards are plugged into the second PCB,

[0183] the plurality of computing modules are communicatively connected to the plurality of optical interconnection expansion cards through the traces on the second PCB.

[0184] Embodiment 25: A computing system, comprising:

[0185] a plurality of computing devices of embodiments 23 or 24;

[0186] at least one switch;

[0187] the plurality of optical interconnection expansion cards of the plurality of computing devices are communicatively connected to the at least one switch through optical fibers to communicatively connect the plurality of computing devices.

[0188] Example 26: The computing system of Example 25, wherein the switch comprises: an optical circuit switch, or an electrical switch with optical modules for optical communication with the optical interconnect expansion card.

Claims

1. A computing system comprising a plurality of computing devices, each of the computing devices being configured with a plurality of computing modules and a plurality of optical interconnect expansion cards, each of the optical interconnect expansion cards being provided with an on-chip optical switch and at least one first optical switching unit; The optical interconnect expansion cards of the multiple computing devices communicate via optical fiber connections. Furthermore, by controlling the first optical switching unit and / or the on-chip optical switch on the optical interconnect expansion cards of the multiple computing devices, the first part of the multiple computing devices of the computing system constitutes a first supernode. The topology of the communication link of the first supernode includes a two-dimensional surround topology. in, The two-dimensional ring topology may be configured as follows: a first portion of the computing devices among the plurality of computing devices forms a one-dimensional ring topology along a first direction; at least two of the first ring topologies are arranged along a second direction; and at least a portion of the computing devices among the at least two first ring topologies form a one-dimensional ring topology along the second direction, wherein the second direction intersects with the first direction.

2. The computing system as described in claim 1, wherein, Each computing device of the first supernode is configured such that at least one first ring topology passes through the computing device, and at least one second ring topology also passes through the computing device.

3. The computing system as described in claim 1, wherein, The second part of the multiple computing devices of the computing system constitutes a second supernode, and the topology of the communication link of the second supernode includes a one-dimensional ring topology.

4. The computing system as described in claim 2, wherein, The two-dimensional surround topology includes multiple second ring topologies, and at least one second ring topology serves as a backup ring topology. All computing devices in the backup ring topology are backup devices, while the remaining computing devices in the two-dimensional surround topology are operating devices in normal operation. When one or more of the multiple working devices fail, the connection topology of the computing devices is reconstructed by controlling the first optical switching unit and / or the on-chip optical switch on the optical interconnect expansion card of the multiple computing devices of the computing system, so as to isolate all computing devices in the second ring topology where the failed working device is located, and enable an equal number of computing devices in the backup ring topology to become normal working devices.

5. The computing system as described in claim 1, wherein, The computing system's multiple computing devices are physically connected via optical fibers to form a two-dimensional, wraparound connection structure. The two-dimensional surround connection structure may be configured as follows: a portion of the computing devices among the plurality of computing devices form a first one-dimensional surround connection structure along a first direction; at least two of the first one-dimensional surround connection structures are arranged along a second direction; and at least a portion of the computing devices among the at least two first one-dimensional surround connection structures form a second one-dimensional surround connection structure along the second direction, wherein the second direction intersects with the first direction.

6. The computing system as described in claim 5, wherein, The first one-dimensional surrounding connection structure includes N computing devices, where N is an integer greater than 2; The N computing devices are ordered from 1 to N; Wherein, for any computing device M, M is an integer greater than 1 and less than N, the first part of the plurality of optical interconnect expansion cards of computing device M is connected to the first part of the plurality of optical interconnect expansion cards of computing device M-1 through optical fiber, and the second part of the plurality of optical interconnect expansion cards of computing device M is connected to the second part of the plurality of optical interconnect expansion cards of computing device M+1 through optical fiber. The first part of the plurality of optical interconnect expansion cards of computing device N is connected to the first part of the plurality of optical interconnect expansion cards of computing device N-1 via optical fiber, and the second part of the plurality of optical interconnect expansion cards of computing device N is connected to the second part of the plurality of optical interconnect expansion cards of computing device 1 via optical fiber. A first portion of a plurality of optical interconnect expansion cards of computing device 1 is connected to a first portion of a plurality of optical interconnect expansion cards of computing device N via optical fiber, and a second portion of a plurality of optical interconnect expansion cards of computing device 1 is connected to a second portion of a plurality of optical interconnect expansion cards of computing device 2 via optical fiber.

7. The computing system of claim 6, wherein, The second one-dimensional surrounding connection structure includes n computing devices, where n is an integer greater than 2; The n computing devices are ordered from 1 to n; Wherein, for any computing device m, m is an integer greater than 1 and less than n, the third part of the multiple optical interconnect expansion cards of computing device m is connected to the third part of the multiple optical interconnect expansion cards of computing device m-1 through optical fiber, and the fourth part of the multiple optical interconnect expansion cards of computing device m is connected to the fourth part of the multiple optical interconnect expansion cards of computing device m+1 through optical fiber. The third part of the plurality of optical interconnect expansion cards of computing device n is connected to the third part of the plurality of optical interconnect expansion cards of computing device n-1 via optical fiber, and the fourth part of the plurality of optical interconnect expansion cards of computing device n is connected to the fourth part of the plurality of optical interconnect expansion cards of computing device 1 via optical fiber. The third part of the plurality of optical interconnect expansion cards of computing device 1 is connected to the third part of the plurality of optical interconnect expansion cards of computing device n via optical fiber, and the fourth part of the plurality of optical interconnect expansion cards of computing device 1 is connected to the fourth part of the plurality of optical interconnect expansion cards of computing device 2 via optical fiber.

8. The computing system of claim 7, wherein, For each computing device, the number of the first part, the second part, the third part, and the fourth part is equal, each being 1 / 4 of the number of optical interconnect expansion cards of the corresponding computing device.

9. The computing system of claim 6, wherein, The second one-dimensional surrounding connection structure includes two computing devices; In each of the second one-dimensional surround connection structures, in the second direction, the third part of the plurality of optical interconnect expansion cards of the computing device 1 is connected to the third part of the plurality of optical interconnect expansion cards of the computing device 2 via optical fiber.

10. The computing system as claimed in claim 1, characterized in that, The control of the first optical switching unit and / or the on-chip optical switch on the optical interconnect expansion card of the plurality of computing devices includes: By controlling the first optical switching unit, the signal from the computing module can be selected to be transmitted to the on-chip optical switch or the optical fiber; The on-chip optical switching unit is controlled to select the transmission path for communication between the multiple computing modules within the same computing device.

11. A computing system comprising a plurality of computing devices, each of the computing devices being configured with a plurality of computing modules and a plurality of optical interconnect expansion cards, each of the optical interconnect expansion cards being provided with an on-chip optical switch and at least one first optical switching unit; The optical interconnect expansion cards of the multiple computing devices communicate via optical fiber connections. Furthermore, by controlling the first optical switching unit and / or the on-chip optical switch on the optical interconnect expansion cards of the multiple computing devices, the first part of the multiple computing modules of the computing system constitutes a first super node. The topology of the communication link of the first super node includes a two-dimensional surround topology. in, The two-dimensional ring topology can be configured as follows: a first part of the computing modules of the computing system forms a one-dimensional ring topology along a first direction; at least two of the first ring topologies are arranged along a second direction; and at least a part of the computing modules in the at least two first ring topologies form a one-dimensional ring topology along the second direction, wherein the second direction intersects with the first direction.

12. The computing system of claim 11, wherein, Each computing module of the first supernode is configured such that at least one first ring topology passes through the computing module, and at least one second ring topology also passes through the computing module.

13. The computing system of claim 11, wherein, The second part of the multiple computing modules of the computing system constitutes the second supernode, and the topology of the communication link of the second supernode includes a one-dimensional ring topology.

14. The computing system of claim 12, wherein, The two-dimensional surround topology includes multiple second ring topologies, and at least one second ring topology serves as a backup ring topology. All computing modules in the backup ring topology are backup modules, while the remaining computing modules in the two-dimensional surround topology are working modules in normal operation. When one or more of the multiple working modules fail, the connection topology of the computing modules is reconstructed by controlling the first optical switching unit and / or the on-chip optical switch on the optical interconnect expansion card of the multiple computing devices of the computing system. This isolates all computing modules in the second ring topology where the failed working module is located, and enables an equal number of backup modules in the backup ring topology to become working modules that are operating normally.

15. The computing system of claim 11, wherein, The computing system's multiple computing devices are physically connected via optical fibers to form a two-dimensional, wraparound connection structure. The two-dimensional surround connection structure may be configured as follows: a portion of the computing devices among the plurality of computing devices form a first one-dimensional surround connection structure along a first direction; at least two of the first one-dimensional surround connection structures are arranged along a second direction; and at least a portion of the computing devices among the at least two first one-dimensional surround connection structures form a second one-dimensional surround connection structure along the second direction, wherein the second direction intersects with the first direction.

16. The computing system of claim 15, wherein, The first one-dimensional surrounding connection structure includes N computing devices, where N is an integer greater than 1; The N computing devices are ordered from 1 to N; Wherein, for any computing device M, M is an integer greater than 1 and less than N, the first part of the plurality of optical interconnect expansion cards of computing device M is connected to the first part of the plurality of optical interconnect expansion cards of computing device M-1 through optical fiber, and the second part of the plurality of optical interconnect expansion cards of computing device M is connected to the second part of the plurality of optical interconnect expansion cards of computing device M+1 through optical fiber. The first part of the plurality of optical interconnect expansion cards of computing device N is connected to the first part of the plurality of optical interconnect expansion cards of computing device N-1 via optical fiber, and the second part of the plurality of optical interconnect expansion cards of computing device N is connected to the second part of the plurality of optical interconnect expansion cards of computing device 1 via optical fiber. A first portion of a plurality of optical interconnect expansion cards of computing device 1 is connected to a first portion of a plurality of optical interconnect expansion cards of computing device N via optical fiber, and a second portion of a plurality of optical interconnect expansion cards of computing device 1 is connected to a second portion of a plurality of optical interconnect expansion cards of computing device 2 via optical fiber.

17. The computing system of claim 16, wherein, The second one-dimensional surrounding connection structure includes n computing devices, where n is an integer greater than 2; The n computing devices are ordered from 1 to n; Wherein, for any computing device m, m is an integer greater than 1 and less than n, the third part of the multiple optical interconnect expansion cards of computing device m is connected to the third part of the multiple optical interconnect expansion cards of computing device m-1 through optical fiber, and the fourth part of the multiple optical interconnect expansion cards of computing device m is connected to the fourth part of the multiple optical interconnect expansion cards of computing device m+1 through optical fiber. The third part of the plurality of optical interconnect expansion cards of computing device n is connected to the third part of the plurality of optical interconnect expansion cards of computing device n-1 via optical fiber, and the fourth part of the plurality of optical interconnect expansion cards of computing device n is connected to the fourth part of the plurality of optical interconnect expansion cards of computing device 1 via optical fiber. The third part of the plurality of optical interconnect expansion cards of computing device 1 is connected to the third part of the plurality of optical interconnect expansion cards of computing device n via optical fiber, and the fourth part of the plurality of optical interconnect expansion cards of computing device 1 is connected to the fourth part of the plurality of optical interconnect expansion cards of computing device 2 via optical fiber.

18. The computing system of claim 17, wherein, For each computing device, the number of the first part, the second part, the third part, and the fourth part is equal, each being 1 / 4 of the number of optical interconnect expansion cards of the corresponding computing device.

19. The computing system of claim 16, wherein, The second one-dimensional surrounding connection structure includes two computing devices; In each of the second one-dimensional surround connection structures, in the second direction, the third part of the plurality of optical interconnect expansion cards of the computing device 1 is connected to the third part of the plurality of optical interconnect expansion cards of the computing device 2 via optical fiber.

20. The computing system as claimed in claim 11, characterized in that, The control of the first optical switching unit and / or the on-chip optical switch on the optical interconnect expansion card of the plurality of computing devices includes: By controlling the first optical switching unit, the signal from the computing module can be selected to be transmitted to the on-chip optical switch or the optical fiber; The on-chip optical switching unit is controlled to select the transmission path for communication between the multiple computing modules within the same computing device.

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