Optimised power utilisation of semiconductor devices in power modules and power module bridges

By strategically arranging semiconductor devices and power modules based on their power classes and performance, the inefficiencies in power modules are addressed, resulting in optimized power utilization and cooling, leading to reduced energy losses and improved system reliability.

WO2025247863A1PCT designated stage Publication Date: 2025-12-04ROBERT BOSCH GMBH

Patent Information

Application Number
PCT/EP2025/064574
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-05-28
Filing Date
2025-05-27
Publication Date
2025-12-04

AI Technical Summary

Technical Problem

Existing power modules with semiconductor devices suffer from inefficiencies due to manufacturing variations, leading to fluctuating conduction and switching losses, which are not optimally addressed by random assembly or binning processes.

Method used

The semiconductor devices are arranged on a substrate based on their power classes, with low-power devices in cooler areas and high-power devices in hotter areas, and power modules are positioned on a heatsink according to their performance classes to optimize power utilization and cooling.

Benefits of technology

This approach achieves efficient power utilization and cooling, reducing energy losses and manufacturing costs while enhancing system reliability and battery capacity in electric vehicles.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a power module (107) for optimally utilising the power of semiconductor devices (118), wherein the power module (107) comprises at least the following elements: a carrier substrate, the carrier substrate having a selection of temperature ranges, and the temperature ranges being classified according to a heating criterion from lowest to highest heating at an operating condition within the power module (107), and a number of semiconductor devices (118) arranged on the carrier substrate, wherein: each semiconductor device (118) has a semiconductor device power class; the semiconductor device power class is determined from a semiconductor device power class group; the semiconductor device power class group has a defined number of semiconductor device power classes (206) which cover a performance in a bandwidth from low-performance semiconductor devices (124) to high-performance semiconductor devices (120); the semiconductor devices (118) are arranged on the carrier substrate in such a way that the low-performance semiconductor devices (124) are arranged within the temperature range (204) which has the lowest heating of the heating criterion; and the high-performance semiconductor devices (120) are arranged within the temperature range which has the highest heating of the heating criterion.
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Description

[0001] Description

[0002] title

[0003] Optimized power utilization of semiconductor components in power modules and power module bridges

[0004] Technical field

[0005] The invention relates to a power module for the optimal power utilization of semiconductor devices. Furthermore, the invention relates to a power module bridge for the optimal power utilization of power modules. The invention also relates to a method for manufacturing a power module bridge for the optimal power utilization of power modules placed within the power module bridge.

[0006] State of the art

[0007] Power modules mounted on a heatsink are well-known in the art. A cooling medium typically flows longitudinally through the heatsink. These modules generally contain several semiconductor devices connected in parallel to achieve sufficient power output. These semiconductor devices (e.g., SiC MOSFETs) exhibit manufacturing variations in conduction and switching losses. According to the prior art, the semiconductor devices are either assembled in a random configuration or undergo a process called "binning" (sorting). In this process, semiconductor devices with comparable properties are sorted and then connected in parallel. This aims to optimize the electrical performance of the parallel circuit.

[0008] Disclosure of the Invention According to the invention, a power module for the optimal power utilization of semiconductor devices is proposed, comprising at least the following components: a substrate, wherein the substrate has a selection of temperature ranges, the temperature ranges being classified according to a heating criterion from lowest to highest heating under an operating condition within the power module, and a number of semiconductor devices arranged on the substrate, each semiconductor device having a semiconductor device power class, the semiconductor device power class being determined from a group of semiconductor device power classes, the group of semiconductor device power classes comprising a defined number of semiconductor device power classes.which cover a performance range from low-power semiconductor devices to high-power semiconductor devices, wherein the semiconductor devices are arranged on the substrate such that the low-power semiconductor devices are located within the temperature range exhibiting the lowest heating of the heating criterion, and the high-power semiconductor devices are located within the temperature range exhibiting the highest heating of the heating criterion.

[0009] A semiconductor device is an electronic component that can change its electrical conductivity depending on certain external influences such as voltage, current, or light. Semiconductor devices are usually made of materials such as silicon or germanium, which can both conduct and insulate electricity under certain conditions. A MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is an example of a semiconductor device used in power modules with a single switch. These MOSFETs are made of a semiconductor material such as silicon and have at least three terminals: a source, a drain, and a gate. A power module substrate is a mechanical base onto which a number of the electronic components of the power module, such as semiconductor devices, are mounted.Heat dissipation, mechanical stability, electrical insulation, and conductive function are among the tasks of the substrate. During operation, the substrate is exposed to a temperature gradient. This temperature gradient is such that a selection of temperature ranges develops on the substrate. According to the invention, a temperature range is defined by a heating criterion, ranging from the lowest temperature exerted on the substrate during operation to the highest temperature exerted on the substrate during operation, for a given operating condition within a power module. The temperature gradient is further enhanced by arranging semiconductor devices connected in parallel on the substrate.In this case, for example, semiconductor devices located at the edge of the substrate are subjected to lower thermal stress because they are only heated on one side by neighboring semiconductor devices. Semiconductor devices located directly at an edge of the substrate are also generally subjected to higher thermal stress, as lateral heat conduction is prevented, resulting in less thermal spreading.

[0010] The temperature exerted on the semiconductor devices during operation, due to the temperature gradient, affects their efficiency. To achieve more homogeneous and comprehensive power utilization, the power output of the power modules or the semiconductor devices is "adapted" to the thermal environment. This is done at the power module integration level, either on a heatsink or within the power module itself. To achieve this power adaptation, the semiconductor devices are positioned and / or mounted on the substrate of the power module according to their power requirements. The efficiency depends primarily on the conduction and switching losses of the device. A semiconductor device with low efficiency has a high on-resistance (conduction losses) and / or high switching losses.The term "high" in this context implies a significant fluctuation in the measured values ​​for both the on-resistance and the switching loss. This fluctuation can, for example, represent a considerable percentage of the measured values, with the high on-resistance or the high switching loss ranging from a few percentage points to a substantial 50 percent, such as 10 to 50%. This range of variation arises, for example, from the natural inaccuracies and variations that occur during the manufacturing of power semiconductors. A semiconductor device with high efficiency has low on-resistance and / or low switching losses. In this context, "high efficiency" combined with "low on-resistance" and "low switching losses" means that an efficient system with minimal energy losses is present.In this context, "low" means a small fluctuation in the measured values ​​for the turn-on resistance and the switching loss, which lie within a narrow range. For example, fluctuations of only a few percentage points or even only within a very narrow range of, say, 1 to 5% are conceivable.

[0011] A semiconductor component power class is defined for each semiconductor component through final inspection or traceability. The semiconductor component power class can range, for example, from a low-power semiconductor component to a high-power semiconductor component. For a power module with, for example, N semiconductor components, the semiconductor components are sorted into N (for the assignment of the entire power module) or N / 2 (for the assignment of the topological switch) semiconductor component power class groups, whereby a number smaller than N / 2 is also permissible, particularly in the case of a symmetrical arrangement. The low-power semiconductor component is placed in a position with the best thermal efficiency, namely in a temperature range on the substrate that exhibits the lowest heat generation.The high-performance semiconductor device is placed at the position with the worst thermal efficiency, namely in a temperature range on the substrate that exhibits the highest heat generation. The remaining semiconductor devices are placed accordingly. In an advantageous embodiment of the power module proposed according to the invention, the number N of semiconductor device power classes corresponds to the number of semiconductor devices arranged within the power module.

[0012] In an advantageous further development of the power module proposed according to the invention, wherein a number N of semiconductor device power classes corresponds to half the number of semiconductor devices arranged within the power module.

[0013] In a further advantageous embodiment of the power module proposed according to the invention, wherein the power module has a power module performance class, wherein the power module performance class is determined from a power module performance class group, wherein the power module performance class group has a defined number of power module performance classes which cover a performance range from low-performance power modules to high-performance power modules.

[0014] Furthermore, according to the invention, a power module bridge for the optimal utilization of power modules is proposed. The power module bridge comprises a power module arrangement of a number of power modules. The power module bridge is arranged on a cooler with at least one cooling medium inlet connection and at least one cooling medium outlet connection. The power module bridge is arranged on the cooler such that the low-power power module of the power module bridge is positioned on the side of the cooler where the cooling medium inlet connection is located. The high-power power module of the power module bridge is positioned on the side of the cooler where the cooling medium outlet connection is located.

[0015] Since the semiconductor component performance class is determined by the final testing of the semiconductor devices or by the traceability of each semiconductor device, the resulting performance of the power module is known. For example, a power module can be classified into a number of power module performance classes. For instance, the power modules with the "worst" performance, namely low-performance power modules, can always be positioned at the coolest points of the heatsink, specifically on the side of the heatsink where a coolant inlet port is located. A low-performance power module is defined as one in which the conduction and switching losses that occur during its operation range from a few percent to a few tens of percent, and in some cases up to 30 percent.These fluctuations arise, for example, from the variations in semiconductor components and from manufacturing-related variations, such as differences in the layer thickness of solder joints or sintered joints. The highest-performing power modules—namely, high-performance power modules from among the multiple modules used in a system—are always placed at the hottest points of the cooler, specifically on the side with the coolant outlet port. The remaining power modules are placed in the center of the cooler. A high-performance power module, unlike a low-performance power module, is characterized by a higher efficiency. The conduction and switching losses of a high-performance module are therefore significantly reduced and subject to less variation.For example, when using the high-performance power module, the line and switching losses are within a limited range with low fluctuations, for example only 1 to 3% compared to the low-performance power module.

[0016] Furthermore, a method for manufacturing a power module bridge for optimal power utilization of power modules placed within the power module bridge is described, wherein the method comprises at least the following steps: i. providing power modules, wherein the power modules are classified according to their power module performance class, wherein the power module performance class is determined from a power module performance class group, wherein the power module performance class group has a defined number of power module performance classes, which cover a performance range from low-performance power modules to high-performance power modules, and ii.Providing the power module bridge, wherein the power module bridge is arranged on a cooler having at least one coolant inlet port and at least one coolant outlet port, wherein the power module bridge is arranged on the cooler such that the low-power power module of the power module bridge is positioned on a side of the cooler where the coolant inlet port is located, and wherein the high-power power module of the power module bridge is positioned on a side of the cooler where the coolant outlet port is located.

[0017] Advantages of the invention

[0018] The solution according to the invention achieves optimal utilization of the semiconductor components in power modules and their effective cooling, offering a number of advantages. By selectively arranging the semiconductor components on the substrate according to their semiconductor component power classes, performance optimization is achieved on the one hand, and effective heat dissipation is enabled on the other. Simultaneously, the selective arrangement of the power modules on the heatsink according to their power module power class ensures efficient cooling, preventing overheating and thus contributing to increased system reliability. In summary, the optimized power utilization and cooling lead to improved overall system efficiency, resulting in energy savings and lower operating costs.

[0019] Furthermore, the battery of a battery-powered electric vehicle can be designed to take up minimal space. At the same time, it can be ensured that the vehicle's range is not only not compromised, but actually improved. This means that the effective range of the battery-electric vehicle is achieved with a battery that is more compact than usual. A space-saving battery design also leads to a reduction in manufacturing costs, as fewer materials, production components, and power components are required. Brief description of the drawings

[0020] Embodiments of the invention are explained in more detail with reference to the drawings and the following description.

[0021] They show:

[0022] Figure 1 shows a schematic representation of a power module bridge with optimized power utilization of power modules and

[0023] Figure 2 shows a schematic representation of a power module with optimized power utilization of semiconductor components.

[0024] Embodiments of the invention

[0025] In the following description of embodiments of the invention, identical or similar elements are designated by the same reference numerals, and repeated descriptions of these elements are omitted in individual cases. The figures represent the subject matter of the invention only schematically.

[0026] Figure 1 shows a schematic representation of a power module bridge 106 with optimized power utilization of a first power module 108, a second power module 110, and a third power module 112, which together form the power module bridge 106. Figure 1 also shows that the power module bridge 106 is positioned on a cooler 100. The cooler 100 has a cooling medium inlet port 102 and a cooling medium outlet port 104. For example, the cooler 100 operates on the principle of heat transfer through a medium such as water or air. In a cooler 100 with a cooling medium inlet port 102 and a cooling medium outlet port 104, a cooling medium is used as the cooling medium. Cooling medium is pumped into the cooler 100 through the cooling medium inlet port 102, where it then flows through pipes within the cooler 100 and absorbs heat from the power module bridge 106.The heated cooling medium is then discharged through the cooling medium outlet port 104. For example, a cooling process can proceed as follows, heating the cooling medium as follows: Cooling medium is supplied. Here, the cooling medium is conveyed through the cooling medium inlet port 102 to the cooler 100. At this point, the cooling medium has a lower temperature than at the cooling medium outlet port 104. It then comes into contact with the power module bridge 106. The cooling medium flows through the pipes in the cooler 100, which are in direct contact with the power module bridge 106. As it flows through the cooler 100, the cooling medium absorbs heat from the power module bridge 106, thus increasing its temperature. Due to the heat transfer from the power module bridge 106 to the cooling medium, the temperature of the cooling medium increases during the cooling process.

[0027] The heated cooling medium leaves the cooler 100 through the cooling medium outlet port 104 at a higher temperature than when it entered the cooler. The cooling process creates a first heat exchange zone 116.1, a second heat exchange zone 116.2, and a third heat exchange zone 116.3 on the power module bridge 106. This results in a temperature gradient of, for example, three heat exchange zones 116.1, 116.2, 116.3 across the power module bridge 106. The first heat exchange zone 116.1 has the lowest heat exchange area within the power module bridge 106 because it is positioned closer to the cooling medium inlet port 102, and the third heat exchange zone 116.3 has the highest heat exchange area within the power module bridge 106 because it is positioned closer to the cooling medium outlet port 104. The second heat exchange zone 116.2 is located between the first and third heat exchange areas 116.1, 116.3. Furthermore, the power module bridge 106 has an advantageously designed power module arrangement 126, which is oriented such that the power modules 108, 110, 112 form the power module bridge 106 according to a power module performance class 128. A power module performance class 128 can, for example, have a different number of performance classes, such as a low-performance power module 128.1, a medium-performance power module 128.2, and a high-performance power module 128.3. For efficient and optimal load utilization, the power modules 108, 110, 112 are arranged as a power module bridge 106 such that the low-power capable power module 128.1 is located in a first heat exchange area 116.1, namely the most efficiently cooled first heat exchange area 116.1 , is positioned near the heat inlet port 102 of the cooler 100 and the high-performance power module.

[0028] 128.3 is positioned in the least cooled third heat exchange area 116.3 near the heat outlet port 104 of the cooler 100.

[0029] Figure 1 further shows that each of the three power modules 108, 110, 112 has six semiconductor devices 118. The semiconductor devices 118 are arranged such that optimal power utilization of the semiconductor devices 118 within the power module 108, 110, 112, and thus within the power module bridge 106, is ensured. The semiconductor devices 118 of each power module 108, 110, 112 each have their own semiconductor device power class 206. The semiconductor device power class 206 can, for example, have a different number of power classes, such as a high-power semiconductor device 120, a medium-power semiconductor device 122, and a low-power semiconductor device 124.Figure 1 shows that the high-performance semiconductor device 120 is advantageously positioned within the third power module 112, which is positioned within the third heat exchange area 16.3, i.e., the area of ​​the power module bridge 106 that requires the least cooling.

[0030] Figure 2 shows a schematic representation of a power module 108, 110, 112 with optimized power utilization of the semiconductor devices 118. Figure 2 shows that the power module 108, 110, 112 has a substrate 202 on which six semiconductor devices 118 are positioned. Furthermore, Figure 2 shows a number of temperature zones 204 on the substrate 202. These are a first temperature zone 204.1, a second temperature zone 204.2, a third temperature zone 204.3, and a fourth temperature zone 204.4. The temperature zones 204 are subdivided according to the temperature gradient. The fourth temperature zone 204.4 represents the hottest area of ​​the power module 108, 110, 112, and the third temperature zone 204.4 represents the second temperature zone 204.4.

[0031] 204.3 exhibits lower heating compared to the fourth temperature range 204.4. Furthermore, it can be seen from Figure 2 that the semiconductor devices 118 have a number of four semiconductor device power classes 206. These are a first semiconductor device power class 206.1, a second semiconductor device power class 206.2, a third semiconductor device power class 206.3, and a fourth semiconductor device power class 206.4. The semiconductor devices 118 are positioned on the support substrate 202 of the power module 108, 110, 112. The semiconductor device 118 with a fourth semiconductor device performance class 206.4, which corresponds to a high-performance semiconductor device 120, is advantageously arranged in the fourth temperature range 204.4, which is the most heated area during the operation of a power module 108, 110, 112.The semiconductor device 118 with a first semiconductor device power class 206.1, which corresponds to a low-power semiconductor device 124, is advantageously arranged in the first temperature range 204.1, the area which heats up the least during the operation of a power module 108, 110, 112.

[0032] The invention is not limited to the embodiments described here and the aspects highlighted therein. Rather, within the scope specified by the claims, a multitude of modifications are possible that fall within the bounds of what is considered skilled in the art.

Claims

Claims 1. Power module (107) for optimal power utilization of semiconductor devices (118), wherein the power module (107) comprises at least the following component: a support substrate (202), wherein the support substrate (202) has a selection of temperature ranges (204), the temperature ranges (204) being classified according to a heating criterion from lowest to highest heating under an operating condition within the power module (107), and a number of semiconductor devices (118) arranged on the support substrate (202), each semiconductor device (118) having a semiconductor device power class (206), the semiconductor device power class (206) being determined from a semiconductor device power class group, the semiconductor device power class group having a defined number of semiconductor device power classes (206).which cover a performance range from low-power semiconductor devices (124) to high-power semiconductor devices (120), wherein the semiconductor devices (118) are arranged on the support substrate (202) such that the low-power semiconductor devices (124) are arranged within the temperature range (204) which exhibits the lowest heating of the heating criterion, and the high-power semiconductor devices (120) are arranged within the temperature range (204) which exhibits the highest heating of the heating criterion.

2. Power module (107) according to claim 1, wherein a number N of Semiconductor device performance classes (206) of the number of corresponding to semiconductor components (118) that are arranged within the power module (107).

3. Power module (107) according to claim 1, wherein a number N of semiconductor device power classes (206) corresponds to half of the number of semiconductor devices (118) arranged within the power module (107).

4. Power module (107) according to one of the preceding claims, wherein the power module (107) has a power module performance class (128), wherein the power module performance class (128) is determined from a power module performance class group, wherein the power module performance class group has a defined number of power module performance classes (128) which cover a performance range from low-performance power modules (128.1) to high-performance power modules (128.3).

5. Power module bridge (106) for optimal power utilization of power modules (107), wherein the power module bridge (106) comprises a power module arrangement (126) of a number of power modules (107) according to any one of claims 1 to 4, wherein the power module bridge (106) is arranged on a cooler (100) with at least one cooling medium inlet port (102) and at least one cooling medium outlet port (104), wherein the power module bridge (106) is arranged on the cooler (100) such that the low-power power module (128.1) of the power module bridge (106) is positioned on a side of the cooler (100) on which the cooling medium inlet port (102) is located, wherein the high-power power module (128.3) of the power module bridge (106) is positioned on a side of the cooler (100) on which the cooling medium outlet port (104) is located.

6. Method for manufacturing a power module bridge (106) for optimal power utilization from within the Power module bridge (106) placed power modules (107), the method comprising at least the following steps: i. providing power modules (107), wherein the power modules (107) are classified according to their power module performance class (128), the power module performance class (128) being determined from a power module performance class group, the power module performance class group having a defined number of power module performance classes (128) covering a performance range from low-performance power modules (128.1) to high-performance power modules (128.3), and ii.Providing the power module bridge (106) wherein the power module bridge (106) is arranged on a cooler (100) having at least one cooling medium inlet port (102) and at least one cooling medium outlet port (104), wherein the power module bridge (106) is arranged on the cooler (100) such that the low-power power module (128.1) of the power module bridge (106) is positioned on a side of the cooler (100) on which the cooling medium inlet port (102) is located, wherein the high-power power module (128.3) of the power module bridge (106) is positioned on a side of the cooler (100) on which the cooling medium outlet port (104) is located.

Citation Information

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