Getter activation
A eutectic system on getter layers in semiconductor apparatuses controls activation at 278 °C, addressing early activation issues and high-temperature damage, ensuring efficient impurity absorption and stable vacuum levels.
Patent Information
- Application Number
- PCT/FI2025/050269
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-05-28
- Filing Date
- 2025-05-22
- Publication Date
- 2025-12-04
AI Technical Summary
Existing getter layers in semiconductor apparatuses activate too early during packaging, leading to improper functioning and are often activated at high temperatures that can damage the apparatus, necessitating a solution to control activation and reduce temperature exposure.
Employing a eutectic system comprising materials like tin and gold on the getter layer to protect it until activation, allowing controlled activation at a lower temperature (278 °C) by forming spheres that expose the getter layer for efficient absorption of impurities.
The eutectic system effectively reduces early activation, maintains functionality, and allows for stable vacuum levels by absorbing impurities at a controlled temperature, avoiding high-temperature damage and ensuring efficient getter performance.
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Figure FI2025050269_04122025_PF_FP_ABST
Abstract
Description
[0001] GETTER ACTIVATION
[0002] TECHNICAL FIELD
[0003] The present disclosure generally relates to the field of semiconductors and semiconductor apparatuses. The disclosure relates particularly, though not exclusively, to getter layer(s).
[0004] BACKGROUND
[0005] This section illustrates useful background information without admission of any technique described herein representative of the state of the art.
[0006] Typically, semiconductor apparatuses, such as resonators, are packaged at the final stages of their manufacturing processes. Typically, the semiconductor apparatuses are packaged via bonding in well-defined conditions, such as in a vacuum. The purpose of packaging is generally to ensure that the semiconductor apparatus itself is protected inside an enclosure formed during said bonding and therefore also to ensure semiconductor apparatus performance throughout its lifetime.
[0007] Matter, such as impurities or unwanted gas molecules, within the enclosure formed during said bonding may reduce the semiconductor apparatus performance and negatively affect the vacuum level if present. One manner to remedy this is to employ a getter layer that is configured to absorb the unwanted matter from within the enclosure. Commonly, the getter layer activates during the bonding process. The getter layer gets often activated by itself too early, which results to it no longer functioning properly within the enclosure of the apparatus packaging.
[0008] Further, there has been ongoing efforts to reduce the activation temperature of the getter layer. For some getter materials, as high as 450 °C temperature is needed to activate the getter layer. Semiconductor apparatuses typically cannot withstand such high temperatures without getting damaged. SUMMARY
[0009] The appended claims define the scope of protection. Any examples and technical descriptions of apparatuses, products and / or methods in the description and / or drawings not covered by the claims are presented not as embodiments of the invention but as background art or examples useful for understanding the invention.
[0010] It is an object of certain embodiments of the present disclosure to provide a scheme to solve at least some of the problems related to the prior art. Accordingly, certain disclosed embodiments provide for an ingenious apparatus, and an ingenious method for using said apparatus in getter activation.
[0011] According to a first example aspect of the present disclosure there is provided a semiconductor apparatus, comprising a getter layer configured to absorb matter; and a eutectic system on the getter layer.
[0012] In certain embodiments, the eutectic system is a eutectic mixture. In certain embodiments, the eutectic mixture is a eutectic alloy. In certain embodiments, the eutectic system comprises at least two materials. In certain embodiments, the eutectic system comprises a mixture of at least two materials. In certain embodiments, the eutectic system comprises a plurality of materials, such as three, four or five materials. In certain embodiments, the eutectic system comprises material layers. In certain embodiments, the eutectic system comprises at least two material layers. In certain embodiments, the eutectic system comprises a plurality of material layers. In certain embodiments, the eutectic system comprises materials that are configured to form an eutectic mixture (alloy).
[0013] In certain embodiments, said materials of the eutectic system comprise tin, Sn and gold, Au. In certain embodiments, said materials of the eutectic system consists of tin, Sn and gold, Au.
[0014] In certain embodiments, the eutectic system comprises at least two material layers atop one another (deposited atop one another, on top one another, in a pile, in a sandwich-type configuration). In certain embodiments, the eutectic system comprises at least two different material layers atop one another. In certain embodiments, the eutectic system comprises at least two pure material layers atop one another. In certain embodiments, the eutectic system is (resides, is provided) on the getter layer, wherein the eutectic system comprises at least two material layers atop one another. In certain embodiments, the eutectic system is on the getter layer, wherein the eutectic system comprises at least two material layers atop one another, wherein the material layers are of different materials (compared to one another, in comparison to each other, with one another, with each other). In certain embodiments, the at least two (pure) material layers of the eutectic system are configured to merge (together, to one another, into a mixture) and form a eutectic mixture. In certain embodiments, upon elevating the temperature, the at least two (pure) material layers of the eutectic system are configured to merge and form a eutectic mixture.
[0015] In certain embodiments, the eutectic system is (deposited, fabricated) on the getter layer. In certain embodiments, the eutectic system covers the getter layer. In certain embodiments, the eutectic system covers the getter layer completely. In certain embodiments, the eutectic system is patterned. In certain embodiments, the eutectic system is patterned via lithography. In certain embodiments, the eutectic system covers the getter layer partially. In certain embodiments, the getter layer comprises oxidation (surface oxide(s)). In certain embodiments, the getter layer comprises oxidation in parts not covered by the eutectic system. In certain embodiments, the eutectic system is configured to protect the getter layer until an activation of the eutectic system occurs. In certain embodiments, said activation occurs in a eutectic temperature of the eutectic system.
[0016] In certain embodiments, the getter layer is of non-wettable material. In certain embodiments, the getter layer is a non-evaporable getter (NEG). In certain embodiments, the getter layer is of a material that has tendency to absorb (to chemically react with) other matter. In certain embodiments, the getter layer is of metal. In certain embodiments, the getter layer is of metal, such as titanium, Ti. In certain embodiments, the getter layer is of titanium, Ti. In certain embodiments, the getter layer is of zirconium Zr. In certain embodiments, the getter layer is of niobium Nb. In certain embodiments, the getter layer is of tantalum Ta. In certain embodiments, the getter layer is of vanadium V. In certain embodiments, the getter layer is of aluminium Al. In certain embodiments, the getter layer is of chromium Cr. In certain embodiments, the getter layer is of iron Fe. In certain embodiments, the getter layer is of yttrium Y. In certain embodiments, the getter layer is of manganese Mn. In certain embodiments, the getter layer is of cobalt Co. In certain embodiments, the getter layer is of nickel Ni. In certain embodiments, the getter layer comprises (is of) titanium Ti, zirconium Zr, niobium Nb, tantalum Ta, vanadium V, aluminium Al, chromium Cr, iron Fe, yttrium Y, manganese Mn, cobalt Co, nickel Ni, and / or alloys of these metals. In certain embodiments, the getter layer material is selected from titanium, Ti, zirconium Zr, niobium Nb, tantalum Ta, vanadium V, aluminium Al, chromium Cr, iron Fe, yttrium Y, manganese Mn, cobalt Co, nickel Ni, and alloys of these metals.
[0017] In certain embodiments, the semiconductor apparatus comprises at least one wettable material patch (area, parts of a layer) between the getter layer and the eutectic system. In certain embodiments, the semiconductor apparatus comprises at least one wettable material patch on the getter layer. In certain embodiments, the semiconductor apparatus comprises at least one wettable material patch under the eutectic system. In certain embodiments, the semiconductor apparatus comprises a plurality of wettable material patches. In certain embodiments, the wettable material is of platinum, Pt. In certain embodiments, the wettable material is patterned. In certain embodiments, the wettable material is patterned to form said patches. In certain embodiments, the wettable material is patterned via lithography.
[0018] In certain embodiments, the semiconductor apparatus is on a substrate. In certain embodiments, the resonator is fabricated on a substrate. In certain embodiments, the substrate is a wafer. In certain embodiments, the substrate is a semiconductor wafer. In certain embodiments, the substrate is a silicon wafer (silicon layer). In certain embodiments, the substrate comprises a silicon body. In certain embodiments, the substrate comprises a portion of a wafer (a portion of a semiconductor wafer). In certain embodiments, the getter layer is on a substrate. In certain embodiments, the getter layer is fabricated on a substrate. In certain embodiments, the semiconductor apparatus comprises a material stack, the material stack comprising a substrate (a silicon layer), a getter layer on top of the substrate, and a eutectic system on top of the getter layer.
[0019] In certain embodiments, the semiconductor apparatus comprises an enclosure. In certain embodiments, the semiconductor apparatus comprises a hermetically sealed enclosure. In certain embodiments, the semiconductor apparatus comprises a first wafer and a second wafer. In certain embodiments, the semiconductor apparatus comprises a first wafer and a second wafer bonded together to form an enclosure. In certain embodiments, the first wafer is a wafer substrate. In certain embodiments, the second wafer is a wafer substrate. In certain embodiments, the first wafer is a silicon wafer. In certain embodiments, the second wafer is a silicon wafer. In certain embodiments, the first wafer is a silicon on insulator, SOI, wafer. In certain embodiments, the second wafer is a silicon on insulator, SOI, wafer.
[0020] In certain embodiments, the semiconductor apparatus comprises a resonator. In certain embodiments, the semiconductor apparatus is a beam resonator. In certain embodiments, the semiconductor apparatus is a stacked beam resonator. In certain embodiments, the semiconductor apparatus comprises a microelectromechanical systems, MEMS, resonator. In certain embodiments, the semiconductor apparatus is adapted to resonate in an in-plane resonance mode. In certain embodiments, the the semiconductor apparatus is adapted to resonate in a length extensional resonance mode. In certain embodiments, the semiconductor apparatus is adapted to resonate in an in-plane length extensional resonance mode. In certain alternative embodiments, the semiconductor apparatus is adapted to resonate in an out of plane resonance mode. In certain embodiments, the semiconductor apparatus is adapted to resonate in a Lamb wave resonance mode. In certain embodiments, the semiconductor apparatus is adapted to resonate in a contour resonance mode. In certain embodiments, the semiconductor apparatus is adapted to resonate in a flexural resonance mode.
[0021] According to a second example aspect of the invention there is provided a method for absorbing matter, the method comprising providing the semiconductor apparatus according to the first example aspect; and activating the getter layer.
[0022] In certain embodiments, said activating occurs in a eutectic temperature of the eutectic system. In certain embodiments, said activating comprises elevating temperature to the eutectic temperature of the eutectic system. In certain embodiments, said activating comprises elevating temperature to the eutectic temperature of the eutectic system or above. In certain embodiments, the eutectic system comprises at least two materials. In certain embodiments, the eutectic system comprises tin, Sn and gold, Au. In certain embodiments, said activating comprises elevating temperature to the eutectic temperature of 278 °C or above.
[0023] In certain embodiments, said activating comprises exposing the getter layer from underneath the eutectic system. In certain embodiments, said exposing comprises no diffusion of the eutectic system into the getter layer. In certain embodiments, said activating comprises a solid-liquid phase transformation of the eutectic system. In certain embodiments, said activating comprises forming spheres (droplets, balls) of the eutectic system. In certain embodiments, said forming spheres of the eutectic system exposes the getter layer. In certain embodiments, said forming spheres of the eutectic system exposes the getter layer from underneath the eutectic system.
[0024] In certain embodiments, the method comprises providing the getter layer is on a substrate. In certain embodiments, the method comprises fabricating the getter layer on a substrate. In certain embodiments, the method comprises providing (fabricating) the semiconductor apparatus comprising a material stack, the material stack comprising a substrate (a silicon layer), a getter layer on top of the substrate, and a eutectic system on top of the getter layer.
[0025] In certain embodiments, the method comprises providing the semiconductor apparatus comprising an enclosure. In certain embodiments, the method comprises providing the semiconductor apparatus comprising a hermetically sealed enclosure. In certain embodiments, the method comprises providing the semiconductor apparatus comprising a first wafer and a second wafer. In certain embodiments, the method comprises providing the semiconductor apparatus comprising a first wafer and a second wafer bonded together to form an enclosure. In certain embodiments, the method comprises absorbing matter from an enclosure of the semiconductor apparatus. In certain embodiments, the method comprises absorbing matter using said getter layer. In certain embodiments, the method comprises absorbing matter using said getter layer exposed during said activation.
[0026] In certain embodiments, the method comprises bonding the first wafer and the second wafer. In certain embodiments, the method comprises bonding the first wafer and the second wafer via thermocompression bonding. In certain embodiments, the method comprises bonding the first wafer and the second wafer via Au-Au thermocompression bonding. In certain embodiments, the method comprises bonding the first wafer and the second wafer via eutectic bonding, or flip chip bonding. In certain alternative embodiments, the method comprises bonding the first wafer and the second wafer via glass frit bonding, anodic bonding or adhesive bonding.
[0027] In certain embodiments, the method comprises activating the getter layer during the bonding. In certain embodiments, the method comprises activating the getter layer after bonding. In certain embodiments, the method comprises activating the getter layer as a separate step from bonding.
[0028] In certain embodiments, the method comprises providing the semiconductor apparatus comprising the eutectic system covering the getter layer partially. In certain embodiments, the method comprises providing the semiconductor apparatus comprising the getter layer comprising oxidation (surface oxide(s)) in parts not covered by the eutectic system. In certain embodiments, said activating comprises forming spheres of the eutectic system to parts not covered by oxidation. In certain embodiments, said forming spheres of the eutectic system exposes the getter layer (from area(s) between said spheres and said oxidation).
[0029] In certain embodiments, the method comprises providing the semiconductor apparatus comprising at least one wettable material patch between the getter layer and the eutectic system. In certain embodiments, said activating comprises forming spheres of the eutectic system onto the wettable material patch(es). In certain embodiments, the method comprises the eutectic system gravitating towards the wettable material patch(es). In certain embodiments, said forming spheres of the eutectic system onto the wettable material patch(es) exposes the getter layer (from area(s) not covered by said wettable material patch(es)). In accordance with certain embodiments, embodiments of any of the first and / or second aspect are provided, the embodiments comprising subject matter of any single embodiment presented in connection with the first and / or second aspect, or the embodiments comprising subject matter of any of the embodiments presented in connection with the first and / or second aspect combined with subject matter presented in any other embodiment or embodiments.
[0030] Different non-binding example aspects and embodiments have been illustrated in the foregoing. The embodiments in the foregoing are used merely to explain selected aspects or steps that may be utilized in different implementations. Some embodiments may be presented only with reference to certain example aspects. It should be appreciated that corresponding embodiments may apply to other example aspects as well. In particular, the embodiments described in the context of the first aspect are applicable to each further aspect. Any appropriate combinations of the embodiments may be formed.
[0031] BRIEF DESCRIPTION OF THE FIGURES
[0032] Some example embodiments will be described with reference to the accompanying figures, in which:
[0033] Fig. 1a schematically shows an apparatus certain example embodiments comprising a general getter;
[0034] Fig. 1 b schematically shows an apparatus certain example embodiments comprising a general getter activated;
[0035] Fig. 2 shows a graph demonstrating the nature of eutectic mixtures;
[0036] Fig. 3a schematically shows an apparatus comprising a getter and a eutectic system according to an example embodiment;
[0037] Fig. 3b schematically shows an apparatus comprising a getter activated and a eutectic system according to an example embodiment;
[0038] Fig. 4a schematically shows an apparatus comprising a getter, a eutectic system and oxidation according to an example embodiment;
[0039] Fig. 4b schematically shows an apparatus comprising a getter activated, a eutectic system and oxidation according to an example embodiment;
[0040] Fig. 5a schematically shows an apparatus comprising a getter, a eutectic system and a wettable material according to an example embodiment; and
[0041] Fig. 5b schematically shows an apparatus comprising a getter activated, a eutectic system and a wettable material according to an example embodiment. DETAILED DESCRIPTION
[0042] In the following description, like reference signs denote like elements or steps.
[0043] As used herein, the term a semiconductor apparatus refers to any kind of apparatus or device that may appear in a semiconductor industry, such as a chip, circuitry, microchip, microprocessor, filter, silicon chip, computer chip, resonator, sensor, accelerometer, gyroscope, actuator and process-control unit, vacuum tube or alike. In certain embodiments, the semiconductor apparatus has been packaged. In certain embodiments, the semiconductor apparatus is a MEMS apparatus.
[0044] As used herein, the term eutectic mixture (or eutectic alloy) refers to a specific composition of at least two solid components that produces a change of phase from solid to liquid at a certain temperature. Thus, the eutectic mixture refers to a mixture having a specific sold- liquid transformation temperature. Further, the term a eutectic temperature (or eutectic point) refers to a well-defined temperature at which a solid-liquid phase transformation of the eutectic mixture occurs. The eutectic temperature is lower than the melting points of the two components of said mixture in pure form.
[0045] As used herein, the term eutectic system refers to the material configuration forming or within the eutectic mixture. It should be noted that the eutectic system may be in a form of separate layers (prior to activation), or in a form of a eutectic mixture (during or after said activation).
[0046] As used herein, the term activation, or activation of a getter layer (“gettering") refers to a phenomenon wherein the apparatus comprising a getter layer is heated to an activation temperature. Upon activation the getter layer begins to absorb matter. Prior to activation the getter layer does not (typically) absorb matter. Conventionally, the activation temperature is where the surface oxide(s) formed on the getter layer dissolve. Following that the “fresh” getter layer is exposed at the surface. Conventionally, said activation temperatures are significantly high, such as 500 °C.
[0047] As used herein, the term wettable refers to a tendency of another material to gravitate towards and to spread on a solid (wettable) surface. As used herein, the term non-wettable refers to the opposite of it, meaning a tendency to not spread on said (non-wettable) surface.
[0048] Fig. 1a schematically shows a semiconductor apparatus according to certain example embodiments comprising a general getter. Fig. 1 b schematically shows the same semiconductor apparatus according to certain example embodiments comprising a general getter activated. In certain embodiments, the semiconductor apparatus comprises a first wafer 100 and a second wafer 200. In certain embodiments, the first wafer 100 and the second wafer are bonded together to form an enclosure 300. In certain embodiments, the enclosure 300 is hermetically sealed.
[0049] In certain embodiments, the first wafer 100 comprises an insulating layer 101. In certain embodiments, the insulating layer 101 is of silicon dioxide, SiO2. In certain embodiments, the insulating layer 101 extends to both sides of the first wafer 100. In certain embodiments, the first wafer 100 comprises through silicon vias (TSV) 102. In certain embodiments, the first wafer 100 comprises contact pads 103. In certain embodiments, the contact pads 103 are of conductive material, such as gold, Au. In certain embodiments, the contact pads 103 are adapted to extend to the through silicon vias 102. In certain embodiments, the through silicon vias 102 and the contact pads 103 provide electrical feedthrough through the first wafer 100.
[0050] In certain embodiments, the second wafer 200 comprises an insulating layer 201. In certain embodiments, the insulating layer 201 is of silicon dioxide, SiO2. In certain embodiments, the second wafer 200 comprises a conducting layer 202 on top of the insulating layer 201 . In certain embodiments, the conducting layer 202 is of conducting material, such as W, Si or Mo. In alternative embodiments, the conducting layer 202 is of highly doped silicon (such as highly doped single-crystalline silicon). Highly doped in the context may refer to an average doping concentration of at least 2x1019crrr3, or at least 1x102°crrr3in certain embodiments. In certain embodiments, the second wafer comprises a piezoelectric layer 203 on top of the conducting layer 202. In certain embodiments, the piezoelectric layer 203 is of aluminum nitride, AIN.
[0051] In certain embodiments, the semiconductor apparatus comprises bonding areas 204. The bonding areas provide contact between the first wafer 100 and the second wafer 200 upon bonding. In certain embodiments, the semiconductor apparatus comprises electrical contact areas 205 from the first wafer 100 to the second wafer 200. In certain embodiments, the electrical contact areas are of conductive material. In certain embodiments, the semiconductor apparatus comprises a cavity 206.
[0052] In certain embodiments, the semiconductor apparatus comprises a microelectromechanical systems, MEMS, resonator (not shown). In certain embodiments, the resonator resides at the cavity 206. In certain embodiments, the resonator is adapted to resonate in an in-plane length extensional resonance mode at said cavity 206.
[0053] In certain embodiments, the semiconductor apparatus comprises a getter layer G. In certain embodiments, the first wafer 100 comprises the getter layer G as shown in Figs. 1 a and 1 b. In other embodiments, the second wafer may comprise a getter layer (not shown).
[0054] As shown in Fig. 1 a, the enclosure 300 comprises unwanted matter M. In certain embodiments, the unwanted matter M is gas molecules, impurities, or alike. As shown in Fig. 1 b, upon elevating the temperature, the getter layer G activates. In certain embodiments, the getter layer G absorbs matter M from within the enclosure 300. In certain embodiments, the getter layer G contributes to providing stable vacuum level within the enclosure 300.
[0055] Fig. 2 shows a graph demonstrating the nature of eutectic mixtures via a fictitious binary mixture having a eutectic point PE. The vertical axis of the graph shows temperature T. The horizontal axis shows a composition (% ratio) of a mixture comprising materials A and B. L denotes liquid state of a material, a denotes a solid solution of material A. 0 denotes a solid solution of material B.
[0056] Herein the materials A and B form a eutectic mixture at a specific composition A / BE. The eutectic composition A / BE is only reached at a specific temperature, at a eutectic temperature TE. At the eutectic temperature TE, a solid-liquid phase transformation of the eutectic composition A / BE occurs and the eutectic mixture is formed.
[0057] Fig. 3a schematically shows a semiconductor apparatus comprising a getter and a eutectic system according to an example embodiment. Fig. 3b schematically shows the same semiconductor apparatus comprising the getter activated and the eutectic system according to an example embodiment. In certain embodiments, the semiconductor apparatus comprises a wafer 100 (the first wafer as shown in Figs. 1a and 1 b). In certain embodiments, the wafer 100 is a silicon wafer. In certain embodiments, the semiconductor apparatus comprises an insulating layer 101 on top of the wafer 100.
[0058] In certain embodiments, the semiconductor apparatus comprises a getter layer G configured to absorb matter. In certain embodiments, the getter layer is of a material that has tendency to absorb (to chemically react with) other matter. In certain embodiments, the getter layer is of titanium, Ti. In certain embodiments, the getter layer G is deposited via liftoff technique (such as using thick tape resist). As shown in Fig. 3a, the semiconductor apparatus comprises a eutectic system E on the getter layer G. In certain embodiments, the eutectic system E comprises at least two material layers A and B. In certain embodiments, the eutectic system E (materials A and B) is deposited onto the getter layer G via sputtering or evaporation.
[0059] In certain embodiments, the materials A and B are configured to form a eutectic mixture. In certain embodiments, the material A is of gold, Au. In certain embodiments, the material B is of tin, Sn. In certain embodiments, materials A and B are protective materials for the getter layer G. In certain embodiments, the eutectic system E covers the getter layer G.
[0060] In certain embodiments, the eutectic system E is configured to protect the getter layer G until an activation of the eutectic system E occurs. In certain embodiments, said activation occurs in a eutectic temperature of the eutectic system E. In certain embodiments, said activating comprises elevating temperature to the eutectic temperature of the eutectic system or above. In the example embodiments of Figs. 3a and 3b, wherein the materials A and B forming the eutectic system E are Au and Sn, the getter layer G activates at 278 °C.
[0061] As shown in Fig. 3b, said activating comprises exposing the getter layer G from underneath the eutectic system E in accordance with certain embodiments. In certain embodiments, said exposing comprises no diffusion of the eutectic system E into the getter layer E. Instead, said activating comprises forming spheres (droplets, balls) of the eutectic system E. In certain embodiments, the spheres of the system E form on the surface of the getter layer G. In certain embodiments, said forming spheres of the eutectic system E exposes the getter layer G from underneath it.
[0062] In certain embodiments, upon elevating the temperature, the (pure) materials A and B of the eutectic system E merge and form a eutectic mixture. When the temperature has risen above the eutectic temperature of that eutectic mixture, the solid-liquid phase transformation occurs. In the context of the present disclosure, the activation of the getter layer refers to the situation of the eutectic system E retreating from the getter layer G, thus exposing the getter layer G (by forming said spheres). Once the getter layer G is exposed, the getter layer G is capable of absorbing matter.
[0063] In certain embodiments, the thicknesses of material layers (amounts of materials) A and B are chosen such that they are in correct relation to each other in order to form eutectic mixture. In the example embodiments of Figs. 3a and 3b, wherein the materials A and B forming the eutectic system E are Au and Sn, the thickness ratio of Au / Sn is 80 / 20. Accordingly, and as shown in Figs. 3a and 3b, the semiconductor apparatus comprises the getter layer G configured to absorb matter and the eutectic system E on the getter layer G. Herein is further provided a method for absorbing matter, the method comprising providing said semiconductor apparatus, and activating the getter layer G.
[0064] Fig. 4a schematically shows a semiconductor apparatus comprising a getter, a eutectic system and oxidation according to an example embodiment. Fig. 4b schematically shows the same semiconductor apparatus comprising the getter activated, the eutectic system and oxidation according to an example embodiment. In certain embodiments, the semiconductor apparatus comprises a wafer 100 (the first wafer as shown in Figs. 1a and 1 b). In certain embodiments, the semiconductor apparatus comprises an insulating layer 101 on top of the wafer 100. The semiconductor apparatus comprises a getter layer G.
[0065] As shown on Fig. 4a, the eutectic system comprising materials A and B is patterned in accordance with certain embodiments. In certain embodiments, the eutectic system comprising materials A and B covers the getter layer G partially.
[0066] In certain embodiments, the getter layer G comprises oxidation Go. In certain embodiments, surface oxide(s) form onto the surface of the getter layer G. In certain embodiments, surface oxide(s) form onto the parts of the getter layer G, where the getter layer G is exposed. In certain embodiments, the getter layer G comprises oxidation in parts not covered by the eutectic system.
[0067] As shown in Fig. 4b, upon activating spheres of the eutectic system E form to parts of the getter layer G not covered by oxidation (surface oxide(s)). In certain embodiments, said forming spheres of the eutectic system E exposes the getter layer G from areas between said spheres and said oxidation.
[0068] Fig. 5a schematically shows a semiconductor apparatus comprising a getter, a eutectic system and a wettable material according to an example embodiment. Fig. 5b schematically shows the same semiconductor apparatus comprising the getter activated, the eutectic system and the wettable material according to an example embodiment. In certain embodiments, the semiconductor apparatus comprises a wafer 100 (the first wafer as shown in Figs. 1a and 1 b). In certain embodiments, the semiconductor apparatus comprises an insulating layer 101 on top of the wafer 100. The semiconductor apparatus comprises a getter layer G. In certain embodiments, the getter layer G is of non-wettable material. In Figs. 5a and 5b, the eutectic system E has been drawn as a single layer for the purpose of clarity of the figures, even though the eutectic system E comprises at least two materials.
[0069] As shown in Fig. 5a, the semiconductor apparatus comprises at least one wettable material patch W between the getter layer G and the eutectic system E in accordance with certain embodiments. In this example embodiment, the semiconductor apparatus comprises a plurality of wettable material patches W. In certain embodiments, the wettable material W is of platinum, Pt.
[0070] As shown in Fig. 5b, upon activating spheres of the eutectic system E form onto the wettable material patches W in accordance with certain embodiments. In certain embodiments, the eutectic system E gravitates towards the wettable material patches W during activation. In certain embodiments, said forming spheres of the eutectic system E onto the wettable material patches W exposes the getter layer G from areas not covered by said wettable material patches W.
[0071] Without limiting the scope and the interpretation of the patent claims, certain technical effects of one or more of the example embodiments disclosed herein are listed in the following. A technical effect of the invention is providing a scheme to reduce the concentration of unwanted matter, such as impurities or gas molecules, from within the enclosure of the semiconductor apparatus packaging. A further technical effect is providing stable vacuum level within the semiconductor apparatus packaging.
[0072] A further technical effect is reducing the activation temperature needed for the getter layer and thus avoiding usage of too high temperatures in getter layer activation. Semiconductor apparatuses typically cannot withstand very high temperatures.
[0073] A further technical effect is avoiding the getter layer being activated too early in the bonding, such as during the pre-heating or baking step. Too early activation of the getter layer renders it no longer functional since the getter will be “spent”.
[0074] A further technical effect is providing a fast and strong gettering (absorption) activity of the getter layer since the getter layer covered with the eutectic system is diffusion free. The conventional getter layer relies on the thermally activated dissolution of surface oxides (diffusion of the oxidized surface into the bulk) in order to be activated. In the present disclosure the getter layer is exposed “fresh”, and the getter layer starts absorbing unwanted matter immediately. A further technical effect is allowing controlled activation of the getter at a specific temperature, i.e. at the eutectic temperature. The eutectic temperature ensures that the getter can be “turned on” at a very precise temperature. By choosing the materials forming the eutectic mixture, the activation temperature can be specifically designed to best suit the process.
[0075] A further technical effect is enabling cheap and effortless manufacturing of the semiconductor apparatus according to the first aspect since the apparatus enables simple deposition processes (at least in comparison to conventional getters that may be expansive and more laborious to deposit). A further technical effect is enabling a simple patterning of the deposited layers.
[0076] Various embodiments have been presented. It should be appreciated that in this document, words comprise, include, and contain are each used as open-ended expressions with no intended exclusivity.
[0077] The foregoing description has provided by way of non-limiting examples of particular implementations and embodiments a full and informative description of the best mode presently contemplated by the inventors for carrying out the invention. It is however clear to a person skilled in the art that the invention is not restricted to details of the embodiments presented in the foregoing, but that it can be implemented in other embodiments using equivalent means or in different combinations of embodiments without deviating from the characteristics of the invention.
[0078] Furthermore, some of the features of the afore-disclosed example embodiments may be used to advantage without the corresponding use of other features. As such, the foregoing description shall be considered as merely illustrative of the principles of the present invention, and not in limitation thereof. Hence, the scope of the invention is only restricted by the appended patent claims.
Claims
CLAIMS1 . A semiconductor apparatus, comprising a getter layer configured to absorb matter; and a eutectic system on the getter layer.
2. The apparatus of claim 1, wherein the eutectic system comprises at least two materials.
3. The apparatus of claim 2, wherein said materials of the eutectic system comprise tin, Sn and gold, Au.
4. The apparatus of any preceding claim, wherein the getter layer is of non-wettable material.
5. The apparatus of any preceding claim, wherein the getter layer is of metal, such as of titanium, Ti.
6. The apparatus of any preceding claim, wherein the getter layer is on a substrate.
7. The apparatus of any preceding claim, wherein the eutectic system is configured to protect the getter layer until an activation of the eutectic system occurs.
8. The apparatus of any preceding claim, wherein the semiconductor apparatus comprises a microelectromechanical systems, MEMS, resonator.
9. The apparatus of any preceding claim, wherein the semiconductor apparatus comprises at least one wettable material patch between the getter layer and the eutectic system.
10. A method for absorbing matter, the method comprising providing the semiconductor apparatus of any of claims 1-9; and activating the getter layer.11 . The method of claim 10, wherein said activating occurs in a eutectic temperature of the eutectic system.
12. The method of claim 10 or 11 , wherein said activating comprises elevating temperature to the eutectic temperature of the eutectic system.
13. The method of any claim 10-12, comprising absorbing matter from an enclosure of the semiconductor apparatus.
14. The method of any of claims 10-13, wherein said activating comprises exposing the getter layer from underneath the eutectic system.
15. The method of claim 14, wherein said exposing comprises no diffusion of the eutectic system into the getter layer.
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