Built-in substrate

Abstract

A built-in substrate (1) in which a plurality of conductive layers (CL) are laminated via insulating layers (IL) and power devices (SWH, SWL) is built in a center portion in a lamination direction (Z) is provided with: a first conductive layer (CL1) on one end side in the lamination direction (Z) having a first surface (CL1A) on which an electronic component different from the power devices (SWH, SWL) is mounted among the plurality of conductive layers (CL); a second conductive layer (CL6) on the other end side in the lamination direction (Z) having a second surface (CL6A) used as a heat dissipation surface for dissipating heat from the power devices (SWH, SWL) among the plurality of conductive layers (CL); and a third conductive layer (CL5) in which a current supplied to the power devices (SWH, SWL) flows, in which conductor patterns (5P1, 5P2) insulated from the second conductive layer (CL6) are formed, and which is provided between the power devices (SWH, SWL) and the second conductive layer (CL6) so as to face the second conductive layer (CL6).

Description

Built-in board

[0001] The present disclosure relates to a built-in substrate in which a power device is built.

[0002] In recent years, embedded boards in which electrical components are embedded in the inner layers of a board have been used. Technology relating to such embedded boards is disclosed in, for example, Japanese Patent Application Laid-Open No. 2003-222116.

[0003] Patent Document 1 describes a semiconductor device with an electric component built into a circuit board. This semiconductor device has the electric component built into a board body, a surface electric component mounted on a first surface, and a surface conductor pattern on a second surface. A first internal conductor pattern and a second internal conductor pattern, which are insulated from each other, are provided between the electric component and the second surface, and the electric component and the first internal conductor pattern are connected by a first heat transfer via, and the surface conductor pattern and the second internal conductor pattern are connected by a second heat transfer via.

[0004] Japanese Patent Application Laid-Open No. 2022-154932

[0005] In the semiconductor device described in Patent Document 1, heat from an electrical component is transferred to a surface conductor pattern via a first heat transfer via, a first internal conductor pattern, a second internal conductor pattern, and a second heat transfer via, and then dissipated to the outside. When an electrical component is energized, Joule heat is generated not only in the electrical component but also in the wiring (conductor) that conducts current to the electrical component, depending on the current value of the current. In the semiconductor device described in Patent Document 1, the conductive layer through which the current flows for the electrical component does not have the first heat transfer via or the second heat transfer via used for the heat dissipation described above. Therefore, efficient dissipation of Joule heat in the conductive layer is not anticipated, and there is room for improvement.

[0006] Therefore, there is a demand for a built-in substrate that can efficiently dissipate the heat from the conductive layer.

[0007] A characteristic configuration of the built-in substrate according to the present disclosure is an built-in substrate in which a plurality of conductive layers are stacked with insulating layers interposed therebetween, and in which a power device is built in at the center of the stacking direction, the built-in substrate including: a first conductive layer on one side of the plurality of conductive layers in the stacking direction, the first conductive layer having a first surface on which an electronic component other than the power device is mounted; a second conductive layer on the other end side of the plurality of conductive layers in the stacking direction, the second conductive layer having a second surface used as a heat dissipation surface for dissipating heat from the power device; and a third conductive layer through which a current flows to the power device, on which a conductor pattern insulated from the second conductive layer is formed, the third conductive layer being provided between the power device and the second conductive layer and facing the second conductive layer.

[0008] With this characteristic configuration, the conductor pattern of the third conductive layer, through which current flows in the power device, generates heat according to the magnitude of the current. Furthermore, the power device also generates heat due to the current flow. According to this configuration, the conductor pattern is disposed opposite the second conductive layer having the second surface used as a heat dissipation surface, so that heat from the power device and the third conductive layer including the conductor pattern can be efficiently dissipated via the second surface.

[0009] FIG. 1 is an example of a circuit diagram formed in an embedded substrate of the first embodiment; FIG. 2 is an image diagram showing a cross section of an embedded substrate of the first embodiment; FIG. 3 is a plan view of a first conductive layer of the first embodiment; FIG. 4 is a plan view of a second conductive layer of the first embodiment; FIG. 5 is a plan view of a sixth conductive layer of the first embodiment; FIG. 6 is a plan view of a second conductive layer of a modified example of the first embodiment; FIG. 7 is a plan view of a fifth conductive layer of the first embodiment; FIG. 8 is a plan view of a sixth conductive layer of the first embodiment; FIG. 9 is a plan view of a second conductive layer of a modified example of the first embodiment; FIG. 10 is a circuit diagram formed by power devices embedded in an embedded substrate of the second embodiment; FIG. 11 is an image diagram showing a cross section of an embedded substrate of the second embodiment; FIG. 12 is a plan view of a first conductive layer of the second embodiment; FIG. 13 is a plan view of a second conductive layer of the second embodiment; FIG. 14 is a plan view of a third conductive layer of the second embodiment. 1 is a plan view of a fourth conductive layer of the second embodiment; FIG. 2 is a plan view of a fifth conductive layer of the second embodiment; FIG. 3 is a plan view of a sixth conductive layer of the second embodiment; and FIG. 4 is a diagram showing a first region and a second region of the second embodiment.

[0010] 1. First Embodiment An embedded substrate according to the present disclosure is configured to be able to appropriately dissipate heat generated in a power device built into the embedded substrate and in a pattern formed on the embedded substrate. The embedded substrate 1 of this embodiment will be described below. However, the embedded substrate 1 is not limited to the following embodiment, and various modifications are possible without departing from the spirit of the invention.

[0011] FIG. 1 is a circuit diagram partially formed on an internal circuit board 1 (see FIG. 2 ) according to this embodiment. FIG. 1 shows an inverter 3 that converts DC power from a battery 2 into AC power and drives a motor M (an example of a "load"). A three-phase motor is used as the motor M. Therefore, the inverter 3 is configured with three legs 6 (hereinafter referred to as legs 6A, 6B, and 6C) each including a high-side switching element SWH (an example of a "power device") and a low-side switching element SWL (an example of a "power device") connected in series. These switching elements SWH and SWL are, for example, n-type metal-oxide-semiconductor field-effect transistors (MOS-FETs).

[0012] The three legs 6A, 6B, and 6C are connected in parallel to a power supply line 2P connected to the positive electrode of the battery 2 and a power supply line 2N connected to the negative electrode of the battery 2. In each of the legs 6A, 6B, and 6C, a drain terminal of a switching element SWH is connected to the power supply line 2P, and a source terminal of a switching element SWL is connected to the power supply line 2N. The source terminal of the switching element SWH and the drain terminal of the switching element SWL are connected to each other. A diode D is provided between the source terminal and the drain terminal of each of the switching elements SWH and SWL. The source terminal of the switching element SWH of each of the multiple legs 6A, 6B, and 6C is connected to a terminal of the motor M.

[0013] The gate terminals of the switching elements SWH and SWL are connected to the control unit 5 via the driver 4. As a result, the inverter 3 converts DC power from the battery 2 into three-phase AC power by sequentially switching between a closed state of the high-side switching element SWH of a predetermined one of the three legs and a closed state of the low-side switching element SWL of one of the remaining two legs, and an open state of the other switching elements. The motor M is driven by supplying this three-phase AC power to the inverter 3.

[0014] 2 , the built-in substrate 1 has a plurality of (six in this embodiment) conductive layers CL stacked with insulating layers IL interposed therebetween. Hereinafter, the six conductive layers CL will be referred to as conductive layer CL1, conductive layer CL2, conductive layer CL3, conductive layer CL4, conductive layer CL5, and conductive layer CL6, with the conductive layers CL1, CL2, CL3, conductive layer CL4, conductive layer CL5, and conductive layer CL6 stacked in order from top to bottom. An insulating layer IL1 is interposed between conductive layer CL1 and conductive layer CL2, an insulating layer IL2 is interposed between conductive layer CL2 and conductive layer CL3, an insulating layer IL3 is interposed between conductive layer CL3 and conductive layer CL4, an insulating layer IL4 is interposed between conductive layer CL4 and conductive layer CL5, and an insulating layer IL5 is interposed between conductive layer CL5 and conductive layer CL6.

[0015] Here, the direction in which the six conductive layers CL are stacked is referred to as the stacking direction Z. As shown in Fig. 2, the switching elements SWH and SWL of a predetermined leg 6 are built into the built-in substrate 1 in the center of the stacking direction Z. In the stacking direction Z, the conductive layer CL1 side as viewed from the switching elements SWH and SWL is referred to as the stacking direction Z1 side, and the conductive layer CL6 side as viewed from the switching elements SWH and SWL is referred to as the stacking direction Z2 side.

[0016] The conductive layer CL1 corresponds to a first conductive layer on one side in the stacking direction Z (the stacking direction Z1 side). The conductive layer CL6 corresponds to a second conductive layer on the other end side in the stacking direction Z (the stacking direction Z2 side). Furthermore, the conductive layer CL5 corresponds to a third conductive layer, as will be described in detail later.

[0017] In this embodiment, the switching elements SWH and SWL of one leg 6 of the above-mentioned three legs 6A, 6B, and 6C are provided on one built-in substrate 1. Furthermore, on one built-in substrate 1, the three switching elements SWH are provided and connected in parallel to each other, and the three switching elements SWL are provided and connected in parallel to each other.

[0018] Fig. 3 shows a plan view of the conductive layer CL1, Fig. 4 shows a plan view of the conductive layer CL2, Fig. 5 shows a plan view of the conductive layer CL3, Fig. 6 shows a plan view of the conductive layer CL4, Fig. 7 shows a plan view of the conductive layer CL5, and Fig. 8 shows a plan view of the conductive layer CL6.

[0019] As shown in FIG. 3 , the conductive layer CL1 is provided with a connector CN1 to which the power supply line 2P is connected, a connector CN2 to which the power supply line 2N is connected, a connector CN3 to which the motor M is connected, a connector CN4 to which control signals transmitted from the control unit 5 to the switching elements SWH and SWL are input to the drivers 4 (drivers 4H and 4L, described later), a connector CN5 to supply power to the driver 4H, a connector CN6 to supply power to the driver 4L, a driver 4H to drive the switching element SWH, and a driver 4L to drive the switching element SWL. Therefore, an electronic component 21 different from the switching elements SWH and SWL is mounted on a first surface CL1A on the stacking direction Z1 side of the conductive layer CL1. The electronic component 21 may be, for example, a capacitor or a resistor. In this embodiment, "connected" means "connected in a state where a current flows." In this embodiment, the first surface CL1A is a mounting surface on one end side in the stacking direction Z (the stacking direction Z1 side).

[0020] 4, the conductive layer CL2 includes a pattern 2P1 connected via a via to a land 1P1 on which the connector CN1 of the conductive layer CL1 is mounted, a pattern 2P2 connected via a via to a land 1P2 on which the connector CN2 of the conductive layer CL1 is mounted, a via 2V1 connected to a terminal of a connector CN3 of the conductive layer CL1, a via 2V2 connected to a terminal of a connector CN4 of the conductive layer CL1, a via 2V3 connected to a terminal of a connector CN5 of the conductive layer CL1, and a via 2V4 connected to a terminal of a connector CN6 of the conductive layer CL1. The conductive layer CL2 also includes a pattern 2P3 connecting the source terminal of the switching element SWH and the drain terminal of the switching element SWL. Also included are via 2V5 connected to the terminal of driver 4H on conductive layer CL1, via 2V6 connected to the terminal of driver 4L on conductive layer CL1, signal line SL1 connecting via 2V3 and via 2V5, signal line SL2 connecting via 2V4 and via 2V6, and wiring GL connecting the gate terminals of switching elements SWH and SWL to vias 2V5 and 2V6, respectively. Note that although the gate terminal side of wiring GL is indicated by an arrow, it is actually connected to the gate terminal.

[0021] The built-in substrate 1 has the switching elements SWH and SWL built in at the center in the stacking direction Z. In this embodiment, the switching elements SWH and SWL are each placed on a base member 20. The base member 20 in this embodiment is configured, for example, as a rectangular pillar or a plate. As shown in FIGS. 5 and 6 , the base member 20, the switching elements SWH, and the switching elements SWL are provided across the conductive layers CL3 and CL4.

[0022] 5, the conductive layer CL3 includes a pattern 3P1 connected to the pattern 2P1 of the conductive layer CL2 via a via, a via 3V1 connected to the via 2V1 of the conductive layer CL2, a via 3V2 connected to the via 2V2 of the conductive layer CL2, a via 3V3 connected to the via 2V5 of the conductive layer CL2, and a via 3V4 connected to the via 2V6 of the conductive layer CL2. Furthermore, the conductive layer CL3 includes a signal line SL3 connecting the vias 3V2 and 3V3 of the conductive layer CL3, and a signal line SL4 connecting the vias 3V2 and 3V4 of the conductive layer CL3.

[0023] 6, the conductive layer CL4 includes a pattern 4P1 connected to the pattern 3P1 of the conductive layer CL3 through a via, a via 4V1 connected to the via 3V1 of the conductive layer CL3, a pattern 4P2 connected to the bottom surface of the base member 20 on which the switching element SWH is placed, and a pattern 4P3 connected to the bottom surface of the base member 20 on which the switching element SWL is placed.

[0024] As shown in FIG. 7 , the conductive layer CL5 includes a conductor pattern 5P1 connected via a via to the pattern 4P1 of the conductive layer CL4 and the pattern 4P2 to which the drain terminal of the switching element SWH is connected, and a conductor pattern 5P2 connected via a via to the pattern 4P3 to which the drain terminal of the switching element SWL of the conductive layer CL4 is connected, and connected to a via 5V1 connected to the via 4V1 of the conductive layer CL4.

[0025] 8, the conductive layer CL6 includes a pattern 6P1 formed over the entire surface and insulated from each of the conductive layers CL1-CL5. This pattern 6P1 is connected to the housing of the inverter 3 via a harness or screws, for example.

[0026] Although not shown, it is preferable that the conductive layers CL1-CL5 have grounded patterns at locations different from the above-mentioned patterns and wiring.

[0027] The second surface CL6A of the conductive layer CL6 on the stacking direction Z2 side is used as a heat dissipation surface for dissipating heat from the switching elements SWH and SWL. The switching elements SWH and SWL generate heat when current is applied. This heat reaches the conductive layer CL6 via the conductive layer CL5 and the insulating layer IL5 and is dissipated from the conductive layer CL6. The insulating layer IL5 is preferably made of a material S (see FIG. 2) with high thermal conductivity to efficiently transfer heat from the conductive layer CL5 to the conductive layer CL6. That is, among the multiple insulating layers IL, the insulating layer IL5 between the conductive layer CL6 and the conductive layer CL5 is preferably made of a material with higher thermal conductivity than the other insulating layers IL1, IL2, IL3, and IL4.

[0028] As described above, the conductive layer CL5 includes the conductor pattern 5P1 connected to the drain terminal of the switching element SWH via a via and the conductor pattern 5P2 connected to the drain terminal of the switching element SWL via a via. Therefore, the conductive layer CL5 is provided with the conductor patterns 5P1 and 5P2, which are insulated from the conductive layer CL6 and through which the current flowing through the switching elements SWH and SWL flows, and is disposed between the switching elements SWH and SWL and the conductive layer CL6, facing the conductive layer CL6. The current flowing through the switching elements SWH and SWL refers to the current flowing into the switching elements SWH and SWL. In other words, the current flowing from the battery 2 via the power supply line 2P corresponds to the switching element SWH, and the current flowing from the motor M corresponds to the switching element SWL. Therefore, the conductive layer CL5 is formed with a conductor pattern 5P1 through which a current passed through the switching element SWH flows and which is insulated from the conductive layer CL6, and a conductor pattern 5P2 through which a current passed through the switching element SWL flows and which is insulated from the conductive layer CL6. Furthermore, both the conductor pattern 5P1 and the conductor pattern 5P2 are insulated from the conductive layer CL6.

[0029] In this embodiment, when the switching elements SWH, SWL and the conductive layer CL5 are viewed along the stacking direction Z, the mounting regions of the switching elements SWH, SWL are included in the conductor patterns 5P1, 5P2. "When the switching elements SWH, SWL and the conductive layer CL5 are viewed along the stacking direction Z" means that the conductive layer CL4 on which the base member 20 on which the switching elements SWH, SWL are placed is provided, and the conductive layer CL5 are viewed along the stacking direction Z. The mounting region of the switching elements SWH, SWL is not limited to the region where the switching elements SWH, SWL are provided, but is the region where the base member 20 on which the switching elements SWH, SWL are placed is mounted. 6 and 7 , when the conductive layer CL4, on which the base member 20 on which the switching elements SWH and SWL are placed, is provided, and the conductive layer CL5 are viewed along the stacking direction Z, the region where the base member 20 on which the switching elements SWH and SWL are placed is mounted is configured to be included in the conductor patterns 5P1 and 5P2 of the conductive layer CL5. That is, when the conductive layers CL4 and CL5 are viewed along the stacking direction Z, the region where the base member 20 on which the switching element SWH is placed is mounted is included in the conductor pattern 5P1 of the conductive layer CL5, and the region where the base member 20 on which the switching element SWL is placed is mounted is included in the conductor pattern 5P2 of the conductive layer CL5. This makes it easier for heat from the switching element SWH to be transferred to the conductor pattern 5P1, and easier for heat from the switching element SWL to be transferred to the conductor pattern 5P2. Therefore, heat from the switching elements SWH and SWL is transferred to the conductive layer CL6 via the conductor patterns 5P1 and 5P2, and can be dissipated.

[0030] Furthermore, in this embodiment, the switching elements SWH, SWL and the conductor patterns 5P1, 5P2 are electrically connected via vias V that are provided over the entire surface of the mounting area of ​​the switching elements SWH, SWL. That is, in the mounting area of ​​the base member 20 on which the switching elements SWH, SWL are placed, vias that connect to the conductor patterns 5P1, 5P2 of the conductive layer CL5 are formed over the entire surface. Therefore, the resistance of each of the switching elements SWH, SWL and each of the conductor patterns 5P1, 5P2 of the conductive layer CL5 can be reduced, and the amount of heat generated between the conductive layers CL4 and CL5 can be reduced.

[0031] As described above, the first surface CL1A is provided with a plurality of electrodes electrically connected to the battery 2 that supplies power to the switching elements SWH, SWL and to the motor M that is energized via the switching elements SWH, SWL, and the plurality of electrodes are electrically connected to the conductor patterns 5P1, 5P2. As a result, a relatively large current flows through the conductor patterns 5P1, 5P2, generating heat due to Joule heat, but the heat generated in the conductor patterns 5P1, 5P2 can be dissipated via the conductive layer CL5.

[0032] Next, we will explain the flow of current in the built-in substrate 1, particularly the source current and drain current of the switching elements SWH and SWL. As shown in FIG. 2 , a power supply line 2P is formed on the conductive layer CL1. The power supply line 2P is electrically connected to the conductive layer CL2 through a via provided in the insulating layer IL1. The conductive layer CL2 is electrically connected to the conductive layer CL3 through a via provided in the insulating layer IL2. The conductive layer CL3 is electrically connected to the conductive layer CL4 through a via provided in the insulating layer IL3. The conductive layer CL4 is electrically connected to the conductor pattern P1 (conductor pattern 5P1) on the conductive layer CL5 through a via provided in the insulating layer IL4. The conductor pattern P1 is electrically connected to the drain terminal of the switching element SWH through the via provided in the insulating layer IL4 and the base member 20. Therefore, the drain current ID of the switching element SWH flows from the power supply line 2P through the conductive layers CL and the vias and through the conductor pattern P1.

[0033] The source terminal of the switching element SWH is electrically connected to the conductive layer CL2 through a via provided in the insulating layer IL2, and the conductive layer CL2 is electrically connected to the conductor pattern P2 (conductor pattern 5P2) through a via provided in the insulating layer IL2, the base member 20 of the switching element SWL, and a via provided in the insulating layer IL4. Therefore, the source current IS of the switching element SWH flows from the source terminal of the switching element SWH to the conductor pattern P2 through the via provided in the insulating layer IL2, the base member 20 of the switching element SWL, and a via provided in the insulating layer IL4.

[0034] Furthermore, conductor pattern P2 is electrically connected to conductive layer CL4 through a via provided in insulating layer IL4, conductive layer CL4 is electrically connected to conductive layer CL3 through a via provided in insulating layer IL3, conductive layer CL3 is electrically connected to conductive layer CL2 through a via provided in insulating layer IL2, and conductive layer CL2 is electrically connected to conductive layer CL1 through a via provided in insulating layer IL1. This conductive layer CL1 is electrically connected to a terminal of motor M. Therefore, source current IS of switching element SWH first flows from conductive layer CL2 through conductive layer CL5 and then flows to conductive layer CL1. Furthermore, current from motor M flows from conductive layer CL1 through each conductive layer and via to conductor pattern P2 (corresponding to drain current ID of switching element SWL).

[0035] The conductor pattern P2 is electrically connected to the drain terminal of the switching element SWL via the base member 20, and the source terminal of the switching element SWL is electrically connected to the conductive layer CL2 via a via provided in the insulating layer IL2, and further electrically connected to the power supply line 2N provided on the conductive layer CL1 via a via provided in the insulating layer IL1. Therefore, the source current IS of the switching element SWL flows from the source terminal of the switching element SWL to the power supply line 2N via the via provided in the insulating layer IL2, the conductive layer CL2, and the via provided in the insulating layer IL1.

[0036] 2. Modifications of the First Embodiment Next, modifications of the built-in substrate 1 will be described.

[0037] In the first embodiment described above, the mounting regions of the switching elements SWH and SWL are included in the conductor patterns 5P1 and 5P2 when the switching elements SWH and SWL and the conductive layer CL5 are viewed along the stacking direction Z. However, when the switching elements SWH and SWL and the conductive layer CL5 are viewed along the stacking direction Z, the mounting regions of the switching elements SWH and SWL may be configured to have an area that is not included in the conductor patterns 5P1 and 5P2.

[0038] In the first embodiment, the switching elements SWH, SWL and the conductor patterns 5P1, 5P2 are described as being electrically connected to each other through the vias V provided over the entire surface of the mounting area of ​​the switching elements SWH, SWL. However, the switching elements SWH, SWL and the conductor patterns 5P1, 5P2 may be electrically connected to each other through the vias V provided in a part of the mounting area of ​​the switching elements SWH, SWL.

[0039] In the first embodiment, the first surface CL1A is provided with a plurality of electrodes electrically connected to the battery 2 that supplies power to the switching elements SWH, SWL and to the motor M that is energized via the switching elements SWH, SWL, and the plurality of electrodes is electrically connected to the conductor patterns 5P1, 5P2. However, it is also possible to configure the plurality of electrodes electrically connected to the switching elements SWH, SWL without via the conductor patterns 5P1, 5P2.

[0040] In the first embodiment, the power devices are described as switching elements SWH and SWL, but the power devices provided on the built-in substrate 1 may be a single switching element rather than multiple power devices. Furthermore, the power devices do not have to be n-type metal-oxide-semiconductor field-effect transistors (MOS-FETs), but may be p-type MOS-FETs, IGBTs (insulated gate bipolar transistors), or bipolar transistors. Furthermore, the power devices do not have to be switching elements SWH and SWL, but may be components that generate heat in response to the passage of current, such as load switches.

[0041] In the first embodiment, the motor M is used as an example of the load. However, the load does not have to be the motor M.

[0042] The conductor patterns of the conductive layers CL1-CL6 described in the first embodiment are merely examples and can be changed.

[0043] In the first embodiment, an example has been described in which the driver 4 is mounted on the built-in substrate 1. However, the driver 4 may be provided on a substrate separate from the built-in substrate 1.

[0044] The first embodiment has been described above by taking as an example a case where three switching elements SWH connected in parallel and three switching elements SWL connected in parallel, which are included in one leg 6 of the three legs 6, are provided on the built-in substrate 1. However, it is also possible to provide the switching elements SWH and SWL of the three legs 6 on the built-in substrate 1.

[0045] Fig. 9 shows a plan view of the conductive layer CL2 of such a built-in substrate 1, and Fig. 10 shows a plan view of the conductive layer CL5. The other conductive layers are the same as those in the first embodiment, and therefore their description will be omitted. Note that Figs. 9 and 10 show an example in which each of the three legs 6 includes one switching element SWH and one switching element SWL.

[0046] 9, the conductive layer CL2 includes a pattern 2P1 connected via a via to a land 1P1 on which the connector CN1 of the conductive layer CL1 is mounted, a pattern 2P2 connected via a via to a land 1P2 on which the connector CN2 of the conductive layer CL1 is mounted, a via 2V1 connected to a terminal of a connector CN3 of the conductive layer CL1, a via 2V2 connected to a terminal of a connector CN4 of the conductive layer CL1, a via 2V3 connected to a terminal of a connector CN5 of the conductive layer CL1, and a via 2V4 connected to a terminal of a connector CN6 of the conductive layer CL1. The conductive layer CL2 also includes a pattern 2P3 connecting the source terminal of the switching element SWH and the drain terminal of the switching element SWL. Also included are via 2V5 connected to the terminal of driver 4H on conductive layer CL1, via 2V6 connected to the terminal of driver 4L on conductive layer CL1, signal line SL1 connecting via 2V3 and via 2V5, signal line SL2 connecting via 2V4 and via 2V6, and wiring GL connecting the gate terminals of switching elements SWH and SWL to vias 2V5 and 2V6, respectively. Note that although the gate terminal side of wiring GL is indicated by an arrow, it is actually connected to the gate terminal.

[0047] 10 , the conductive layer CL5 includes a conductor pattern 5P1 connected via vias to the pattern 4P1 of the conductive layer CL4 and the pattern 4P2 to which the drain terminal of the switching element SWH is connected, a conductor pattern 5P2 connected via vias to the pattern 4P3 of the conductive layer CL4 to which the drain terminal of the switching element SWL is connected, a via 5V1 connected to the via 4V1 of the conductive layer CL4, and a pattern 5P3 connecting the via 5V1 of the conductive layer CL5 to the conductor pattern 5P2.

[0048] In this built-in substrate 1, as in the first embodiment, the heat generated in the conductor patterns 5P1 and 5P2 can be dissipated via the conductive layer CL5.

[0049] In the first embodiment described above, the first surface CL1A has been described as being a mounting surface on one end side in the stacking direction Z (the stacking direction Z1 side). However, the first surface CL1A may be a mounting surface of an inner layer in the built-in substrate 1. That is, the connector CN1 to which the power supply line 2P is connected, the connector CN2 to which the power supply line 2N is connected, the connector CN3 to which the motor M is connected, the connector CN4 that inputs control signals transmitted from the control unit 5 to the switching elements SWH and SWL to the drivers 4H and 4L, the connector CN5 that supplies power to the driver 4H, the connector CN6 that supplies power to the driver 4L, the driver 4H for driving the switching element SWH, and the driver 4L for driving the switching element SWL may be mounted on any of the conductive layers CL2, CL3, CL4, and CL5.

[0050] In the first embodiment, the insulating layer IL5 between the conductive layer CL6 and the conductive layer CL5 is described as being made of a material having a higher thermal conductivity than the other insulating layers IL1, IL2, IL3, and IL4. However, the insulating layer IL5 between the conductive layer CL6 and the conductive layer CL5 can be made of a material having a thermal conductivity similar to that of the other insulating layers IL1, IL2, IL3, and IL4, or can be made of a material having a lower thermal conductivity than the other insulating layers IL1, IL2, IL3, and IL4.

[0051] In the first embodiment, the conductive layer CL6 is described as being used to dissipate heat from the switching elements SWH and SWL. However, the conductive layer CL6 can also be used as a conductive layer CL through which current flows. In this case, the insulating layer IL5 between the conductive layers CL5 and CL6 can be used as an insulating layer IL that provides insulation between the two conductive layers CL, similar to the other insulating layers IL1, IL2, IL3, and IL4, and a heat transfer sheet can be provided on the stacking direction Z2 side of the conductive layer CL6. In this configuration, it is possible to reduce the influence of noise on the components located on the stacking direction Z2 side of the heat transfer sheet and on the switching elements SWH and SWL.

[0052] 3. Overview of First Embodiment The following provides an overview of the built-in substrate 1 described above.

[0053] (1) The built-in substrate 1 is a built-in substrate 1 in which a plurality of conductive layers CL are stacked with insulating layers IL interposed therebetween, and in which switching elements SWH, SWL (power devices) are built in at the center of the stacking direction Z. Of the plurality of conductive layers CL, a conductive layer CL1 (first conductive layer) on one side of the stacking direction Z has a first surface CL1A on which electronic components 21 different from the switching elements SWH, SWL are mounted; of the plurality of conductive layers CL, a conductive layer CL6 (second conductive layer) on the other end side of the stacking direction Z has a second surface CL6A used as a heat dissipation surface for dissipating heat from the switching elements SWH, SWL; and a conductive layer CL5 (third conductive layer) through which current flows to the switching elements SWH, SWL and on which conductor patterns 5P1, 5P2 insulated from the conductive layer CL6 are formed, and which is provided between the switching elements SWH, SWL and the conductive layer CL6 so as to face the conductive layer CL6.

[0054] According to this configuration, the conductor patterns 5P1 and 5P2 of the conductive layer CL5, through which current flows to the switching elements SWH and SWL, generate heat in accordance with the magnitude of the current. The switching elements SWH and SWL also generate heat when current flows. According to this configuration, the conductor patterns 5P1 and 5P2 are disposed opposite the conductive layer CL6, which has the second surface CL6A used as a heat dissipation surface. Therefore, heat from the switching elements SWH and SWL and the conductive layer CL5, including the conductor patterns 5P1 and 5P2, can be efficiently dissipated via the second surface CL6A.

[0055] (2) In the built-in substrate 1 described in (1), when the switching elements SWH, SWL and the conductive layer CL5 are viewed along the stacking direction Z, it is preferable that the mounting areas of the switching elements SWH, SWL are included in the conductor patterns 5P1, 5P2.

[0056] This configuration increases the heat capacity of the conductor patterns 5P1 and 5P2 to which heat is transferred from the switching elements SWH and SWL, thereby improving the cooling effect of the switching elements SWH and SWL.

[0057] (3) In the built-in substrate 1 described in (1) or (2), it is preferable that the switching elements SWH, SWL and the conductor patterns 5P1, 5P2 are electrically connected through vias V provided over the entire surface of the mounting area of ​​the switching elements SWH, SWL.

[0058] This configuration reduces the electrical resistance and thermal resistance between the switching elements SWH, SWL and the conductor patterns 5P1, 5P2, thereby reducing the heat generated in the built-in substrate 1 and enabling the heat generated in the switching elements SWH, SWL to be dissipated efficiently.

[0059] (4) In the built-in substrate 1 described in (1) to (3), the first surface CL1A is a mounting surface at one end side in the stacking direction Z, and the first surface CL1A is provided with a plurality of electrodes electrically connected to the battery 2 that supplies power to the switching elements SWH, SWL and the motor M (load) that is energized via the switching elements SWH, SWL, respectively, and it is preferable that the plurality of electrodes are electrically connected to the conductor patterns 5P1, 5P2.

[0060] According to this configuration, the current flowing through the switching elements SWH and SWL flows through the conductor patterns 5P1 and 5P2, so that the heat generated in the switching elements SWH and SWL can be efficiently dissipated.

[0061] (5) In the built-in substrate 1 described in (1) to (3), it is preferable that, among the multiple insulating layers IL, the insulating layer IL5 between the conductive layer CL6 and the conductive layer CL5 is made of a material having a higher thermal conductivity than the other insulating layers IL1, IL2, IL3, and IL4.

[0062] This configuration makes it possible to facilitate heat transfer between the conductive layer CL5 and the conductive layer CL6 while suppressing heat transfer between the conductive layer CL5 and the insulating layer IL4, thereby facilitating heat dissipation from the switching elements SWH and SWL via the conductive layer CL6.

[0063] 4. Second Embodiment Next, a second embodiment of the built-in substrate 1 according to the first embodiment will be described. For ease of understanding, the second embodiment will be described below as a built-in substrate 101.

[0064] The built-in substrate 101 of the second embodiment is configured to be able to appropriately dissipate heat generated in the power devices built into the built-in substrate 101 and in the patterns formed on the built-in substrate. The built-in substrate 101 of this embodiment will be described below. However, the built-in substrate 101 is not limited to the following embodiment, and various modifications are possible within the scope of the gist thereof.

[0065] FIG. 11 is a circuit diagram partially formed on the built-in substrate 101 (see FIG. 12 ) of this embodiment. FIG. 11 shows an inverter 103 that converts DC power from a battery 102 into AC power to drive a motor 100M. A three-phase motor is used as the motor 100M. Therefore, the inverter 103 is configured with three legs 106 (hereinafter referred to as legs 106A, 106B, and 106C) each including a high-side switching element 100SWH (an example of a "power device") and a low-side switching element 100SWL (an example of a "power device") connected in series. These switching elements 100SWH and 100SWL are, for example, n-type metal-oxide-semiconductor field-effect transistors (MOS-FETs).

[0066] The three legs 106A, 106B, and 106C are connected in parallel to a power supply line 102P connected to the positive electrode of the battery 102 and a power supply line 102N connected to the negative electrode of the battery 102. In each of the legs 106A, 106B, and 106C, the drain terminal of a switching element 100SWH is connected to the power supply line 102P, and the source terminal of a switching element 100SWL is connected to the power supply line 102N. The source terminal of the switching element 100SWH and the drain terminal of the switching element 100SWL are connected to each other. A diode 100D is provided between the source terminal and the drain terminal of each of the switching elements 100SWH and 100SWL. The source terminal of the switching element 100SWH of each of the multiple legs 106A, 106B, and 106C is connected to a terminal of the motor 100M.

[0067] The gate terminals of the switching element 100SWH and the switching element 100SWL are connected to the control unit 105 via the driver 104. As a result, the inverter 103 converts DC power from the battery 102 into three-phase AC power by sequentially switching between a closed state of the high-side switching element 100SWH of a predetermined one of the three legs and a closed state of the low-side switching element 100SWL of one of the remaining two legs, and an open state of the other switching elements. The motor 100M is driven by supplying this three-phase AC power to the inverter 103.

[0068] In this embodiment, as shown in FIG. 11, each of the three legs 106A, 106B, and 106C includes three pairs of a switching element 100SWH and a switching element 100SWL connected in series with each other.

[0069] 12 , the built-in substrate 101 has a plurality of (six in this embodiment) conductive layers 100CL stacked with insulating layers 100IL interposed therebetween. Hereinafter, the six conductive layers 100CL will be referred to as conductive layer 100CL1, conductive layer 100CL2, conductive layer 100CL3, conductive layer 100CL4, conductive layer 100CL5, and conductive layer 100CL6, and the conductive layers 100CL1, 100CL2, 100CL3, conductive layer 100CL4, conductive layer 100CL5, and conductive layer 100CL6 will be stacked in this order from top to bottom. In addition, an insulating layer 100IL1 is interposed between the conductive layer 100CL1 and the conductive layer 100CL2, an insulating layer 100IL2 is interposed between the conductive layer 100CL2 and the conductive layer 100CL3, an insulating layer 100IL3 is interposed between the conductive layer 100CL3 and the conductive layer 100CL4, an insulating layer 100IL4 is interposed between the conductive layer 100CL4 and the conductive layer 100CL5, and an insulating layer 100IL5 is interposed between the conductive layer 100CL5 and the conductive layer 100CL6.

[0070] Here, the direction in which the six conductive layers 100CL are stacked is referred to as the stacking direction Z. As shown in Fig. 12, the switching elements 100SWH and 100SWL of a predetermined leg 106 are embedded in the built-in substrate 101 at the center in the stacking direction Z. In the stacking direction Z, the conductive layer 100CL1 side as viewed from the switching elements 100SWH and 100SWL is referred to as the stacking direction Z1 side, and the conductive layer 100CL6 side as viewed from the switching elements 100SWH and 100SWL is referred to as the stacking direction Z2 side.

[0071] The conductive layer 100CL1 corresponds to the sixth conductive layer on one end side (stacking direction Z1 side) in the stacking direction Z. The conductive layer 100CL6 corresponds to the first conductive layer on the other end side (stacking direction Z2 side) in the stacking direction Z. Furthermore, the conductive layer 100CL5 corresponds to the second conductive layer, as will be described in detail later.

[0072] In this embodiment, the switching elements 100SWH and 100SWL of one leg 106 of the above-mentioned three legs 106A, 106B, and 106C are provided on one built-in substrate 101. Furthermore, on one built-in substrate 101, the three switching elements 100SWH are provided and connected in parallel to each other, and the three switching elements 100SWL are provided and connected in parallel to each other.

[0073] Fig. 13 shows a plan view of the conductive layer 100CL1, Fig. 14 shows a plan view of the conductive layer 100CL2, Fig. 15 shows a plan view of the conductive layer 100CL3, Fig. 16 shows a plan view of the conductive layer 100CL4, Fig. 17 shows a plan view of the conductive layer 100CL5, and Fig. 18 shows a plan view of the conductive layer 100CL6.

[0074] As shown in FIG. 13, the conductive layer 100CL1 is provided with a connector 100CN1 to which the power supply line 102P is connected, a connector 100CN2 to which the power supply line 102N is connected, a connector 100CN3 to which the motor 100M is connected, a connector 100CN4 that inputs control signals transmitted from the control unit 105 to the switching elements 100SWH and 100SWL to the driver 104 (drivers 104H and 104L described later), a connector 100CN5 that supplies power to the driver 104H, a connector 100CN6 that supplies power to the driver 104L, a driver 104H for driving the switching element 100SWH, and a driver 104L for driving the switching element 100SWL. The connectors 100CN1-100CN6 and the drivers 104H, 104L are mounted on a first surface 100CL1A of the conductive layer 100CL1 on the stacking direction Z1 side. Of course, in addition to these, the first surface 100CL1A may also be mounted with a capacitor 100C, a resistor (not shown), or other devices that generate relatively little heat. In this embodiment, "connect" means "connect in a state where current flows."

[0075] 14 , the conductive layer 100CL2 includes a pattern 102P1 connected via a via to a land 101P1 on which the connector 100CN1 of the conductive layer 100CL1 is mounted, a pattern 102P2 connected via a via to a land 101P2 on which the connector 100CN2 of the conductive layer 100CL1 is mounted, a via 102V1 connected to a terminal of a connector 100CN3 of the conductive layer 100CL1, a via 102V2 connected to a terminal of a connector 100CN4 of the conductive layer 100CL1, a via 102V3 connected to a terminal of a connector 100CN5 of the conductive layer 100CL1, and a via 102V4 connected to a terminal of a connector 100CN6 of the conductive layer 100CL1. Also included is a pattern 102P3 connecting a source terminal of the switching element 100SWH and a drain terminal of the switching element 100SWL. Also included are a via 102V5 connected to a terminal of the driver 104H of the conductive layer 100CL1, a via 102V6 connected to a terminal of the driver 104L of the conductive layer 100CL1, a signal line 100SL1 connecting the vias 102V3 and 102V5, a signal line 100SL2 connecting the vias 102V4 and 102V6, and wiring 100GL connecting the gate terminals of the switching elements 100SWH and 100SWL to the vias 102V5 and 102V6, respectively. Note that although the gate terminal side of the wiring 100GL is indicated by an arrow, it is actually connected to the gate terminal.

[0076] The built-in substrate 101 has a switching element 100SWH and a switching element 100SWL built in at the center in the stacking direction Z. In this embodiment, the switching element 100SWH and the switching element 100SWL are each placed on a base member 120. In this embodiment, the base member 120 is configured, for example, as a rectangular pillar or a plate. As shown in FIGS. 15 and 16 , the base member 120, the switching element 100SWH, and the switching element 100SWL are provided across the conductive layer 100CL3 and the conductive layer 100CL4.

[0077] 15 , the conductive layer 100CL3 includes a pattern 103P1 connected to the pattern 102P1 of the conductive layer 100CL2 through a via, a via 103V1 connected to the via 102V1 of the conductive layer 100CL2, a via 103V2 connected to the via 102V2 of the conductive layer 100CL2, a via 103V3 connected to the via 102V5 of the conductive layer 100CL2, and a via 103V4 connected to the via 102V6 of the conductive layer 100CL2. Furthermore, the conductive layer 100CL3 includes a signal line 100SL3 connecting the vias 103V2 and 103V3 of the conductive layer 100CL3, and a signal line 100SL4 connecting the vias 103V2 and 103V4 of the conductive layer 100CL3.

[0078] 16, the conductive layer 100CL4 includes a pattern 104P1 connected to the pattern 103P1 of the conductive layer 100CL3 through a via, a via 104V1 connected to the via 103V1 of the conductive layer 100CL3, a pattern 104P2 connected to the bottom surface of the base member 120 on which the switching element 100SWH is placed, and a pattern 104P3 connected to the bottom surface of the base member 120 on which the switching element 100SWL is placed.

[0079] As shown in FIG. 17, the conductive layer 100CL5 includes a pattern 105P1 connected via a via to a pattern 104P1 of the conductive layer 100CL4 and a pattern 104P2 to which the drain terminal of the switching element 100SWH is connected, and a pattern 105P2 connected via a via to a pattern 104P3 to which the drain terminal of the switching element 100SWL of the conductive layer 100CL4 is connected, and connected to a via 105V1 connected to a via 104V1 of the conductive layer 100CL4.

[0080] 18, the conductive layer 100CL6 includes a pattern 106P1 formed over the entire surface and insulated from each of the conductive layers 100CL1-100CL5. This pattern 106P1 is connected to the housing of the inverter 103 via a harness or screws, for example.

[0081] Although not shown, it is preferable that the conductive layers 100CL1-100CL5 have grounded patterns at locations different from the above-mentioned patterns and wiring.

[0082] The second surface 100CL6A of the conductive layer 100CL6 on the stacking direction Z2 side is used as a heat dissipation surface that dissipates heat from the switching elements 100SWH and 100SWL. Therefore, the conductive layer 100CL6 has the second surface 100CL6A that dissipates heat from the switching elements 100SWH and 100SWL. The switching elements 100SWH and 100SWL generate heat when current is applied. This heat reaches the conductive layer 100CL6 via the conductive layer 100CL5 and the insulating layer 100IL5 between the conductive layer 100CL6 and the conductive layer 100CL5 opposite the conductive layer 100CL6, and is then dissipated from the conductive layer 100CL6. The insulating layer 100IL5 is preferably configured using a heat transfer layer 140 made of a material with a relatively high thermal conductivity in order to transfer heat efficiently from the conductive layer 100CL5 to the conductive layer 100CL6.

[0083] Here, we will explain the flow of current in the built-in substrate 101, particularly the source current and drain current of the switching elements 100SWH and 100SWL. As shown in FIG. 12 , a power supply line 102P is formed on the conductive layer 100CL1. The power supply line 102P is electrically connected to the conductive layer 100CL2 through a via provided in the insulating layer 100IL1. The conductive layer 100CL2 is electrically connected to the conductive layer 100CL3 through a via provided in the insulating layer 100IL2. The conductive layer 100CL3 is electrically connected to the conductive layer 100CL4 through a via provided in the insulating layer 100IL3. The conductive layer 100CL4 is electrically connected to the conductor pattern (pattern 105P1) of the conductive layer 100CL5 through a via provided in the insulating layer 100IL4. This conductor pattern is electrically connected to the drain terminal of the switching element 100SWH through a via provided in the insulating layer 100IL4 and the base member 120. Therefore, the drain current of the switching element 100SWH flows from the power supply line 102P through the conductive layers 100CL and vias to the pattern 105P1.

[0084] The source terminal of the switching element 100SWH is electrically connected to the conductive layer 100CL2 through a via provided in the insulating layer 100IL2, and the conductive layer 100CL2 is electrically connected to the conductor pattern (pattern 105P2) through a via provided in the insulating layer 100IL2, the base member 120 of the switching element 100SWL, and a via provided in the insulating layer 100IL4. Therefore, the source current of the switching element 100SWH flows from the source terminal of the switching element 100SWH to the pattern 105P2 through the via provided in the insulating layer 100IL2, the base member 120 of the switching element 100SWL, and a via provided in the insulating layer 100IL4.

[0085] Furthermore, pattern 105P2 is electrically connected to conductive layer 100CL4 through a via provided in insulating layer 100IL4, conductive layer 100CL4 is electrically connected to conductive layer 100CL3 through a via provided in insulating layer 100IL3, conductive layer 100CL3 is electrically connected to conductive layer 100CL2 through a via provided in insulating layer 100IL2, and conductive layer 100CL2 is electrically connected to conductive layer 100CL1 through a via provided in insulating layer 100IL1. This conductive layer 100CL1 is electrically connected to a terminal of motor 100M. Therefore, the source current of switching element 100SWH flows from conductive layer 100CL2 to conductive layer 100CL5 and then to conductive layer 100CL1. Further, the current from the motor 100M flows from the conductive layer 100CL1 to the pattern 105P2 through each conductive layer and via (corresponding to the drain current of the switching element 100SWL).

[0086] The pattern 105P2 is electrically connected to the drain terminal of the switching element 100SWL via the base member 120, and the source terminal of the switching element 100SWL is electrically connected to the conductive layer 100CL2 via a via provided in the insulating layer 100IL2 and further electrically connected to the power supply line 102N provided on the conductive layer 100CL1 via a via provided in the insulating layer 100IL1. Therefore, the source current of the switching element 100SWL flows from the source terminal of the switching element 100SWL to the power supply line 102N via the via provided in the insulating layer 100IL2, the conductive layer 100CL2, and the via provided in the insulating layer 100IL1.

[0087] As described above, the conductive layer 100CL5 includes a pattern 105P1 connected to the drain terminal of the switching element 100SWH via a via, and a pattern 105P2 connected to the drain terminal of the switching element 100SWL via a via. Therefore, the conductive layer 100CL5 is provided opposite the conductive layer 100CL6, with patterns 105P1 and 105P2 formed thereon, through which the current flowing through the switching elements 100SWH and 100SWL flows and which are insulated from the conductive layer 100CL6. The current flowing through the switching elements 100SWH and 100SWL refers to the current flowing into the switching elements 100SWH and 100SWL. In other words, for the switching element 100SWH, this corresponds to the current flowing from the battery 102 via the power supply line 102P, and for the switching element 100SWL, this corresponds to the current flowing from the motor 100M. Therefore, the conductive layer 100CL5 is formed with a pattern 105P1 through which a current passed through the switching element 100SWH flows and which is insulated from the conductive layer 100CL6, and a pattern 105P2 through which a current passed through the switching element 100SWL flows and which is insulated from the conductive layer 100CL6. Furthermore, both the pattern 105P1 and the pattern 105P2 are insulated from the conductive layer 100CL6.

[0088] 19 , the built-in substrate 101 is divided into a first region 100FA and a second region 100SA when viewed along the stacking direction Z. "Viewed along the stacking direction Z" means viewing the built-in substrate 101 from the stacking direction Z1 side or the stacking direction Z2 side.

[0089] The first region 100FA is a region in which the switching elements 100SWH and 100SWL are built and which includes a conductive pattern through which a current flows to the switching elements 100SWH and 100SWL among the plurality of conductive layers 100CL. The conductive pattern through which a current flows to the switching elements 100SWH and 100SWL is a pattern connected to the source terminal and the drain terminal of each of the switching elements 100SWH and 100SWL. Specifically, these correspond to the pattern from power supply line 102P to pattern 105P1, pattern 105P1, pattern 102P3, pattern 105P2, the pattern from pattern 105P2 to power supply line 102N, wiring 100GL connecting each of drivers 104H and 104L to the gate terminals of switching elements 100SWH and 100SWL, signal line 100SL1 connecting via 102V3 and via 102V5, and signal line 100SL2 connecting via 102V4 and via 102V6.

[0090] The second region 100SA generates less heat than the first region 100FA. For example, the signal lines 100SL3 and 100SL4 connecting the via 103V2 of the connector 100CN4 to the drivers 104H and 104L correspond to the second region 100SA. Since relatively small currents do not flow through the signal lines 100SL3 and 100SL4, the signal lines 100SL3 and 100SL4 generate less heat.

[0091] In this embodiment, the first region 100FA is a high-voltage region where a relatively high voltage is applied to the conductive patterns included in the plurality of conductive layers 100CL included in the first region 100FA, and the second region 100SA is a low-voltage region where a relatively low voltage is applied to the conductive patterns included in the plurality of conductive layers 100CL included in the second region 100SA. Therefore, as described above, the amount of heat generated in the second region 100SA is smaller than the amount of heat generated in the first region 100FA.

[0092] In this embodiment, as shown in Fig. 19 , the second region 100SA is provided outside the outer edge of the first region 100FA when viewed along the stacking direction Z. The second region 100SA is provided in at least a part of the outer peripheral region of the first region 100FA in a plan view of the built-in substrate 101. In the example of Fig. 19 , the second region 100SA is provided on three sides of the built-in substrate 101. Therefore, the second region 100SA does not have to be provided around the entire periphery of the first region 100FA.

[0093] A high thermal resistance section 130 having a thermal resistance higher than that of the conductive layer 100CL6 is provided between the first region 100FA and the second region 100SA. As shown in FIG. 19, the high thermal resistance section 130 is provided along the boundary between the first region 100FA and the second region 100SA. Furthermore, as shown in FIG. 12, the high thermal resistance section 130 is provided from the conductive layer 100CL1 to the conductive layer 100CL5. This high thermal resistance section 130 is formed of a resin portion that does not have a conductor portion within the built-in substrate 101. Therefore, the conductive layers 100CL1-100CL5 in the first region 100FA and the conductive layers 100CL1-100CL5 in the second region 100SA are thermally isolated from each other.

[0094] In this embodiment, the high thermal resistance portion 130 is configured to insulate the first region 100FA from the second region 100SA, and therefore, it is preferable that the high thermal resistance portion 130 is made of a material that has high thermal resistance and high insulation resistance.

[0095] In this embodiment, the conductive layer 100CL6 and the heat transfer layer 140 are provided from the first region 100FA to the second region 100SA when viewed along the stacking direction Z. That is, the conductive layer 100CL6 and the heat transfer layer 140 are provided continuously between the first region 100FA and the second region 100SA without being cut off by the high thermal resistance portion 130. This allows heat transferred to the patterns 105P1 and 105P2 to escape from the first region 100FA to the second region 100SA via the heat transfer layer 140.

[0096] With the above configuration, heat from the switching element 100SWH is transferred to the pattern 105P1, heat from the switching element 100SWL is transferred to the pattern 105P2, and the heat transferred to the patterns 105P1 and 105P2 is further transferred to the conductive layer 100CL6 via the heat transfer layer 140, where it can be dissipated. Also, the heat can be transferred from the first region 100FA to the second surface of the conductive layer 100CL6 on the second region 100SA side via the heat transfer layer 140, where it can be dissipated.

[0097] Furthermore, the conductive patterns included in the first region 100FA have a relatively high applied voltage, and the conductive patterns included in the second region 100SA have a relatively low applied voltage. By providing the high thermal resistance portion 130 made of an insulating material between the first region 100FA and the second region 100SA as in this embodiment, it is possible to protect the components provided in the second region 100SA, which has a relatively low absolute maximum rated voltage, from the high voltage.

[0098] 5. Modifications of the Second Embodiment Next, modifications of the built-in substrate 101 will be described.

[0099] In the second embodiment, the switching elements 100SWH and 100SWL are used as power devices. However, the power devices provided on the built-in substrate 101 may be a single switching element, rather than multiple power devices. The power devices do not have to be n-type metal-oxide-semiconductor field-effect transistors (MOS-FETs), but may be p-type MOS-FETs, insulated gate bipolar transistors (IGBTs), or bipolar transistors. The power devices do not have to be the switching elements 100SWH and 100SWL, but may be components that generate heat when energized, such as load switches.

[0100] In the second embodiment, an example has been described in which the driver 104 is mounted on the built-in substrate 101. However, the driver 104 may be provided on a substrate separate from the built-in substrate 101.

[0101] In the second embodiment, the three legs 106A, 106B, and 106C are each described as including three pairs of the switching element 100SWH and the switching element 100SWL connected in series to each other. However, each of the three legs 106A, 106B, and 106C may be configured to include one pair of the switching element 100SWH and the switching element 100SWL connected in series to each other.

[0102] In the second embodiment, an example has been described in which three switching elements 100SWH connected in parallel and three switching elements 100SWL connected in parallel are provided in one of the three legs 106 on the built-in substrate 101. However, it is also possible to provide the switching elements 100SWH and switching elements 100SWL of the three legs 106 on the built-in substrate 101.

[0103] In the second embodiment, the second region 100SA is described as being provided outside the outer edge of the first region 100FA as viewed along the stacking direction Z. However, the second region 100SA may be provided in the center of the first region 100FA as viewed along the stacking direction Z.

[0104] In the second embodiment, the insulating layer 100IL5 between the conductive layer 100CL6 and the conductive layer 100CL5 provided opposite the conductive layer 100CL6 has been described as the heat transfer layer 140 that transfers heat from the conductive layer 100CL5 to the conductive layer 100CL6. However, the insulating layer 100IL5 between the conductive layer 100CL6 and the conductive layer 100CL5 provided opposite the conductive layer 100CL6 may be made of an insulating material similar to that of the other insulating layers 100IL, rather than the heat transfer layer 140.

[0105] In the second embodiment, the conductive layer 100CL6 and the heat transfer layer 140 are described as being provided across from the first region 100FA side to the second region 100SA side when viewed along the stacking direction Z. However, the conductive layer 100CL6 and the heat transfer layer 140 may also be provided without being provided across from the first region 100FA side to the second region 100SA side when viewed along the stacking direction Z.

[0106] In the second embodiment, the high thermal resistance portion 130 is described as insulating the first region 100FA from the second region 100SA from each other. However, the high thermal resistance portion 130 may be configured without using a material that insulates the first region 100FA from the second region 100SA from each other.

[0107] The conductor patterns of the conductive layers 100CL1-100CL6 described in the second embodiment are merely examples and can be changed.

[0108] 6. Overview of the Second Embodiment The following provides an overview of the built-in substrate 101 described above.

[0109] (1) The built-in substrate 101 is a built-in substrate 101 in which a plurality of conductive layers CL are stacked with insulating layers 100IL interposed therebetween, and in which switching elements 100SWH, 100SWL (power devices) are built in at the center side in the stacking direction Z. When viewed along the stacking direction Z, the first region 100 includes patterns 105P1, 105P2 in which the switching elements 100SWH, 100SWL are built in and through which current flows to energize the switching elements 100SWH, 100SWL of the plurality of conductive layers 100CL. The conductive layer 100CL6 (first conductive layer) at one end of the stacking direction Z among the plurality of conductive layers 100CL has a second surface 100CL6A (heat dissipation surface) that dissipates heat from the switching elements 100SWH, 100SWL, and a high thermal resistance portion 130 having a thermal resistance higher than the thermal resistance of the conductive layer 100CL6 is provided between the first region 100FA and the second region 100SA.

[0110] The patterns 105P1 and 105P2 of the conductive layer 100CL5, through which current flows to the switching elements 100SWH and 100SWL, generate heat in accordance with the magnitude of the current. The switching elements 100SWH and 100SWL also generate heat when current is applied. According to this configuration, a high thermal resistance portion 130 is provided between the first region 100FA and the second region 100SA. Therefore, heat from the patterns of the switching elements 100SWH and 100SWL and the conductive layer 100CL is more easily transferred to the conductive layer 100CL6 having the second surface 100CL6A (heat dissipation surface) than to the second region 100SA, allowing for efficient heat dissipation. Furthermore, because the high thermal resistance portion 130 is provided between the first region 100FA and the second region 100SA, there is no need to provide space for heat countermeasures across the first region 100FA and the second region 100SA. This prevents the substrate from becoming too large, thereby realizing a small-sized built-in substrate 1 that can efficiently dissipate heat.

[0111] (2) In the built-in substrate 101 described in (1), it is preferable that the second area 100SA is provided outside the outer edge of the first area 100FA when viewed along the stacking direction Z.

[0112] According to this configuration, the second region 100SA, which generates a relatively small amount of heat, is less susceptible to thermal influence between components arranged in the second region 100SA, thereby increasing the degree of freedom in mounting. Therefore, pattern design (patterning) can be easily performed without placing emphasis on thermal design. Furthermore, since there is less thermal influence between the built-in substrates when multiple built-in substrates are arranged adjacent to each other, the degree of freedom in arranging the built-in substrates 101 can also be increased.

[0113] (3) In the built-in substrate 101 described in (1) or (2), it is preferable that the insulating layer 100IL5 between the conductive layer 100CL6 and the conductive layer 100CL5 (second conductive layer) arranged opposite the conductive layer 100CL6 is a heat transfer layer 140 that transfers heat from the conductive layer 100CL5 to the conductive layer 100CL6, and that the conductive layer 100CL6 and the heat transfer layer 140 are arranged from the first region 100FA side to the second region 100SA side when viewed along the stacking direction Z.

[0114] According to this configuration, heat in the first area 100FA can be dissipated via the second surface 100CL6A of the conductive layer 100CL6 on the second area 100SA side, thereby improving the heat dissipation performance of the built-in substrate 101.

[0115] (4) In the built-in substrate 101 described in (1) or (2), the first region 100FA is a high-voltage region in which a relatively high voltage is applied to the conductive patterns included in the plurality of conductive layers 100CL included in the first region 100FA, and the second region 100SA is a low-voltage region in which a relatively low voltage is applied to the conductive patterns included in the plurality of conductive layers 100CL included in the second region 100SA, and it is preferable that the high thermal resistance portion 130 insulates the first region 100FA and the second region 100SA from each other.

[0116] According to this configuration, the first region 100FA and the second region 100SA can be insulated from each other by using the high thermal resistance portion 130. Therefore, there is no need to provide a separate space for insulation between the first region 100FA and the second region 100SA. This prevents the built-in substrate 101 from becoming too large.

[0117] The technology according to the present disclosure can be used for a built-in substrate in which a power device is built.

[0118] 1: built-in board, 2: battery, 5P1: conductor pattern, 5P2: conductor pattern, CL: conductive layer, CL1: conductive layer (first conductive layer), CL1A: first surface, CL2A: second surface, CL5: conductive layer (third conductive layer), CL6: conductive layer (second conductive layer), IL: insulating layer, IL1: insulating layer, IL2: insulating layer, IL3: insulating layer, IL4: insulating layer, IL5: insulating layer, M: motor (load), SWH: switching element (power device), SWL: switching element (power device), V: via, Z: stacking direction

Claims

1. An embedded substrate in which a plurality of conductive layers are stacked with insulating layers interposed therebetween, and in which a power device is built in at the center in the stacking direction, comprising: a first conductive layer of the plurality of conductive layers on one side in the stacking direction, the first conductive layer having a first surface on which an electronic component other than the power device is mounted; a second conductive layer of the plurality of conductive layers on the other end side in the stacking direction, the second conductive layer having a second surface used as a heat dissipation surface for dissipating heat from the power device; and a third conductive layer through which a current flows to the power device and on which a conductor pattern insulated from the second conductive layer is formed, the third conductive layer being provided between the power device and the second conductive layer so as to face the second conductive layer.

2. The built-in substrate according to claim 1, wherein, when the power device and the third conductive layer are viewed along the stacking direction, the mounting area of ​​the power device is included in the conductor pattern.

3. The built-in substrate according to claim 2, wherein the power device and the conductor pattern are electrically connected through vias provided over the entire surface of the mounting area of ​​the power device.

4. An embedded substrate according to any one of claims 1 to 3, wherein the first surface is a mounting surface at one end side in the stacking direction, and the first surface is provided with a plurality of electrodes electrically connected to a battery that supplies power to the power device and to a load that is energized via the power device, and the plurality of electrodes are electrically connected to the conductor pattern.

5. An embedded substrate according to any one of claims 1 to 3, wherein, of the plurality of insulating layers, the insulating layer between the second conductive layer and the third conductive layer is made of a material having a higher thermal conductivity than the other insulating layers.

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