Stacked converter
By using a stacked converter design with four capacitors, four switches, two inductors, and diodes, the problems of numerous components, large size, and high cost of existing stacked converters are solved, achieving high power density and space saving, making it suitable for scenarios such as data centers.
Patent Information
- Application Number
- PCT/CN2024/127231
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-06-05
- Filing Date
- 2024-10-25
- Publication Date
- 2025-12-11
AI Technical Summary
Existing cascaded converters suffer from problems such as a large number of components, large size, high cost, and difficulty in increasing power density. Especially in data center space, a more compact and efficient solution is needed.
The design employs four capacitors, four switches, two inductors, and diodes. The voltage of the four capacitors is controlled by seven switches and two inductors. The inductors are used in parallel to save components and space.
This invention achieves a stacked converter with reduced component count, simple structure, cost savings, and high power density, making it suitable for space-constrained applications such as data centers.
Smart Images
Figure CN2024127231_11122025_PF_FP_ABST
Abstract
Description
Cascade converter TECHNICAL FIELD
[0001] The present invention relates to a cascade converter, in particular, to a cascade converter with less components and simple structure. BACKGROUND
[0002] Referring to FIG. 1, which is a circuit block diagram of a first embodiment of a conventional dual-capacitor cascade converter. When there are two capacitors C1, C2, the circuit needs at least one inductor L1 and two switches S1, S2. Referring to FIG. 2, which is a circuit block diagram of a second embodiment of a conventional dual-capacitor cascade converter. When there are four capacitors C1, C2, C3, C4, since the voltage supply energy is not the same, the circuit needs at least three inductors L1, L2, L3 and six switches S1, S2, S3, S4, S5, S6 to maintain the required voltage size. Since the conventional dual-capacitor cascade converter contains a large number of components, it has the disadvantages of large circuit size, high cost, and difficulty in improving power density.
[0003] For example, in the case of rapid development of data centers, the number of servers to be installed increases with the rapid expansion of data. In limited space, it is necessary to reduce the size of power devices (such as but not limited to: cascade converters, etc.), and the most effective way to reduce the size is to reduce the number of components. Therefore, how to design a cascade converter with less components to solve the problems and technical bottlenecks of the prior art, such as large circuit size, high cost, and difficulty in improving power density, is an important subject of study for the present inventor.
[0004] SUMMARY
[0005] One object of the present application is to provide a cascode converter. The cascode converter includes four capacitors, four switches, a fifth switch and a first inductor, a sixth switch and a second inductor, and a seventh switch. The four capacitors include a first capacitor, a second capacitor, a third capacitor and a fourth capacitor connected in series, wherein the first capacitor and the second capacitor are connected to a first node, the second capacitor and the third capacitor are connected to a second node, the third capacitor and the fourth capacitor are connected to a third node, and the first capacitor is connected to a first voltage node and the fourth capacitor is connected to a second voltage node. The four switches include a first switch, a second switch, a third switch and a fourth switch connected in series, wherein the first switch and the second switch are connected to a fourth node, the second switch and the third switch are connected to the second node, the third switch and the fourth switch are connected to a fifth node, and the first switch is connected to the first voltage node and the fourth switch is connected to the second voltage node. The fifth switch is connected to the first inductor at a sixth node, and the fifth switch is connected to the first node and the first inductor is connected to the fourth node. The sixth switch is connected to the second inductor at a seventh node, and the sixth switch is connected to the third node and the second inductor is connected to the fifth node. The seventh switch is connected between the sixth node and the seventh node.
[0006] Another object of the present application is to provide a cascode converter. The cascode converter includes four capacitors, four switches, a fifth switch and a first inductor, a sixth switch and a second inductor, and a diode. The four capacitors include a first capacitor, a second capacitor, a third capacitor and a fourth capacitor connected in series, wherein the first capacitor and the second capacitor are connected to a first node, the second capacitor and the third capacitor are connected to a second node, the third capacitor and the fourth capacitor are connected to a third node, and the first capacitor is connected to a first voltage node and the fourth capacitor is connected to a second voltage node. The four switches include a first switch, a second switch, a third switch and a fourth switch connected in series, wherein the first switch and the second switch are connected to a fourth node, the second switch and the third switch are connected to the second node, the third switch and the fourth switch are connected to a fifth node, and the first switch is connected to the first voltage node and the fourth switch is connected to the second voltage node. The fifth switch is connected to the first inductor at a sixth node, and the fifth switch is connected to the first node and the first inductor is connected to the fourth node. The sixth switch is connected to the second inductor at a seventh node, and the sixth switch is connected to the third node and the second inductor is connected to the fifth node. The cathode of the diode is connected to the sixth node and the anode of the diode is connected to the seventh node.
[0007] Therefore, the cascode converter provided by the present application only needs seven switches and two inductors to control the voltage of four capacitors, and the two inductors can be used in parallel to control the voltage of the capacitors, thereby saving the cost of components, simplifying the structure and saving space. Therefore, compared with the prior art, the cascode converter provided by the present application has the characteristics of high power density.
[0008] For further understanding of the technology, means, and effects of the present application taken to achieve the intended purpose, please refer to the following detailed description of the present application and the accompanying drawings. It is believed that the purpose, features, and characteristics of the present application can be thoroughly and specifically understood from the above description and drawings, which are provided for reference and illustration only, and are not intended to limit the present application. BRIEF DESCRIPTION OF DRAWINGS
[0009] Figure 1 is a circuit block diagram of a first embodiment of a prior art double- capacitor cascade converter.
[0010] Figure 2 is a circuit block diagram of a second embodiment of a prior art double- capacitor cascade converter.
[0011] Figure 3 is a circuit block diagram of a first embodiment of a cascade converter of the present application.
[0012] Figure 4A is a timing diagram of the transfer of energy from a first capacitor to a second capacitor of the cascade converter of Figure 3.
[0013] Figure 4B is a timing diagram of the transfer of energy from a second capacitor to a first capacitor of the cascade converter of Figure 3.
[0014] Figure 4C is a timing diagram of the transfer of energy from a third capacitor to a fourth capacitor of the cascade converter of Figure 3.
[0015] Figure 4D is a timing diagram of the transfer of energy from a fourth capacitor to a third capacitor of the cascade converter of Figure 3.
[0016] Figure 4E is a timing diagram of the transfer of energy from a second capacitor to a third capacitor of the cascade converter of Figure 3.
[0017] Figure 4F is a timing diagram of the transfer of energy from a third capacitor to a second capacitor of the cascade converter of Figure 3.
[0018] Figure 4G is a timing diagram of the transfer of energy from a second capacitor to a third capacitor of the cascade converter of Figure 7.
[0019] Figure 4H is a timing diagram of the transfer of energy from a third capacitor to a second capacitor of the cascade converter of Figure 7.
[0020] Figure 5A is a schematic diagram of a first energy storage operation of the cascade converter of Figure 3.
[0021] Figure 5B is a schematic diagram of a first energy release operation of the cascade converter of Figure 3.
[0022] Figure 5C is a schematic diagram of a second energy storage operation of the cascade converter of Figure 3.
[0023] Figure 5D is a schematic diagram of a second energy release operation of the cascade converter of Figure 3.
[0024] Figure 5E: A schematic diagram of the third energy storage operation of the cascaded converter shown in Figure 3;
[0025] Figure 5F: A schematic diagram of the third energy release operation of the cascaded converter shown in Figure 3;
[0026] Figure 5G: A schematic diagram of the fourth energy storage operation of the cascaded converter shown in Figure 3;
[0027] Figure 5H: A schematic diagram of the fourth energy release operation of the cascaded converter shown in Figure 3;
[0028] Figure 6A: A schematic diagram of the fifth energy storage operation of the cascaded converter shown in Figure 3;
[0029] Figure 6B: A schematic diagram of the fifth energy release operation of the cascaded converter shown in Figure 3;
[0030] Figure 6C: A schematic diagram of the sixth energy storage operation of the cascaded converter shown in Figure 3;
[0031] Figure 6D: A schematic diagram of the sixth energy release operation of the cascaded converter shown in Figure 3;
[0032] Figure 7: A circuit block diagram of a second embodiment of the stacked converter of the present invention;
[0033] Figure 8A: A schematic diagram of the seventh energy storage operation of the cascaded converter shown in Figure 7;
[0034] Figure 8B: A schematic diagram of the seventh energy release operation of the cascaded converter shown in Figure 7;
[0035] Figure 8C: A schematic diagram of the eighth energy storage operation of the cascaded converter shown in Figure 7;
[0036] Figure 8D: A schematic diagram of the eighth energy release operation of the cascaded converter shown in Figure 7.
[0037] Explanation of reference numerals: C1~C4: First capacitor~Fourth capacitor; S1~S7: First switch~Seventh switch; L1, L2: First inductor~Second inductor; D1: Diode; N1~N7: First node~Seventh node. A N B First voltage node ~ Second voltage node P S1 ~P S8 First energy storage path to eighth energy storage path P R1 ~P R8 First energy release path ~ Eighth energy release path V1 ~ V4; First voltage ~ Fourth voltage S S1 ~S S7 : First control signal ~ Seventh control signal t1 ~ t3: Time Detailed Implementation
[0038] The technical contents and detailed descriptions of the present application are described as follows in combination with the accompanying drawings.
[0039] Please refer to Fig. 3, which is a circuit block diagram of the first embodiment of the cascaded converter of the present application. The cascaded converter comprises four capacitors C1, C2, C3, C4, four switches S1, S2, S3, S4, a fifth switch S5 and a first inductor L1, a sixth switch S6 and a second inductor L2, and a seventh switch S7.
[0040] The four capacitors C1, C2, C3, C4 comprise a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4 connected in series. The first capacitor C1 and the second capacitor C2 are connected to a first node N1, the second capacitor C2 and the third capacitor C3 are connected to a second node N2, and the third capacitor C3 and the fourth capacitor C4 are connected to a third node N3. The first capacitor C1 is further connected to a first voltage node N A , and the fourth capacitor C4 is further connected to a second voltage node N B .
[0041] The four switches S1, S2, S3, S4 comprise a first switch S1, a second switch S2, a third switch S3 and a fourth switch S4 connected in series. The first switch S1 and the second switch S2 are connected to a fourth node N4, the second switch S2 and the third switch S3 are connected to the second node N2, and the third switch S3 and the fourth switch S4 are connected to a fifth node N5. The first switch S1 is further connected to the first voltage node N A , and the fourth switch S4 is further connected to the second voltage node N B .
[0042] The fifth switch S5 and the first inductor L1 are connected to a sixth node N6, and the fifth switch S5 is further connected to the first node N1, and the first inductor L1 is further connected to the fourth node N4. The sixth switch S6 and the second inductor L2 are connected to a seventh node N7, and the sixth switch S6 is further connected to the third node N3, and the second inductor L2 is further connected to the fifth node N5. The seventh switch S7 is connected between the sixth node N6 and the seventh node N7.
[0043] Please refer to FIG. 4A, FIG. 5A and FIG. 5B, wherein FIG. 4A is a timing diagram of the first capacitor transferring energy to the second capacitor of the interleaved converter shown in FIG. 3; FIG. 5A is a schematic diagram of the first energy storage operation of the interleaved converter shown in FIG. 3; FIG. 5B is a schematic diagram of the first energy release operation of the interleaved converter shown in FIG. 3. As shown in FIG. 4A, based on the first time period (i.e. time t1 to time t2), the first switch S1 is turned on, the second switch S2 is turned off, the fifth switch S5 is turned on and the seventh switch S7 is turned off, the first voltage V1 established on the first capacitor C1 stores energy to the first inductor L1. Please refer to FIG. 5A in conjunction, based on the first switch S1 being turned on and the fifth switch S5 being turned on, the first voltage V1 established on the first capacitor C1 stores energy to the first inductor L1 through the first energy storage path P S1 to the first inductor L1, wherein the first energy storage path P S1 is formed by the first capacitor C1, the first switch S1, the first inductor L1 and the fifth switch S5.
[0044] In the second time period (i.e. time t2 to time t3) after the first time period, the first switch S1 is turned off, the second switch S2 is turned on, the fifth switch S5 is turned on and the seventh switch S7 is turned off, the energy of the first inductor L1 is released to the second capacitor C2 to establish the second voltage V2. Please refer to FIG. 5B in conjunction, based on the second switch S2 being turned on and the fifth switch S5 being turned on (i.e. the first switch S1 is turned off from being turned on, and the second switch S2 is turned on from being turned off), the energy stored in the first inductor L1 is released to the second capacitor C2 through the first energy release path P R1 to the second capacitor C2 to establish the second voltage V2, wherein the first energy release path P R1 is formed by the first inductor L1, the fifth switch S5, the second capacitor C2 and the second switch S2.
[0045] Please refer to FIG. 4B, FIG. 5C and FIG. 5D, wherein FIG. 4B is a timing diagram of the second capacitor transferring energy to the first capacitor of the interleaved converter shown in FIG. 3; FIG. 5C is a schematic diagram of the second energy storage operation of the interleaved converter shown in FIG. 3; FIG. 5D is a schematic diagram of the second energy release operation of the interleaved converter shown in FIG. 3. As shown in FIG. 4B, based on the first time period (i.e. time t1 to time t2), the first switch S1 is turned off, the second switch S2 is turned on, the fifth switch S5 is turned on and the seventh switch S7 is turned off, the first voltage V1 established on the first capacitor C1 stores energy to the first inductor L1. Please refer to FIG. 5C in conjunction, based on the second switch S2 being turned on and the fifth switch S5 being turned on, the second voltage V2 established on the second capacitor C2 stores energy to the first inductor L1 through the second energy storage path P S2 to the first inductor L1, wherein the second energy storage path P S2 is formed by the second capacitor C2, the fifth switch S5, the first inductor L1 and the second switch S2.
[0046] In a second time period (i.e. time t2 to time t3) following the first time period, the first switch S1 is turned on, the second switch S2 is turned off, the fifth switch S5 is turned on and the seventh switch S7 is turned off, the energy of the first inductor L1 is discharged to the first capacitor C1 to establish the first voltage V1. Referring to FIG. 5D, based on the first switch S1 being turned on and the fifth switch S5 being turned on (i.e. the first switch S1 is turned from off to on, and the second switch S2 is turned from on to off), the energy stored in the first inductor L1 is discharged through the second discharge path P R2 to discharge the first capacitor C1 to establish the first voltage V1, wherein the second discharge path P R2 is formed by the first inductor L1, the first switch S1, the first capacitor C1 and the fifth switch S5.
[0047] Referring to FIG. 4C, FIG. 5E and FIG. 5F, FIG. 4C is a timing diagram of the third capacitor C3 discharging energy to the fourth capacitor C4 of the interleaved converter of FIG. 3, FIG. 5E is a schematic diagram of a third energy storage operation of the interleaved converter of FIG. 3, and FIG. 5F is a schematic diagram of a third energy discharge operation of the interleaved converter of FIG. 3. As shown in FIG. 4C, in a first time period (i.e. time t1 to time t2), the third switch S3 is turned on, the fourth switch S4 is turned off, the sixth switch S6 is turned on and the seventh switch S7 is turned off, and the third voltage V3 established on the third capacitor C3 stores energy in the second inductor L2. Referring to FIG. 5E, based on the third switch S3 being turned on and the sixth switch S6 being turned on, the third voltage V3 established on the third capacitor C3 stores energy in the second inductor L2 through the third energy storage path P S3 to store energy in the second inductor L2, wherein the third energy storage path P S3 is formed by the third capacitor C3, the third switch S3, the second inductor L2 and the sixth switch S6.
[0048] In a second time period (i.e. time t2 to time t3) following the first time period, the third switch S3 is turned off, the fourth switch S4 is turned on, the sixth switch S6 is turned on and the seventh switch S7 is turned off, the energy of the second inductor L2 is discharged to the fourth capacitor C4 to establish the fourth voltage V4. Referring to FIG. 5F, based on the fourth switch S4 being turned on and the sixth switch S6 being turned on (i.e. the third switch S3 is turned from on to off, and the fourth switch S4 is turned from off to on), the energy stored in the second inductor L2 is discharged through the third discharge path P R3 to discharge the fourth capacitor C4 to establish the fourth voltage V4, wherein the third discharge path P R3 is formed by the second inductor L2, the sixth switch S6, the fourth capacitor C4 and the fourth switch S4.
[0049] Please refer to FIG. 4D, FIG. 5G and FIG. 5H, wherein FIG. 4D is a timing diagram of the fourth capacitor transferring energy to the third capacitor of the interleaved converter shown in FIG. 3; FIG. 5G is a schematic diagram of the fourth energy storage operation of the interleaved converter shown in FIG. 3; FIG. 5H is a schematic diagram of the fourth energy releasing operation of the interleaved converter shown in FIG. 3. As shown in FIG. 4D, based on the third switch S3 being turned off, the fourth switch S4 being turned on, the sixth switch S6 being turned on and the seventh switch S7 being turned off during a first time period (i.e. time t1 to time t2), the fourth voltage V4 established on the fourth capacitor C4 stores energy to the second inductor L2. Please refer to FIG. 5G in conjunction, based on the fourth switch S4 being turned on and the sixth switch S6 being turned on, the fourth voltage V4 established on the fourth capacitor C4 stores energy to the second inductor L2 via a fourth energy storage path P S4 to the second inductor L2, wherein the fourth energy storage path P S4 is a path formed by the fourth capacitor C4, the sixth switch S6, the second inductor L2 and the fourth switch S4.
[0050] During a second time period (i.e. time t2 to time t3) subsequent to the first time period, the third switch S3 is turned on, the fourth switch S4 is turned off, the sixth switch S6 is turned on and the seventh switch S7 is turned off, the energy stored in the second inductor L2 is released to the third capacitor C3 to establish the third voltage V3. Please refer to FIG. 5H in conjunction, based on the third switch S3 being turned on and the sixth switch S6 being turned on (i.e. the third switch S3 is turned from off to on, and the fourth switch S4 is turned from on to off), the energy stored in the second inductor L2 is released to the third capacitor C3 via a fourth energy releasing path P R4 to the third capacitor C3 to establish the third voltage V3, wherein the fourth energy releasing path P R4 is a path formed by the second inductor L2, the third switch S3, the third capacitor C3 and the sixth switch S6.
[0051] Please refer to FIG. 4E, FIG. 6A and FIG. 6B, wherein FIG. 4E is a timing diagram of the second capacitor transferring energy to the third capacitor of the interleaved converter shown in FIG. 3; FIG. 6A is a schematic diagram of the fifth energy storage operation of the interleaved converter shown in FIG. 3; FIG. 6B is a schematic diagram of the fifth energy releasing operation of the interleaved converter shown in FIG. 3. As shown in FIG. 4E, based on the second switch S2 being turned on, the third switch S3 being turned on, the fifth switch S5 being turned on, the sixth switch S6 being turned off and the seventh switch S7 being turned on during a first time period (i.e. time t1 to time t2), the second voltage V2 established on the second capacitor C2 stores energy to the first inductor L1 and the second inductor L2. Please refer to FIG. 6A in conjunction, based on the second switch S2 being turned on, the third switch S3 being turned on, the fifth switch S5 being turned on and the seventh switch S7 being turned on, the second voltage V2 established on the second capacitor C2 stores energy to the first inductor L1 and the second inductor L2 via a fifth energy storage path P S5 to the first inductor L1 and the second inductor L2, wherein the fifth energy storage path P S5a path formed by the first inductor LI, the second switch S2, the third capacitor C3, the sixth switch S6, and the seventh switch S7, and a path formed by the second inductor L2, the third switch S3, the third capacitor C3, and the sixth switch S6.
[0052] In a second time period (i.e., time t2 to time t3) following the first time period, the second switch S2 is turned on, the third switch S3 is turned on, the fifth switch S5 is turned off, the sixth switch S6 is turned on, and the seventh switch S7 is turned on, and the energy of the first inductor LI and the second inductor L2 is discharged to the third capacitor C3 to establish the third voltage V3. Referring to FIG. 6B, based on the second switch S2 being turned on, the third switch S3 being turned on, the sixth switch S6 being turned on, and the seventh switch S7 being turned on (i.e., the fifth switch S5 is turned from on to off, and the sixth switch S6 is turned from off to on), the energy stored in the first inductor LI and the second inductor L2 is discharged through the fifth discharging path P R5 to establish the third voltage V3, wherein the fifth discharging path P R5 a path formed by the first inductor LI, the second switch S2, the third capacitor C3, the sixth switch S6, and the seventh switch S7, and a path formed by the second inductor L2, the third switch S3, the third capacitor C3, and the sixth switch S6.
[0053] Referring to FIG. 4F, FIG. 6C, and FIG. 6D, wherein FIG. 4F is a timing diagram of the third capacitor transferring energy to the second capacitor of the interleaved converter of FIG. 3, FIG. 6C is a schematic diagram of a sixth energy storing operation of the interleaved converter of FIG. 3, and FIG. 6D is a schematic diagram of a sixth energy discharging operation of the interleaved converter of FIG. 3. As shown in FIG. 4F, based on the second switch S2 being turned on, the third switch S3 being turned on, the fifth switch S5 being turned off, the sixth switch S6 being turned on, and the seventh switch S7 being turned on in a first time period (i.e., time tl to time t2), the third voltage V3 established on the third capacitor C3 stores energy in the first inductor LI and the second inductor L2. Referring to FIG. 6C, based on the second switch S2 being turned on, the third switch S3 being turned on, the sixth switch S6 being turned on, and the seventh switch S7 being turned on, the third voltage V3 established on the third capacitor C3 is discharged through the sixth discharging path P S6 to store energy in the first inductor LI and the second inductor L2, wherein the sixth discharging path P S6 a path formed by the first inductor LI, the second switch S2, the third capacitor C3, the sixth switch S6, and the seventh switch S7, and a path formed by the second inductor L2, the third switch S3, the third capacitor C3, and the sixth switch S6.
[0054] In a second time period (i.e. time t2 to time t3) after the first time period, the second switch S2 is turned on, the third switch S3 is turned on, the fifth switch S5 is turned on, the sixth switch S6 is turned off, and the seventh switch S7 is turned on. The energy stored in the first inductor L1 and the second inductor L2 is discharged to the second capacitor C2 to establish the second voltage V2. Referring to FIG. 6D, based on the second switch S2 being turned on, the third switch S3 being turned on, the fifth switch S5 being turned on, and the seventh switch S7 being turned on (i.e. the fifth switch S5 is turned on from being turned off, and the sixth switch S6 is turned off from being turned on), the energy stored in the first inductor L1 and the second inductor L2 is discharged through the sixth discharging path P R6 to the second capacitor C2 to establish the second voltage V2, wherein the sixth discharging path P R6 is formed by the first inductor L1, the fifth switch S5, the second capacitor C2, and the second switch S2, and by the second inductor L2, the seventh switch S7, the fifth switch S5, the second capacitor C2, and the third switch S3.
[0055] Referring to FIG. 7, a circuit block diagram of a second embodiment of the interleaved converter is shown. The interleaved converter includes four capacitors C1, C2, C3, C4, four switches S1, S2, S3, S4, a fifth switch S5 and a first inductor L1, a sixth switch S6 and a second inductor L2, and a diode D1. It is noted that the second embodiment shown in FIG. 7 is different from the first embodiment shown in FIG. 3 in that the diode D1 is used to replace the seventh switch S7.
[0056] The four capacitors C1, C2, C3, C4 include a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4 connected in series. The first capacitor C1 and the second capacitor C2 are connected to the first node N1, the second capacitor C2 and the third capacitor C3 are connected to the second node N2, and the third capacitor C3 and the fourth capacitor C4 are connected to the third node N3. The first capacitor C1 is further connected to the first voltage node N A , and the fourth capacitor C4 is further connected to the second voltage node N B .
[0057] The four switches S1, S2, S3, S4 include a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4 connected in series. The first switch S1 and the second switch S2 are connected to the fourth node N4, the second switch S2 and the third switch S3 are connected to the second node N2, and the third switch S3 and the fourth switch S4 are connected to the fifth node N5. The first switch S1 is further connected to the first voltage node N A , and the fourth switch S4 is further connected to the second voltage node N B .
[0058] The fifth switch S5 is connected with the first inductor L1 at the sixth node N6, and the fifth switch S5 is connected with the first node N1, and the first inductor L1 is connected with the fourth node N4. The sixth switch S6 is connected with the second inductor L2 at the seventh node N7, and the sixth switch S6 is connected with the third node N3, and the second inductor L2 is connected with the fifth node N5. The cathode of the diode D1 is connected with the sixth node N6, and the anode of the diode D1 is connected with the seventh node N7.
[0059] Please refer to FIG. 4A, FIG. 5A and FIG. 5B, wherein FIG. 4A is a timing diagram of the first capacitor transferring energy to the second capacitor of the interleaved converter shown in FIG. 3; FIG. 5A is a schematic diagram of the first energy storage operation of the interleaved converter shown in FIG. 3; and FIG. 5B is a schematic diagram of the first energy release operation of the interleaved converter shown in FIG. 3. However, it is mentioned that in the second embodiment, the seventh switch S7 is replaced by the diode D1, so the control signal S S7 is deleted, and the seventh switch S7 in FIG. 5A and FIG. 5B is replaced by the diode D1, which corresponds to the description of the present embodiment. As shown in FIG. 4A, based on the first time period (i.e. time t1 to time t2), the first switch S1 is turned on, the second switch S2 is turned off and the fifth switch S5 is turned on, the first voltage V1 established on the first capacitor C1 stores energy to the first inductor L1. Please refer to FIG. 5A (as mentioned above, the seventh switch S7 is replaced by the diode D1), based on the first switch S1 being turned on and the fifth switch S5 being turned on, the first voltage V1 established on the first capacitor C1 stores energy to the first inductor L1 through the first energy storage path P S1 to the first inductor L1, wherein the first energy storage path P S1 is formed by the first capacitor C1, the first switch S1, the first inductor L1 and the fifth switch S5.
[0060] In the second time period (i.e. time t2 to time t3) after the first time period, the first switch S1 is turned off, the second switch S2 is turned on and the fifth switch S5 is turned on, and the energy of the first inductor L1 is released to the second capacitor C2 to establish the second voltage V2. Please refer to FIG. 5B (as mentioned above, the seventh switch S7 is replaced by the diode D1), based on the second switch S2 being turned on and the fifth switch S5 being turned on (i.e. the first switch S1 is turned off from being turned on, and the second switch S2 is turned on from being turned off), the energy of the first inductor L1 is released to the second capacitor C2 through the first energy release path P R1 to the second capacitor C2 to establish the second voltage V2, wherein the first energy release path P R1 is formed by the first inductor L1, the fifth switch S5, the second capacitor C2 and the second switch S2.
[0061] Please refer to FIG. 4B, FIG. 5C and FIG. 5D, wherein FIG. 4B is a timing diagram of the second capacitor transferring energy to the first capacitor of the interleaved converter shown in FIG. 3; FIG. 5C is a schematic diagram of the second energy storage operation of the interleaved converter shown in FIG. 3; and FIG. 5D is a schematic diagram of the second energy release operation of the interleaved converter shown in FIG. 3. Similarly, the control signal S S7 is deleted, and the seventh switch S7 in FIG. 5C and FIG. 5D is replaced by a diode D1, which corresponds to the description of the present embodiment. As shown in FIG. 4B, based on the first time period (i.e. time t1 to time t2), the first switch S1 is off, the second switch S2 is on, and the fifth switch S5 is on, the first voltage V1 established on the first capacitor C1 stores energy to the first inductor L1. Please refer to FIG. 5C (as mentioned above, the seventh switch S7 is replaced by a diode D1), based on the second switch S2 being on and the fifth switch S5 being on, the second voltage V2 established on the second capacitor C2 stores energy to the first inductor L1 through the second energy storage path P S2 to the first inductor L1, wherein the second energy storage path P S2 is a path formed by the second capacitor C2, the fifth switch S5, the first inductor L1 and the second switch S2.
[0062] In the second time period (i.e. time t2 to time t3) after the first time period, the first switch S1 is on, the second switch S2 is off, and the fifth switch S5 is on, the energy of the first inductor L1 is released to the first capacitor C1 to establish the first voltage V1. Please refer to FIG. 5D (as mentioned above, the seventh switch S7 is replaced by a diode D1), based on the first switch S1 being on and the fifth switch S5 being on (i.e. the first switch S1 is switched from off to on, and the second switch S2 is switched from on to off), the energy stored in the first inductor L1 is released through the second energy release path P R2 to the first capacitor C1 to establish the first voltage V1, wherein the second energy release path P R2 is a path formed by the first inductor L1, the first switch S1, the first capacitor C1 and the fifth switch S5.
[0063] Please refer to FIG. 4C, FIG. 5E and FIG. 5F, wherein FIG. 4C is a timing diagram of the third capacitor transferring energy to the fourth capacitor of the interleaved converter shown in FIG. 3; FIG. 5E is a schematic diagram of the third energy storage operation of the interleaved converter shown in FIG. 3; and FIG. 5F is a schematic diagram of the third energy release operation of the interleaved converter shown in FIG. 3. Similarly, the control signal S S7corresponding to the description of the present embodiment. As shown in FIG. 4C, based on the third switch S3 being turned on, the fourth switch S4 being turned off and the sixth switch S6 being turned on during the first time period (i.e. time tl to time t2), the third voltage V3 established on the third capacitor C3 stores energy to the second inductor L2. With reference to FIG. 5E (as mentioned above, the seventh switch S7 is replaced by a diode Dl), based on the third switch S3 being turned on and the sixth switch S6 being turned on, the third voltage V3 established on the third capacitor C3 stores energy to the second inductor L2 via the third energy storage path P S3 stores energy to the second inductor L2, wherein the third energy storage path P S3 is a path formed by the third capacitor C3, the third switch S3, the second inductor L2 and the sixth switch S6.
[0064] During a second time period (i.e. time t2 to time t3) subsequent to the first time period, the third switch S3 is turned off, the fourth switch S4 is turned on and the sixth switch S6 is turned on, the energy stored in the second inductor L2 is discharged to the fourth capacitor C4 to establish the fourth voltage V4. With reference to FIG. 5F (as mentioned above, the seventh switch S7 is replaced by a diode Dl), based on the fourth switch S4 being turned on and the sixth switch S6 being turned on (i.e. the third switch S3 is turned off from being turned on, and the fourth switch S4 is turned on from being turned off), the energy stored in the second inductor L2 is discharged to the fourth capacitor C4 via the third energy discharge path P R3 discharges energy to the fourth capacitor C4 to establish the fourth voltage V4, wherein the third energy discharge path P R3 is a path formed by the second inductor L2, the sixth switch S6, the fourth capacitor C4 and the fourth switch S4.
[0065] Please refer to FIG. 4D, FIG. 5G and FIG. 5H, wherein FIG. 4D is a timing diagram of the fourth capacitor transferring energy to the third capacitor of the interleaved converter shown in FIG. 3; FIG. 5G is a schematic diagram of the third energy discharge operation of the interleaved converter shown in FIG. 3; and FIG. 5H is a schematic diagram of the fourth energy discharge operation of the interleaved converter shown in FIG. 3. Similarly, the control signal S S7 corresponding to the description of the present embodiment. As shown in FIG. 4C, based on the third switch S3 being turned on, the fourth switch S4 being turned off and the sixth switch S6 being turned on during the first time period (i.e. time tl to time t2), the third voltage V3 established on the third capacitor C3 stores energy to the second inductor L2. With reference to FIG. 5E (as mentioned above, the seventh switch S7 is replaced by a diode Dl), based on the third switch S3 being turned on and the sixth switch S6 being turned on, the third voltage V3 established on the third capacitor C3 stores energy to the second inductor L2 via the third energy storage path P S4 stores energy to the second inductor L2, wherein the third energy storage path P S4A path formed through the fourth capacitor C4, the sixth switch S6, the second inductor L2, and the fourth switch S4.
[0066] In a second time period (i.e. time t2 to time t3) following the first time period, the third switch S3 is turned on, the fourth switch S4 is turned off, and the sixth switch S6 is turned on, the energy of the second inductor L2 is discharged to the third capacitor C3 to establish the third voltage V3. Referring to FIG. 5H (as mentioned above, the seventh switch S7 is replaced by the diode D1), based on the third switch S3 being turned on and the sixth switch S6 being turned on (i.e. the third switch S3 is turned from off to on, and the fourth switch S4 is turned from on to off), the energy stored in the second inductor L2 is discharged through the fourth discharge path P R4 to discharge the third capacitor C3 to establish the third voltage V3, wherein the fourth discharge path P R4 A path formed through the second inductor L2, the third switch S3, the third capacitor C3, and the sixth switch S6.
[0067] Referring to FIG. 4G, FIG. 8A, and FIG. 8B, wherein FIG. 4G is a timing diagram of the second capacitor transferring energy to the third capacitor of the interleaved converter of FIG. 7; FIG. 8A is a schematic diagram of a seventh energy storage operation of the interleaved converter of FIG. 7; and FIG. 8B is a schematic diagram of a seventh energy discharge operation of the interleaved converter of FIG. 7. As shown in FIG. 4G, based on the second switch S2 being turned on, the third switch S3 being turned off, the fifth switch S5 being turned on, and the sixth switch S6 being turned off in a first time period (i.e. time t1 to time t2), the second voltage V2 established on the second capacitor C2 stores energy in the first inductor L1. Referring to FIG. 8A, based on the second switch S2 being turned on and the fifth switch S5 being turned on, the second voltage V2 established on the second capacitor C2 stores energy in the first inductor L1 through the seventh energy storage path P S7 to store energy in the first inductor L1, wherein the seventh energy storage path P S7 A path formed through the second capacitor C2, the fifth switch S5, the first inductor L1, and the second switch S2.
[0068] In a second time period (i.e. time t2 to time t3) following the first time period, the second switch S2 is turned on, the third switch S3 is turned off, the fifth switch S5 is turned off, and the sixth switch S6 is turned on, the energy of the first inductor L1 is discharged to the third capacitor C3 to establish the third voltage V3. Referring to FIG. 8B, based on the second switch S2 being turned on and the sixth switch S6 being turned on (i.e. the fifth switch S5 is turned from on to off, and the sixth switch S6 is turned from off to on), the energy stored in the first inductor L1 is discharged through the seventh discharge path P R7 to discharge the third capacitor C3 to establish the third voltage V3, wherein the seventh discharge path P R7 A path formed through the first inductor L1, the second switch S2, the third capacitor C3, the sixth switch S6, and the diode D1.
[0069] Please refer to FIG. 4H, FIG. 8C and FIG. 8D, wherein FIG. 4F is a timing diagram of the third capacitor transferring energy to the second capacitor of the cascaded converter shown in FIG. 3; FIG. 6C is a schematic diagram of the sixth energy storage operation of the cascaded converter shown in FIG. 3; and FIG. 6D is a schematic diagram of the sixth energy release operation of the cascaded converter shown in FIG. 3. As shown in FIG. 4H, based on the second switch S2 being turned off, the third switch S3 being turned on, the fifth switch S5 being turned off and the sixth switch S6 being turned on during the first time period (i.e. time t1 to time t2), the third voltage V3 established on the third capacitor C3 stores energy to the second inductor L2. Please refer to FIG. 8C in conjunction, based on the third switch S3 being turned on and the sixth switch S6 being turned on, the third voltage V3 established on the third capacitor C3 stores energy to the second inductor L2 through the eighth energy storage path P S8 to the second inductor L2, wherein the eighth energy storage path P S8 is a path formed by the third capacitor C3, the third switch S3, the second inductor L2 and the sixth switch S6.
[0070] During the second time period (i.e. time t2 to time t3) after the first time period, the second switch S2 is turned off, the third switch S3 is turned on, the fifth switch S5 is turned on and the sixth switch S6 is turned off, the energy of the second inductor L2 is released to the second capacitor C2 to establish the second voltage V2. Please refer to FIG. 8D in conjunction, based on the third switch S3 being turned on and the fifth switch S5 being turned on (i.e. the fifth switch S5 is turned from off to on, and the sixth switch S6 is turned from on to off), the energy stored in the second inductor L2 is released to the second capacitor C2 through the eighth energy release path P R8 to the second capacitor C2 to establish the second voltage V2, wherein the eighth energy release path P R8 is a path formed by the second inductor L2, the diode D1, the fifth switch S5, the second capacitor C2 and the third switch S3.
[0071] In summary, the cascaded converter proposed in the present application has the following features and advantages: the cascaded converter proposed in the present application only needs seven switches S1-S7 and two inductors L1, L2, and can control four capacitor voltages V1-V4, and can use the two inductors L1, L2 in parallel to control the capacitor voltages V2, V3, thereby saving component cost, having a simple structure and saving space. Therefore, compared with the prior art, the cascaded converter proposed in the present application has the characteristics of high power density.
[0072] The above merely describes the detailed description and the drawings of the preferred embodiments of the present application, and the features of the present application are not limited to this, and are not used to limit the present application. The scope of the present application should be based on the scope of the claims below, and any embodiments similar to the spirit and similar changes of the claims of the present application should be included in the scope of the present application. Any changes or modifications that can be easily thought of by those skilled in the art in the field of the present application can be covered by the claims of the present application.
Claims
1. A cascaded converter, comprising: a four-capacitor comprising a first capacitor, a second capacitor, a third capacitor and a fourth capacitor connected in series, wherein the first capacitor and the second capacitor are connected at a first node, the second capacitor and the third capacitor are connected at a second node, the third capacitor and the fourth capacitor are connected at a third node, and the first capacitor is connected to a first voltage node and the fourth capacitor is connected to a second voltage node; a four-switch comprising a first switch, a second switch, a third switch and a fourth switch connected in series, wherein the first switch and the second switch are connected at a fourth node, the second switch and the third switch are connected at the second node, the third switch and the fourth switch are connected at a fifth node, and the first switch is connected to the first voltage node and the fourth switch is connected to the second voltage node; a fifth switch and a first inductor connected at a sixth node, and the fifth switch is connected to the first node and the first inductor is connected to the fourth node; a sixth switch and a second inductor connected at a seventh node, and the sixth switch is connected to the third node and the second inductor is connected to the fifth node; and a seventh switch connected between the sixth node and the seventh node.
2. The cascaded converter of claim 1, wherein based on a first time period, the first switch is turned on, the second switch is turned off, the fifth switch is turned on and the seventh switch is turned off, a first voltage established on the first capacitor stores energy in the first inductor; in a second time period following the first time period, the first switch is turned off, the second switch is turned on, the fifth switch is turned on and the seventh switch is turned off, the energy in the first inductor is discharged to the second capacitor to establish a second voltage.
3. The cascaded converter of claim 1, wherein based on a first time period, the first switch is turned off, the second switch is turned on, the fifth switch is turned on and the seventh switch is turned off, a second voltage established on the second capacitor stores energy in the first inductor; in a second time period following the first time period, the first switch is turned on, the second switch is turned off, the fifth switch is turned on and the seventh switch is turned off, the energy in the first inductor is discharged to the first capacitor to establish a first voltage.
4. The cascaded converter of claim 1, wherein based on a first time period, the third switch is turned on, the fourth switch is turned off, the sixth switch is turned on and the seventh switch is turned off, a third voltage established on the third capacitor stores energy in the second inductor; in a second time period following the first time period, the third switch is turned off, the fourth switch is turned on, the sixth switch is turned on and the seventh switch is turned off, the energy in the second inductor is discharged to the fourth capacitor to establish a fourth voltage. 5. The interleaved converter of claim 1, wherein a fourth voltage established on the fourth capacitor based on the third switch being off, the fourth switch being on, the sixth switch being on and the seventh switch being off during a first time period stores energy in the second inductor. During a second time period following the first time period, the third switch being on, the fourth switch being off, the sixth switch being on and the seventh switch being off, the energy in the second inductor is discharged to the third capacitor to establish a third voltage.
6. The interleaved converter of claim 1, wherein a second voltage established on the second capacitor based on the second switch being on, the third switch being on, the fifth switch being on, the sixth switch being off and the seventh switch being on during a first time period stores energy in the first and second inductors. During a second time period following the first time period, the second switch being on, the third switch being on, the fifth switch being off, the sixth switch being on and the seventh switch being on, the energy in the first and second inductors is discharged to the third capacitor to establish a third voltage.
7. The interleaved converter of claim 1, wherein a third voltage established on the third capacitor based on the second switch being on, the third switch being on, the fifth switch being off, the sixth switch being on and the seventh switch being on during a first time period stores energy in the first and second inductors. During a second time period following the first time period, the second switch being on, the third switch being on, the fifth switch being on, the sixth switch being off and the seventh switch being on, the energy in the first and second inductors is discharged to the second capacitor to establish a second voltage.
8. An interleaved converter comprising: a fourth capacitor comprising a first capacitor, a second capacitor, a third capacitor and a fourth capacitor connected in series, wherein the first capacitor and the second capacitor are connected at a first node, the second capacitor and the third capacitor are connected at a second node, the third capacitor and the fourth capacitor are connected at a third node, and the first capacitor is connected to a first voltage node and the fourth capacitor is connected to a second voltage node; a fourth switch comprising a first switch, a second switch, a third switch and a fourth switch connected in series, wherein the first switch and the second switch are connected at a fourth node, the second switch and the third switch are connected at the second node, the third switch and the fourth switch are connected at a fifth node, and the first switch is connected to the first voltage node and the fourth switch is connected to the second voltage node; a fifth switch and a first inductor connected at a sixth node, and the fifth switch is connected to the first node and the first inductor is connected to the fourth node; a sixth switch and a second inductor connected at a seventh node, and the sixth switch is connected to the third node and the second inductor is connected to the fifth node; and a diode having an anode connected to the sixth node and a cathode connected to the seventh node. 9. The interleaved converter of claim 8, wherein a first voltage established on the first capacitor based on the first switch being on, the second switch being off and the fifth switch being on during a first time period stores energy in the first inductor; during a second time period following the first time period, the first switch being off, the second switch being on and the fifth switch being on, the energy in the first inductor is discharged to the second capacitor to establish a second voltage.
10. The interleaved converter of claim 8, wherein a second voltage established on the second capacitor based on the first switch being off, the second switch being on and the fifth switch during a first time period stores energy in the first inductor; during a second time period following the first time period, the first switch being on, the second switch being off and the fifth switch being on, the energy in the first inductor is discharged to the first capacitor to establish a first voltage.
11. The interleaved converter of claim 8, wherein a third voltage established on the third capacitor based on the third switch being on, the fourth switch being off and the sixth switch being on during a first time period stores energy in the second inductor; during a second time period following the first time period, the third switch being off, the fourth switch being on and the sixth switch being on, the energy in the second inductor is discharged to the fourth capacitor to establish a fourth voltage.
12. The interleaved converter of claim 8, wherein a fourth voltage established on the fourth capacitor based on the third switch being off, the fourth switch being on and the sixth switch being on during a first time period stores energy in the second inductor; during a second time period following the first time period, the third switch being on, the fourth switch being off and the sixth switch being on, the energy in the second inductor is discharged to the third capacitor to establish a third voltage.
13. The interleaved converter of claim 8, wherein a second voltage established on the second capacitor based on the second switch being on, the third switch being off, the fifth switch being on and the sixth switch being off during a first time period stores energy in the first inductor; during a second time period following the first time period, the second switch being on, the third switch being off, the fifth switch being off and the sixth switch being on, the energy in the first inductor is discharged to the third capacitor to establish a third voltage.
14. The interleaved converter of claim 8, wherein a third voltage established on the third capacitor based on the second switch being off, the third switch being on, the fifth switch being off and the sixth switch being on during a first time period stores energy in the second inductor; during a second time period following the first time period, the second switch being off, the third switch being on, the fifth switch being on and the sixth switch being off, the energy in the second inductor is discharged to the second capacitor to establish a second voltage.
Citation Information
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