Uninterruptible power supply device

Abstract

This uninterruptible power supply device comprises a converter (1), a bidirectional chopper (2), an inverter (3), a control device (5), and a reference voltage generation circuit (50). The converter (1) converts AC power supplied from a first AC power supply (6) into DC power and supplies the DC power to DC bus bars (Lp, Ln). The bidirectional chopper (2) is connected between a power storage device (B1) and the DC bus bars (Lp, Ln) and supplies DC power from the power storage device (B1) to the DC bus bars (Lp, Ln) during power failure of the first AC power supply (6). The inverter (3) converts the DC power received from the DC bus bars (Lp, Ln) into AC power and supplies the AC power to a load (8). The control device (5) controls any of the converter (1), the bidirectional chopper (2), and the inverter (3) according to a power supply mode of the uninterruptible power supply device so that the DC voltage of the DC bus bars (Lp, Ln) becomes a reference voltage. The reference voltage generation circuit (50) generates the reference voltage so as to satisfy the DC voltage required by each of the converter (1), the bidirectional chopper (2), and the inverter (3).

Description

uninterruptible power supply

[0001] The present disclosure relates to an uninterruptible power supply, and more particularly to an uninterruptible power supply that converts AC power supplied from an AC power source into DC power, and then converts the DC power into AC power to supply to a load.

[0002] For example, International Publication No. 2016 / 092613 (Patent Document 1) discloses an uninterruptible power supply including a converter that converts AC power supplied from an AC power source into DC power and supplies the DC power to a DC bus, a bidirectional chopper that exchanges DC power between the DC bus and a power storage device, an inverter that converts the DC power received from the DC bus into AC power and supplies the AC power to a load, and a control device that controls the converter, bidirectional chopper, and inverter.

[0003] When the AC power supply is normal, the control device controls the converter so that the DC voltage of the DC bus becomes the reference voltage, controls the bidirectional chopper so that the DC power of the DC bus is stored in the power storage device, and controls the inverter so that the inverter outputs a sinusoidal AC voltage.

[0004] In the event of a power outage in the AC power supply, the control device stops operation of the converter, controls the bidirectional chopper so that the DC voltage of the DC bus becomes the reference voltage, and controls the inverter so that it outputs a sinusoidal AC voltage.

[0005] International Publication No. 2016 / 092613

[0006] In the above-described uninterruptible power supply, the DC voltage of the DC bus (i.e., the reference voltage) needs to be higher than the floating charge voltage of the energy storage device. Also, in order to supply a sinusoidal AC voltage to the load, the DC voltage of the DC bus (i.e., the reference voltage) needs to be higher than twice the amplitude of the AC voltage.

[0007] Therefore, in the past, the reference voltage was set to the maximum DC voltage that the converter could stably output. However, increasing the DC voltage of the DC bus (i.e., the reference voltage) increases the switching loss of the transistors included in the converter, bidirectional chopper, and inverter, which raises concerns about a decrease in the efficiency of the uninterruptible power supply.

[0008] On the other hand, if the reference voltage is lowered, depending on the magnitude of the AC voltage supplied from the AC power source or the type of load, it may become difficult to suppress the oscillations that occur in the DC voltage of the DC bus, and there is a concern that the power supply reliability of the uninterruptible power supply may decrease.

[0009] The present disclosure has been made to solve such problems, and its purpose is to provide an uninterruptible power supply that can improve efficiency while maintaining high power supply reliability.

[0010] An uninterruptible power supply according to the present disclosure has multiple power supply modes for a load. The uninterruptible power supply includes a converter, a bidirectional chopper, an inverter, a control device, and a reference voltage generation circuit. The converter converts AC power supplied from a first AC power source into DC power and supplies it to a DC bus. The bidirectional chopper is connected between a power storage device and the DC bus and supplies DC power from the power storage device to the DC bus in the event of a power outage of the first AC power source. The inverter converts DC power received from the DC bus into AC power and supplies it to the load. The control device controls any of the converter, bidirectional chopper, and inverter depending on the power supply mode of the uninterruptible power supply so that the DC voltage of the DC bus becomes the reference voltage. The reference voltage generation circuit generates a reference voltage that satisfies the DC voltage required by the converter, bidirectional chopper, and inverter, respectively.

[0011] According to the present disclosure, it is possible to provide an uninterruptible power supply that can improve efficiency while maintaining high power supply reliability.

[0012] 1 is a circuit block diagram showing a configuration of an uninterruptible power supply according to the present embodiment; FIG. 2 is a block diagram showing an example of the hardware configuration of a control device; FIG. 3 is a circuit block diagram showing a power supply mode of the uninterruptible power supply; FIG. 4 is a circuit block diagram showing a power supply mode in the event of a power outage of the commercial AC power supply or the bypass AC power supply; FIG. 5 is a block diagram showing a configuration of a control device; FIG. 6 is a block diagram showing an example of the configuration of a first calculation unit; FIG. 7 is a block diagram showing an example of the configuration of a second calculation unit; FIG. 8 is a block diagram showing a first example of the configuration of a third calculation unit; FIG. 9 is a block diagram showing a second example of the configuration of the third calculation unit; FIG. 10 is a block diagram showing an example of the configuration of a converter control unit; FIG. 11 is a block diagram showing an example of the configuration of a bidirectional chopper control unit; and FIG. 12 is a block diagram showing an example of the configuration of an inverter control unit.

[0013] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following, the same or corresponding parts in the drawings will be denoted by the same reference numerals, and their description will not be repeated in principle.

[0014] 1 is a circuit block diagram showing the configuration of an uninterruptible power supply according to an embodiment of the present disclosure. As shown in Fig. 1, the uninterruptible power supply includes capacitors C1 to C6, Cd, reactors L1 to L6, current detectors CT1 to CT7, converter 1, DC positive bus Lp, DC negative bus Ln, bidirectional chopper 2, inverter 3, switches S1 to S6, an operation unit 4, and a control device 5.

[0015] The uninterruptible power supply receives three-phase AC power of commercial frequency from a commercial AC power supply 6 and a bypass AC power supply 7, and supplies the three-phase AC power of commercial frequency to a load 8. The commercial AC power supply 6 outputs three-phase AC voltages Vu1, Vv1, and Vw1 to AC output terminals 6a to 6c, respectively. The commercial AC power supply 6 corresponds to an example of a "first AC power supply," and the three-phase AC voltages Vu1, Vv1, and Vw1 correspond to an example of a "first AC input voltage."

[0016] The instantaneous values ​​of the three-phase AC voltages Vu1, Vv1, and Vw1 are detected by the control device 5. The control device 5 determines whether a power outage of the commercial AC power supply 6 has occurred, based on the AC input voltages Vu1, Vv1, and Vw1 from the commercial AC power supply 6.

[0017] The bypass AC power supply 7 outputs three-phase AC voltages Vu2, Vv2, and Vw2 to AC output terminals 7a to 7c, respectively. The bypass AC power supply 7 corresponds to an embodiment of a "second AC power supply," and the three-phase AC voltages Vu2, Vv2, and Vw2 correspond to an embodiment of a "second AC input voltage." The bypass AC power supply 7 may be a commercial AC power supply or a generator. The instantaneous values ​​of the three-phase AC voltages Vu2, Vv2, and Vw2 are detected by the control device 5.

[0018] The AC input terminals 8a to 8c of the load 8 receive a three-phase AC voltage from the uninterruptible power supply. The load 8 is driven by the three-phase AC power supplied from the uninterruptible power supply.

[0019] First electrodes of capacitors C1 to C3 are connected to AC output terminals 6a to 6c of commercial AC power supply 6, respectively, and second electrodes thereof are connected to each other. First terminals of reactors L1 to L3 are connected to AC output terminals 6a to 6c of commercial AC power supply 6, respectively, and second terminals thereof are connected to three AC nodes of converter 1, respectively.

[0020] Capacitors C1 to C3 and reactors L1 to L3 constitute AC filter F1. AC filter F1 is a low-pass filter that passes AC current of a commercial frequency from commercial AC power supply 6 to converter 1 and prevents signals of a switching frequency from flowing from converter 1 to commercial AC power supply 6. Current detectors CT1 to CT3 detect AC currents I1 to I3 (hereinafter also referred to as "AC input currents I1 to I3") flowing through reactors L1 to L3, respectively, and provide signals indicating the detected values ​​to control device 5.

[0021] A positive DC node of the converter 1 is connected to a positive DC node of the inverter 3 via a positive DC bus Lp. A negative DC node of the converter 1 is connected to a negative DC node of the inverter 3 via a negative DC bus Ln. A capacitor Cd is connected between the DC buses Lp and Ln to smooth the DC voltage VDC between the DC buses Lp and Ln. The instantaneous value of the DC voltage VDC is detected by a control device 5.

[0022] The converter 1 is a well-known device including a plurality of transistors and a plurality of diodes, and is controlled by a control device 5. The converter 1 can be configured using a multilevel circuit such as a two-level circuit or a three-level circuit. When three-phase AC power is normally supplied from the commercial AC power supply 6 (when the commercial AC power supply 6 is operating normally), the converter 1 converts the three-phase AC power from the commercial AC power supply 6 into DC power. The DC power generated by the converter 1 is supplied to DC buses Lp and Ln. When the supply of three-phase AC power from the commercial AC power supply 6 is stopped (when the commercial AC power supply 6 is in a power outage), the operation of the converter 1 is stopped.

[0023] The bidirectional chopper 2 is connected between the battery B1 and the DC buses Lp, Ln, and performs bidirectional DC voltage conversion between the battery B1 and the DC buses Lp, Ln. The bidirectional chopper 2 is a well-known device including a plurality of transistors and a plurality of diodes, and is controlled by the control device 5. When the commercial AC power supply 6 is operating normally, the bidirectional chopper 2 stores the DC power generated by the converter 1 in the battery B1, and in response to a power outage of the commercial AC power supply 6, supplies the DC power of the battery B1 to the DC buses Lp, Ln.

[0024] Battery B1 corresponds to one example of a "power storage device" that stores DC power. The instantaneous value of the terminal voltage VB of battery B1 (hereinafter also referred to as "battery voltage VB") is detected by control device 5. An electric double layer capacitor or a flywheel may be connected to the uninterruptible power supply instead of battery B1. Current detector CT7 detects current IB (hereinafter also referred to as "battery current IB") flowing through battery B1 and provides a signal indicating the detected value to control device 5.

[0025] The inverter 3 is a well-known device including a plurality of transistors and a plurality of diodes, and is controlled by the control device 5. The inverter 3 can be configured using a multilevel circuit such as a two-level circuit or a three-level circuit. The inverter 3 converts DC power received from the DC buses Lp and Ln into three-phase AC power of a commercial frequency.

[0026] The three AC nodes of inverter 3 are connected to first terminals of reactors L4 to L6, respectively. Second terminals of reactors L4 to L6 are connected to first terminals of switches S1 to S3, respectively, and second terminals of switches S1 to S3 are connected to AC input terminals 8a to 8c of load 8. First electrodes of capacitors C4 to C6 are connected to second terminals of reactors L4 to L6, respectively, and second electrodes of capacitors C4 to C6 are both connected to second electrodes of capacitors C1 to C3.

[0027] Capacitors C4 to C6 and reactors L4 to L6 constitute an AC filter F2. The AC filter F2 is a low-pass filter that allows AC current of a commercial frequency to flow from the inverter 3 to the load 8 and prevents signals of a switching frequency from flowing from the inverter 3 to the load 8. In other words, the AC filter F2 converts the three-phase rectangular wave voltage output from the inverter 3 into sinusoidal three-phase AC voltages Vu, Vv, and Vw. The instantaneous values ​​of the three-phase AC voltages Vu, Vv, and Vw (hereinafter also referred to as "AC output voltages Vu, Vv, and Vw") are detected by the control device 5.

[0028] First terminals of the switches S4 to S6 are connected to AC output terminals 7a to 7c of the bypass AC power supply 7, respectively, and second terminals thereof are connected to AC input terminals 8a to 8c of the load 8. The switches S1 to S6 are controlled by the control device 5.

[0029] The current detectors CT4 to CT6 detect three-phase AC currents Iu, Iv, Iw (hereinafter also referred to as "load currents Iu, Iv, Iw") flowing between the inverter 3 and the load 8, and provide signals indicating the detected values ​​to the control device 5. Specifically, the current detector CT4 detects the AC current Iu flowing between the first AC node of the inverter 3 and the AC input terminal 8a of the load 8. The current detector CT5 detects the AC current Iv flowing between the second AC node of the inverter 3 and the AC input terminal 8b of the load 8. The current detector CT6 detects the AC current Iw flowing between the third AC node of the inverter 3 and the AC input terminal 8c of the load 8.

[0030] In a constant inverter power supply mode in which the three-phase AC power generated by the inverter 3 is supplied to the load 8, the control device 5 turns on the switches S1 to S3 and turns off the switches S4 to S6.

[0031] In the constant bypass power supply mode in which three-phase AC power is supplied from the bypass AC power supply 7 to the load 8, the control device 5 turns on the switches S1 to S3 and also turns on the switches S4 to S6. The power supply modes of the uninterruptible power supply will be described in detail later.

[0032] The operation unit 4 includes a plurality of buttons operated by the user of the uninterruptible power supply, a display that displays various information, etc. By operating the operation unit 4, the user can turn the power supply of the uninterruptible power supply on and off, and select either the constant inverter power supply mode or the constant bypass power supply mode.

[0033] The control device 5 controls the entire uninterruptible power supply based on signals from the operation unit 4, AC input voltages Vu1, Vv1, Vw1 from the commercial AC power supply 6, AC input currents I1 to I3, DC voltage VDC between DC buses Lp and Ln, battery voltage VB, load currents Iu, Iv, Iw, AC output voltages Vu, Vv, Vw, AC input voltages Vu2, Vv2, Vw3 from the bypass AC power supply 7, etc.

[0034] 2 is a block diagram showing an example of the hardware configuration of the control device 5. Typically, the control device 5 can be configured by a microcomputer in which a predetermined program is stored in advance.

[0035] 2, the control device 5 includes a CPU (Central Processing Unit) 10, a memory 12, and an input / output (I / O) circuit 14. The CPU 10, the memory 12, and the I / O circuit 14 can exchange data with one another via a bus 16. Programs are stored in a partial area of ​​the memory 12, and the CPU 10 executes these programs to realize various functions described below. The I / O circuit 14 inputs and outputs signals and data to and from the outside of the control device 5.

[0036] 2, at least a part of the control device 5 may be configured using a circuit such as an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit).Furthermore, at least a part of the control device 5 may be configured using an analog circuit.

[0037] <Power Supply Modes of the Uninterruptible Power Supply> Figure 3 is a circuit block diagram showing the power supply modes of the uninterruptible power supply. To simplify the drawing and explanation, Figure 3 shows only the parts related to one of the three phases, and only switches S1 and S4 of switches S1 to S6. Also, AC filters F1 and F2, current detectors CT1 to CT6, etc. are not shown.

[0038] 3A is a circuit block diagram showing the continuous inverter power supply mode. When the continuous inverter power supply mode is selected while the commercial AC power supply 6 is normal, the switch S1 is turned on and the switch S4 is turned off, and a load current Iu is supplied from the inverter 3 to the load 8 via the switch S1.

[0039] The control device 5 controls the converter 1 so as to convert AC power supplied from the commercial AC power supply 6 into DC power and supply the DC power to the DC buses Lp, Ln. Specifically, the control device 5 controls the converter 1 so that the voltage VDC across the terminals of the capacitor Cd (i.e., the DC voltage VDC between the DC buses Lp, Ln) becomes equal to the reference voltage VDCr.

[0040] Furthermore, the control device 5 controls the bidirectional chopper 2 so as to store the DC power of the DC buses Lp and Ln in the battery B1. Specifically, the control device 5 controls the bidirectional chopper 2 so that the battery voltage VB becomes equal to the reference voltage VBr.

[0041] Furthermore, the control device 5 controls the inverter 3 to convert DC power supplied from the converter 1 via the DC buses Lp and Ln into AC power and supply it to the load 8. Specifically, the control device 5 controls the inverter 3 to generate sinusoidal AC output voltages Vu, Vv, and Vw.

[0042] In this case, most of the AC input current I1 supplied from the commercial AC power supply 6 is converted into a load current Iu by the converter 1 and the inverter 3 and supplied to the load 8, and a portion of the AC input current I1 is converted into a charging current IB by the bidirectional chopper 2 and supplied to the battery B1.

[0043] In addition, if the inverter 3 or the converter 1 fails during the constant inverter power supply mode, the switch S4 is turned on and the switch S1 is turned off, and AC current is supplied from the bypass AC power supply 7 to the load 8 via the switch S4.

[0044] 3B is a circuit block diagram showing the constant bypass power supply mode. When the constant bypass power supply mode is selected while the bypass AC power supply 7 is normal, the switch S1 and the switch S4 are turned on. AC power is supplied from the bypass AC power supply 7 to the load 8 via the switch S4.

[0045] The control device 5 stops the operation of the converter 1 and controls the inverter 3 to convert the AC power supplied from the bypass AC power supply 7 via the switch S4 into DC power and supply it to the DC buses Lp, Ln. Specifically, the control device 5 controls the inverter 3 so that the voltage VDC across the terminals of the capacitor Cd (i.e., the DC voltage VDC between the DC buses Lp, Ln) becomes the reference voltage VDCr. This is to turn off the switch S4 and immediately supply the sinusoidal AC output voltage Vu generated by the inverter 3 to the load 8 when a power outage occurs in the bypass AC power supply 7.

[0046] [Correction based on Rule 91, 17.09.2025] For inverter 3 to generate a sinusoidal AC output voltage Vu, the DC voltage VDC between DC buses Lp and Ln must be higher than twice the amplitude of the AC output voltage Vu. Meanwhile, a discharge resistor (not shown) is connected in parallel with capacitor Cd between DC buses Lp and Ln to dissipate the residual charge in capacitor Cd after the uninterruptible power supply is shut down. Therefore, in the continuous bypass power supply mode, stopping the operation of converter 1 may cause the charge stored in capacitor Cd to be discharged by the discharge resistor, resulting in a drop in DC voltage VDC, which may result in the inability to generate a sinusoidal AC output voltage Vu. To prevent this drop in DC voltage VDC, control device 5 controls inverter 3 in the continuous bypass power supply mode so that DC voltage VDC between DC buses Lp and Ln becomes equal to reference voltage VDCr.

[0047] Furthermore, the control device 5 controls the bidirectional chopper 2 so as to store the DC power of the DC buses Lp and Ln in the battery B1. Specifically, the control device 5 controls the bidirectional chopper 2 so that the battery voltage VB becomes equal to the reference voltage VBr.

[0048] In this case, most of the AC current supplied from the bypass AC power supply 7 is supplied to the load 8 via the switch S4, and a portion of the AC current is converted into a charging current IB by the inverter 3 and supplied to the battery B1.

[0049] [Correction based on Rule 91, 17.09.2025] In this way, in the constant inverter power supply mode, the three-phase AC voltages Vu1, Vv1, and Vw1 supplied from the commercial AC power supply 6 are converted by the converter 1 into the DC voltage VDC, and the DC voltage VDC is then converted by the inverter 3 into the three-phase AC voltages Vu, Vv, and Vw which are supplied to the load 8, so that high-quality three-phase AC voltages Vu, Vv, and Vw can be supplied to the load 8. However, in the constant inverter power supply mode, power loss always occurs in the converter 1 and the inverter 3, and there is a concern that the power loss may become large.

[0050] [Correction based on Rule 91, 17.09.2025] In contrast, in the constant bypass power supply mode, the three-phase AC voltages Vu2, Vv2, and Vv3 from the bypass AC power supply 7 are supplied to the load 8 as is, which reduces the quality of the three-phase AC voltage supplied to the load 8. However, in the constant bypass power supply mode, the power loss in the converter 1 and the inverter 3 is smaller than in the constant inverter power supply mode. For this reason, the constant bypass power supply mode is also called the "eco mode."

[0051] [Correction based on Rule 91, 17.09.2025] Figure 4 is a circuit block diagram showing the power supply mode when a power outage occurs in the commercial AC power supply 6 or the bypass AC power supply 7. In the continuous inverter power supply mode, if a power outage occurs in the commercial AC power supply 6, the control device 5 stops the operation of the converter 1 and controls the bidirectional chopper 2 to supply DC power from the battery B1 to the DC buses Lp, Ln. In the continuous bypass power supply mode, if a power outage occurs in the bypass AC power supply 7, the control device 5 controls the bidirectional chopper 2 to supply DC power from the battery B1 to the DC buses Lp, Ln. Specifically, the control device 5 controls the bidirectional chopper 2 so that the DC voltage VDC between the DC buses Lp, Ln becomes the reference voltage VDCr.

[0052] Furthermore, the control device 5 controls the inverter 3 to convert DC power supplied from the bidirectional chopper 2 via the DC buses Lp and Ln into AC power and supply it to the load 8. Specifically, the control device 5 controls the inverter 3 to generate sinusoidal AC output voltages Vu, Vv, and Vw.

[0053] In this case, the entire discharge current IB of the battery B1 is converted into a load current Iu by the inverter 3 and supplied to the load 8.

[0054] As described above, the control device 5 controls any one of the converter 1, the bidirectional chopper 2, and the inverter 3 depending on the power supply mode and whether or not a power outage occurs so that the DC voltage VDC becomes the reference voltage VDCr.

[0055] Conventionally, the reference voltage VDCr in controlling this DC voltage VDC has been set to the maximum value of the DC voltage VDC that can be stably output by the converter 1, based on the rated values ​​of the AC input voltages Vu1, Vv1, Vw1, the rated values ​​of the AC output voltages Vu, Vv, Vw, the floating charge voltage of the battery B1, etc. However, if the DC voltage VDC between the DC buses Lp, Ln (i.e., the reference voltage VDCr) is increased, switching losses of the transistors included in each of the converter 1, the bidirectional chopper 2, and the inverter 3 increase, which raises concerns about a decrease in the efficiency of the uninterruptible power supply.

[0056] Therefore, in this embodiment, the reference voltage VDCr is set so as to satisfy the DC voltage VDC required by each of the converter 1, the bidirectional chopper 2, and the inverter 3. This allows the DC voltage VDC (i.e., the reference voltage VDCr) to be set to a value lower than the maximum value of the DC voltage VDC that can be stably output by the converter 1. This therefore reduces the switching loss of the transistors included in the converter 1, the bidirectional chopper 2, and the inverter 3, making it possible to improve the efficiency of the uninterruptible power supply.

[0057] <Control Configuration of Uninterruptible Power Supply> Fig. 5 is a block diagram showing the configuration of the control device 5. As shown in Fig. 5, the control device 5 includes voltage detectors 21 to 24, a reference voltage generation circuit 50, a converter control unit 55, a bidirectional chopper control unit 56, an inverter control unit 57, a power failure detector 58, and a mode setting unit 59.

[0058] The voltage detector 21 detects instantaneous values ​​of AC input voltages Vu1, Vv1, and Vw1 from the commercial AC power supply 6 and outputs a signal indicating the detected value. The voltage detector 22 detects the DC voltage VDC between the DC buses Lp and Ln and outputs a signal indicating the detected value. The voltage detector 23 detects the battery voltage VB and outputs a signal indicating the detected value. The voltage detector 24 detects instantaneous values ​​of AC output voltages Vu, Vv, and Vw from the inverter 3 and outputs a signal indicating the detected value.

[0059] The reference voltage generating circuit 50 generates a reference voltage VDCr based on the AC input voltages Vu1, Vv1, and Vw1, the battery voltage VB, the battery current IB, and the load currents Iu, Iv, and Iw. Specifically, the reference voltage generating circuit 50 includes a first calculation unit 51, a second calculation unit 52, a third calculation unit 53, and a maximum value calculation unit 54.

[0060] The first calculation unit 51 calculates a minimum allowable voltage VDC_cnv required for power conversion in the converter 1 based on the AC input voltages Vu1, Vv1, and Vw1. The second calculation unit 52 calculates a minimum allowable voltage VDC_chp required for DC voltage conversion in the bidirectional chopper 2 based on the battery voltage VB and the battery current IB. The third calculation unit 53 calculates a minimum allowable voltage VDC_inv required for power conversion in the inverter 3 based on the load currents Iu, Iv, and Iw. The minimum allowable voltage VDC_cnv corresponds to an example of a "first minimum allowable voltage," the minimum allowable voltage VDC_chp corresponds to an example of a "second minimum allowable voltage," and the minimum allowable voltage VDC_inv corresponds to an example of a "third minimum allowable voltage."

[0061] The maximum value calculation unit 54 calculates the maximum value of the calculated minimum allowable voltages VDC_cnv, VDC_chp, and VDC_inv, and provides the calculated maximum value as a reference voltage VDCr to the converter control unit 55, the bidirectional chopper control unit 56, and the inverter control unit 57.

[0062] The power failure detector 58 detects whether a power failure has occurred in the commercial AC power supply 6 based on the AC input voltages Vu1, Vv1, and Vw1, and outputs a power failure detection signal PF indicating the detection result. Specifically, if the AC input voltages Vu1, Vv1, and Vw1 are higher than a predetermined threshold voltage, the power failure detector 58 determines that the commercial AC power supply 6 is healthy and outputs a power failure detection signal PF at an inactive "L" level. If the AC input voltages Vu1, Vv1, and Vw1 are lower than the predetermined threshold voltage, the power failure detector 58 determines that a power failure has occurred in the commercial AC power supply 6 and outputs a power failure detection signal PF at an active "H" level.

[0063] The mode setting unit 59 sets the power supply mode of the uninterruptible power supply device based on a signal from the operation unit 4, and outputs a mode signal MD indicating the set power supply mode.

[0064] The converter control unit 55 controls the converter 1 based on the reference voltage VDCr from the reference voltage generation circuit 50, the power outage detection signal PF from the power outage detector, the mode signal MD from the mode setting unit 59, the AC input currents I1 to I3 indicated by the output signals of the current detectors CT1 to CT3, the AC input voltages Vu1, Vv1, Vw1 detected by the voltage detector 21, and the DC voltage VDC between the DC buses Lp and Ln detected by the voltage detector 22.

[0065] The bidirectional chopper control unit 56 controls the bidirectional chopper 2 based on the reference voltage VDCr from the reference voltage generation circuit 50, the power failure detection signal PF from the power failure detector, the DC voltage VDC between the DC buses Lp and Ln detected by the voltage detector 22, the battery voltage VB detected by the voltage detector 23, etc.

[0066] The inverter control unit 57 controls the inverter 3 based on the mode signal MD from the mode setting unit 59, the load currents Iu, Iv, Iw indicated by the output signals of the current detectors CT4 to CT6, the AC output voltages Vu, Vv, Vw detected by the voltage detector 24, the DC voltage VDC between the DC buses Lp, Ln detected by the voltage detector 22, etc.

[0067] 6 to 9, the detailed configuration of the reference voltage generation circuit 50 shown in Fig. 5 will be described. Here, the detailed configurations of the first calculation unit 51, the second calculation unit 52, and the third calculation unit 53 will be described.

[0068] (1) First Calculation Unit 51 Fig. 6 is a block diagram showing an example of the configuration of the first calculation unit 51 shown in Fig. 5. As shown in Fig. 6, the first calculation unit 51 includes an effective value calculation unit 510, a maximum value calculation unit 512, and a minimum allowable voltage generation unit 514.

[0069] The effective value calculation unit 510 calculates the effective values ​​Vu1rms, Vv1rms, and Vw1rms of the AC input voltages Vu1, Vv1, and Vw1, and outputs the effective values ​​to the maximum value calculation unit 512.

[0070] The maximum value calculation unit 512 calculates the maximum value V1rms of the effective values ​​Vu1rms, Vv1rms, and Vw1rms, and outputs the maximum value V1rms to the minimum allowable voltage generation unit 514.

[0071] The minimum allowable voltage generation unit 514 generates the minimum allowable voltage VDC_cnv based on the maximum effective value V1rms of the AC input voltage. In one aspect, the minimum allowable voltage generation unit 514 has a standard value of the reference voltage VDCr calculated from the rated value V1r of the AC input voltages Vu1, Vv1, and Vw1. The minimum allowable voltage generation unit 514 generates the minimum allowable voltage VDC_cnv by multiplying this standard value by the ratio (V1rms / V1r) of the maximum value V1rms and the rated value V1r.

[0072] As described above, the converter 1 converts the AC input voltages Vu1, Vv1, and Vw1 into the DC voltage VDC. Voltage ripple occurs in the DC voltage VDC depending on the state of the load 8, etc. In order to suppress this voltage ripple by controlling the DC voltage VDC by the converter 1, the standard value of the reference voltage VDCr is set to be higher than the value of the DC voltage VDC calculated from the rated value V1r of the AC input voltage.

[0073] However, if the commercial AC power supply 6 is unstable and the effective values ​​of the AC input voltages Vu1, Vv1, and Vw1 become high, the value of the DC voltage VDC also increases due to the rectification action of the converter 1. In this case, it may become difficult for the converter 1 to suppress the voltage ripple and control the DC voltage VDC to the reference value.

[0074] Therefore, when the effective values ​​of the AC input voltages Vu1, Vv1, and Vw1 become large, the first calculation unit 51 sets the minimum allowable voltage VDC_cnv to a value higher than the reference value in order to ensure a tolerance for control of the DC voltage VDC in the converter 1.

[0075] (2) Second Calculation Unit 52 Fig. 7 is a block diagram showing an example of the configuration of the second calculation unit 52 shown in Fig. 5. As shown in Fig. 7, the second calculation unit 52 includes a multiplier 520, an adder 522, and a minimum allowable voltage generation unit 524.

[0076] The multiplier 520 calculates the amount of voltage drop that may occur in the bidirectional chopper 2 by multiplying the battery current IB detected by the current detector CT7 by the conversion coefficient ki. This amount of voltage drop corresponds to the amount of voltage drop that occurs in the transistors, reactors, and the like included in the bidirectional chopper 2. The conversion coefficient ki for calculating the amount of voltage drop from the battery current IB can be set in advance by experiment or calculation in accordance with the circuit configuration of the bidirectional chopper 2.

[0077] The adder 522 adds the amount of voltage drop from the multiplier 520 and the battery voltage VB detected by the voltage detector 23. The minimum allowable voltage generation unit 524 generates a minimum allowable voltage VDC_chp based on the output signal of the adder 522. The minimum allowable voltage VDC_chp is a value obtained by adding a voltage value that can compensate for the amount of voltage drop generated in the bidirectional chopper 2 to the battery voltage VB.

[0078] When storing DC voltage in battery B1, bidirectional chopper 2 steps down DC voltage VDC between DC buses Lp, Ln and supplies the stepped-down voltage to battery B1. When supplying DC voltage from battery B1 to inverter 3, bidirectional chopper 2 steps up battery voltage VB and outputs the stepped-up voltage between DC buses Lp, Ln. Therefore, DC voltage VDC needs to be higher than battery voltage VB. Conventionally, reference voltage VBr was set based on the floating charge voltage of battery B1, and reference voltage VDCr was set to be equal to or higher than the value obtained by adding a predetermined margin voltage to reference voltage VBr.

[0079] On the other hand, in the present embodiment, the minimum allowable voltage VDC_chp is generated so as to compensate for the amount of voltage drop that occurs in the bidirectional chopper 2 in proportion to the battery current IB. The minimum allowable voltage VDC_chp can be made lower than the conventional reference voltage VDCr.

[0080] (3) Third Calculation Unit 53 Fig. 8 is a block diagram showing a first configuration example of the third calculation unit 53 shown in Fig. 5. As shown in Fig. 8, the third calculation unit 53 is configured to include moving average circuits 530 and 532, a subtractor 534, a comparator 536, and a minimum allowable voltage generation unit 538.

[0081] The moving average circuit 530 calculates the moving average value of the load currents Iu, Iv, Iw detected by the current detectors CT4 to CT6 over one period.

[0082] The moving average circuit 532 calculates the moving average value of the load currents Iu, Iv, Iw detected by the current detectors CT4 to CT6 over a half cycle.

[0083] The subtractor 534 calculates harmonic components contained in the load currents Iu, Iv, and Iw by subtracting the moving average value of the load current over 1 / 2 cycle from the moving average value of the load current over one cycle.

[0084] The comparator 536 compares the calculated harmonic components of the load currents Iu, Iv, and Iw with a predetermined threshold X1 and sets a flag φF based on the comparison result. If the harmonic components of the load currents Iu, Iv, and Iw are smaller than the threshold X1, the comparator 536 sets the flag φF to the inactivation level "L". If the harmonic components of the load currents are larger than the threshold X1, the comparator 536 sets the flag φF to the activation level "H".

[0085] The minimum allowable voltage generation unit 538 generates the minimum allowable voltage VDC_inv based on the flag φF provided by the comparator 536. Specifically, when the flag φF is at the "L" level, the minimum allowable voltage generation unit 538 sets the minimum allowable voltage VDC_inv to a predetermined reference value. This reference value is set to a value higher than a voltage twice the amplitude of the AC output voltages Vu, Vv, and Vw. This is because if the DC voltage VDC becomes lower than a voltage twice the amplitude of the AC output voltages Vu, Vv, and Vw, the inverter 3 will not be able to generate the sinusoidal AC output voltages Vu, Vv, and Vw.

[0086] When flag φF is at the "H" level, minimum allowable voltage generation unit 538 sets minimum allowable voltage VDC_inv to a value higher than the reference value. In one aspect, minimum allowable voltage generation unit 538 generates minimum allowable voltage VDC_inv by adding a constant value to the reference value. In another aspect, minimum allowable voltage generation unit 538 generates minimum allowable voltage VDC_inv by adding a value corresponding to the magnitude of the harmonic components of the load current to the reference value. In this case, as the harmonic components of load currents Iu, Iv, and Iw increase, minimum allowable voltage VDC_inv becomes higher.

[0087] If the load 8 is a half-wave rectified load, the load currents Iu, Iv, and Iw are not sinusoidal but have asymmetric waveforms between positive and negative, causing the DC voltage VDC to oscillate. If the DC voltage VDC oscillates and falls below a reference value, the inverter 3 may be unable to generate the sinusoidal AC output voltages Vu, Vv, and Vw. Furthermore, when the DC voltage VDC oscillates and falls below the reference value, the bidirectional chopper 2 may output the DC voltage of battery B1 between DC buses Lp and Ln to compensate for the drop in DC voltage VDC. In this case, the oscillation of the DC voltage VDC causes repeated charging and discharging of battery B1, which may result in deterioration of battery B1.

[0088] Therefore, in the first configuration example, when it is determined from the load currents Iu, Iv, and Iw that the load 8 is a half-wave rectified load, the minimum allowable voltage VDC_inv is increased to prevent the DC voltage VDC from falling below the reference value.

[0089] Fig. 9 is a block diagram showing a second example configuration of the third calculation unit 53 shown in Fig. 5. As shown in Fig. 9, the third calculation unit 53 includes an effective value calculation unit 540, a maximum value calculation unit 542, a minimum value calculation unit 544, a subtractor 546, a comparator 548, and a minimum allowable voltage generation unit 550.

[0090] The effective value calculation unit 540 calculates the effective value Iurms of the load current Iu detected by the current detector CT4. The effective value calculation unit 540 calculates the effective value Ivrms of the load current Iv detected by the current detector CT5. The effective value calculation unit 540 calculates the effective value Iwrms of the load current Iw detected by the current detector CT6.

[0091] The maximum value calculation unit 542 calculates the maximum value Irmsmax of the effective values ​​Iurms, Ivrms, and Iwrms of the load current. The minimum value calculation unit 544 calculates the minimum value Irmsmin of the effective values ​​Iurms, Ivrms, and Iwrms of the load current.

[0092] The subtractor 546 subtracts the minimum value Irmsmin from the maximum value Irmsmax to obtain the difference ΔIrms between the maximum value Irmsmax and the minimum value Irmsmin.

[0093] The comparator 548 compares the difference ΔIrms with a predetermined threshold X2 and sets a flag φF based on the comparison result. If the difference ΔIrms is smaller than the threshold X2, the comparator 548 sets the flag φF to the inactivation level "L" level. If the difference ΔIrms is larger than the threshold X2, the comparator 548 sets the flag φF to the activation level "H" level.

[0094] The minimum allowable voltage generation unit 550 generates the minimum allowable voltage VDC_inv based on the flag φF provided by the comparator 548. Specifically, when the flag φF is at the "L" level (ΔIrms<X2), the minimum allowable voltage generation unit 550 sets the minimum allowable voltage VDC_inv to a predetermined reference value. This reference value is set to a value higher than a voltage twice the amplitude of the AC output voltages Vu, Vv, and Vw.

[0095] When flag φF is at the "H" level (ΔIrms>X2), minimum allowable voltage generation unit 550 sets minimum allowable voltage VDC_inv to a value higher than the reference value. In one aspect, minimum allowable voltage generation unit 550 generates minimum allowable voltage VDC_inv by adding a constant value to the reference value. In another aspect, minimum allowable voltage generation unit 550 sets minimum allowable voltage VDC_inv by adding a value proportional to the magnitude of difference ΔIrms to the reference value. In this case, as difference ΔIrms increases, minimum allowable voltage VDC_inv becomes higher.

[0096] If the load 8 is an unbalanced load, the load currents Iu, Iv, and Iw become unbalanced, causing the DC voltage VDC to oscillate. When the DC voltage VDC oscillates, as described in FIG. 8 , the inverter 3 is unable to generate the sinusoidal AC output voltages Vu, Vv, and Vw, and this may lead to deterioration of the battery B1. Therefore, in the second configuration example, if it is determined from the load currents Iu, Iv, and Iw that the load 8 is an unbalanced load, the minimum allowable voltage VDC_inv is increased to prevent the DC voltage VDC from falling below the reference value.

[0097] As described above, the third calculation unit 53 is configured to determine the type of the load 8 from the load currents Iu, Iv, and Iw, and to generate the minimum allowable voltage VDC_inv according to the type of the load 8 .

[0098] 5 , maximum value calculation unit 54 calculates the maximum value of the minimum allowable voltages VDC_cnv, VDC_chp, and VDC_inv calculated by the three calculation units 51 to 53. Maximum value calculation unit 54 provides the calculated maximum value as a reference voltage VDCr to converter control unit 55, bidirectional chopper control unit 56, and inverter control unit 57.

[0099] The reference voltage VDCr corresponds to the minimum value of the DC voltage VDC required by each of the converter 1, the bidirectional chopper 2, and the inverter 3. The reference voltage VDCr is set so as to satisfy the DC voltage VDC required by each of the converter 1, the bidirectional chopper 2, and the inverter 3, depending on the AC input voltages Vu1, Vv1, Vw1, the load currents Iu, Iv, Iw, and the state of the battery B1. Therefore, the DC voltage VDC can be set to a low value while ensuring stable operation of the converter 1, the bidirectional chopper 2, and the inverter 3, thereby improving the efficiency of the uninterruptible power supply.

[0100] Next, detailed configurations of the converter control unit 55, the bidirectional chopper control unit 56, and the inverter control unit 57 shown in FIG. 5 will be described with reference to FIGS. 10 to 12. FIG.

[0101] (Converter control unit 55) Fig. 10 is a block diagram showing an example configuration of the converter control unit 55. As shown in Fig. 10, the converter control unit 55 includes a voltage command generating circuit 30, a sine wave generating circuit 37, a PWM (Pulse Width Modulation) circuit 38, and a gate circuit 39.

[0102] Voltage command generation circuit 30 includes subtractors 31, 34A to 34C, a DC voltage control circuit 32, multipliers 33A to 33C, a current control circuit 35, and adders 36A to 36C. Subtractor 31 calculates a deviation ΔVDC=VDCr−VDC between reference voltage VDCr from reference voltage generation circuit 50 and DC voltage VDC detected by voltage detector 22.

[0103] The DC voltage control circuit 32 calculates a current command value I* for controlling the current flowing on the input side of the converter 1 so that the deviation ΔVDC becomes 0. The DC voltage control circuit 32 calculates the current command value I* by, for example, performing a proportional operation or a proportional integral operation on the deviation ΔVDC.

[0104] The sine wave generating circuit 37 outputs a sine wave signal in phase with the AC input voltage Vu1 from the commercial AC power supply 6, a sine wave signal in phase with the AC input voltage Vv1, and a sine wave signal in phase with the AC input voltage Vw1. The three sine wave signals are input to multipliers 33A to 33C, respectively, and multiplied by the current command value I*. This generates current command values ​​I1*, I2*, and I3* in phase with the AC input voltages Vu1, Vv1, and Vw1, respectively.

[0105] Subtractor 34A calculates the deviation ΔI1=I1*-I1 between the current command value I1* and the AC input current I1 detected by current detector CT1. Subtractor 34B calculates the deviation ΔI2=I2*-I2 between the current command value I2* and the AC input current I2 detected by current detector CT2. Subtractor 34C calculates the deviation ΔI3=I3*-I3 between the current command value I3* and the AC input current I3 detected by current detector CT3.

[0106] The current control circuit 35 generates voltage command values ​​Vu1a*, Vv1a*, Vw1a* so that the deviations ΔI1, ΔI2, ΔI3 are all 0. The current control circuit 35 generates the voltage command values ​​Vu1a*, Vv1a*, Vw1a*, for example, by amplifying the deviations ΔI1, ΔI2, ΔI3 according to proportional control or proportional-integral control.

[0107] Adder 36A generates a voltage command value Vu1c* by adding together voltage command value Vu1a* and the AC input voltage Vu1 detected by voltage detector 21. Adder 36B generates a voltage command value Vv1c* by adding together voltage command value Vv1a* and the AC input voltage Vv1 detected by voltage detector 21. Adder 36C adds together voltage command value Vw1a* and the AC input voltage Vw1 detected by voltage detector 21 to generate a voltage command value Vw1c*.

[0108] The PWM circuit 38 generates a PWM control signal for each phase based on the power outage detection signal PF from the power outage detector 58, the mode signal MD from the mode setting unit 59, and the voltage command values ​​Vu1c*, Vv1c*, and Vw1c*.

[0109] Specifically, when the constant inverter power supply mode is selected and the power failure detection signal PF is at the inactivation level "L" (when the commercial AC power supply 6 is normal), the PWM circuit 38 generates a PWM control signal for each phase based on the voltage command values ​​Vu1c*, Vv1c*, and Vw1c*. The gate circuit 39 generates a control signal for controlling a transistor included in each phase arm of the converter 1 based on the PWM control signal for each phase.

[0110] On the other hand, when the constant inverter power supply mode is selected and the power failure detection signal PF is at the activated "H" level (when the commercial AC power supply 6 experiences a power failure), the PWM circuit 38 stops the operation of the converter 1. When the constant bypass power supply mode is selected, the PWM circuit 38 stops the operation of the converter 1.

[0111] 11 is a block diagram showing an example of the configuration of the bidirectional chopper control unit 56. As shown in FIG.

[0112] The control circuit 560 is activated when the power failure detection signal PF is at the inactivation level “L” (when the commercial AC power supply 6 is healthy), and controls the bidirectional chopper 2 based on the DC voltage VDC, the battery voltage VB, and the battery current IB so that the battery voltage VB becomes the reference voltage VBr.

[0113] The control circuit 562 is activated when the power failure detection signal PF is at the activation level "H" (when the commercial AC power supply 6 is powered out), and controls the bidirectional chopper 2 based on the DC voltage VDC, the battery voltage VB, and the battery current IB so that the DC voltage VDC becomes the reference voltage VDCr provided by the reference voltage generation circuit 50.

[0114] Specifically, control circuit 562 includes subtractors 40 and 42, a voltage control circuit 41, a current control circuit 43, a PWM circuit 44, and a gate circuit 45. Subtractor 40 obtains a deviation ΔVDC=VDCr−VDC between reference voltage VDCr provided by reference voltage generation circuit 50 and DC voltage VDC detected by voltage detector 22.

[0115] The voltage control circuit 41 determines a current command value IB* at a level corresponding to the deviation ΔVDC based on the battery voltage VB detected by the voltage detector 23. The voltage control circuit 41 determines the current command value IB* by, for example, performing a proportional operation or a proportional-integral operation on the deviation ΔVDC.

[0116] A subtractor 42 calculates a deviation ΔIB=IB*-IB between the current command value IB* generated by the voltage control circuit 41 and the battery current IB indicated by the output signal of the current detector CT7. A current control circuit 43 generates a voltage command value V* based on the deviation ΔIB. The current control circuit 43 calculates the voltage command value V* by, for example, performing a proportional operation or a proportional integral operation on the deviation ΔIB.

[0117] The PWM circuit 44 is activated when the power failure detection signal PF is at "H" level (when the commercial AC power supply 6 is normal) and generates a PWM control signal based on the voltage command value V*. The gate circuit 45 generates a control signal for controlling a transistor included in the bidirectional chopper 2 based on the PWM control signal. The bidirectional chopper 2 supplies DC power from the battery B1 to the inverter 3 via DC buses Lp, Ln.

[0118] When the power failure detection signal PF is at the "L" level (when the commercial AC power supply 6 is functioning normally), the PWM circuit 44 is inactivated and does not perform PWM control of the bidirectional chopper 2. When the commercial AC power supply 6 is functioning normally, the bidirectional chopper 2 is controlled by the control circuit 560 and DC power is stored in the battery B1.

[0119] (Inverter Control Unit 57) Fig. 12 is a block diagram showing a configuration example of the inverter control unit 57. As shown in Fig. 12, the inverter control unit 57 includes a voltage command generating circuit 60, a control circuit 61, a PWM circuit 62, and a gate circuit 63.

[0120] The voltage command generating circuit 60 generates voltage command values ​​for each of the U, V, and W phases. The voltage command values ​​are sinusoidal signals. The frequencies of the sinusoidal waves correspond to the frequencies of the AC output voltages Vu, Vv, and V2.

[0121] Control circuit 61 includes voltage control circuits 71 and 73, subtractors 72, 75U, 75V, and 75W, a switching circuit 74, a current control circuit 76, and adders 77U, 77V, and 77W. Voltage control circuit 71 generates current command values ​​Iu*, Iv*, and Iw* based on a voltage command value from voltage command generating circuit 60. Current command values ​​Iu*, Iv*, and Iw* correspond to the U phase, V phase, and W phase, respectively.

[0122] The subtractor 72 calculates the deviation ΔVDC=VDCr−VDC between the reference voltage VDCr provided by the reference voltage generating circuit 50 and the DC voltage VDC detected by the voltage detector 22. The voltage control circuit 73 generates current command values ​​Iu*, Iv*, and Iw* based on the deviation ΔVDC. The voltage control circuit 73 calculates the current command values ​​Iu*, Iv*, and Iw* by, for example, performing a proportional operation or a proportional integral operation on the deviation ΔVDC.

[0123] [Correction based on Rule 91 17.09.2025] Based on the mode signal MD from the mode setting unit 59, the switching circuit 74 selects and outputs one of the current command values ​​Iu*, Iv*, Iw* generated by the voltage control circuit 71 and the current command values ​​Iu*, Iv*, Iw* generated by the voltage control circuit 73. Specifically, when the constant inverter power supply mode is selected, the switching circuit 74 selects and outputs the current command values ​​Iu*, Iv*, Iw* generated by the voltage control circuit 71. When the constant bypass power supply mode is selected, the switching circuit 74 selects and outputs the current command values ​​Iu*, Iv*, Iw* generated by the voltage control circuit 73.

[0124] The subtractor 75U calculates the deviation ΔIu=Iu*-Iu between the current command value Iu* and the load current Iu detected by the current detector CT4. The subtractor 75V calculates the deviation ΔIv=Iv*-Iv between the current command value Iv* and the load current Iv detected by the current detector CT5. The subtractor 75W calculates the deviation ΔIw=Iw*-Iw between the current command value Iw* and the load current Iw detected by the current detector CT6.

[0125] The current control circuit 76 generates voltage command values ​​Vua*, Vva*, Vwa* so that the deviations ΔIu, ΔIv, ΔIw are all 0. The current control circuit 76 generates the voltage command values ​​Vua*, Vva*, Vwa*, for example, by amplifying the deviations ΔIu, ΔIv, ΔIw in accordance with proportional control or proportional-integral control.

[0126] Adder 77U generates a voltage command value Vu* by adding together voltage command value Vua* and the AC output voltage Vu detected by voltage detector 24. Adder 77V generates a voltage command value Vv* by adding together voltage command value Vv* and the AC output voltage Vv detected by voltage detector 24. Adder 77W adds together voltage command value Vwa* and the AC output voltage Vw detected by voltage detector 24 to generate a voltage command value Vw*.

[0127] The PWM circuit 62 generates a PWM control signal for each phase based on the voltage command values ​​Vu*, Vv*, and Vw*. The gate circuit 63 generates a control signal for controlling a transistor included in each phase arm of the inverter 3 based on the PWM control signal for each phase.

[0128] <Effects> As described above, in the uninterruptible power supply according to the present embodiment, the reference voltage VDCr, which is the target value of the DC voltage VDC between the DC buses Lp, Ln, is set so as to satisfy the DC voltage VDC required by each of the converter 1, the bidirectional chopper 2, and the inverter 3. This makes it possible to set the DC voltage VDC (i.e., the reference voltage VDCr) to a value lower than the maximum value of the DC voltage VDC that can be stably output by the converter 1, while ensuring stable operation of the converter 1, the bidirectional chopper 2, and the inverter 3. Therefore, it is possible to reduce the switching loss of the transistors included in the converter 1, the bidirectional chopper 2, and the inverter 3, thereby improving the efficiency of the uninterruptible power supply, while maintaining high power supply reliability of the uninterruptible power supply.

[0129] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0130] 1 Converter, 2 Bidirectional chopper, 3 Inverter, 4 Operation unit, 5 Control device, 6 Commercial AC power supply, 7 Bypass AC power supply, 8 Load, 10 CPU, 12 Memory, 14 I / O circuit, 16 Bus, 21 to 24 Voltage detector, 30, 60 Voltage command generation circuit, 31, 34A to 34C, 40, 42, 72, 75U to 75W, 534, 546 Subtractor, 32 DC voltage control circuit, 33A to 33C, 520 Multiplier, 35, 43, 76 Current control circuit, 36A to 36C, 77U to 77W, 522 Adder, 37 Sine wave generation circuit, 38, 44, 62 PWM circuit, 39, 45, 63 Gate circuit, 41, 71, 73 Voltage control circuit, 50 Reference voltage generation circuit, 51 First calculation unit, 52 Second calculation unit, 53 Third calculation unit, 54, 512, 542 Maximum value calculation unit, 55 Converter control unit, 56 Bidirectional chopper control unit, 57 Inverter control unit, 58 Power outage detector, 59 Mode setting unit, 61, 560, 562 Control circuit, 74 Switching circuit, 510, 540 Effective value calculation unit, 514, 524, 538, 550 Minimum allowable voltage generation unit, 536, 548 Comparator, 544 Minimum value calculation unit, C1 to C6, Cd Capacitors, CT1 to CT7 Current detector, F1, F2 AC filter, L1 to L6 Reactor, Lp DC positive bus, Ln DC negative bus.

Claims

1. An uninterruptible power supply having a plurality of power supply modes for a load, comprising: a converter that converts AC power supplied from a first AC power source into DC power and supplies it to a DC bus; a bidirectional chopper connected between a power storage device and the DC bus and that supplies DC power from the power storage device to the DC bus in the event of a power outage of the first AC power source; an inverter that converts DC power received from the DC bus into AC power and supplies it to the load; a control device that controls any of the converter, the bidirectional chopper, and the inverter in accordance with the power supply mode of the uninterruptible power supply so that the DC voltage of the DC bus becomes a reference voltage; and a reference voltage generation circuit that generates the reference voltage so as to satisfy the DC voltage required by each of the converter, the bidirectional chopper, and the inverter.

2. The uninterruptible power supply according to claim 1, wherein the reference voltage generation circuit calculates a first minimum allowable voltage of the DC voltage required for power conversion in the converter, calculates a second minimum allowable voltage of the DC voltage required for DC voltage conversion in the bidirectional chopper, and calculates a third minimum allowable voltage of the DC voltage required for power conversion in the inverter, and generates the reference voltage based on the maximum value of the calculated first to third minimum allowable voltages.

3. The uninterruptible power supply according to claim 2, wherein the reference voltage generating circuit calculates the first minimum allowable voltage based on a first AC input voltage from the first AC power supply.

4. An uninterruptible power supply according to claim 3, wherein the reference voltage generating circuit increases the first minimum allowable voltage in response to the first AC input voltage rising above the rated voltage of the first AC power supply.

5. The uninterruptible power supply according to claim 2, wherein the reference voltage generating circuit calculates the second minimum allowable voltage based on the current flowing through the power storage device.

6. The uninterruptible power supply according to claim 5, wherein the reference voltage generation circuit calculates the amount of voltage drop in the bidirectional chopper based on the current flowing through the power storage device, and calculates the second minimum allowable voltage so as to compensate for the calculated amount of voltage drop.

7. The uninterruptible power supply according to claim 2, wherein the reference voltage generating circuit calculates the third minimum allowable voltage based on a load current flowing between the inverter and the load.

8. An uninterruptible power supply according to claim 7, wherein the reference voltage generating circuit increases the third minimum allowable voltage when it is determined from the load current that the load is a half-wave rectified load or an unbalanced load.

9. An uninterruptible power supply device according to any one of claims 1 to 8, wherein the plurality of power supply modes include a continuous inverter power supply mode in which AC power generated by the inverter is supplied to the load, and when the continuous inverter power supply mode is selected and the first AC power supply is healthy, the control device controls the converter so that the DC voltage becomes the reference voltage.

10. The uninterruptible power supply device according to claim 9, wherein when the constant inverter power supply mode is selected and a power outage occurs in the first AC power supply, the control device controls the bidirectional chopper so that the DC voltage becomes the reference voltage.

11. The uninterruptible power supply according to any one of claims 1 to 8, wherein the plurality of power supply modes include a constant bypass power supply mode in which AC power from a second AC power supply is supplied to the load, and when the constant bypass power supply mode is selected, the control device is configured to stop operation of the converter and control the inverter to convert the AC power supplied from the second AC power supply into DC power and supply it to the DC bus, and the control device controls the inverter so that the DC voltage becomes the reference voltage.

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