Chip packaging structure and electronic device

Abstract

The present application relates to the technical field of semiconductor devices. Provided are a chip packaging structure and an electronic device, which can significantly reduce the sealing force on a substrate and achieve good connection reliability between a chip and the substrate. The chip packaging structure comprises: a substrate having a first surface and a second surface disposed opposite each other; a chip disposed on the first surface of the substrate; a first annular member connected to the first surface of the substrate and surrounding the chip; a cooling flow channel module disposed above the chip and used for delivering a cooling medium to the surface of the chip; and a support member connected to the cooling flow channel module and surrounding the first annular member, wherein at least one first sealing member is provided between the support member and the first annular member, and the support member is connected to the first annular member by means of the at least one first sealing member.

Description

Chip packaging structure and electronic devices

[0001] This application claims priority to Chinese patent application filed on June 18, 2024, with application number 202421397045.2 and entitled "Chip Packaging Structure and Electronic Device", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of semiconductor device technology, and more particularly to chip packaging structures and electronic devices. Background Technology

[0003] With the rapid development of semiconductor and electronic technologies, the integration of chips in electronic devices is constantly increasing, and the power consumption and heat generation of chips are also increasing dramatically. Chip heat dissipation problems seriously limit the development and design of electronic devices.

[0004] Currently, jet cooling technology in liquid cooling systems can achieve rapid heat dissipation for chips in electronic devices. Electronic devices include chips and substrates connected to the chips. During the jet cooling process of the chips, sealants or adhesives are usually required to achieve axial sealing between the chip and the jet cooling device to effectively prevent the coolant from affecting the chip and the substrate.

[0005] However, conventional axial sealing methods result in a large axial sealing force acting directly on the substrate, affecting the reliability of the connection between the chip and the substrate, and leading to poor sealing reliability of chip packaging structures in electronic devices. Summary of the Invention

[0006] Embodiments of this application provide a chip packaging structure and electronic device that can significantly reduce the sealing force on the substrate and ensure good connection reliability between the chip and the substrate.

[0007] In a first aspect, a chip packaging structure is provided. The chip packaging structure includes: a substrate having a first surface and a second surface disposed opposite to each other; a chip disposed on the first surface of the substrate; a first annular member connected to the first surface of the substrate and surrounding the chip; a cooling channel module disposed above the chip for transferring cooling fluid to the surface of the chip; and a support member connected to the cooling channel module and surrounding the first annular member. At least one first sealing member is provided between the support member and the first annular member, and the support member is connected to the first annular member through the at least one first sealing member. The connection between the support member and the first annular member through the first sealing member achieves a primary seal.

[0008] In the chip packaging structure described above, the first annular component surrounds the chip, and the support component surrounds the first annular component. The first annular component and the support component connected to the substrate can achieve radial sealing through the first sealing component. Compared with axial sealing, the radial sealing significantly reduces the sealing force generated in the axial direction, greatly reducing the sealing force acting on the substrate. The chip and the substrate have good connection reliability, and the chip packaging structure has good sealing reliability. In addition, the cooling medium provided by the cooling channel module can directly contact the chip, and the chip has good heat dissipation effect.

[0009] In one possible implementation, the chip packaging structure further includes a circuit board disposed on a second surface of the substrate. The circuit board can provide mechanical support and electrical connection between the substrate and the chip.

[0010] In the chip packaging structure described above, the circuit board is disposed on the second surface of the substrate, and the first annular member and the support member connected to the substrate can achieve radial sealing through the first sealing member. Compared with axial sealing, the sealing force generated by radial sealing in the axial direction is significantly reduced, which can greatly reduce the sealing force acting on the substrate and the circuit board. Therefore, the probability of the substrate and the circuit board bending, warping, deformation, or breakage due to sealing force is significantly reduced, and the chip and the substrate have good connection reliability.

[0011] In one possible implementation, a first groove is provided on the surface of the support member near the circuit board, and a second annular member is disposed in the first groove and connected to the circuit board; at least one second sealing member is provided between the second annular member and the sidewall of the first groove, and the second annular member and the support member are connected through at least one second sealing member. The connection between the second annular member and the support member through the second sealing member achieves a two-stage seal.

[0012] Therefore, by setting a second annular component connected to the circuit board in the first slot, the support component can achieve a two-stage seal by connecting the second sealing component and the second annular component. Through the first-stage and second-stage seals, the cooling medium can be effectively prevented from affecting the electronic components inside and outside the chip packaging structure.

[0013] In one possible implementation, a second groove is provided on the surface of the support member near the circuit board, and at least one first working fluid immersion sensor is disposed in the second groove and connected to the circuit board. The first working fluid immersion sensor can be used to detect whether cooling fluid leakage occurs between the substrate and the circuit board.

[0014] Therefore, by placing the first working fluid immersion sensor in the second tank, the first working fluid immersion sensor will issue an alarm in the event of a cooling fluid leak, which can effectively prevent the cooling fluid leak and reduce the impact of the cooling fluid on the connection position between the substrate and the circuit board.

[0015] In one possible implementation, at least one second working fluid immersion sensor is provided on the side of the support member away from the substrate. The second working fluid immersion sensor is connected to the circuit board, wherein the second working fluid immersion sensor can be used to detect whether cooling working fluid leakage occurs in areas outside the chip package structure.

[0016] Therefore, a second working fluid immersion sensor is set on the side of the support away from the substrate. The second working fluid immersion sensor can detect whether the cooling working fluid has leaked into the area outside the chip package structure. Once the cooling working fluid leaks, the second working fluid immersion sensor will issue an alarm accordingly, which can effectively prevent the cooling working fluid from leaking and reduce the impact of the cooling working fluid on electronic components outside the chip package structure.

[0017] In one possible implementation, the circuit board and the substrate are connected by at least one electrical connection structure, the outer surface of which is covered with a waterproof material.

[0018] Waterproof materials can protect electrical connection structures, improve the sealing of electrical connection locations, and thus improve the connection reliability of circuit boards and substrates.

[0019] In one possible implementation, the chip package structure further includes: at least one fastener located on the side of the support member away from the substrate; a second annular member including a connecting portion and an extension connected to the connecting portion; the connecting portion being located within a first groove, and the extension being located between the support member and the circuit board; wherein at least one fastener penetrates the support member, the extension, and the circuit board.

[0020] On the one hand, the connecting part in the second annular component is set in the first groove. The connecting part in the second annular component can be connected to the side wall of the first groove through the second seal to prevent the leakage of the cooling medium from affecting other electronic components outside the chip package structure. On the other hand, there is an unavoidable small gap between the support and the circuit board. By setting the extension in the second annular component, the gap can be compensated. This can not only further prevent the leakage of the cooling medium from affecting other electronic components outside the chip package structure, but also increase the fastening force and firmness of the connection between the support and the circuit board.

[0021] In one possible implementation, the support component is soldered to the circuit board. Soldering ensures a good connection between the support component and the circuit board, effectively improving the sealing reliability of the chip package structure.

[0022] In one possible implementation, the first annular component includes a sealing ring. This ensures a good sealing connection between the first annular component and the substrate, as well as between the first annular component and the support component, effectively improving the sealing reliability of the chip packaging structure.

[0023] In a second aspect, an electronic device is provided. The electronic device includes: a chip packaging structure comprising any one of the claims in the first aspect; and a liquid supply structure connected to a cooling channel module of the aforementioned chip packaging structure.

[0024] The electronic device provided in this application includes a chip packaging structure of the first aspect, and its beneficial effects are the same as those of the chip packaging structure, which will not be repeated here. Attached Figure Description

[0025] Figure 1 is a schematic diagram of an electronic device provided in an embodiment of this application;

[0026] Figure 2 is a schematic diagram of a chip packaging structure provided in an embodiment of this application;

[0027] Figure 3 is a schematic diagram of another chip packaging structure provided in an embodiment of this application;

[0028] Figure 4 is a schematic diagram of the assembly process of the chip packaging structure shown in Figure 3;

[0029] Figure 5 is a schematic diagram of the stress analysis of the support and the first seal during the assembly process of Figure 4.

[0030] Figure 6 is a schematic diagram of the disassembly process of the chip package structure shown in Figure 3;

[0031] Figure 7 is a schematic diagram of the force analysis of the support and the first seal during the disassembly process of Figure 6;

[0032] Figure 8 is a schematic diagram of another chip packaging structure provided in an embodiment of this application;

[0033] Figure 9 is a schematic diagram of another chip packaging structure provided in an embodiment of this application;

[0034] Figure 10 is a schematic diagram of the assembly process of the chip packaging structure shown in Figure 9;

[0035] Figure 11 is a schematic diagram of the force analysis of the support and the first / second seal during the assembly process of Figure 10.

[0036] Figure 12 shows the change in friction force of the first seal during the assembly process of Figure 10;

[0037] Figure 13 is a schematic diagram of another chip packaging structure provided in an embodiment of this application;

[0038] Figure 14 is a schematic diagram of another chip packaging structure provided in an embodiment of this application;

[0039] Figure 15 is a schematic diagram of another chip packaging structure provided in an embodiment of this application;

[0040] Figure 16 is a schematic diagram of another chip packaging structure provided in an embodiment of this application;

[0041] Figure 17 is a schematic diagram of another chip packaging structure provided in an embodiment of this application;

[0042] Figure 18 is a schematic diagram of another chip packaging structure provided in an embodiment of this application;

[0043] Figure 19 is a schematic diagram of another chip packaging structure provided in the embodiments of this application. Detailed Implementation

[0044] The technical solutions in some embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0045] Hereinafter, the terms "first," "second," etc., are used for descriptive convenience only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the embodiments of this application, unless otherwise explicitly specified and limited, the term "connection" can be a direct connection or an indirect connection through an intermediate medium. Furthermore, in the embodiments of this application, "connection" can be an electrical connection or a non-electrical connection, where two components are simply fixedly connected. In the embodiments of this application, "axial" refers to a direction consistent with the stacking direction of the chip, substrate, or circuit board; "radial" refers to a direction perpendicular to the "axial" direction.

[0046] With the rapid development of semiconductor and electronic technologies, the integration of chips in electronic devices is constantly increasing, leading to a rapid rise in chip power consumption and power density. Consequently, the heat generated by the chips is also increasing dramatically, and excessively high temperatures can severely limit the development and design of electronic devices. Compared to air cooling, liquid cooling technology offers higher cooling efficiency, better temperature uniformity, and is more suitable for high-power and high-heat-density chips.

[0047] Liquid cooling technologies include liquid cooling with a single-layer thermal interface material (TIM) layer, liquid cooling with a double-layer thermal interface material (TIM1+TIM2) layer, and jet cooling. The presence of the thermal interface material hinders heat exchange between the chip and the cooling medium, thus reducing the chip's heat dissipation efficiency. Taking the double-layer TIM1 and TIM2 liquid cooling technology as an example, the thermal resistances of TIM1 and TIM2 are superimposed, and the sum of their thermal resistances can reach 30% to 40% of the total thermal resistance of the entire chip system. Furthermore, due to differences in the coefficient of thermal expansion (CTE) of various packaged components in electronic devices, the TIM layer may bend and delaminate at different temperatures. In contrast, jet cooling allows the cooling medium to directly contact the chip, rapidly and effectively dissipating heat and providing excellent heat dissipation while preventing TIM layer delamination due to bending.

[0048] This application provides an electronic device, which includes devices that require chip heat dissipation. For example, the electronic device can be a server, optical communication device, mobile phone, tablet personal computer, laptop computer, personal digital assistant (PDA), camera, personal computer, laptop computer, in-vehicle device, wearable device, augmented reality (AR) glasses, AR helmet, virtual reality (VR) glasses, or VR helmet, etc., which require data processing / storage / transmission and reception.

[0049] Figure 1 is a schematic diagram of an electronic device provided in an embodiment of this application. Referring to Figure 1, the electronic device includes a chip 10, a substrate 20, a circuit board (which may be a printed circuit board (PCB)) 30, a jet cooling device 40, a carrier 50, a fastener 60, and a liquid supply structure 70.

[0050] The substrate 20 includes a first surface a1 and a second surface a2. A chip 10 is disposed on the first surface a1 of the substrate 20 (e.g., the chip 10 can be bonded to the first surface a1 of the substrate 20). A circuit board 30 is disposed on the second surface a2 of the substrate 20 (e.g., the circuit board 30 can be bonded to the second surface a2 of the substrate 20). One end of a carrier 50 (the carrier 50 can be made of a plastic or metallic material; for example, the carrier 50 can be made of high-strength plastic, or a metal such as aluminum, steel, or copper) is connected to the substrate 20 (e.g., one end of the carrier 50 can be connected to the substrate 20 via an adhesive layer), and the carrier 50 is arranged around the chip 10. The jet cooling device 40 includes a cover plate 410 and a side plate 420. The cover plate 410 may have at least one cooling medium inlet (cooling medium inlet 4110 in Figure 1) and at least one... The device 50 has a cooling medium outlet (cooling medium outlet 4120 located on both sides of cooling medium inlet 4110 in Figure 1) and a cooling channel 4130 for the flow of cooling medium. The side plate 420 is located on the side of the carrier 50 away from the chip 10. The liquid supply structure 70 can be connected to at least one cooling medium inlet (cooling medium inlet 410 in Figure 1) and at least one cooling medium outlet (cooling medium outlet 4120 located on both sides of cooling medium inlet 4110 in Figure 1). The liquid supply structure 70 can provide circulation of cooling medium (e.g., water) for cooling the chip 10 to achieve heat exchange between the cooling medium and the chip 10. The side plate 420 and the circuit board 30 of the jet cooling device 40 can be connected by fasteners 60. The other end of the carrier 50 is axially sealed to the jet cooling device 40 by a sealant 430 (e.g., a sealing ring) or sealant. In addition, a lower bracket (not shown in Figure 1) can be provided on the side of the circuit board 30 away from the substrate 20. The lower bracket can provide mechanical support for the arrangement of the circuit board 30, the substrate 20, and the chip 10.

[0051] The assembly process of the electronic device shown in Figure 1 includes: along the axial direction, the jet cooling device 40 is fastened above the chip 10, the jet cooling device 40 and the circuit board 30 are fastened by fasteners 60, and the axial seal of the carrier 50 and the jet cooling device 40 is achieved by using a seal 430 (wherein, the seal 430 is squeezed by the jet cooling device 40 and the carrier 50), and the fastening force is converted into an axial sealing force on the chip 10, the substrate 20 and the circuit board 30. In other words, on the one hand, this axial sealing method may cause the substrate 20 and the circuit board 30 to be subjected to a large axial sealing force (for example, the axial sealing force can reach 1500N. It should be noted that 1500N is only a specific example of axial sealing force. The axial sealing force can also be 1600N, 1800N or even greater pressure. The embodiments of this application do not limit this). Under the action of a large axial sealing force, the substrate 20 and the circuit board 30 are prone to problems such as bending, warping, deformation and breakage, resulting in poor sealing reliability of the chip packaging structure. On the other hand, this axial sealing method may cause damage to the connection area between the chip 10 and the substrate 20 (for example, when the chip 10 and the substrate 20 are soldered, this axial sealing method may cause an increase in stress at the soldering position, thereby causing the soldering position to detach). This axial sealing method may also cause damage to the connection area between the substrate 20 and the circuit board 30 (for example, when the substrate 20 and the circuit board 30 are soldered, this axial sealing method may cause an increase in stress at the soldering position, thereby causing the soldering position to detach).

[0052] The disassembly process of the electronic device shown in Figure 1 includes: loosening the fastener 60, and the jet cooling device 40 moving away from the chip 10 under the action of traction force. Since the carrier 50 and the jet cooling device 40 are axially sealed by the seal 430, the traction force on the jet cooling device 40 may be converted into a pulling force on the substrate 20. This pulling force may cause problems such as bending, warping, deformation, and breakage of the substrate 20 and the circuit board 30. This pulling force may also cause damage to the connection area between the chip 10 and the substrate 20, as well as the connection area between the substrate 20 and the circuit board 30, thereby leading to a deterioration in the sealing reliability of the chip packaging structure.

[0053] Based on this, embodiments of this application provide a chip packaging structure aimed at solving at least one of the aforementioned technical problems.

[0054] Referring to Figure 2, the chip packaging structure provided in this embodiment includes: a substrate 20 having a first surface a1 and a second surface a2 disposed opposite to each other; a chip 10 disposed on the first surface a1 of the substrate 20 (for example, the chip 10 can be disposed on the first surface a1 of the substrate 20 by bonding); a first annular member 50 connected to the first surface a1 of the substrate 20 and surrounding the chip 10; and a cooling channel module 30. Above the chip 10, a cooling medium (e.g., water) is used to transfer to the surface of the chip 10; a support member 40 is connected to the cooling channel module 30 (the support member 40 and the cooling channel module 30 can be integrally formed, or they can be connected by welding or other means), and the support member 40 is arranged around the first annular member 50; wherein, at least one first sealing member 410 is provided between the support member 40 and the first annular member 50, and the support member 40 is connected to the first annular member 50 through at least one first sealing member 410.

[0055] In the embodiments of this application, since the first annular member 50 is connected to the first surface a1 of the substrate 20 and surrounds the chip 10, during the assembly of the chip packaging structure, the cooling channel module 30 and the support member 40 will move towards the chip 10. The support member 40 achieves a sealed connection through the first sealing member 410 and the first annular member 50 (for example, the inner surface of the support member 40 will gradually connect through the outer surface of the first sealing member 410 and the first annular member 50). This sealing connection method is radial sealing, where the sealing force is mainly the sealing force formed by the support member 40 on the first sealing member 410 in the radial direction, while the axial sealing force of this radial seal is mainly the frictional force generated between the support member 40 and the first sealing member 410, compared to... The axial seal of the electronic device shown in Figure 1 significantly reduces the sealing force generated in the axial direction by the radial seal, greatly mitigating the impact of the sealing force on the substrate 20 in the axial direction. The probability of the substrate 20 bending, warping, deforming, or breaking due to the sealing force is significantly reduced. Furthermore, due to the significant reduction in the sealing force acting on the substrate 20, the connection between the chip 10 and the substrate 20 is good (for example, when the chip 10 and the substrate 20 are welded, the radial seal will significantly reduce the stress at the welding position, making it less likely for the connection between the chip 10 and the substrate 20 to fail). The chip packaging structure has good sealing reliability. In addition, the cooling channel module 30 can provide a cooling medium that can directly contact the chip 10, giving the chip 10 a good heat dissipation effect.

[0056] In some embodiments, the first annular member 50 may include a sealing ring. For example, the material of the first annular member 50 may include metal, such as stainless steel, copper, or aluminum alloy. In one possible embodiment, the first annular member 50 may be disposed on the substrate 20 by an adhesive layer to achieve a connection between the first annular member 50 and the substrate 20. For example, the material of the adhesive layer may be a frame adhesive (Lid frame adhesive, i.e., AD adhesive). In some embodiments, the first sealing member 410 may include an O-ring. For example, the material of the O-ring may include elastic materials such as silicone or rubber, thus providing a certain degree of cushioning and better achieving a connection between the first annular member 50 and the substrate 20.

[0057] In some embodiments, grooves may be provided on the support member 40 and / or the first annular member 50, and the first sealing member 410 may be disposed within the grooves to achieve connection between the support member 40 and the first annular member 50. For example, the inner surface of the support member 40 may be provided with a groove, and the corresponding outer surface of the first annular member 50 may be provided with a groove. When the support member 40 is assembled with the chip 20, the groove on the inner surface of the support member 40 and the groove on the outer surface of the first annular member 50 form a space to accommodate the first sealing member 410.

[0058] In some embodiments, the chip 10 in the chip package structure can be a single die or a multi-chip assembly. For example, a multi-chip assembly can be a structure formed by stacking multiple dies along a direction perpendicular to the substrate 20; a multi-chip assembly can also be a structure formed by arranging multiple dies side-by-side along a direction parallel to the substrate 20. For example, the chip 10 can include network-type high-power dies, artificial intelligence (AI) dies, etc. In some embodiments, the chip 10 can be disposed on the first surface a1 of the substrate 20 by bonding. Bonding refers to a process of directly combining two homogeneous or heterogeneous materials under certain conditions after surface treatment, enabling electrical interconnection (electrical or mechanical) between the two materials. For example, the bonding method between chip 10 and substrate 20 can be achieved through processes such as microbump bonding, embedded bump bonding, hybrid bonding (HB), surface activated bonding (SAB), atomic diffusion bonding (ADB), and wire bonding (WB). For example, chip 10 is soldered to the first surface a1 of substrate 20 using a reflow soldering process.

[0059] In some embodiments, referring to FIG2, an underfill 110 is further filled between the chip 10 and the first surface a1 of the substrate 20. The underfill 110 can strengthen the connection between the chip 10 and the substrate 20 and improve the connection stability between the chip 10 and the substrate 20. Furthermore, through the radial sealing method of this embodiment, the sealing force generated in the axial direction is significantly reduced, which can greatly reduce the bonding interface stress in the area of ​​the underfill 110 and reduce the risk of interface cracking at the underfill 110 area.

[0060] In some embodiments, a cooling medium barrier layer may be disposed on the surface of the chip 10 away from the substrate 20. The cooling medium barrier layer is disposed on the surface of the chip 10 to prevent direct contact between the cooling medium and the chip 10, thus protecting the chip 10 and improving its lifespan. For example, the material of the cooling medium barrier layer can be a metal, which can both block water and oxygen and has good heat transfer properties. For example, the material of the cooling medium barrier layer can be titanium.

[0061] In the embodiments of this application, A is arranged around B, that is, A is arranged around B in a circle. Here, A and B are pronouns. For example, A can refer to the first annular member 50, and B can refer to the chip 10. In one possible implementation, the first annular member 50 is arranged around the chip 10, that is, the first annular member 50 is arranged around the chip 10 in a circle. It can be understood that the first annular member 50 is a structure with its ends connected. The trajectory structure of the first annular member 50 is usually related to the shape of the chip 10. For example, if the chip 10 is rectangular, the first annular member 50 can be a rectangular ring; if the chip 10 is circular, the first annular member 50 can be a circular ring. Of course, the first annular member 50 can also be a polygonal ring or other ring shapes. In another possible implementation, the support member 40 and the first annular member 50 are connected by a first sealing member 410. The trajectory structure of the first sealing member 410 is usually related to the shape of the first annular member 50. The trajectory structure of the first sealing member 410 can also be a rectangular ring, a circular ring, or a polygonal ring, etc.

[0062] This application does not limit the specific structure of the cooling channel module 30. In some embodiments, the cooling channel module 30 may include at least one cooling medium inlet 310, at least one cooling medium outlet 320, and a cooling channel for the flow of cooling medium. The cooling medium inlet 310 and the cooling medium outlet 320 are, for example, connected to the liquid supply structure corresponding to the electronic device in FIG1. ​​The cooling medium enters the cooling channel from the cooling medium inlet 310, is transported to the surface of the chip 10 through the cooling channel, and flows back to the liquid supply structure from the cooling medium outlet 320, so as to achieve liquid cooling through direct contact between the cooling medium and the chip. Based on this, the cooling channel module 30 in this application embodiment can be understood as a component for the cyclic transport of cooling medium.

[0063] In some embodiments, referring to FIG3, the chip packaging structure further includes: a circuit board 60 (the circuit board 60 can provide mechanical support and electrical connection for the substrate 20 and the chip 10), the circuit board 60 being disposed on the second surface a2 of the substrate 20, and the circuit board 60 being connected to the substrate 20. In this way, radial packaging can significantly reduce the sealing force acting on the substrate 20 and the circuit board 60 in the axial direction, significantly reducing the probability of problems such as bending, warping, deformation, and breakage of the substrate 20 and the circuit board 60 due to sealing force. The connection between the chip 10 and the substrate 20 is good, and the connection between the substrate 20 and the circuit board 60 is also good (for example, when the circuit board 60 and the substrate 20 are soldered, this radial seal significantly reduces the stress at the solder joint, making it less likely for the connection between the circuit board 60 and the substrate 20 to fail). The chip packaging structure has good sealing reliability. In some embodiments, the circuit board 60 and the support member 40 are connected. In one possible embodiment, referring to FIG3, the connection between the circuit board 60 and the support member 40 can be achieved by fasteners 80.

[0064] In some embodiments, referring to FIG3, the chip packaging structure further includes: a circuit board 60 disposed on the second surface a2 of the substrate 20, the circuit board 60 having through holes, the support member 40 having through holes, and a fastener 80 passing through the through holes in the circuit board 60 and the support member 40 to achieve connection between the circuit board 60 and the support member 40. In other words, the fastener 80 passes through the interior of the circuit board 60 and the support member 40 to achieve a sealed connection between the circuit board 60 and the support member 40. For example, the fastener 80 can be a screw, a clamping fixture, a bolt, etc. The structure of the fastener 80 is not limited in this application embodiment, and any structure that can apply a peripheral fastening force and can be disassembled is applicable.

[0065] Specifically, during the assembly process of the chip packaging structure shown in Figure 3, referring to Figure 4, the cooling channel module 30 and the support member 40 move towards the chip 10. The support member 40 is connected to the first annular member 50 via a first sealing member 410 (for example, referring to Figure 4, the first sealing member 410 is located in a groove on the outer surface of the first annular member 50). The circuit board 60 and the support member 40 are connected by fasteners 80. Referring to Figure 5, the direction of movement in Figure 5 is the direction of movement of the support member 40. During the assembly process, the support member 40 has a downward traction force F1 (the traction force F1 can be the weight of the support member 40 itself, or it can be a pulling force applied to the support member 40 from the outside, or it can be the sum of the two forces). The support member 40 is connected to the first seal 410 and the first annular member 50. The support member 40 and the first annular member 50 will compress the first seal 410. This compression will cause the support member 40 to be subjected to radial compressive force (for example, this compression may cause the radial compressive force of the support member 40 to reach 1500N. It should be noted that 1500N is only a specific example of this compressive force. The axial sealing force can also be 1600N, 1800N or even greater. The embodiments of this application do not limit this). Under the influence of the radial compressive force, the support member 40 will be subjected to an upward frictional force F2. The frictional force F2 is usually much smaller than the radial compressive force (for example, due to the influence of the coefficient of friction, the frictional force F2 can be 0).A compressive force of 1 times (for example, the compressive force might be 1500N, and the frictional force F2 might be 150N) is applied. Forces act in pairs, and the first seal 410 also generates a downward frictional force F3 (typically, frictional force F3 and frictional force F2 are close to or equal). The first seal 410 is positioned in the groove of the first annular member 50, and the bottom surface of this groove provides a supporting force F4 to the first seal 410. Furthermore, friction may exist between the support member 40 and the first annular member 50 due to contact. The magnitude of this frictional force can be controlled by the degree of contact between the support member 40 and the first annular member 50 (this frictional force is usually very small and will not significantly affect the axial sealing force of the radial seal in this application). In this way, the radial compressive force of the support member 40 can be partially converted into the axial frictional force F3 of the first seal 410. That is, the axial sealing force of the radial seal is the frictional force F3. For easier understanding, please refer to the figure. The axial packaging of the electronic device shown in Figure 1 involves directly attaching the jet cooling device to the substrate. The axial sealing force in Figure 1 (e.g., this axial sealing force may be 1500 N) is much greater than the aforementioned frictional force F3 (e.g., frictional force F3 may be 150 N). This significantly reduces the axial sealing force generated by the radial seal, greatly mitigating the impact of the sealing force on the substrate 20 and circuit board 60. The probability of the substrate 20 and circuit board 60 bending, warping, deforming, or breaking due to the sealing force is significantly reduced. The chip 10 and substrate 20 have a good connection effect (e.g., when the chip 10 and substrate 20 are soldered, the radial seal significantly reduces the stress at the solder joint, making it less prone to desoldering). The circuit board 60 and substrate 20 also have a good connection effect (e.g., when the circuit board 60 and substrate 20 are soldered, the radial seal significantly reduces the stress at the solder joint, making it less prone to desoldering).

[0066] During the disassembly process of the chip package structure shown in Figure 3, referring to Figure 6, the fastener 80 is loosened. The cooling channel module 30 and the support member 40 move away from the chip 10 under the action of the traction force F2. Referring to Figure 7, the direction of movement in Figure 7 is the direction of movement of the support member 40. The support member 40 will be subjected to an upward traction force F2 (traction force F2 is usually the external pulling force applied to the support member 40). The support member 40 is connected through the first seal 410 and the first annular member 50. The support member 40 and the first annular member 50 will squeeze the first seal 410. This squeezing will cause the support member 40 to be subjected to a radial squeezing force. Under the influence of the radial squeezing force, the support member 40 will be subjected to a downward frictional force F1. The frictional force F1 is usually much smaller than the radial squeezing force (for example, the frictional force F1 can be 0.1 times the squeezing force). The forces are mutual, and the first seal 410 will also generate an upward frictional force F4 (usually, frictional force F4 is much smaller than the radial squeezing force F1). (F1 and frictional force F4 are close to or equal). The first sealing element 410 is disposed in the groove of the first annular element 50. The upper surface of the groove provides a supporting force F3 to the first sealing element 410. The radial compressive force of the support element 40 can be partially converted into the axial frictional force F4 of the first sealing element 410. That is, the tensile force applied to the substrate 20 is the frictional force F4. For ease of understanding, it can be compared with the axial packaging of the electronic device shown in Figure 1. Referring to Figure 1, the axial packaging directly connects the jet cooling device and the carrier on the substrate. The tensile force applied to the substrate in Figure 1 is much greater than the frictional force F4 mentioned above. In this way, the influence of the traction force F2 on the substrate 20 and the circuit board 60 is greatly alleviated. The probability of the substrate 20 and the circuit board 60 bending, warping, deforming, or breaking due to the traction force F2 is significantly reduced. The chip 10 and the substrate 20 have a good connection effect, and the circuit board 60 and the substrate 20 have a good connection effect.

[0067] In summary, firstly, radial packaging significantly reduces the axial forces acting on the substrate 20 and circuit board 60, improving the reliability of the connection between the chip 10 and the substrate 20, as well as the reliability of the connection between the substrate 20 and the circuit board 60. Secondly, the support member 40, connected by the first sealing member 410 and the first annular member 50, effectively prevents the cooling medium from seeping into the substrate 20 and the circuit board 60, thus avoiding any impact on the connection between the substrate 20, the circuit board 60, the chip 10 and the substrate 20, and the circuit board 60 and the substrate 20. Thirdly, the fastener 80, passing through the through-holes in the circuit board 60 and the support member 40, allows for the connection between the circuit board 60 and the support member 40. Loosening the fastener 80 allows for the separation of the support member 40 and the circuit board 60. Therefore, by setting the fastener 80, the assembly and disassembly of the support member 40 and the circuit board 60 can be achieved, thereby enabling the maintenance of various components in the chip packaging structure.

[0068] Furthermore, referring to Figure 8, the embodiments of this application provide another connection method between the circuit board 60 and the support member 40. Specifically, the chip packaging structure further includes: a circuit board 60, which is disposed on the second surface a2 of the substrate 20, and the circuit board 60 and the support member 40 are soldered together. The main difference between Figure 3 and Figure 8 is that: Figure 3 achieves the connection between the circuit board 60 and the support member 40 through fasteners 80, thus making assembly and disassembly relatively easy; Figure 8 achieves the connection between the circuit board 60 and the support member 40 through soldering, which makes disassembly difficult after soldering. The assembly process of the two chip packaging structures is similar, and the stress analysis of the support member 40 and the first annular member 50 is also similar, so it will not be described in detail again.

[0069] In some embodiments, referring to FIG9, a first groove is provided on the surface of the support member 40 near the circuit board 60, and a second annular member 70 is provided in the first groove, the second annular member 70 being connected to the circuit board 60; at least one second sealing member 420 is provided between the second annular member 70 and the sidewall of the first groove (the sidewall can be the left sidewall or the right sidewall), and the second annular member 70 and the support member 40 are connected through at least one second sealing member 420. In this way, the sealing effect of the chip packaging structure can be further improved through double radial sealing. In addition, the impact of sealing force on the substrate 20, the circuit board 60, the connection between the chip 10 and the substrate 20, and the connection between the circuit board 60 and the substrate can be further mitigated.

[0070] Specifically, during the assembly process of the chip packaging structure shown in Figure 9, referring to Figure 10, the cooling channel module 30 and the support member 40 move towards the chip 10. The support member 40 is connected through the first seal 410 and the first annular member 50, and the support member 40 is connected through the second seal 420 and the second annular member 70. Then, the circuit board 60 and the support member 40 are connected through fasteners 80. Referring to (1) and (2) in Figure 11, the support member 40 has a downward traction force F1. The support member 40 and the first annular member 50 will squeeze the first seal 410. This squeezing will cause the support member 40 to be subjected to a radial first squeezing force. Under the influence of the radial first squeezing force, the support member 40 will be subjected to an upward frictional force F2. The first seal 410 will correspondingly generate a downward frictional force F3. The first seal 410 is set in the groove of the first annular member 50. The bottom surface of the groove will provide a supporting force F4 to the first seal 410. The support member 40 and the second annular member 70 will... The second seal 420 is compressed, which causes the support 40 to be subjected to a radial second compressive force. Under the influence of the radial second compressive force, the support 40 will be subjected to an upward frictional force F5, and the second seal 420 will correspondingly generate a downward frictional force F6. The second seal 410 is disposed in the groove of the second annular member 70, and the bottom surface of the groove will provide a support force F7 to the second seal 420. In other words, the radial compressive force (first compressive force and second compressive force) of the support 40 can be partially converted into the axial frictional force F3 of the first seal 410, and another part can be converted into the axial frictional force F6 of the second seal 420. In this way, the influence of the radial seal on the substrate 20 and the circuit board 60 in the axial direction is greatly alleviated. The probability of the substrate 20 and the circuit board 60 bending, warping, deformation, or breakage due to the sealing force is significantly reduced. In addition, the chip 10 and the substrate 20 have a good connection effect, and the circuit board 60 and the substrate 20 have a good connection effect. The disassembly process of the chip packaging structure shown in Figure 9 can be carried out with reference to the disassembly process in Figure 3. The stress analysis of the support member 40 and the first annular member 50 is also similar, so it will not be described again.

[0071] Furthermore, at least one second sealing member 420 is provided between the second annular member 70 connected to the substrate 20 and the sidewall of the first groove. The second annular member 70 and the support member 40 have a good sealing effect. The support member 40 and the first annular member 50 form a primary seal, and the support member 40 and the second annular member 70 form a secondary seal. The primary seal can prevent the cooling medium from seeping into the space between the substrate 20 and the circuit board 60. The secondary seal can prevent the cooling medium from seeping into the substrate 20 and the circuit board 60 and then further entering the surface of the circuit board 60, causing contamination to other external electronic components (for example, when the substrate 20 and the circuit board 60 are soldered, a small amount of cooling medium leaks into the soldering area between the substrate 20 and the circuit board 60. The secondary seal can prevent the cooling medium from affecting other electronic components outside the chip package structure).

[0072] In some embodiments, the chip packaging structure shown in FIG6 is tested, and the test results can be referred to FIG12.

[0073] The detection method includes: during the assembly process of the chip packaging structure shown in Figure 6, the support member 40 and the first annular member 50 are connected through the first sealing member 410. The support member 40 and the first annular member 50 will squeeze the first sealing member 410. This squeezing will cause the support member 40 to be subjected to radial squeezing force, which is approximately 1500N-2000N. A force sensor is used to monitor the change of friction force (the magnitude of which can be approximated to the magnitude of the sealing force of the radial package along the axial direction) on the first sealing member 410 (O-ring). The positive direction of the friction force is defined as vertically upward.

[0074] Specifically, the maximum frictional force of the first seal 410 corresponding to scenario 1 is -300.7N; the maximum frictional force of the first seal 410 corresponding to scenario 2 is -318.1N; the maximum frictional force of the first seal 410 corresponding to scenario 3 is -346.3N; the maximum frictional force of the first seal 410 corresponding to scenario 4 is -391.2N; the maximum frictional force of the first seal 410 corresponding to scenario 5 is -420.0N; and the maximum frictional force of the first seal 410 corresponding to scenario 6 is -437.8N.

[0075] By monitoring the changes in the frictional force on the first seal 410 (i.e., the radial sealing force on the substrate 20 along the axial direction), it can be seen that the frictional force of the first seal 410 exhibits a trend of first increasing, then decreasing, and finally remaining flat (the negative sign only represents the direction of the frictional force, not its magnitude). The reasons for the first seal 410's frictional force exhibiting this trend of first increasing, then decreasing, and finally remaining flat may include: (1) The first annular member 50 is sealed and connected to the support member 40 through the first seal 410 (O-ring), and the compression amount in different areas of the first seal 410 is not exactly the same. Due to the change in compression amount, the frictional force on the first seal 410 may change; (2) There may be certain manufacturing tolerances between the first seal 410 and the support member 40, which may also cause the frictional force on the first seal 410 to change. The trend of the frictional force of the first seal 410 is not the focus of this application embodiment. However, by focusing on the maximum value of the frictional force of the first seal 410, it can be seen whether the axial sealing force (ultimate sealing force) of this radial sealing method will affect the substrate 20 and the circuit board 60.

[0076] As shown in Figure 12, the maximum frictional force of the first sealing element 410 in the above six situations is much smaller than the compressive force (1500N-2000N), and none of them can damage the substrate 20 and the circuit board 60, nor can they affect the connection area between the chip 10 and the substrate 20 or the connection area between the circuit board 60 and the substrate 20. Therefore, it can be shown that the radial packaging of this application embodiment greatly alleviates the influence of the sealing force on the substrate 20 and the circuit board 60. The probability of the substrate 20 and the circuit board 60 bending, warping, deformation, or breaking due to the sealing force is significantly reduced. In addition, the chip 10 and the substrate 20 have a good connection effect, and the circuit board 60 and the substrate 20 have a good connection effect.

[0077] In one possible implementation, when soldering between the circuit board 60 and the support member 40, a second annular member 70 and a second sealing member 420 can be provided in the chip package structure, similar to the arrangement in Figure 4, and the resulting effect is also similar to the beneficial effect in Figure 4, so it will not be repeated here. In another possible implementation, when soldering between the circuit board 60 and the support member 40, the second annular member 70 and the second sealing member 420 may not be provided. The reason is that, compared with the fastener 80 connecting the circuit board 60 and the support member 40, soldering has excellent sealing performance. Even if a small amount of cooling medium leaks into the area between the substrate 20 and the circuit board 60, there are almost no gaps in the soldering area. The cooling medium is unlikely to affect other electronic components outside the chip package structure after passing through the soldering area. Therefore, the second annular member 70 and the second sealing member 420 can be omitted, thereby reducing the manufacturing cost of the chip package structure.

[0078] In some embodiments, the connection between the second annular member 70 and the circuit board 60 may include fastener connection, welding, adhesive bonding, and other methods that can achieve the connection between the second annular member 70 and the circuit board 60. For example, the second annular member 70 can be disposed on the circuit board 60 using an AD adhesive layer to achieve the connection between the second annular member 70 and the circuit board 60. In one possible implementation, the material of the second annular member 70 includes a metallic material, such as stainless steel, copper, or aluminum alloy. In some embodiments, the second seal 420 may be a sealing ring. For example, the material of the second seal 420 may include elastic materials such as silicone or rubber, thus providing a certain degree of cushioning and better achieving the connection between the second annular member 70 and the sidewall of the first groove.

[0079] In some embodiments, referring to FIG13, the second annular member 70 includes a connecting portion 710 and an extension portion 720 connected to the connecting portion 710; the connecting portion 710 is located in the first groove, and the extension portion 720 is located between the support member 40 and the circuit board 60; at least one fastener 80 is used to penetrate the support member 40, the extension portion 720 and the circuit board 60 (for example, the support member 40, the extension portion 720 and the circuit board 60 are all provided with through holes, and the fastener 80 passes through the three through holes) to realize the connection between the support member 40, the extension portion 720 and the circuit board 60. In this way, by placing the extension 720 of the second annular member 70 between the support member 40 and the circuit board 60, and then applying a fastening force to the support member 40, the extension 720, and the circuit board 60 through the fastener 80, on the one hand, by setting the connecting part 710 in the second annular member 70, a secondary seal for the chip packaging structure can be achieved, effectively preventing the cooling medium from affecting other electronic components outside the chip packaging structure. On the other hand, since there is an unavoidable small gap between the support member 40 and the circuit board 60, the extension 720 in the second annular member 70 can compensate for this gap, which can further prevent the cooling medium leakage from affecting other electronic components outside the chip packaging structure, and also increase the fastening force and firmness of the connection between the support member 40 and the circuit board 60.

[0080] In some embodiments, the size of the first groove can be larger than the size of the second annular member 70 in the axial direction. This facilitates the assembly process of the chip package structure. In one possible embodiment, the connecting portion 710 and the extension portion 720 in the second annular member 70 can be integrally formed.

[0081] In some embodiments, referring to FIG14, a second groove is provided on the surface of the support member 40 near the substrate 20, and at least one first working fluid immersion sensor 910 is provided in the second groove. The first working fluid immersion sensor 910 is connected to the circuit board 60. By providing at least one first working fluid immersion sensor 910 in the second groove, the first working fluid immersion sensor 910 can detect whether a cooling working fluid leak occurs between the substrate 20 and the circuit board 60, especially at the connection point between the substrate 20 and the circuit board 60 (for example, if the substrate 20 and the circuit board 60 are soldered, the first working fluid immersion sensor 910 can detect whether a cooling working fluid leak occurs at the soldering position). Once a cooling working fluid leak occurs, the first working fluid immersion sensor 910 immediately issues an alarm, which can effectively prevent the cooling working fluid leak and reduce the impact of the cooling working fluid on the connection point between the substrate 20 and the circuit board 60.

[0082] In some embodiments, referring to FIG15, at least one second working fluid immersion sensor 920 is provided on the side of the support member 40 away from the substrate 20, and the second working fluid immersion sensor 920 is connected to the circuit board 60. The second working fluid immersion sensor 920, located on the side of the support member 40 away from the substrate 20, can detect whether the cooling working fluid leaks into areas outside the chip package structure. If cooling working fluid leakage occurs, the second working fluid immersion sensor 920 will issue an alarm accordingly, effectively preventing cooling working fluid leakage and reducing the impact of the cooling working fluid on electronic components outside the chip package structure. In one possible implementation, when soldering between the circuit board 60 and the support member 40, the second working fluid immersion sensor 920 may not be provided outside the chip package structure. The reason is that, compared with the fastener 80 connecting the circuit board 60 and the support member 40, soldering has excellent sealing performance. Even if a small amount of cooling working fluid leaks into the area between the substrate 20 and the circuit board 60, there are almost no gaps in the soldering area. The cooling working fluid is unlikely to affect other electronic components outside the chip package structure after passing through the soldering area. Therefore, the second working fluid immersion sensor 920 may not be provided, thereby reducing the manufacturing cost of the chip package structure.

[0083] In some embodiments, referring to FIG. 16, the support member 40 includes at least one protrusion 430 located above the substrate 20. The at least one protrusion 430 and the first annular member 50 are sealed together by at least one first sealing member 410, thereby improving the sealing connection effect between the support member 40 and the first annular member 50. In one possible implementation, the surface of the protrusion 430 may contact the first surface a1 of the substrate 20. In another possible implementation, the surface of the protrusion 430 may not contact the first surface a1 of the substrate 20 (FIG. 16 illustrates this implementation).

[0084] In some embodiments, referring to FIG17, there are multiple first seals 410 (first seals 4110 and 4120 in FIG17) between the support member 40 and the first annular member 50, and the support member 40 achieves a sealed connection through the multiple first seals 410 and the first annular member 50. After prolonged use, the support member 40 and the first annular member 50 may experience wear in some areas. Using multiple first seals 410 to achieve a multiple sealing connection between the support member 40 and the first annular member 50 can seal multiple connection points between the support member 40 and the first annular member 50, which can effectively improve the sealing connection effect between the support member 40 and the first annular member 50.

[0085] In some embodiments, referring to FIG17, a plurality of second seals 420 (first seals 4210 and 4220 in FIG17) are provided between the second annular member 70 and the sidewall of the first groove, and the second annular member 70 and the support member 40 are connected by the plurality of second seals 420. After prolonged use, the support member 40 and the second annular member 70 may experience wear in some areas. By using multiple second seals 420 to achieve multiple sealing connections between the support member 40 and the second annular member 70, multiple connection positions between the support member 40 and the second annular member 70 can be sealed, which can effectively improve the sealing connection effect between the support member 40 and the second annular member 70.

[0086] In some embodiments, referring to Figures 18 and 19, the circuit board 60 and the substrate 20 are connected by at least one electrical connection structure (e.g., the electrical connection structure may include a ball grid array (BGA), a land grid array (LGA), or a conductive adhesive), and the outer surface of at least one electrical connection structure is covered with a waterproof material 210. In this way, even if a small amount of cooling fluid leaks into the area between the substrate 20 and the circuit board 60, the waterproof material 210 can protect the electrical connection structure, improving the sealing performance of the electrical connection structure location.

[0087] For example, the waterproof material 210 can be an adhesive material with a certain degree of adhesion, such as resin and rubber. In this way, the waterproof material 210 with a certain degree of adhesion and the electrical connection structure have good adhesion, which can effectively improve the sealing connection effect between the waterproof material 210 and the electrical connection structure.

[0088] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

Claims

1. A chip package structure, characterized by, The chip package structure comprises: a substrate having a first surface and a second surface arranged oppositely; a chip arranged on the first surface of the substrate; a first ring-shaped member connected to the first surface of the substrate, the first ring-shaped member being arranged around the chip; a cooling flow channel module arranged above the chip for transmitting a cooling working medium to the surface of the chip; a support member connected to the cooling flow channel module, the support member being arranged around the first ring-shaped member; wherein at least one first sealing member is arranged between the support member and the first ring-shaped member, and the support member is connected to the first ring-shaped member through the at least one first sealing member.

2. The chip package structure of claim 1, wherein, Further comprising: a circuit board arranged on the second surface of the substrate.

3. The chip package structure of claim 2, wherein, The surface of the support member close to the circuit board is provided with a first groove, and a second ring-shaped member is arranged in the first groove, the second ring-shaped member being connected to the circuit board; at least one second sealing member is arranged between the second ring-shaped member and the side wall of the first groove, and the second ring-shaped member is connected to the support member through the at least one second sealing member.

4. The chip package structure of claim 2 or 3, wherein, The surface of the support member close to the circuit board is provided with a second groove, and at least one first working medium immersion sensor is arranged in the second groove, the first working medium immersion sensor being connected to the circuit board.

5. The chip package structure of any one of claims 2-4, wherein, The side of the support member away from the substrate is provided with at least one second working medium immersion sensor, the second working medium immersion sensor being connected to the circuit board.

6. The chip package structure of any one of claims 2-5, wherein, The circuit board and the substrate are connected through at least one electric connection structure, and the outer surface of the at least one electric connection structure is wrapped with a waterproof material.

7. The chip package structure of claim 3, wherein, Further comprising: at least one fastener, the at least one fastener being located on the side of the support member away from the substrate; the second ring-shaped member comprises a connecting portion and an extension portion connected to the connecting portion, the connecting portion being located in the first groove, and the extension portion being located between the support member and the circuit board; wherein the at least one fastener penetrates through the support member, the extension portion and the circuit board.

8. The chip package structure of any one of claims 2-6, wherein, The support member and the circuit board are welded.

9. The chip package structure of any one of claims 1-8, wherein, The first ring-shaped member comprises a sealing ring.

10. An electronic device, comprising: The chip package structure comprises: the chip package structure according to any one of claims 1-9; a liquid supply structure in communication with the cooling flow channel module of the chip package structure.

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