Method for precise transmission and parsing of phase-cut transmission control signal, control system, apparatus and gateway device

Abstract

Disclosed in the present invention are a method for precise transmission and parsing of a phase-cut transmission control signal, a control system, an apparatus and a gateway device. On the basis of a live wire alternating current sinusoidal signal, generation of a zero-crossing pulse signal is triggered every T / 2 cycle; a synchronization signal immediately follows the generation triggering of a current zero-crossing pulse; during a valid identification cycle Ta, a falling edge of an alternating current half wave is caused to generate a right notch corresponding to a time tR, or an original state is maintained until a next zero-crossing pulse is generated; the generation of a zero-crossing pulse represents a first digital signal, and the generation of a right notch represents a second digital signal, signals outside the cycle Ta being invalid. A midpoint between a rising edge and a falling edge of each zero-crossing pulse is used as a theoretical zero-crossing point to trigger timing, and the position of the theoretical zero-crossing point is corrected in real time for each zero-crossing pulse signal, thereby eliminating communication errors caused by alternating current interference; a synchronization signal and a valid identification cycle are used to mark the start and the end, thereby achieving precise parsing; and when there is no data transmission, only zero-crossing pulses are generated, thereby reducing energy consumption.

Description

A phase-cut transmission control signal accurate sending and analysis method, control system, device and gateway equipment TECHNICAL FIELD

[0001] The present application relates to the field of phase-cut communication control, in particular to a phase-cut transmission control signal accurate sending and analysis method, control system device and gateway equipment. BACKGROUND

[0002] Currently, the wired communication dimming control 0-10V, DALI, DMX512, etc. of the LED lighting products on the market all need to lay signal control lines, which is high in cost and complex in wiring; the wireless communication control WIFI, ZIGBEE, Bluetooth, etc. protocol is simple in wiring, but the product needs to be configured, the signal is seriously affected by the site environment, and the stability is poor.

[0003] In the existing wired communication technology, there is a control mode of PLC power carrier, which transmits signals through power lines without signal lines, is simple in wiring, can adjust light and color, and is single-lamp single-control, but the current cost is high, the carrier frequency is high, the transmission distance is short, it is easy to be disturbed, a separate isolator needs to be added at the front end, and it is not easy to construct. The above-mentioned wired, wireless and PLC communication modes all need to be configured or debugged.

[0004] There is also an existing technology for digital control of LED lamps on the market, which does not need to deploy control lines, and can directly control the lamps through power supply and transmission of digital control signals, such as the technology disclosed in Chinese patent CN117279150A, lamp controller, LED lamp, control system, control signal sending and receiving method, which uses the technology scheme of transmitting data through the notch of the falling edge of sinusoidal alternating current, which can solve the above-mentioned problems, but the synchronous waveform state and the data waveform state are not clearly distinguished, the starting point is not clearly defined, and the data signal does not have a clear end identifier, which is easy to cause head-tail misalignment, analysis confusion and control abnormality.

[0005] In the existing disclosed technology, the phase-cut is generated by using the zero-crossing pulse falling edge timing method, but in actual use, there must be external superimposed interference, which will cause the rising edge and the falling edge of the zero-crossing pulse to trigger in advance or lag, so that the theoretical zero-crossing point judged after calculation deviates from the real zero-crossing center point, and after deviation, the waveform notch position after the zero-crossing pulse triggered by the single-sided falling edge of the pulse will be offset, and after continuous multiple waveforms, the offset position will be larger and larger, and even two square wave pulse signals will appear in succession after the signal conversion and acquisition, causing the second single-chip microcomputer to analyze confusion.

[0006] In summary, it can be seen that the method in the prior art can stay in theory, but it is not operable in practical application. Therefore, it is urgent to design a phase-cut communication controller which takes the center point of the rising edge and the falling edge as a theoretical zero-crossing point, can correct the theoretical zero-crossing point approaching the real zero-crossing point in real time by using an algorithm in consideration of external interference, realizes accurate triggering timing, clearly defines the identification of the start and end of the data in the sinusoidal waveform, improves the analysis accuracy, realizes accurate control and has a debugging-free function. SUMMARY

[0007] The present application discloses a phase-cut transmission control signal accurate sending and analyzing method, a control system device and a gateway equipment, sets a synchronization signal as a starting point mark, sets an effective recognition period Ta, the signal between the period time of Ta and the next synchronization signal is invalid, takes the center point of the rising edge and the falling edge of the zero-crossing pulse as a theoretical zero-crossing point, continuously corrects the position of the theoretical zero-crossing point by the way of cyclic average, makes the theoretical zero-crossing point approach the real zero-crossing point, and realizes accurate triggering timing.

[0008] Technical scheme: the present application discloses a phase-cut transmission control signal accurate sending and analyzing method, comprising the following steps:

[0009] The zero-crossing pulse signal ZERO-PULSE is generated by the hardware trigger according to the characteristic that the live wire alternating current sinusoidal wave signal generates zero-crossing every T / 2 period;

[0010] A synchronization signal is followed immediately after the current zero-crossing pulse ZERO-PULSE is triggered, the synchronization signal is expressed as a synchronization defect with different sizes or positions by the temporary absence of the alternating current sinusoidal waveform;

[0011] In the effective recognition period Ta after the synchronization defect, the (T / 2)-t R time is turned on after the zero-crossing pulse ZERO-PULSE is triggered, and the t R time is turned off, so that the falling edge of the alternating current half wave generates a right defect corresponding to t R or only generates the zero-crossing pulse ZERO-PULSE;

[0012] In the effective recognition period Ta after the synchronization defect, the zero-crossing pulse ZERO-PULSE represents the first digital signal, the right defect represents the second digital signal, and the signal between the period time of Ta and the next synchronization signal is invalid.

[0013] Further, the form of the synchronization defect is as follows:

[0014] When there is data to send, turn off immediately after the current ZERO-PULSE signal triggers for a time ts1, and generate a synchronous gap corresponding to the time ts1 at the rising edge of the AC half wave.

[0015] Further, the form of the synchronous gap is as follows:

[0016] When there is data to send, turn on after the current ZERO-PULSE signal triggers for a time (T / 2)-ts2, and then turn off for a time ts2, ts2>t R , and generate a synchronous gap corresponding to the time ts2 at the falling edge of the AC half wave.

[0017] Further, the form of the synchronous gap is as follows:

[0018] When there is data to send, turn off immediately after the current ZERO-PULSE signal triggers for a time T / 2, so that the AC sine wave is missing an entire half wave as a synchronous gap signal.

[0019] Further, after the trigger generates the zero-crossing pulse ZERO-PULSE, the position of the theoretical zero-crossing point is continuously corrected by means of cyclic averaging, so that the theoretical zero-crossing point approaches the real zero-crossing point infinitely, and the specific correction process is as follows:

[0020] The rising edge corresponds to the time tiL, the falling edge corresponds to the time tiR, and the theoretical zero-crossing point of the zero-crossing pulse is temporarily set as ti, then ti-tiL=△tiL, tiR-ti=△tiR;

[0021] Under the ideal condition without interference, △tiL=△tiR, the first zero-crossing pulse is set as t0, the rising edge of the first zero-crossing pulse corresponds to the time t0L, the falling edge corresponds to the time t0R, and (t0L+t0R) / 2 is the first theoretical calculation zero-crossing point t0, each zero-crossing point is spaced by T / 2, the second theoretical zero-crossing point is t0+T / 2, which is set as t1, and so on t2; t3…tn;

[0022] When the AC sine wave signal is interfered by harmonics, the rising edge or the falling edge of the zero-crossing pulse will be triggered in advance or delayed, the average value △taL of △tiL is (△t0L+△t1L+…+△t(n-1)L) / n, the average value △taR of △tiR is (△t0R+△t1R+…+△t(n-1)R) / n, and t0+(△taR-△taL) / 2+n*(T / 2) is taken as the theoretical zero-crossing point of the nth;

[0023] When the nth+1 theoretical zero-crossing point is calculated, the data of △tnL and △tnR are imported while the data of △t0L and △t0R are discarded, and the average of n data is always maintained, and the nth+1 zero-crossing point is expressed as t1+ (△taR-△taL) / 2+n*T / 2, or expressed as tn+ (△taR-△taL) / 2+T / 2.

[0024] The application further discloses a control system based on the accurate transmission and analysis method of the phase-cut transmission control signal.

[0025] The phase-cut controller is connected with the input end of the driver, and the phase-cut controller and the driver perform the accurate transmission and analysis method of the phase-cut transmission control signal. R The phase-cut controller outputs a signal as the input signal of the driver, and the AC voltage waveform from the phase-cut controller is analyzed by the driver to be a digital signal to be transmitted.

[0026] Preferably, the phase-cut controller comprises an input protection unit, a zero-crossing detection unit, a first single-chip microcomputer, an auxiliary power supply unit, a signal and power transmission unit, and a key control unit.

[0027] The input protection unit obtains the positive sine wave signal of the live wire AC power from the input end of the phase-cut controller. When the key of the key control unit is pressed to send data, the first single-chip microcomputer generates a synchronization signal immediately after the current zero-crossing pulse ZERO-PULSE is triggered, and the first single-chip microcomputer is provided with an effective identification period Ta. R The signal and power transmission unit is turned off after t R The signal and power transmission unit is turned off after t R The signal and power transmission unit is turned off after t

[0028] Preferably, the driver comprises a second input unit, a rectification and step-down power unit, a signal execution unit, and further comprises a second single-chip microcomputer, a waveform trimming unit, a signal conversion and acquisition unit, and a current and address setting unit, the second single-chip microcomputer is connected with the signal conversion and acquisition unit and the current and address setting unit, and the signal execution unit is connected with the second single-chip microcomputer;

[0029] The signal output by the phase-cut controller is rectified by the second input unit and the rectification unit to generate a rectification waveform V_DC, when the input waveform encounters a gap, the waveform trimming unit instantaneously pulls down V_DC, and the digital signal corresponding to the square wave V_SW required to be transmitted is generated in time through the signal conversion and acquisition unit, and the square wave V_SW is analyzed by the second single-chip microcomputer to be the digital signal required to be transmitted;

[0030] The second single-chip microcomputer analyzes the square wave V_SW and outputs through the signal execution unit; when analyzing the signal, the second single-chip microcomputer considers that it is the start of the next string of data after recognizing the synchronization pulse signal, the synchronization signal is not used as a data signal, but only as a data start mark, the zero-crossing pulse recognized after the synchronization signal indicates that the received digital signal is the first digital signal; the square wave pulse corresponding to the time t recognized after the synchronization signal indicates that the received digital signal is the second digital signal, and the signal between the time Ta outside the effective identification period and the next synchronization signal is invalid. R

[0031] The application further discloses a combination control device, which comprises one master control and a plurality of secondary controls, the master control is connected in series with each of the secondary controls, each secondary control can further be connected in series with a next-level controller which does not exceed the power of the secondary control, and the next-level controller can continue to extend the control of more devices, the master control, the secondary controls and the next-level controllers are all connected with a plurality of loads, the loads are drivers and lamps connected with the drivers, the master control and the secondary controls are both the phase-cut controller structure, and the appearance structure of the phase-cut controller includes but is not limited to a 86-type panel, a guide rail type control box, a 4-inch to 10-inch central control screen and the like.

[0032] Preferably, the driver is provided with an address setting unit, which is placed with a four-bit code switch, 16 address codes are arranged and combined, each address code corresponds to the control of all states of one lamp or the execution of the same instruction state of a plurality of lamps with the same address code. In the actual project debugging process, the operation mode of pre-code pairing is used, so that the scene debugging of the device is truly realized.

[0033] ​The application also discloses a gateway device, the master control or the slave control serving as a gateway device, which is combined with a wireless module or a wired protocol KNX, CAN, RS485 or 232 to access various ecologies and realize scene and automation control through a mobile phone APP, a computer terminal, voice or a SAAS background. Advantages

[0034] 1、The application takes a digital signal corresponding to a zero-crossing pulse signal, and the zero-crossing pulse does not produce a gap in the waveform, thereby maximizing the integrity of the alternating sinusoidal waveform and reducing energy loss. When there is data transmission at the phase-cut controller end, a synchronization gap is first generated as a starting signal, and the synchronization gap is not a data gap. Meanwhile, an effective identification period is set, and the transmission time of a string of sinusoidal waves is exactly an effective identification period, so as to ensure that all gaps or pulses outside the identification period are invalid signals until the appearance of the next synchronization gap, which means that a new string of data is transmitted. In this way, the sinusoidal signal corresponding to each string of data has a starting point and an ending point, and the zero-crossing pulse without data transmission is not mistaken for a digital signal, and the data before and after is not misaligned, thereby ensuring the accuracy of the analysis.

[0035] 2、The synchronization signal designed in the application generates a synchronization gap corresponding to time ts1 at the rising edge of an alternating half wave, and the rising edge of the alternating half wave generates the synchronization signal, which has the advantages that the gap can be smaller, and the loss is smaller. The designed conduction (T / 2)-ts2 time is turned off after time ts2, and ts2>t R A synchronization gap corresponding to time ts2 is generated at the falling edge of the alternating half wave, and the falling edge of the alternating half wave generates the synchronization signal, which has the advantage that the current impact is smaller. The designed immediate turn-off T / 2 time makes the alternating sinusoidal wave missing a whole half wave as a synchronization gap signal, and the missing of a whole alternating half wave as a synchronization signal has the advantages that the conduction is at zero point and the turn-off is at zero point, the complete alternating waveform is retained, and there is no energy loss.

[0036] 3. Existing technologies using the falling edge of a zero-crossing pulse for timing have several drawbacks. First, due to the discreteness of hardware components and temperature variations, the time from the rising and falling edges of the zero-crossing pulse to the actual zero-crossing point varies. Using only the rising or falling edge to obtain the zero-crossing point is unreliable. Using the center point of the rising and falling edges as the theoretical zero-crossing point reduces the impact of hardware discreteness and temperature drift on obtaining the zero-crossing point. Second, when subjected to external superimposed interference, if the falling edge of the zero-crossing pulse triggers prematurely or delayedly, the timing will be advanced or delayed, causing the next right-side defect to be advanced or delayed overall. This pattern continues, with subsequent deviations becoming increasingly larger, leading to errors in the second microcontroller's analysis and ultimately, control malfunctions. This invention takes into account the interference factors that inevitably exist in actual use. It uses the center point of the rising and falling edges of the zero-crossing pulse as the theoretical zero-crossing point and uses an algorithm to correct the position of the theoretical zero-crossing point in real time, so that the theoretical zero-crossing point is infinitely close to the actual zero-crossing point, thus achieving precise triggering timing. Even if external interference affects the early or late triggering of the rising and falling edges of the zero-crossing pulse, it can still ensure the absolute accuracy of the position and number of square wave signals transformed from the zero-crossing pulse and the right-side gap, thereby ensuring the accuracy of the data parsing of the second microcontroller.

[0037] 4. This invention can utilize the device address DIP switch function at the signal analysis end to fix several commonly used scenario modes. After pre-setting, it can achieve true on-site debugging-free operation, greatly reducing labor costs.

[0038] 5. This invention achieves precise control over a large area through the combined use of multiple phase-cutting controllers. The combination is achieved through a master-slave relationship, and this infinitely expandable master-slave combination method can successfully control a large space composed of several small areas. The device form of the phase-cutting controller includes, but is not limited to, switch panels, LCD central control screens, and DIN rail control boxes.

[0039] 6. This invention combines the phase-cutting controller with a wireless module or wired protocols such as KNX, CAN, RS485, and 232, enabling the controller device to have gateway functionality, thereby achieving remote or automated control via mobile APP, computer, voice, or SaaS backend. Attached Figure Description

[0040] Figure 1 is a signal waveform diagram corresponding to the synchronization deficiency form 1 of Embodiment 1 of the present invention;

[0041] Figure 2 is a signal waveform diagram corresponding to the second synchronization deficiency form in Embodiment 2 of the present invention;

[0042] Figure 3 is a signal waveform diagram corresponding to the synchronous missing form 3 of Embodiment 3 of the present invention;

[0043] Figure 4 shows the signal waveform and digital analysis results corresponding to Embodiment 2 of the present invention;

[0044] Fig. 5 is a structural block diagram of the overall control device of the present application;

[0045] Fig. 6 is a rectified waveform under four interference forms;

[0046] Fig. 7 is a parameter diagram of the zero-crossing pulse of the present application which continuously corrects the position of the theoretical zero-crossing point by means of cycle averaging;

[0047] Fig. 8 is a structural block diagram of the control system of the present application;

[0048] Fig. 9 is a structural block diagram of the phase-cut controller of the present application;

[0049] Fig. 10 is a structural block diagram of the driver of the present application;

[0050] Fig. 11 is a circuit diagram of the zero-crossing detection unit of the present application;

[0051] Fig. 12 is a circuit diagram of the waveform trimming unit of the present application;

[0052] Fig. 13 is a circuit diagram of the signal conversion acquisition unit of the present application. DETAILED DESCRIPTION

[0053] The present application will be further described below in conjunction with the accompanying drawings. The following examples are only used to more clearly illustrate the technical solutions of the present application, and cannot be used to limit the protection scope of the present application. EMBODIMENT

[0054] The present application discloses a phase-cut transmission control signal accurate sending and analysis method, a control system device and a gateway equipment, the method comprising the following steps:

[0055] The zero-crossing pulse signal ZERO-PULSE is generated by hardware triggering through the characteristic that the live wire alternating current sinusoidal wave signal generates zero-crossing every T / 2 period.

[0056] A synchronization signal follows the generation of the current zero-crossing pulse ZERO-PULSE, and the synchronization signal is expressed as a synchronization defect with different sizes or positions through the temporary absence of the alternating current sinusoidal waveform.

[0057] In the effective identification period Ta after the synchronization defect, after the generation of each zero-crossing pulse ZERO-PULSE, the conduction (T / 2)-t R time and the turn-off t R time are controlled, so that the falling edge of the alternating current half-wave generates a right defect corresponding to t R time or only generates the zero-crossing pulse ZERO-PULSE.

[0058] In the effective identification period Ta after the generation of the synchronization defect, a zero-crossing pulse ZERO-PULSE representing a first digital signal is generated, and a right defect representing a second digital signal is generated, and the signal is invalid between the Ta period of time and the next synchronization signal.

[0059] In the embodiment, when data is transmitted, the first single-chip microcomputer is turned off for a ts1 time immediately after the current ZERO-PULSE signal is triggered, and a synchronization defect corresponding to the ts1 time is generated at the rising edge of the alternating current half wave, as shown in FIG. 1.

[0060] For the above-mentioned zero-crossing pulse, if several adverse situations are generated after external superimposed interference, as shown in FIG. 6, the four different situations are rising edge advance, rising edge lag, falling edge advance, and falling edge lag.

[0061] In the prior art, the zero-crossing pulse falling edge timing method is used. First, due to the discrete nature of the hardware circuit devices and temperature and other influences, the time of the rising edge and the falling edge of the zero-crossing pulse to the actual zero-crossing point will change, and the zero-crossing point obtained by using the rising edge or the falling edge alone is unreliable, and the center point of the rising edge and the falling edge is taken as the theoretical calculation zero-crossing point, which can reduce the influence of hardware discreteness and temperature drift on the acquisition of the zero-crossing point. Secondly, when the falling edge triggering timing method is subjected to external superimposed interference, if the falling edge of the zero-crossing pulse is triggered in advance or lag, the timing is advanced or delayed, resulting in the advance or lag of the next right defect as a whole, and so on, the deviation of the latter will be larger and larger, causing the second single-chip microcomputer to parse incorrectly, and finally causing abnormal control.

[0062] The prior art uses the zero-crossing pulse falling edge timing, and the following focuses on the analysis of the two situations of the falling edge advance and the falling edge lag. Assuming that a right defect is generated after the zero-crossing pulse falling edge starting point, the original right defect corresponds to a pulse width of t R Adding half of the zero-crossing pulse width, if the falling edge lags, the right defect lags, the corresponding pulse width narrows, if the falling edge advances, the right defect advances, the corresponding pulse width widens, or even one more zero-crossing pulse width appears. The single-chip microcomputer may misjudge the synchronization defect as the pulse width widens, and the single-chip microcomputer may misjudge the zero-crossing pulse as the pulse width narrows, and the single-chip microcomputer may parse one more digital information if one more pulse appears. Therefore, any of the above situations may cause incorrect parsing and finally abnormal control. Therefore, in order to accurately parse and accurately control, the accurately calculated zero-crossing point must be taken as the starting point, and the theoretically calculated zero-crossing point position is constantly corrected to be close to the actual zero-crossing point, so that the position deviation of all defects generated after the starting point is minimized, and the purpose of accurate parsing and accurate control is achieved.

[0063] The application optimizes the zero-crossing pulse starting point timing mode, and uses the theoretically calculated zero-crossing point corrected in real time to replace the falling edge trigger timing. After the generation of the zero-crossing pulse ZERO-PULSE, the position of the theoretically calculated zero-crossing point is continuously corrected through the cyclic average value, so that the theoretically calculated zero-crossing point is infinitely close to the real zero-crossing point, as shown in Figure 7, and the specific correction process is as follows:

[0064] The rising edge of the pulse corresponds to the time tiL, the falling edge corresponds to the time tiR, and the theoretically calculated zero-crossing point of the zero-crossing pulse is temporarily set as ti, so that ti-tiL=△tiL and tiR-ti=△tiR.

[0065] Under the ideal condition without interference, △tiL=△tiR, the first zero-crossing pulse is set as t0, the rising edge of the first zero-crossing pulse corresponds to the time t0L, the falling edge corresponds to the time t0R, and (t0L+t0R) / 2 is the first theoretically calculated zero-crossing point t0. Each zero-crossing point is spaced by T / 2, the second theoretically calculated zero-crossing point is t1, and so on, t2, t3, …, tn.

[0066] When the AC sinusoidal signal is interfered by harmonics, the rising edge or the falling edge of the zero-crossing pulse is triggered in advance or delayed. The average value of △tiL is △taL=(△t0L+△t1L+…+△t(n-1)L) / n, the average value of △tiR is △taR=(△t0R+△t1R+……+△t(n-1)R) / n, and t0+(△taR-△taL) / 2+n*(T / 2) is taken as the theoretically calculated zero-crossing point of the nth.

[0067] When the theoretically calculated zero-crossing point of the n+1th is calculated, the data of △t0L and △t0R are discarded while the data of △tnL and △tnR are introduced, and the average value of n data is always maintained, the n+1th zero-crossing point is expressed as t1+(△taR-△taL) / 2+n*(T / 2), or tn+(△taR-△taL) / 2+ T / 2.

[0068] The control system disclosed by the application comprises a phase-cut controller and a driver, as shown in Figure 8.

[0069] The phase-cut controller is connected with the input end of the driver, the phase-cut transmission control signal accurate sending and analyzing method described above is performed between the phase-cut controller and the driver, the phase-cut controller generates a synchronization signal, and in the effective identification period Ta after the synchronization signal, a zero-crossing pulse ZERO-PULSE is generated at the falling edge of the half wave of the AC power supply. RThe right phase deficiency or only zero-pulse signal is generated corresponding to the time. The output signal of the phase-cut controller is the input signal of the driver. The AC voltage waveform from the output of the phase-cut controller is analyzed by the driver to be the digital signal to be transmitted. The phase-cut controller generates the first digital signal represented by the zero-pulse ZERO-PULSE and the second digital signal represented by the right phase deficiency in the effective identification period Ta after the generation of the synchronization deficiency. The signal is invalid between the period Ta and the next synchronization signal.

[0070] In the embodiment, the phase-cut controller comprises an input protection unit, a zero-crossing detection unit, a first single-chip microcomputer, an auxiliary power supply unit, a signal and power transmission unit, and a key control unit. The zero-crossing detection unit, the signal and power transmission unit, and the auxiliary power supply unit are connected with the input protection unit. The first single-chip microcomputer is connected with the zero-crossing detection unit, the signal and power transmission unit, the auxiliary power supply unit, and the key control unit.

[0071] Referring to FIG. 9, the input protection unit obtains the live AC sine wave signal at the input end of the phase-cut controller. When the key of the key control unit is not pressed and the first single-chip microcomputer has no data to be transmitted, the signal and power transmission unit is continuously turned on. When the key of the key control unit is pressed to transmit data, the first single-chip microcomputer is triggered by the current zero-pulse ZERO-PULSE and immediately follows a synchronization signal. The first single-chip microcomputer is provided with an effective identification period Ta. The signal and power transmission unit is turned on (T / 2)-t R and turned off t R after the time, so that the falling edge of the half wave of the AC power generates a right phase deficiency corresponding to the time t R or only a zero-pulse ZERO-PULSE. The auxiliary power supply unit supplies power to the first single-chip microcomputer.

[0072] Referring to FIG. 10, the driver comprises a second input unit, a rectification unit, and a signal execution unit. The driver further comprises a second single-chip microcomputer, a waveform trimming unit, and a signal conversion acquisition unit. The second single-chip microcomputer is connected with the waveform trimming unit and the signal conversion acquisition unit. The signal execution unit is connected with the second single-chip microcomputer.

[0073] The signal output by the phase-cut controller is rectified by the second input unit and the waveform rectification unit to generate a rectified waveform V_DC. When the input waveform encounters a gap, the waveform trimming unit instantaneously pulls down V_DC. The digital signal to be transmitted is generated in time by the signal conversion acquisition unit to generate a square wave V_SW corresponding to the digital signal. The square wave V_SW is analyzed by the second single-chip microcomputer to be the digital signal to be transmitted.

[0074] The second single-chip microcomputer analyzes the square wave V_SW and outputs through a signal execution unit; when analyzing the signal, the second single-chip microcomputer considers that it is the start of the next string of data after identifying the synchronization pulse signal, and the synchronization signal is not regarded as a data signal, but only as a data start mark. The zero-crossing pulse identified after the synchronization signal indicates that the received digital signal is the first digital signal; the square wave pulse corresponding to the time t identified after the synchronization signal indicates that the received digital signal is the second digital signal, and the signal between the time Ta and the next synchronization signal is invalid. R

[0075] In the embodiment, referring to FIG. 12, the waveform trimming unit generates a voltage division ratio by two voltage division resistors, and connects the negative input end of a comparator; the output of the comparator is connected to the gate of a MOS transistor; when the negative input voltage is lower than the positive reference voltage, the output level of the comparator is reversed; when the output of the comparator is at a low level, the MOS transistor is cut off; when the output is at a high level, the MOS transistor is turned on, and the waveform trimming is started.

[0076] Referring to FIG. 13, the signal conversion acquisition unit is composed of an adjustable parallel voltage stabilizer TL431 and an optocoupler PC817; the input end inputs a V_DC signal; the reference end pin of the adjustable parallel voltage stabilizer TL431 is connected to two voltage division resistors; the negative electrode of the light-emitting diode of the optocoupler PC817 is connected to the cathode of the TL431; the positive electrode of the light-emitting diode is connected to the positive voltage VCC through a resistor; the emitter of the triode of the optocoupler is grounded; the collector is connected to the positive voltage 3.3V through a resistor; and the collector outputs a square wave pulse signal V_SW.

[0077] After the alternating current passes through a diode half-bridge rectifier, the zero-crossing detection unit generates a voltage division ratio by two resistors, and connects the base of a triode; the collector of the triode is connected to VCC through a resistor; and the zero-crossing signal end is connected to the collector; when the triode is cut off, the zero-crossing signal end outputs a high level.

[0078] In addition, the application discloses a combined control device, which is used in combination with multiple phase-cut controllers, and comprises one master control and a plurality of secondary controls.

[0079] The load is a driver and a lamp connected to the driver, and the appearance structure of the phase-cut controller includes but is not limited to a switch panel, a liquid crystal central control screen and a guide rail type control box, specifically, a 86 type panel, a guide rail type control box and a 4-inch to 10-inch central control screen.

[0080] ​The driver is provided with an address setting unit which places a set of dial switches, arranges a plurality of address codes, each of which corresponds to control all states of a lamp or executes the same instruction state on a plurality of lamps with the same address code.

[0081] The above master control or secondary control can be used as a gateway device, combined with wireless modules or wired protocols KNX, CAN, RS485, 232, etc., to access various ecosystems such as Xiaomi, graffiti, XiaoDu, Tmall, Apple, etc. Client APP, control the master control and secondary control device through the APP of the ecosystem, realize scene and automation control through mobile phone APP, computer terminal, voice or SAAS background.

[0082] Since the power of a phase-cut controller is limited, for larger scenes and a large number of sub-devices, we need to use multiple phase-cut controllers in combination to achieve precise control of a large area. The combination method can be connected through the master-slave relationship described in Figure 5. Since the control information is loaded on the waveform of the power supply, when the next level controller does not send information, it is equivalent to a straight pass, which does not affect the function of the upper level controller. Therefore, even if the sub-devices under the slave controller (secondary control) are in the off state, the master controller (master control) can effectively control the devices connected to the slave controller. Since each slave controller has a panel button that can send instructions, it can also control the sub-devices connected to it. If the power of the master controller is supplied by another zero fire line, the master controller only needs to send signals, and the master controller can be connected to any number of slave controllers. Each slave controller can also be connected to the next level controller without exceeding its power, and can continue to be extended. Using this combination method of unlimited extension of the master-slave relationship, a large area composed of several small areas can be successfully controlled. Embodiment

[0083] The application discloses a phase-cut transmission control signal precise sending and analyzing method, a control system and a control device. R The first single-chip microcomputer is turned on for (T / 2)-ts2 time and then turned off for ts2 time after the current ZERO-PULSE signal trigger is generated, and ts2 time>T

[0084] For the synchronization gap form of the embodiment, the applicant analyzes the current data as shown in Figure 4. The data after the phase-cut waveform is analyzed is 00101100, the synchronization gap is the data start mark, and the signal outside the period Ta is invalid data. Embodiment

[0085] The application discloses a kind of phase-cut transmission control signal accurate sending analysis method, control system and control device, the difference between the present embodiment and embodiment 1 is as follows: when there is data transmission, after the current ZERO-PULSE signal trigger is generated, immediately turn off time T / 2, make the absence of an entire half wave of alternating sinusoidal wave as synchronous missing signal.Other structures and methods are same with embodiment 1, this place does not make further elaboration.

[0086] The above-described embodiments are only for illustrating the technical concept and characteristics of the present application, and the purpose is to enable those skilled in the art to understand the content of the present application and to implement it, and it cannot limit the protection scope of the present application. Any equivalent transformation or modification made in accordance with the spirit and essence of the present application shall be covered within the protection scope of the present application.

Claims

1. A method for accurate transmission and analysis of phase-cut control signals, characterized by, It comprises the following steps: The zero-crossing pulse signal ZERO-PULSE is generated by the feature that the fire line AC sine wave signal generates zero-crossing every T / 2 period; A synchronization signal is followed immediately after the current zero-crossing pulse ZERO-PULSE is triggered, and the synchronization signal is expressed as a synchronization defect with different sizes or positions by a short absence of the AC sine wave form; In the effective recognition period Ta after the lack of synchronization, after the generation of each zero-pulse ZERO-PULSE trigger, turn on (T / 2)-t R time and turn off t R time, so that the falling edge of the half wave of the alternating current generates a right lack corresponding to t R time or only generates a zero-pulse ZERO-PULSE; Within the effective identification period Ta after the synchronization defect is generated, the first digital signal is represented by the zero-crossing pulse ZERO-PULSE, and the second digital signal is represented by the right defect, and the signal between the period Ta and the next synchronization signal is invalid.

2. The method of claim 1, wherein the method further comprises: The form of the synchronization defect is as follows: When there is data transmission, a synchronization defect corresponding to the time ts1 is generated on the rising edge of the AC half wave after the current ZERO-PULSE signal is triggered and is turned off immediately.

3. The method of claim 1, wherein the method further comprises: The form of the synchronization defect is as follows: When there is data to send, after the current ZERO-PULSE signal trigger is generated, the switch is turned on for (T / 2)-ts2 time and then turned off for time ts2, ts2>t R A synchronous gap corresponding to time ts2 is generated at the falling edge of the AC half wave.

4. The method of claim 1, wherein the method further comprises: The form of the synchronization defect is as follows: When there is data transmission, the AC sine wave is absent for an entire half wave as a synchronization defect signal after the current ZERO-PULSE signal is triggered and is turned off immediately.

5. The method of claim 1 to 4, wherein, After the zero-crossing pulse ZERO-PULSE is triggered, the center points of the rising edge and the falling edge are taken as the theoretical zero-crossing point, and the position of the theoretical zero-crossing point is continuously corrected by the way of cyclic average, so that the theoretical zero-crossing point approaches the real zero-crossing point infinitely, and the specific correction process is as follows: The pulse rising edge corresponds to the time tiL, the falling edge corresponds to the time tiR, and the theoretical zero-crossing point of the zero-crossing pulse is temporarily set as ti, ti-tiL=△tiL, and tiR-ti=△tiR; Under the ideal condition without interference, △tiL=△tiR, the first zero-crossing pulse is set as t0, the rising edge of the first zero-crossing pulse corresponds to the time t0L, the falling edge corresponds to the time t0R, and (t0L+t0R) / 2 is the first theoretical calculation zero-crossing point t0, each zero-crossing point is separated by T / 2, the second theoretical zero-crossing point is t0+T / 2, which is set as t1, and so on t2, t3, …, tn; When the AC sine wave signal is interfered by harmonics, the rising edge or the falling edge of the zero-crossing pulse is triggered in advance or delayed, the average value △taL of △tiL is (△t0L+△t1L+…+△t(n-1)L) / n, the average value △taR of △tiR is (△t0R+△t1R+…+△t(n-1)R) / n, and t0+ (△taR-△taL) / 2+n*(T / 2) is taken as the theoretical zero-crossing point of the nth point; When the (n+1)th theoretical zero-crossing point is calculated, the data of △t0L and △t0R are discarded while the data of △tnL and △tnR are introduced, and the average value of n data is always maintained, the (n+1)th zero-crossing point is represented as t1+(△taR-△taL) / 2+n*(T / 2), or tn+(△taR-△taL) / 2+T / 2.

6. A control system for accurate transmission resolution based on the phase-cut transmission control signal according to any one of claims 1 to 5, characterized in that It comprises a phase-cut controller and a driver; The phase-cut controller output is connected with the driver input, the phase-cut controller and the driver perform the accurate transmission and analysis method of the phase-cut transmission control signal as claimed in any one of claims 1 to 5, the phase-cut controller generates a synchronization signal, in the effective identification period Ta after the synchronization signal, the falling edge of the half wave of the alternating current generates a right notch corresponding to t R time or only generates a zero-pulse signal; the phase-cut controller output signal is the input signal of the driver, the alternating current voltage waveform from the phase-cut controller is analyzed by the driver to be the digital signal to be transmitted, the driver generates a zero-pulse representing the first digital signal in the effective identification period Ta after generating the synchronization notch, generates a right notch representing the second digital signal, and the signal between the period Ta and the next synchronization signal is invalid.

7. The control system of claim 6, wherein The phase-cut controller comprises an input protection unit, a zero-crossing detection unit, a first single-chip microcomputer, an auxiliary power supply unit, a signal and power transmission unit, and a key control unit; the zero-crossing detection unit and the auxiliary power supply unit are connected with the input protection unit; the first single-chip microcomputer is connected with the zero-crossing detection unit, the signal and power transmission unit, the auxiliary power supply unit, and the key control unit respectively; The phase-cut controller input end obtains a live line alternating current sine wave signal through an input protection unit; when no key of the key control unit is pressed and the first single chip microcomputer has no data to send, the signal and power transmission unit is continuously turned on; when the key of the key control unit is pressed to send data, the first single chip microcomputer is triggered by a current zero pulse ZERO-PULSE and immediately follows a synchronization signal, and the first single chip microcomputer is provided with an effective identification period Ta; after each zero pulse ZERO-PULSE trigger, the signal and power transmission unit is turned on for (T / 2)-t R time and then turned off t R time, so that the falling edge of the alternating current half wave produces a right defect corresponding to t R time, or only a zero pulse ZERO-PULSE; and the auxiliary power supply unit supplies power to the first single chip microcomputer.

8. The control system of claim 6, wherein, The driver comprises a second input unit, a rectification and voltage reduction power unit, and a signal execution unit, and further comprises a second single-chip microcomputer, a waveform trimming unit, a signal conversion acquisition unit, and a current and address setting unit; the second single-chip microcomputer is connected with the signal conversion acquisition unit and the current and address setting unit; the signal execution unit is connected with the second single-chip microcomputer; The signal output by the phase-cut controller is rectified by the second input unit and the rectification unit to generate a rectification waveform V_DC; when the input waveform encounters a gap, the waveform trimming unit instantaneously pulls down V_DC, and the digital signal corresponding to the square wave V_SW required to be transmitted is generated in time through the signal conversion acquisition unit; the square wave V_SW is analyzed by the second single-chip microcomputer to be the digital signal required to be transmitted; The second single-chip microcomputer analyzes the square wave V_SW and outputs through a signal execution unit; when analyzing the signal, the second single-chip microcomputer considers that it is the start of the next string of data after recognizing the synchronization pulse signal, and the synchronization signal is not regarded as a data signal, but only as a data start mark; the zero-crossing pulse recognized after the synchronization signal indicates that the received digital signal is a first digital signal; the square wave pulse corresponding to the time t recognized after the synchronization signal indicates that the received digital signal is a second digital signal, and the signal between the time Ta outside the effective identification period and the next synchronization signal is invalid. R The second single-chip microcomputer analyzes the square wave V_SW and outputs through a signal execution unit; when analyzing the signal, the second single-chip microcomputer considers that it is the start of the next string of data after recognizing the synchronization pulse signal, and the synchronization signal is not regarded as a data signal, but only as a data start mark; the zero-crossing pulse recognized after the synchronization signal indicates that the received digital signal is a first digital signal; the square wave pulse corresponding to the time t recognized after the synchronization signal indicates that the received digital signal is a second digital signal, and the signal between the time Ta outside the effective identification period and the next synchronization signal is invalid.

9. A combination control device, characterized by The main control and the secondary controls are connected in series, each secondary control can be connected with a next-level controller with power not exceeding that of the secondary control, and more devices can be controlled, a plurality of loads are connected to the main control, the secondary controls, and the next-level controller, the loads are the drivers and the lamps connected with the drivers, and the main control and the secondary controls are the phase-cut controller structure of claim 7.

10. The combination control device of claim 9, wherein, The driver is provided with an address setting unit, which is provided with a group of code switches, and a plurality of address codes are arranged and combined, each address code corresponding to all states of a lamp or corresponding to a plurality of lamps with the same address code executing the same instruction state.

11. A gateway device, characterized by The main control or the secondary control of claim 9 is a gateway device, which is combined with a wireless module or a wired protocol KNX, CAN, RS485, and 232 to access various ecologies and realize scene and automation control through a mobile phone APP, a computer terminal, voice, or a SAAS background.