Gateway for a field bus system

Abstract

The invention relates to a gateway (2) for a field bus system (100), wherein the gateway (2) comprises a first processor (6) with a first operating system (62), a second processor (7) with a second operating system (72) which is different from the first operating system (62) and has a virtual Ethernet interface (73), and an interprocess communication interface (9) which is designed to enable an Ethernet protocol-based interprocess communication between the first operating system (62) and the second operating system (72) using the virtual Ethernet interface (73).

Description

[0001] GATEWAY FOR A FIELDBUS SYSTEM

[0002] The present disclosure relates to a gateway for a fieldbus system and a fieldbus system with the gateway.

[0003] The present disclosure lies in the technical field of industrial automation or automation technology for industrial applications.

[0004] A fieldbus system can be understood as a bus system that connects field devices, such as sensors and / or actuators, in a plant for communication with an automation device or control unit.

[0005] A gateway can be understood as a bridging module that connects two fieldbus networks. For example, the gateway could connect a higher-level control unit or a supervisory control system with one or more fieldbus modules, which in turn could be connected to one or more field devices. It is conceivable that the gateway uses a different communication standard for communication with the control unit than for communication with the fieldbus modules.

[0006] Furthermore, it is conceivable that the data exchanged between the field devices and the gateway is processed by the gateway using a real-time operating system (e.g., an embedded OS firmware such as (free) RTOS). It is also conceivable that the data exchanged between the control system and the gateway is processed by the gateway using a non-real-time operating system (e.g., Linux).

[0007] Traditionally, integrating a real-time operating system into devices that lacked a real-time operating system, such as Linux-based devices, was cumbersome. Firmware components had to be painstakingly ported to the non-real-time operating system. However, with the introduction of a processor platform that dedicates at least one processor to the real-time operating system and another to the non-real-time operating system, both can now run in parallel.

[0008] However, even if both operating systems are real-time capable, since, for example, RTLinux is used as an essentially real-time capable variant, inter-process communication between operating systems running on different processors is only possible with considerable effort in conventional systems.

[0009] The challenge therefore remains to provide a suitable interface for interprocess communication between one operating system running on one of the processors and the other operating system running on another of the processors.

[0010] In light of this prior art, one objective of the present disclosure may be to specify a device that is suitable for enriching the prior art.

[0011] A specific task can be seen as providing a possibility for inter-process communication for a gateway used in industrial automation technology with two operating systems running in parallel on two different processors, which can do without a proprietary protocol.

[0012] The problem is solved by the features of the independent claims. The dependent and subordinate claims each contain optional further developments of the disclosure.

[0013] The task is then solved by a gateway for a fieldbus system, the gateway comprising a first processor with a first operating system, a second processor with a second operating system which is different from the first operating system and has a virtual Ethernet interface, and an interprocess communication interface designed to enable Ethernet protocol-based interprocess communication between the first operating system and the second operating system using the virtual Ethernet interface.

[0014] In other words, a gateway for a fieldbus system can be provided, where the gateway can include a first processor with a first operating system and a second processor with a second operating system that differs from the first. The gateway can include an interprocess communication interface designed to enable Ethernet protocol-based interprocess communication between the first operating system, optionally an application running on the first operating system, and the second operating system, optionally an application running on the second operating system. From the perspective of the second operating system, the first operating system can represent a field device.

[0015] For the definition of the gateway and the fieldbus system, please refer to the section above.

[0016] A (computer) processor can be understood as a programmable arithmetic unit, i.e., an electronic circuit, which performs actions according to instructions given to it.

[0017] An operating system can be understood as software or a (computer) program that controls and monitors the processing of tasks or (software) programs by the processor.

[0018] An application (also called a task or program instance) can be understood as a computer program running at runtime. The application can be seen as the concrete instantiation of a program for its execution within a computer system, supplemented by further (administrative) information and resource allocations from the operating system for this execution.

[0019] Interprocess communication (IPC) can be understood as a method of exchanging information between the processes, in this case between the operating systems, of a system, in this case the gateway. In other words, interprocess communication can be defined as data exchange between the two operating systems.

[0020] An interprocessor communication interface (IPI) is an interface that enables interprocess communication or data exchange between two processors. An interface is a part of a system that serves communication or data exchange. This interface can be implemented using software and / or hardware. The IPI can have shared memory or be implemented as such in hardware, allowing both processors to access this memory for (optionally bidirectional) data exchange.

[0021] The Ethernet protocol can be understood as a standardized or predefined communication protocol. The Ethernet protocol defines the structure of an Ethernet frame. Besides the MAC addresses of the source and destination, the packets, or Ethernet frames, contain the payload data, which is transmitted via inter-process communication over the...

[0022] The interprocessor communication interface is to be transmitted.

[0023] As explained above, from the perspective of the second operating system, the first operating system can appear as a field device during interprocess communication via the interprocess communication interface. In other words, the first processor's operating system can be considered an external IP device by the second operating system. Specifically, this can mean that the first processor runs an operating system with its own MAC address and its own (logical) IP address, so that from the perspective of the other operating system, which can also be referred to as the main operating system (e.g., Linux), this operating system can be addressed in the same way as a field device connected via cable to the gateway and thus to the processor running the main operating system.

[0024] In other words, an operating system running on the same platform can be connected via an (internal) IP interface in such a way that it appears to the other operating system running on the platform as an external IP-based device or a field device connected to the gateway. This makes it possible to achieve a high degree of abstraction of the applications, allowing the other operating system's standard mechanisms for routing IP connections to be used. Furthermore, routing of the Ethernet interfaces to the other operating system can also be created on the connected operating system's side, so that the latter can also be reached via the interface(s) assigned to the connected operating system.

[0025] Furthermore, interprocess communication between the processors allows one processor to benefit from the greater processing power of the other. It is conceivable that one of the two processors (e.g., the second processor) has more processing power than the other (e.g., the first processor). Computationally intensive applications can then be offloaded to the processor with the greater processing power, thus enabling faster data processing.

[0026] The following section explains in detail the optional training courses for the gateway described above.

[0027] The interprocessor communication interface can comprise two message queues. The first of the two message queues can be configured to allow the first operating system to receive data from the second operating system. The second of the two message queues can be configured to allow the first operating system to send data to the second operating system.

[0028] In other words, bidirectional interprocess communication can be implemented between the two processors. This bidirectional interprocess communication can be implemented using (Ethernet) message queues, which are part of the interprocess communication interface. With a message queue, messages can be sent from one process to another, from where they can be retrieved by a different process. That is, for bidirectional communication, the process of the second operating system can send data to a first message queue, which can then be retrieved by the process of the first operating system. Furthermore, within the framework of bidirectional communication, the process of the first operating system can send data to a second message queue, which can then be retrieved by the process of the second operating system.Since the two message queues are part of the interprocess communication interface, data can be transferred from the first processor to the second processor (and vice versa) via interprocess communication.

[0029] It is conceivable that one or both message queues are managed as a linked list. Each message queue can have a unique identifier, allowing it to be identified by another process. It is conceivable that the first-in, first-out (FIFO) principle is used. However, the messages can also be assigned a priority. For example, if a process retrieves a message with priority N, it is conceivable that the process retrieves the first message with priority N in the queue, even if it was inserted last. One advantage of using a message queue is that access to the respective message queue can be achieved through an application programming interface (API) already implemented or provided in the respective operating system.For example, the Linux operating system already provides a corresponding interface for an Ethernet-based queue. The same applies, for example, to RTOS as a real-time capable operating system.

[0030] It is conceivable that the first operating system was a real-time capable operating system.

[0031] A real-time operating system (RTOS) is an operating system designed to meet the real-time requirements of applications. This means that requests from an application program or the arrival of signals via hardware interfaces are reliably processed within a predefined time (timeout tmax). The crucial factor here is not the length of the time or deadline, but rather the existence of a deadline that can be guaranteed. A real-time operating system allows a computer to interact with the physical world, for example, with field devices that are connected to the computer for measurement and / or control purposes.

[0032] The second operating system may be a non-real-time operating system.

[0033] In contrast to the real-time operating system described above, a non-real-time operating system can be understood as one that does not reliably process requests from an application program or the arrival of signals via hardware interfaces within a predetermined time (timeout tmax). An advantage of the disclosed solution is that such a non-real-time operating system, which is often used for communication with a control system, can be used together with the real-time operating system on a single platform.

[0034] It is also conceivable that both the first and second operating systems are real-time capable. Additionally, or alternatively, one of the two operating systems could be firmware.

[0035] It is conceivable that an individual target address, optionally an IP address and / or a MAC address, is assigned to each of the first and / or the second operating system (at least for inter-process communication).

[0036] An IP address is an address based on the Internet Protocol (IP). An IP address can be a 32-digit (IPv4) or 128-digit (IPv6) binary number. An IP address can be assigned to a device connected to the network, making that device addressable and therefore reachable. An IP address can identify a single recipient or a group of recipients (multicast, broadcast). Conversely, a device can be assigned multiple IP addresses. In this case, each device can be assigned an individual IP address, meaning an IP address that is uniquely identifiable and assigned only to that specific device.

[0037] A MAC address (Media Access Control address, also known as Media Access Code address), or physical address or device address, can be understood as a number assigned to a device, in this case, the respective processor, on a data connection. This number allows data transmitted over the data connection to be assigned to the devices. The MAC address is the hardware address that can serve as a unique identifier for the device in a computer network.

[0038] In other words, individual target addresses can be assigned to all devices, i.e., processors and / or operating systems. This makes all operating systems accessible both via inter-process communication and externally via the fieldbus.

[0039] The gateway may have a first Ethernet interface connected to the first processor and the interprocess communication interface, and designed to connect the first operating system to the interprocess communication interface for bidirectional interprocess communication.

[0040] This means that the first operating system can send data to the interprocessor communication interface via an Ethernet interface. As mentioned above, this offers the advantage that most operating systems already have the capability to output data via the Ethernet protocol, eliminating the need for a proprietary interface.

[0041] The first Ethernet interface can be designed to connect the first and optionally the second operating system to a fieldbus for bidirectional data communication.

[0042] Providing a (physical) Ethernet interface therefore offers a further advantage, as it allows the Ethernet interface to be used not only for inter-process communication but also for communication with the fieldbus. The Ethernet interface can then function as a router and, based on the destination address contained in the received data, decide to which device or bus this data should be output.

[0043] The gateway can have a virtual Ethernet interface or a virtual network kernel driver, which is designed to connect the second operating system to the interprocess communication interface for bidirectional interprocess communication. Such a virtual network kernel driver is often also referred to as a TUN / TAP. TUN and TAP are virtual network kernel drivers that simulate network devices via software. TUN stands for network tunnel and TAP for network tap, i.e., a network tap. While normally a network device (such as ethO) directly involves corresponding hardware in the form of a network card, packets sent to a TUN / TAP device are forwarded to a program in userspace, and vice versa. For a userspace program to...In order for an application to access TUN / TAP devices, these, unlike real Ethernet cards, have a device file named tunN or tapN located under / dev. TUN simulates an end-to-end network device (OSI Layer 3) and communicates with the software via IP packets, while TAP simulates a point-to-point connection via an Ethernet device (OSI Layer 2) and communicates with the software via Ethernet frames.

[0044] The gateway can include shared memory in which the interprocess communication interface is implemented. In other words, the shared memory can be used as an interprocess communication interface for interprocess communication.

[0045] The gateway can have a second Ethernet interface connected to the second processor, designed to connect the first and second operating systems to a fieldbus for bidirectional data communication.

[0046] Furthermore, the disclosure relates to a fieldbus system that includes a gateway as described above.

[0047] The fieldbus system can comprise a field device and a control center, with the control center being connected to the field device via the gateway and at least one fieldbus. The above description regarding the gateway also applies analogously to the field device and vice versa.

[0048] An optional embodiment of the disclosure is described below with reference to Figures 1 and 2.

[0049] Fig. 1 shows a fieldbus system according to the disclosure with a gateway according to the disclosure, and

[0050] Fig. 2 shows the gateway from Figure 1 in detail.

[0051] The same reference symbols in different figures denote the same objects.

[0052] Figure 1 schematically depicts a fieldbus system 100 comprising a field device 1, a gateway 2, and a control center 3. The field device 1 is connected to the gateway 2 via a first fieldbus 4 for bidirectional data communication. The control center 3 is connected to the gateway 2 via a second fieldbus 5 for bidirectional data communication. The aforementioned devices 1, 2, and 3 of the fieldbus system 100 can be networked using Industrial Ethernet. The gateway 2 is configured to receive data from the field device via the first fieldbus 4.

[0053] 1 to receive, process and output to control center 3. The gateway

[0054] Gateway 2 is configured to receive data from control center 3 via the second fieldbus 5, process it, and output it to field device 1. Gateway 2 can use a different communication protocol for communication with field device 1 than for communication with control center 3.

[0055] Gateway 2 is described in more detail below with reference to Figure 2.

[0056] The gateway 2 comprises a first processor 6 with a first operating system 62, a second processor 7 with a second operating system 72, which is different from the first operating system 62, and a shared memory 8 in which an interprocessor communication interface 9 is implemented.

[0057] The first operating system, 62, e.g., RTOS, is a real-time operating system. The second operating system, 72, e.g., Linux, is not a real-time operating system.

[0058] The interprocess communication interface 9 is designed to enable Ethernet protocol-based interprocess communication between the first operating system 62 and the second operating system 72, where the first operating system 62 represents an external IP device or field device from the perspective of the second operating system 72.

[0059] Using the first operating system 62, an application 61 can be executed. Using the second operating system 72, another application 71 can be executed. The information exchanged between the two operating systems 62 and 72 during interprocess communication can be used by applications 61 and 71, so that at least indirectly, interprocess communication between applications 61 and 71 is also possible.

[0060] For this purpose, the interprocessor communication interface 9 comprises two message queues 91 and 92 (which take precedence over the message queues of the TUN / TAP module). The first message queue 91 of the two message queues 91 and 92 is configured to allow the first operating system 62 to receive data from the second operating system 72. The second message queue 92 of the two message queues 91 and 92 is configured to allow the first operating system 62 to send data to the second operating system 72.

[0061] For data exchange with the interprocessor communication interface 9, the first processor 6 and thus the first operating system 62 is connected to a first (physical) Ethernet interface 10 for bidirectional data communication.

[0062] The first Ethernet interface 10 is also connected to the first fieldbus 4, the interprocessor communication interface 9 and the second processor 72.

[0063] The first Ethernet interface 10 acts as a router. That is, the first Ethernet interface 10 is designed to decide, based on a destination address, optionally the MAC address and / or the IP address, received at the first Ethernet interface 10, whether the data containing the destination address should be output to the first processor 6, the interprocessor communication interface 9, the first fieldbus 4, or the second processor 7.

[0064] In order to ensure that the first and second operating systems 62, 72 can be addressed both from the outside, i.e. via the fieldbus 4, and by means of the communication taking place within the gateway 4, in particular the interprocess communication, an individual target address is assigned for each of the first and second operating systems 62, 72.

[0065] That is, the first Ethernet interface 10 is designed to connect the first operating system 62 to the interprocess communication interface 9 for bidirectional interprocess communication.

[0066] In addition, the first Ethernet interface 10 is designed to connect the first operating system 62 with the first fieldbus 4 for bidirectional data communication.

[0067] Furthermore, the first Ethernet interface 10 is designed to connect the second operating system 72 to the first fieldbus 4 for bidirectional data communication. For this purpose, data is output from the second processor 7 via memory 8 and the first processor 6 to the first Ethernet interface 10, which in turn outputs this data to the fieldbus 4. Likewise, data received at the first interface 10 via the fieldbus 4 is output from the first Ethernet interface 10 via the first processor 6 and memory 8 to the second processor 7.

[0068] Gateway 2, more precisely the second processor 7, also includes a virtual network kernel driver 73, which is designed to connect the second operating system 72 to the interprocess communication interface 9 for bidirectional interprocess communication. The virtual network kernel driver 73 thus represents, on the side of the second processor 7, the counterpart to the first Ethernet interface 10 with regard to interprocess communication via the interprocess communication interface 9. The virtual network kernel driver 73 can therefore also be referred to as a virtual Ethernet interface.

[0069] Gateway 2 also includes a second (physical) Ethernet interface 11, which is connected to the second processor 7. Like the first Ethernet interface 10, the second Ethernet interface 11 acts as a router. This means that the second Ethernet interface 11 is configured to decide, based on a destination address, optionally the MAC address and / or IP address, received at the second Ethernet interface 11, whether the data containing the destination address should be output to the first processor 6, the second fieldbus 5, or the second processor 7.

[0070] This means that the second Ethernet interface 11 is designed to connect the second operating system 72 to the second fieldbus 4 for bidirectional data communication.

[0071] Furthermore, the second Ethernet interface 11 is designed to connect the first operating system 6 to the second fieldbus 5 for bidirectional data communication. For this purpose, data is output from the first processor 6 via memory 8 and the second processor 7 to the second Ethernet interface 11, which in turn outputs this data to the fieldbus 5. Likewise, data received at the second interface 11 via the fieldbus 5 is output from the second Ethernet interface 11 via the second processor 7 and memory 8 to the first processor 6.

[0072] With the configuration described above, inter-process communication between the two operating systems running on different processors becomes possible, and both operating systems can communicate with both the field device 1 and the control center 3.

[0073] Reference symbol list

[0074] 1 field device

[0075] 2 Gateway

[0076] 3 Control Center

[0077] 4 first fieldbus

[0078] 5 second fieldbus

[0079] 6 first processor

[0080] 61 first application

[0081] 62 first operating system

[0082] 7 second processor

[0083] 71 second application

[0084] 72 second operating system

[0085] 73 virtual network kernel driver or virtual Ethernet interface

[0086] 8 memory

[0087] 9 Interprocessor communication interface

[0088] 91 first message queue

[0089] 92 second message queue

[0090] 10 first (physical) Ethernet interface

[0091] 11 second (physical) Ethernet interface

[0092] 100 fieldbus systems

Claims

Patent claims 1. Gateway (2) for a fieldbus system (100), wherein the gateway (2) comprises: - a first processor (6) with a first operating system (62), and - a second processor (7) with a second operating system (72) which is different from the first operating system (62) and has a virtual Ethernet interface (73), characterized in that - the gateway (2) includes an interprocess communication interface (9) designed to enable Ethernet protocol-based interprocess communication between the first operating system (62) and the second operating system (72) using the virtual Ethernet interface (73).

2. Gateway (2) according to claim 1 , characterized in that: the interprocessor communication interface (9) comprises two message queues (91 , 92), - wherein one of the two message queues (91) is designed to allow the first operating system (62) to receive data from the second operating system, and - wherein a second of the two message queues (92) is designed to allow the first operating system (62) to send data to the second operating system (72).

3. Gateway (2) according to claim 1 or 2, characterized in that the first and / or the second operating system (62, 72) is a real-time operating system.

4. Gateway (29 according to one of claims 1 to 3, characterized in that the first and / or the second operating system (62, 72) is not a real-time operating system.

5. Gateway (2) according to one of claims 1 to 4, characterized in that an individual target address is assigned for the first and / or the second operating system (62, 72).

6. Gateway (2) according to one of claims 1 to 5, characterized in that the gateway (2) has a first Ethernet interface (10) which is connected to the first processor (6) and the interprocessor communication interface (9) and which is configured to enable the first operating system (62) for bidirectional interprocessor communication with the to connect to the interprocessor communication interface (9).

7. Gateway (2) according to claim 6, characterized in that the first The Ethernet interface (10) is designed to allow the first, and optionally the second, operating system (62, 72) to communicate bidirectionally. to connect data communication with a fieldbus (4).

8. Gateway (2) according to one of claims 1 to 7, characterized in that the virtual Ethernet interface (73) has or is implemented as a virtual network kernel driver configured to enable the second operating system (72) for bidirectional communication. Interprocessor communication with the to connect to the interprocessor communication interface (9).

9. Gateway (2) according to one of claims 1 to 8, characterized in that the gateway (2) comprises a shared memory (8) in which the interprocessor communication interface (9) is implemented.

10. Gateway (2) according to one of claims 1 to 9, characterized in that the gateway (2) has a second Ethernet interface (11) which is connected to the second processor (7) and is configured to connect the second operating system (72) to a fieldbus (5) for bidirectional data communication.

11. Fieldbus system (100), characterized in that the fieldbus system (100) comprises a gateway (2) according to any one of claims 1 to 10.

12. Fieldbus system (100) according to claim 11, characterized in that the fieldbus system (100) comprises a field device (1) and a control center (3), wherein the control center (3) is connected via the gateway (2) and at least one fieldbus (4, 5) is connected to the field device (1).

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