Rapid refresh pulsed light-emitting diode driver

The use of an inductor and fluxing switch in pulsed light-emitting diode drivers addresses inefficiencies in conventional circuits by enabling rapid capacitor refresh and high-repetition rates with reduced power loss, enhancing the performance of pulsed light-emitting diode drivers.

WO2025262603A1PCT designated stage Publication Date: 2025-12-26SILANNA ASIA
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Patent Information

Application Number
PCT/IB2025/056184
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-06-20
Filing Date
2025-06-17
Publication Date
2025-12-26

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Abstract

A pulsed light-emitting diode driver (101) includes an inductor (Ls), a fluxing switch (MFLUX), a diode (Ds), a source capacitor (Cs), a light-emitting diode (DL), and a pulse-emission switch (MDL). A first terminal (110) of the inductor (Lg) receives an input voltage (Vin') and a second terminal of the inductor (Lg) is connected to a drain node (114) of the fluxing switch (MFLUX) and an anode of the diode (Ds). A source node of the fluxing switch (MFLUX) is connected to ground. A cathode of the diode (Ds) is connected to the source capacitor (Cs) at a first terminal (112) thereof and to an anode of the light-emitting diode (DL). A second terminal of the source capacitor (Cs) is directly electrically connected to ground, wherein a source voltage (Vg) is developed at the first terminal (112) of the source capacitor (Cs). A cathode of the light-emitting diode (DL) is connected to a drain node of the pulse-emission switch (MDL), a source node of which being connected to ground. An anode of the light-emitting diode (DL) is directly electrically connected to the first terminal (112) of the source capacitor (Cs) and to the cathode of the diode (Ds). The switches (MFLUX, MDL) control a current flow through the inductor (Lg) to refresh the source capacitor (Cs) and to direct charge stored at the source capacitor (Cs) through the light-emitting diode (DL) to produce a high-current pulse through the light-emitting diode (DL).
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Description

RAPID REFRESH PULSED LIGHT-EMITTING DIODE DRIVERRELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 662,114 filed on June 20, 2024, all of which are hereby incorporated herein by reference in its entirety for all purposes.BACKGROUND

[0002] Pulsed light-emitting diodes are used in various applications, such as laser-based ranging systems (e.g., LiDAR), optical communication systems, spectroscopy applications, stroboscopic applications, and biometric devices. Such applications often use a pulsed light-emitting diode driver circuit to generate a short, high-current pulse, which is passed through a light-emitting diode to emit a corresponding pulse of light.

[0003] However, parasitic inductances of the pulsed light-emitting diode driver circuit and the light-emitting diode itself typically must be overcome to achieve a desired short pulse width. For example, in the case of laser diode applications, many laser diodes have at least one bond wire, which can contribute InH of inductance, thereby limiting the slew rate of the current pulse unless there is very high voltage. Unfortunately, conventional solutions for developing the high voltage required for overcoming such inductances often limit the achieved pulse emission repetition rate of the pulsed light-emitting diode driver circuit.SUMMARY

[0004] In some aspects, the techniques described herein relate to a pulsed light-emitting diode driver, including: an inductor having a first terminal and a second terminal, the first terminal of the inductor being configured to receive an input voltage; a fluxing switch having a drain node electrically connected to the second terminal of the inductor and a source node directly electrically connected to ground; a first diode having an anode and a cathode, the anode of the first diode being directly electrically connected to the second terminal of the inductor and electrically connected to the drain node of the fluxing switch; a source capacitor having a first terminal that is directly electrically connected to the cathode of the first diode and asecond terminal that is directly electrically connected to ground, a source voltage being developed at the first terminal of the source capacitor; a light-emitting diode having an anode and a cathode, the anode of the light-emitting diode being directly electrically connected to the first terminal of the source capacitor and to the cathode of the first diode; and a pulse emission switch having a drain node directly electrically connected to the cathode of the light-emitting diode and a source node directly electrically connected to ground; wherein: the fluxing switch and the pulse emission switch are configured to selectively control a current flow through and from the inductor to refresh a charge stored at the source capacitor and to direct the charge stored at the source capacitor through the light-emitting diode to produce a high- current pulse through the light-emitting diode.BRIEF DESCRIPTION OF THE DRAWINGS

[0005] FIG. l is a simplified circuit schematic of a rapid refresh pulsed lightemitting diode driver, in accordance with some examples.

[0006] FIGS. 2A-2B show simplified plots of signals related to the operation of the rapid refresh pulsed light-emitting diode driver shown in FIG. 1, in accordance with some examples.

[0007] FIGS. 3A-3C show simplified plots of signals related to the operation of the rapid refresh pulsed light-emitting diode driver shown in FIG. 1, in accordance with some examples.

[0008] FIGS. 4A-4B show simplified plots of signals related to the operation of the rapid refresh pulsed light-emitting diode driver shown in FIG. 1, in accordance with some examples.DETAILED DESCRIPTION

[0009] Many applications for light-emitting diodes, such as laser diodes and non-laser light-emitting diodes, require a single burst of very high current (for example 150A) for a short amount of time (for example 3ns) followed by a much longer refresh time (for example >lus) before the next high current pulse can be issued. To achieve this extremely fast pulse, many conventional solutions charge a source capacitor using a switch and / or resistor to a set voltage and then connect the source capacitor across the light-emitting diode. As such, the repetition rate of a light-emitting diode driver is limited by the charging time (i.e., the refresh time) of thesource capacitor from a fixed voltage supply. However, refreshing the source capacitor charge in between high-current pulses with as low power dissipation as possible is challenging for conventional solutions. Excess power dissipation is particularly pronounced when the source capacitor voltage drops significantly relative to that of the fixed voltage supply during light pulse emission.

[0010] Excess power dissipation arises from the use of charge-path resistors or charge-path resistive switches in the current path between the fixed voltage supply and the source capacitor. During the charging of the source capacitor, energy is dissipated as heat due to I2R losses, with a total power loss equal to approximately where Q is the charge stored at the capacitor and V is the supply voltage. In conventional implementations, this power loss is often tolerated because the low duty cycle of the application minimizes its impact. However, in systems requiring higher repetition rates of emitted light pulses, the RC time constant of the charging circuit introduces significant limitations, adversely affecting performance.

[0011] To limit inrush current when the source capacitor is recharged and to control current flow when the light-emitting diode conducts, the charge-path resistor and / or charge-path switch resistance must be relatively high. However, this slows the rate at which the source capacitor recharges, potentially allowing the voltage at the light-emitting diode's cathode to exceed that at its anode after a pulse event. As a result, a significant reverse voltage can develop across the light-emitting diode. To prevent damage from this reverse-bias condition, additional protection circuitry is often required.

[0012] Additionally, in some conventional solutions, the source capacitor is recharged by sourcing current through a resistive switch or pull-up resistor from a supply voltage that is greater than or equal to the target voltage of the capacitor. This method causes substantial power dissipation in the resistive element during each charge cycle. To offset these losses, a high-efficiency power converter is typically required to generate the input voltage from a primary supply, such as a 5V, 12V, or other system voltage.

[0013] Circuits and methods are disclosed herein for rapidly and power- efficiently refreshing a source capacitor of a light-emitting diode driver circuit (which is operable to drive laser diodes and other more general light-emitting diodes). The pulsed light-emitting diode drivers disclosed herein create narrow (e.g., l-5nsec)high-current pulses (e.g., 20amp, 40 amp, 60amp) through a driven laser diode or other light-emitting diode using a resonant source capacitor that is rapidly refreshed after light pulse emission while mitigating power dissipation through resistive elements.

[0014] As used herein, “refreshing” the charge stored at the source capacitor refers to the process of refreshing the electrical charge at the source capacitor after at least partial discharge, such that the source capacitor is restored to a target voltage level. This refreshed voltage is referred to as the “source voltage” herein. In typical operation, the source capacitor may discharge during a load event (e.g., a current pulse to drive a light-emitting diode), and refreshing ensures that the source capacitor returns to a predetermined voltage level in preparation for subsequent operation cycles.

[0015] As disclosed herein, the source capacitor charge is refreshed using an inductor, coupled inductor, or a transformer in a single switching cycle. In some examples, if the source capacitor needs to be charged to a voltage higher than the input voltage of the light-emitting diode driver circuit, a boost or a non-inverting buck-boost configuration is used to generate the source voltage.

[0016] As disclosed herein, a current is developed through an inductor by connecting the inductor from an input voltage source to ground, from the input voltage source to the source capacitor, or a combination of the two. After a sufficient current is developed through the inductor, the inductor is operable to rapidly provide all the needed charge to the source capacitor in one switching cycle by connecting the inductor from the input voltage source to the source capacitor, or from ground to the source capacitor, or by a combination of the two.

[0017] By rapidly providing all the needed charge for light pulse emission to the source capacitor in a single switching cycle, switching losses in a switched-mode power supply system providing the input voltage are advantageously minimized.

[0018] The circuit and experimental waveforms presented herein relate to light pulse emission from a laser diode, but it is understood that the same or similar circuit is operable to control a non-laser light-emitting diode.

[0019] FIG. l is a simplified circuit schematic of a rapid refresh pulsed lightemitting diode driver 101 to drive a light-emitting diode, such as a laser diode, in accordance with some examples. The pulsed light-emitting diode driver 101 may include an optional power converter 102 (e.g., a switch-mode power supply, a buckconverter, a boost converter, etc.), an inductor Ls (i.e., a physical component that is not representative of a parasitic inductance of another component), a fluxing switch MFLUX, a diode or switch Ds, an optional reverse current protection diode DR, a source capacitor Cs (i.e., a physical component that is not representative of a parasitic capacitance of another component), a laser diode (or another light-emitting diode) DL, and a pulse emission switch MDL, connected as shown. In some examples, the diode Ds may be a Schottky diode or may be replaced by a different circuit element (not shown) that is operable to control a direction of current flow between the inductor Ls and the source capacitor Cs (e.g., a PN diode, or an actively controlled switch). Though a laser diode DL is shown and described in the simplified examples herein, it is understood that the element DL may be a laser diode or other, more general, lightemitting diode.

[0020] Also shown is an optional controller 120, a master clock signal Clk, nodes 110, 112, 114, a parasitic inductance LDL of the laser diode DL, a body-diode MFLUX®13of the fluxing switch MFLUX, a DC input voltage Vin, a regulated input voltage Vin’, a source voltage Vs at the source capacitor Cs, a current ms through the inductor Ls, a current IDL through the laser diode DL, a current ios through the diode Ds, a current i FLUX through the fluxing switch MFLUX, a fluxing switch gate driver signal GATEFLUX, and a pulse emission switch gate driver signal GATEDL.

[0021] In some examples, the regulated input voltage Vin’ is generated by the optional power converter 102 and is a higher or lower voltage level as compared to the DC input voltage Vin. In other examples, the optional power converter 102 is not present in the pulsed light-emitting diode driver 101, and the regulated input voltage Vin’ is the same voltage level as compared to the DC input voltage Vin. For example, in such examples, the regulated input voltage Vin’ node connected to the inductor Ls may be configured to receive 3 V to 12V from a battery or other power source.

[0022] As shown, a first terminal of the inductor Ls is configured to receive an input voltage (either the input voltage Vin or the regulated input voltage Vin’). A second terminal of the inductor Ls is directly electrically connected to a drain node of the fluxing switch MFLUX and an anode of the diode Ds. A source node of the fluxing switch MFLUX is directly electrically connected to ground. A cathode of the diode Ds is directly electrically connected to a first terminal of the source capacitor Cs and an anode of the laser diode DL. A second terminal of the source capacitor Cs is directly electrically connected to ground. A cathode of the laser diode DL is directlyelectrically connected to a drain node of the pulse emission switch MDL. A source node of the pulse emission switch MDL is directly electrically connected to ground.

[0023] The optional controller 120 is operable to receive the master clock signal Clk to control a repetition rate of light pulse emission, and to generate the fluxing switch gate driver signal GATEFLUX and the pulse emission switch gate driver signal GATEDL. The controller 120 is additionally operable to receive the source voltage Vs and to compare a voltage level thereof to one or more threshold voltage levels using an Analog-to-Digital converter circuit, one or more comparator circuits, or any other appropriate circuits as are known in the art. An outcome of the voltage comparison may be used by the controller 120 to conditionally enable the fluxing switch MFLUX during light pulse emission, as described in detail below.

[0024] The fluxing switch MFLUX is configured to receive the fluxing switch gate driver signal GATEFLUX at a gate node, the fluxing switch gate driver signal GATEFLUX being operable to turn the fluxing switch MFLUX on or off based on a voltage level of the fluxing switch gate driver signal GATEFLUX. Similarly, the pulse emission switch MDL is configured to receive the pulse emission switch gate driver signal GATEDL at a gate node, the pulse emission switch gate driver signal GATEDL being operable to turn the pulse emission switch MDL on or off based on a voltage level of the pulse emission switch gate driver signal GATEDL.

[0025] In some examples, the fluxing switch MFLUX and the pulse emission switch MDL are implemented as Gallium Nitride (GaN) Field Effect Transistors (FETs). In other examples, the fluxing switch MFLUX and the pulse emission switch MDL are implemented as Silicon-based or Silicon-Carbide-based field-effect transistors (FETs).

[0026] Two or more components described herein as having terminals that are directly electrically connected have a DC path between the respective terminals of the two or more components. For example, a first and second component are not directly electrically connected via a physical capacitor or inductor connected in series between the first component and the second component.

[0027] The inductor Ls is a physical component added to the pulsed lightemitting diode driver 101 (i.e., as opposed to a representation of a parasitic inductance caused by components or interconnections such as bond wires). Similarly, the source capacitor Cs is a physical component added to the pulsed light-emitting diode driver 101 (i.e., as opposed to a representation of a parasitic capacitance). One advantage ofusing physical inductor and capacitor components rather than relying on parasitic inductances for light pulse emission is that values of the inductor Ls and the source capacitor Cs can be easily modified by a designer or even an end-user. By comparison, conventional designs that rely on parasitic reactances may require redesign and / or re-layout to change an operating parameter.

[0028] As disclosed herein, values of the regulated input voltage Vm’, the inductance of the inductor Ls, and the capacitance of the source capacitor Cs can advantageously be selected (“tuned”) to achieve a desired operation of the pulsed light-emitting diode driver 101 (e.g., a charge time, a pulse width, a pulse voltage, a pulse current). For example, a peak current and pulse width of the current IDL flowing through the laser diode DL can be tuned by adjusting the source voltage Vs on the source capacitor Cs or the capacitance value of the source capacitor Cs.

[0029] In some non-limiting examples, the regulated input voltage Vin’ ranges from 10V to 200V, the inductance of the inductor Ls ranges from 50nH to luH, and the capacitance of the source capacitor Cs ranges from 20pF to 20nF. However, it is understood that the voltage ranges and component values may be extended beyond the ranges provided based on design and application requirements.

[0030] The optional controller 120 may be integrated with the pulsed lightemitting diode driver 101 disclosed herein, or it may be a circuit or module that is external to the pulsed light-emitting diode driver 101. As mentioned above, the controller 120 is operable to generate one or more gate drive signals having a voltage level that is sufficient to control one or more pulse emission switches MDL and one or more fluxing switches MFLUX. Additionally, the optional controller 120 is operable to sense a voltage and / or current at any of the nodes 110, 112, 114, and at nodes that are similar to, or the same as, the nodes 110, 112, and 114 as described herein, or at still other nodes of the pulsed light-emitting diode driver 101. The optional controller 120 may include one or more timing circuits, look-up tables, processors, memory, or other modules to control the pulsed light-emitting diode driver 101. Operation of the pulsed light-emitting diode driver 101 is explained in detail with respect to simplified plots shown in FIGS. 2A-2B.

[0031] FIGS. 2A-2B show simplified plots 201 and 218, respectively, of experimental results related to a first mode of operation of the rapid refresh pulsed light-emitting diode driver 101 shown in FIG. 1, in accordance with some examples. Timing of the fluxing switch gate driver signal GATEFLUX and of the pulse emissionswitch gate driver signal GATEDL for the first mode of operation may be based on timing configurations determined during manufacturing or by an end-user and stored in non-volatile memory of the controller 120.

[0032] The simplified plots 201 illustrate a voltage plot of the source voltage Vs 202 developed at the node 112 at the source capacitor Cs, a current plot of the current ILS 203 developed through the inductor Ls, a voltage plot of the fluxing switch gate driver signal GATEFLUX 204, and a voltage plot of the pulse emission switch gate driver signal GATEDL 205. Also shown are times of interest ti-t4.

[0033] Prior to time tl, the fluxing switch MFLUX and the pulse emission switch MDL are both off. Upon receiving (e.g., from the controller 120) an asserted level of the fluxing switch gate driver signal GATEFLUX 204 at the gate node of the fluxing switch MFLUX at time ti, the fluxing switch MFLUX is enabled (i.e., transitioned to an ON-state). Upon being enabled, a rising current ius 203 begins to flow through the inductor Ls, thereby building magnetic flux at the inductor Ls. When the current ius 203 has reached a desired level (e.g., as determined by the controller 120 using sensed current, voltage, a timer circuit, or as determined by design constraints), at time t2 a de-asserted level of the fluxing switch gate driver signal GATEFLUX 204 is received (e.g., from the controller 120) at the gate node of the fluxing switch MFLUX, thereby disabling the fluxing switch MFLUX (i.e., transitioned to an OFF-state). As highlighted in the plot 202, the source capacitor Cs is rapidly refreshed when the fluxing switch MFLUX is disabled. That is, the current ius 203 which has built up through the inductor Ls, having no other current path, is redirected through the diode Ds to the source capacitor Cs to rapidly refresh the charge stored thereby. Indeed, as shown in the plot 202, a voltage level of the source voltage Vs developed at the source capacitor Cs advantageously reaches over 100V in less than about 25nS; however, longer charging times of the source capacitor Cs will reduce the conduction losses in the fluxing switch MFLUX, the inductor Ls, and the diode Ds.

[0034] At time L, an asserted level of the pulse emission switch gate driver signal GATEDL 205 is received (e.g., from the controller 120) at the gate node of the pulse emission switch MDL, thereby enabling the pulse emission switch MDL (i.e., transitioned to an ON-state). As highlighted in the plot 202, at time t3 when the pulse emission switch MDL is enabled, the source voltage Vs stored at the source capacitor Cs rapidly drops as a short (e.g., Ins - 5ns), high-current (e.g., > 30A) pulse flowsthrough the laser diode DL, thereby causing the laser diode DL to emit a pulse of laser light.

[0035] The source voltage Vs waveform 202 initially rises after time t as current flows from the inductor Ls and diode Ds into the source capacitor Cs. This is followed by a brief voltage dip caused by the parasitic capacitance of the diode Ds, which momentarily affects the anode voltage thereof after the source capacitor Cs has finished charging. Approximately 200 nanoseconds later, the pulse emission switch MDL is turned on, initiating current flow IDL through the laser diode DL. In some examples, the pulse emission switch MDL is enabled (e.g., based on a timing configuration stored at the controller 120) to coincide with the point in time at which the peak of the source voltage Vs 202 is reached; prior to the reduction of voltage caused by the parasitic capacitance of the diode Ds as its anode voltage drops after it finishes charging the source capacitor Cs. Enabling the pulse emission switch MDL at or within a small window (for example 10ns) around the point in time at which the peak of the source voltage Vs 202 is reached limits the reverse voltage across the diode Ds, thereby allowing that component to have a much lower voltage rating (for example, advantageously lowering the diode Ds voltage rating from 100V down to 30 V).

[0036] If the pulse emission switch gate signal GATEDL is held high for the entire current pulse IDL through the laser diode DL, the source voltage Vs will drop to a voltage below zero, which will typically cause current flow through the path including the fluxing switch MFLUX and the diode Ds in series and through the path including the inductor Ls and the diode Ds in series. If the fluxing switch MFLUX does not have a p-n diode from ground to the drain node thereof, the fluxing switch gate voltage GATEFLUX voltage can be set below ground (e.g., by the controller 120) in order to limit the current through the series combination of the fluxing switch MFLUX and the diode Ds. Alternatively, the optional reverse current protection diode DR having an anode connected to the anode of the diode Ds and its cathode connected to the drain node of the fluxing switch MFLUX can be added to prevent current flow in the series combination of the fluxing switch MFLUX and the Ds when the source voltage Vs goes below ground. Alternatively, the inductor Ls can be disconnected from the regulated input voltage Vin’ or connected to ground when the source voltage Vs falls below the regulated input voltage Vin’ in order to limit the current from the regulated input voltage Vin’.

[0037] In some examples, the pulse emission switch gate signal GATEDL voltage can be set low while the current IDL is still increasing in the laser diode DL to reduce the current pulse width in the laser diode DL and sometimes to reduce the magnitude of, or remove, negative voltage on the source capacitor Cs.

[0038] However, an advantage of the current flow through the series combination of the fluxing switch MFLUX and the diode Ds and the series combination of the inductor Ls and the diode Ds is that the current builds up in the inductance of the inductor Ls as well as any parasitic inductance in the paths so as to charge the source capacitor Cs back up to a value above the regulated input voltage Vin’ . Thus, as yet another alternative, a second mode of operation of the pulsed light-emitting diode driver 101 is disclosed below which allows such current flow while mitigating power losses through the fluxing switch MFLUX.

[0039] At time L, a de-asserted level of the pulse emission switch gate driver signal GATEDL 205 is received at the gate node of the pulse emission switch MDL, thereby disabling the pulse emission switch MDL (i.e., transitioned to an OFF-state) such that a second pulse of the current IDL through the laser diode DL is prevented as the source voltage Vs rings and rises back above zero volts. The switching cycle beginning at time ti may then repeat.

[0040] The simplified plots 218 of FIG. 2B illustrate a zoomed-in view of the voltage plot of the source voltage Vs 202 developed at the node 112, and a voltage plot of the master clock signal Clk 220 received at, or generated by, the controller 120. In some examples, the laser diode DL is operable to be pulsed by the pulsed light-emitting diode driver 101 during each period (i.e., one switching cycle) of the master clock signal Clk 220. In other examples, the master clock Clk can be stopped, overridden by a different signal, or run at different frequencies in order to control when the current IDL is pulsed through the laser diode DL. In some examples, one edge (for example the falling or rising edge) of the master clock Clk can enable the fluxing switch MFLUX while the opposite edge (for example the rising or falling edge) of the master clock Clk can enable the pulse emission switch MDL. In yet other examples, a single edge of the master clock (either rising or falling) can enable either the fluxing switch MFLUX or the pulse emission switch MDL with the other switch (either the pulse emission switch MDL or the fluxing switch MFLUX) being controlled by a fixed, calculated or programmable delay.

[0041] Since the correct timing of the pulse emission switch gate driver signal GATEDL pulse width is affected by board layout and environmental conditions — including laser and board temperature — in some examples the controller 120 is operable to receive end-user and / or factory configurations to adjust operation timing parameters and to store the received configurations in non-volatile memory. For example, the controller 120 may receive configuration data (e.g., from a digital interface, configuration resistors, etc.) to adjust a pulse width of the pulse emission switch gate driver signal GATEDL in very small increments (e.g., 10 picoseconds, 20 picoseconds, 100 picoseconds, 1 nanosecond, 10 nanoseconds) during operation of the pulsed light-emitting diode driver 101. Additionally, pulse width settings of the pulse emission switch gate driver signal GATEDL may be stored at the controller 120 and may be subsequently selected by a user and / or automatically by the controller 120 based on a measured temperature of the light-emitting diode. As such, circuit board variants and end-use modules may be modified to achieve a desired pulse width and magnitude of the emitted light pulse.

[0042] Achieving an accurate pulse emission switch gate driver signal GATEDL pulse width (for example, <10% variation over all conditions) as well as enabling user configurability of the pulse width enables an end-user to achieve a highly accurate magnitude and pulse width for the laser light.

[0043] Because the pulsed light-emitting diode driver 101 is operable to rapidly refresh the charge stored at the source capacitor Cs, a high repletion rate of light emission by the laser diode DL is advantageously achieved. For example, the experimental results shown in simplified plot 218 illustrate a pulse emission switching cycle period of about 400 nanoseconds or 2.5MHz. By comparison, a conventional LiDAR system typically achieves a maximum repetition rate of 10kHz-200kHz.

[0044] In some examples, the charge stored at the source capacitor Cs can be almost completely refreshed in one switching cycle of the pulsed light-emitting diode driver 101 and then subsequently topped off with short bursts if the source capacitor voltage Vs did not reach a high enough voltage level, or if the source capacitor voltage Vs leaks down before the next burst of current through the laser diode or light-emitting diode.

[0045] In some such examples, the source capacitor Cs charge refresh timing, pulse emission timing, and / or pulse width timing is determined based on factory and / or end-user timing configurations that are stored in non-volatile memory at thecontroller 120. In other examples, the controller 120 may be configured to measure the source voltage Vs developed at node 112 of the source capacitor Cs. The controller 120 may be further configured to compare the measured source voltage level Vs to a target voltage level. Based on the determined difference between the measured source voltage and the target voltage level (e.g., by comparing the difference to a threshold voltage difference value), the controller 120 may abstain from pulse emission during the first switching cycle by disabling the pulse emission switch MDL during the first switching cycle and instead continuing to charge the source capacitor Cs in subsequent switching cycles (e.g., a second switching cycle) until the source voltage has reached or surpassed the target voltage level such that the source voltage Vs is a higher voltage level as compared to the source voltage level during the first switching cycle. The measurement and / or comparison of the source voltage Vs to the target voltage level and the determination of whether the voltage difference exceeds the threshold voltage difference value may be determined by the controller 120 using one or more Analog-to-Digital converter circuits, comparator circuits, and / or other appropriate circuits that are understood in the art.

[0046] In some examples, the source capacitor Cs is charged to a voltage level Vs that is higher than needed for the light emission pulse, and then the charge needed for pulse emission is removed (e.g., due to leakage current) before the next burst of current in the laser or light-emitting diode. Such examples may be useful if charge is expected to be leaked from the capacitor before the next burst of current through the laser or light-emitting diode. In some such examples, the source capacitor Cs charge refresh timing, pulse emission timing, and / or pulse width timing is determined based on factory and / or end-user timing configurations that are stored in non-volatile memory at the controller 120. In some examples, the timing configuration may be based on a determined ratio of conduction losses to switching losses for the pulsed light-emitting diode driver 101.

[0047] In some examples, the pulsed light-emitting diode driver 101 is configured to wait to charge the source capacitor Cs until immediately before the next light emission pulse to help ensure minimal charge loss in the source capacitor Cs before current pulse emission through the laser diode DL. In such examples, the pulse emission switch MDL may be enabled immediately after, or very shortly after (e.g., 10 nanoseconds, 20 nanoseconds, 30 nanoseconds), the fluxing switch MFLUX is disabled. Turning on the pulse emission switch MDL after the fluxing switch MFLUX is disabled,but before the diode Ds has fully charged the source capacitor Cs, may provide additional current from the diode Ds to the laser diode DL during pulse emission. Timing of the pulse emission switch gate driver signal GATEDL may be based on a determined timing, or a measurement made by the controller 120, for the anode of the diode Ds to reach its cathode voltage, or by other timing configurations determined during manufacturing and / or by an end-user and stored in non-volatile memory of the controller 120.

[0048] In some such examples, the source capacitor Cs charge refresh timing, pulse emission timing, and / or pulse width timing is determined based on factory and / or end-user timing configuration that are stored in non-volatile memory at the controller 120. In other examples, the controller is operable to determine that the charge stored by the source capacitor Cs has been fully refreshed (e.g., by determining that the source voltage Vs at the node 112 of the source capacitor Cs is equal to or greater than a target voltage level). In a given switching cycle of the pulsed lightemitting diode driver 101, in response to determining that the charge stored at the source capacitor has been fully refreshed, the controller 120 may then enable the pulse emission switch MDL.

[0049] In some examples, the pulsed light-emitting diode driver 101 is configured to adaptively adjust, by increasing or decreasing, the amount of time that the inductor current ILS builds up through the inductor Ls for a given switching cycle depending upon whether the correct amount of charge was supplied to the source capacitor Cs during previous switching cycles such that the source voltage Vs reaches a target voltage level. In such examples, the controller 120 is operable to determine, during a first switching cycle of the pulsed light-emitting diode driver 101, if the source voltage Vs at the node 112 of the source capacitor Cs has reached a target voltage level (e.g., using an Anal og-to- Voltage converter circuit, comparator circuit, etc.). Upon determining that the source voltage Vs has not reached the target voltage level, the controller 120 is configured to increase the duration of time that the fluxing switch MFLUX is enabled during a subsequent switching cycle as compared to the duration of time that the fluxing switch MFLUX was enabled during the first switching cycle. As such, the amount of time that the inductor current ILS builds up through the inductor Ls is correspondingly increased.

[0050] In some examples, the pulsed light-emitting diode driver 101 is configured to supply the charge needed for light pulse emission to the sourcecapacitor Cs in two or more sequential switching cycles if the conduction losses in the pulsed light-emitting diode driver 101 are determined to be higher than the switching losses in the power converter 102, and in some examples to adaptively change the number of switching cycles taken to charge the source capacitor Cs based upon system needs. The ratio of conduction losses to switching losses may be determined as part of a calibration process by an end-user or during manufacturing and the results may be subsequently stored in non-volatile memory at the controller 120 for use during operation.

[0051] In some such examples, the source capacitor Cs charge, refresh timing, pulse emission timing, and / or pulse width timing is determined based on factory and / or end-user timing configurations that are stored in non-volatile memory at the controller 120. In other examples, the controller 120 may be configured to measure the source voltage Vs developed at node 112 of the source capacitor Cs. The controller 120 may be further configured to compare the measured source voltage level to a target voltage level. Based on the determined difference between the measured source voltage and the target voltage level (e.g., by comparing the difference to a threshold voltage difference value), the controller 120 may abstain from pulse emission during the first switching cycle by disabling the pulse emission switch MDL during the first switching cycle and instead continue charging the source capacitor Cs in subsequent switching cycles (e.g., a second switching cycle) until the source voltage has reached or surpassed the target voltage level such that the source voltage Vs is a higher voltage level as compared to the source voltage level during the first switching cycle. The measurement and / or comparison of the source voltage Vs to the target voltage level and the determination of whether the voltage difference exceeds the threshold voltage difference value may be determined by the controller 120 using one or more Analog-to-Digital converters, comparators, and / or other appropriate circuits that are understood in the art.

[0052] In some examples, the time needed to increase the current ILS through the inductor Ls, source target voltage levels, and / or threshold voltage difference values may be specified to the controller 120 using an analog voltage, configuration resistor, current input, and / or a digital input (not shown).

[0053] In some examples, if the voltage at the source capacitor Cs is negative before a charging cycle thereof begins, pulsed the light-emitting diode driver 101 is configured to connect the inductor Ls at node 110 to ground until the source capacitorvoltage Vs is positive and the inductor current i s is zero amps. In such examples, the pulsed light-emitting diode driver 101 may subsequently provide the remaining capacitor charge of the source capacitor Cs using the methods disclosed above. As but one example, node 110 may be connected to ground by a circuit of the power converter 102 (not shown) that is operable to directly electrically connect node 110 to a ground node rather than to a node that provides the regulated voltage Vin’.

[0054] In some examples, multiple charging circuits made up of respective inductors Ls, fluxing switches MFLUX, and optional reverse current protection diodes DR may be used in parallel to charge the source capacitor(s) Cs. The parallel charging circuits may charge a single source capacitor Cs, or respective multiple source capacitors Cs at the same time, at different times, or overlapping for some of the time during the period.

[0055] In some examples with multiple laser diodes or light-emitting diodes DL that need to turn on in different combinations each switching period, separate charging circuits made up of respective inductors Ls, fluxing switches MFLUX, and optional reverse current protection diodes DR may be used to charge a single source capacitor Cs, or respective multiple source capacitors Cs connected to separate laser diodes or light-emitting diodes. In such examples, the separate laser diodes or lightemitting diodes can all have their cathodes connected to the same pulse emission switch MDL with the charging circuits selectively charging only the source capacitors Cs connected to the laser diode or light-emitting diode DL that the controller 120 is configured to pulse for each switching cycle.

[0056] In some examples, the pulse emission switch MDL can be turned ON immediately, or a short amount of time after (e.g., within 10 nanoseconds, or within 20 nanoseconds), the fluxing switch MFLUX is turned OFF, which can provide an additional current path to the laser diode DL current pulse, especially when more than one charging cycle is used for each time the laser diode or light-emitting diode DL is pulsed.

[0057] In some examples, the fluxing switch MFLUX may be enabled or reenabled at the same time that the pulse emission switch MDL is enabled to begin generating current through the inductor Ls for a subsequent switching cycle.

[0058] As disclosed in detail below with reference to FIGS. 3 A-3C, in other examples the switches MFLUX and MDL are turned ON at the same time or have their ON times overlap, which thereby limits the voltage drop across the fluxing switchMFLUX and improves its robustness when current flows from ground to the pulse emission switch MDL drain node and can reduce the time needed before each current pulse of the diode Ds.

[0059] End-to-end electrical efficiency within conventional LiDAR-based power conversion architectures remains relatively low, typically ranging from 50% to 70%, even when utilizing best-in-class inductive-based and highly integrated solutions. This inefficiency leads to high power losses, which can necessitate the use of costly and space-consuming heat-sinking components or impose restrictions on average power output levels that may hinder overall system performance. Such limitations not only restrict a LiDAR system's maximum pulse energy but also constrain its detection range and operational capabilities in challenging environmental conditions such as fog or rain. Addressing these inefficiencies is critical for enhancing the system’s effectiveness across various applications, particularly where high precision and adaptability are required.

[0060] FIG. 3A shows simplified plots 300 of experimental results related to the first mode of operation of the pulsed light-emitting diode driver 101 described above, i.e., when controlled such that there is no, or little, overlap between the ON- state of the switches MFLUX and MDL.

[0061] With reference to FIG. 1, the simplified plots 300 illustrate a voltage plot of the source voltage Vs 302 developed at the node 112, a voltage plot of the drain-source voltage VDS 306 developed at the node 114 across the fluxing switch MFLUX, a voltage plot of the fluxing switch gate driver signal GATEFLUX 308, a voltage plot of the pulse emission switch gate driver signal GATEDL 310, a plot of the current IDS 312 developed through the diode Ds, a plot of the current IFLUX 314 developed through the fluxing switch MFLUX, and a plot of the current IDL 316 developed through the laser diode DL. Also shown are times of interest, ti-3.

[0062] As was described above, the first mode of operation for the pulsed light-emitting diode driver 101 involves first enabling the fluxing switch MFLUX at time ti to charge the inductor Ls from Vin’ at node 110 to a desired current / energy level. At time L, the fluxing switch MFLUX is disabled and the stored energy in the inductor Ls is discharged into the source capacitor Cs through the diode Ds in a resonant exchange from time t2 until time L.

[0063] Next, as described above and as shown in FIG. 3B, the pulse emission switch MDL is enabled by the gate driver signal MDL to transfer the charge stored atthe source capacitor Cs into the effective inductance path of the bond wire LDL of the laser diode DL. The simplified plots 330 of FIG. 3B illustrate a voltage plot of the source voltage Vs 332 developed at the node 112, a voltage plot of the drain-source voltage VDS 336 developed at the node 114 across the fluxing switch MFLUX, a voltage plot of the fluxing switch gate driver signal GATEFLUX 338, a voltage plot of the pulse emission switch gate driver signal GATEDL 340, a plot of the current IFLUX 344 developed through the fluxing switch MFLUX, and a plot of the current IDL 346 developed through the laser diode DL. Also shown are times of interest, ti-2.

[0064] At time ti, the pulse emission switch MDL is enabled by the pulse emission switch gate driver signal GATEDL 340, allowing the charge stored at the source capacitor Cs to flow through the laser diode DL. Accordingly, the current through the laser diode IDL 346 begins to rise as the source voltage Vs 332 falls. At time C, the source voltage Vs 332 begins to resonate below 0V. While the source voltage Vs remains below zero volts, the diode Ds and the body-diode MFLUX®13of the fluxing switch MFLUX are reverse-biased and clamp the source voltage Vs to their effective on-voltage.

[0065] However, while the current IFLUX 344 flows through the lossy bodydiode MFLUX®13and the diode Ds, the effective clamped voltage of the source capacitor Cs may be as low as -7 V, resulting in significant power loss. As but one example, for an edge-emitting laser diode-based laser diode driver having a 500W peak output power, the power loss caused by the flow of current IFLUX through the body-diode MFLUX®Dmay be on the order of tens of mW — i.e., a 10% reduction of end-to-end power efficiency.

[0066] As disclosed herein, in a second mode of operation of the pulsed lightemitting diode driver 101, the controller 120 is advantageously operable to enable the fluxing switch MFLUX during the time that the source voltage Vs at the source capacitor is below 0 volts and then disable the fluxing switch MFLUX when, or shortly before, the source voltage Vs rises from a negative voltage to 0 volts to improve the end-to-end efficiency of the pulsed laser diode driver up to 10% and reduce power losses through the fluxing switch MFLUX by 3x. Timing of the fluxing switch gate driver signal GATEFLUX and of the pulse emission switch gate driver signal GATEDL for the second mode of operation may be based on timing configurations determined during manufacturing and / or by an end-user and stored in non-volatile memory of the controller 120.

[0067] A comparison of the first mode of operation and the second mode of operation of the pulsed light-emitting diode driver 101 is illustrated in FIG. 3C, in accordance with some examples. With reference to FIG. 1, the simplified plots 360 illustrate a voltage plot of the drain-source voltage VDS 366 developed at the node 114 across the fluxing switch MFLUX and the fluxing switch gate driver signal GATEFLUX 368 when the pulsed light-emitting diode driver 101 is operated in accordance with the first mode of operation described above. The simplified plots 360 additionally illustrate a voltage plot of the drain-source voltage VDS’ 366’ developed at the node 114 across the fluxing switch MFLUX and the fluxing switch gate driver signal GATEFLUX’ 368’ when the pulsed light-emitting diode driver 101 is operated in accordance with the second mode of operation described above. Also shown is the pulse-emission switch gate driver signal GATEDL 370.

[0068] As shown in FIG. 3C, operation of the pulsed light-emitting diode driver 101 in the second mode of operation results in a significant reduction in negative drain-source voltage VDS’ 366’ as compared to the drain-source voltage VDS 366 produced using the first mode of operation. As such, the total power dissipated through the fluxing switch MFLUX is proportionally reduced using the second mode of operation of the pulsed light-emitting diode driver 101 as compared to the power dissipated through the fluxing switch MFLUX when using the first mode of operation.

[0069] In some examples of the second mode of operation described above, enabling the fluxing switch MFLUX during pulse emission by the controller 120 involves a) determining that the pulse emission switch MDL is enabled, and b) that the source voltage Vs is less than a first negative threshold voltage (e.g., using a comparator, Analog-to-Digitial converter circuit, etc. of the controller 120, not shown). In other examples of the second mode of operation described above, enabling the fluxing switch MFLUX during pulse emission by the controller 120 involves a) determining that the pulse emission switch MDL is enabled, and b) that a current is flowing through the body-diode MFLUX®13of the fluxing switch MFLUX that surpasses a current threshold (e.g., using a comparator, Analog-to-Digitial converter circuit, etc. of the controller 120, not shown).

[0070] In some examples of the second mode of operation described above, disabling the fluxing switch MFLUX during pulse emission by the controller 120 involves determining that the source voltage Vs is no longer less than the first negative threshold voltage, or is no longer less than a second negative thresholdvoltage which may be equal to or higher than the first negative threshold voltage. In other examples of the second mode of operation described above, disabling the fluxing switch MFLUX during pulse emission by the controller 120 involves disabling the fluxing switch MFLUX concurrently, slightly before, or slightly after the pulsed emission switch MDL is disabled.

[0071] In some examples, the first negative threshold voltage may be -Iv, -2v, -3 volts, etc., and the second negative voltage may be a greater value, i.e., respectively Ov, -Iv, -2v, etc. In some examples, the negative current threshold level may be -1 A, -2A, -3 A, etc.

[0072] With reference to FIG. 3B, FIG. 4A and FIG. 4B illustrate third and fourth modes of operation of the pulsed light-emitting diode driver 101, in accordance with some examples.

[0073] The simplified plots 400 of FIG. 4 A illustrate a voltage plot of the source voltage Vs 402 developed at the node 112, a voltage plot of the drain-source voltage VDS 404 developed at the node 114 across the fluxing switch MFLUX, a voltage plot of the pulse emission switch gate driver signal GATEDL 406, a voltage plot of the fluxing switch gate driver signal GATEFLUX 408, a plot of the current IDL 410 developed through the laser diode DL, and a plot of the current IFLUX 412 developed through the fluxing switch MFLUX in accordance with a third mode of operation disclosed herein. Also shown are times of interest, ti-3 and a comparison plot of the current IDL’ 410’ developed through the laser diode DL in accordance with the first mode of operation shown in FIG. 3B.

[0074] As illustrated by comparing the plot of the current IDL 410 to the plot of current IDL’ 410’, in a third mode of operation the pulse emission switch MDL, which was turned on at time ti, is turned off at time t2 by the pulse emission switch gate driver signal GATEDL 406 shortly before the high-current pulse IDL 410 developed through the laser diode DL would have reached its theoretical peak at time t3. In this context, the “theoretical peak” is taken to mean a greater current amplitude that would have been developed through the laser diode DL if the pulse emission switch were disabled at time ts. In the example shown, the source voltage Vs 402 and the fluxing switch gate driver signal GATEFLUX 408 (i.e., the gate node voltage) advantageously stay at respective voltage levels above ground. Accordingly, the current IFLUX 412 developed through the fluxing switch MFLUX is about zero amps, as compared to the negative current IFLUX 344 illustrated in FIG. 3B.

[0075] Timing of the pulse emission switch gate driver signal GATEDL 406 and the fluxing switch gate driver signal GATEFLUX 408 for the third mode of operation may be based on timing configurations determined during manufacturing or by an end-user and stored in non-volatile memory at the controller 120.

[0076] The simplified plots 420 of FIG. 4B illustrate a voltage plot of the source voltage Vs 422 developed at the node 112, a voltage plot of the drain-source voltage VDS 424 developed at the node 114 across the fluxing switch MFLUX, a voltage plot of the pulse emission switch gate driver signal GATEDL 426, a voltage plot of the fluxing switch gate driver signal GATEFLUX 428, a plot of the current IDL 430 developed through the laser diode DL, and a plot of the current IFLUX 432 developed through the fluxing switch MFLUX. Also shown are times of interest, ti-2 and a comparison plot of the current IDL’ 430’ developed through the laser diode DL in accordance with the first mode of operation shown in FIG. 3B.

[0077] As illustrated by comparing the plot of the current IDL 430 to the plot of current IDL’ 430’, in a fourth mode of operation the pulse emission switch MDL, which was turned on at time ti, is turned off at time ts by the pulse emission switch gate driver signal GATEDL 406 shortly after the current IDL 410 developed through the laser diode DL reached its peak at time t2 and before the source voltage Vs 422 reaches 0 volts. In the example shown, the drain-source voltage VDS 424 rises rapidly when the pulse emission switch gate driver signal GATEDL 406 turns off at time ts and as such, the source voltage Vs 422 advantageously does not fall significantly below ground since the current IDL 430 drops more rapidly as compared the drop in current shown in the comparison plot of the current IDL’ 430’. Likewise, the fluxing switch gate driver signal GATEFLUX 428 does not significantly drop below ground (as compared to the example shown in FIG. 3B) since the fluxing switch MFLUX does not conduct as much negative current as compared the example shown in FIG. 3B. Indeed, the current IDL 430 and the fluxing current IFLUX 432 also do not reach as significant of a negative voltage as compared to their respective levels shown in FIG. 3B since the source voltage Vs 422 only reaches a negative voltage level that is slightly below ground.

[0078] Timing of the pulse emission switch gate driver signal GATEDL 426 and the fluxing switch gate driver signal GATEFLUX 428 for the third mode of operation may be based on timing configurations determined during manufacturing or by an end-user and stored in non-volatile memory at the controller 120.

[0079] Reference has been made in detail to examples of the disclosed invention, one or more examples of which have been illustrated in the accompanying figures. Each example has been provided by way of explanation of the present technology, not as a limitation of the present technology. In fact, while the specification has been described in detail with respect to specific examples of the invention, it will be appreciated that those skilled in the art, upon attaining an understanding of the foregoing, may readily conceive of alterations to, variations of, and equivalents to these examples. For instance, features illustrated or described as part of one example may be used with another example to yield a still further example. Thus, it is intended that the present subject matter covers all such modifications and variations within the scope of the appended claims and their equivalents. These and other modifications and variations to the present invention may be practiced by those of ordinary skill in the art, without departing from the scope of the present invention, which is more particularly set forth in the appended claims. Furthermore, those of ordinary skill in the art will appreciate that the foregoing description is by way of example only, and is not intended to limit the invention.

Claims

What is claimed is:

1. A pulsed light-emitting diode driver, comprising: an inductor having a first terminal and a second terminal, the first terminal of the inductor being configured to receive an input voltage; a fluxing switch having a drain node electrically connected to the second terminal of the inductor and a source node directly electrically connected to ground; a first diode having an anode and a cathode, the anode of the first diode being directly electrically connected to the second terminal of the inductor and electrically connected to the drain node of the fluxing switch; a source capacitor having a first terminal that is directly electrically connected to the cathode of the first diode and a second terminal that is directly electrically connected to ground, a source voltage being developed at the first terminal of the source capacitor; a light-emitting diode having an anode and a cathode, the anode of the light-emitting diode being directly electrically connected to the first terminal of the source capacitor and to the cathode of the first diode; and a pulse emission switch having a drain node directly electrically connected to the cathode of the light-emitting diode and a source node directly electrically connected to ground; wherein: the fluxing switch and the pulse emission switch are configured to selectively control a current flow through and from the inductor to refresh a charge stored at the source capacitor and to direct the charge stored at the source capacitor through the light-emitting diode to produce a high-current pulse through the light-emitting diode.

2. The pulsed light-emitting diode driver of claim 1, further comprising: a second diode having an anode and a cathode, the anode of the second diode being directly electrically connected to the anode of the first diode, and the cathode of the second diode being directly electrically connected to the drain node of the fluxing switch.

3. The pulsed light-emitting diode driver of claim 1, wherein: the first diode is a Schottky diode.

4. The pulsed light-emitting diode driver of claim 1, wherein: the light-emitting diode is a laser diode.

5. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; wherein selectively controlling the current flow through and from the inductor comprises: disabling, by the controller, the pulse emission switch at a first time; enabling, by the controller, the fluxing switch at a second time and while the pulse emission switch remains disabled to develop a first current flow through the inductor to ground through the fluxing switch; disabling, by the controller, the fluxing switch at a third time and while the pulse emission switch remains disabled to develop a second current flow from the inductor to the first terminal of the source capacitor; enabling, by the controller, the pulse emission switch at a fourth time to develop a third current flow through the light-emitting diode to produce the high-current pulse through the light-emitting diode; and disabling, by the controller, the pulse emission switch at a fifth time.

6. The pulsed light-emitting diode driver of claim 5, wherein selectively controlling the current flow through and from the inductor further comprises: enabling, by the controller, the fluxing switch at a sixth time that is after the fourth time.

7. The pulsed light-emitting diode driver of claim 5, wherein selectively controlling the current flow through and from the inductor further comprises: enabling, by the controller, the fluxing switch at a sixth time that is after the fourth time and before the fifth time.

8. The pulsed light-emitting diode driver of claim 6, further comprising:enabling, by the controller, the fluxing switch at the sixth time in response to determining that the source voltage is less than a first negative threshold voltage.

9. The pulsed light-emitting diode driver of claim 6, further comprising: enabling, by the controller, the fluxing switch at the sixth time based on a timing configuration stored at the controller.

10. The pulsed light-emitting diode driver of claim 8, further comprising: disabling, by the controller, the fluxing switch at a seventh time in response to determining that the source voltage is greater than a second negative threshold voltage.

11. The pulsed light-emitting diode driver of claim 8, further comprising: disabling, by the controller, the fluxing switch at a seventh time based on a timing configuration stored at the controller.

12. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; wherein selectively controlling the current flow through and from the inductor comprises charging the source capacitor during two or more sequential switching cycles by: charging the source capacitor during a first switching cycle of the pulsed light-emitting diode driver; disabling, by the controller, the pulse emission switch for the first switching cycle; and charging the source capacitor during a second switching cycle of the pulsed light-emitting diode driver.

13. The pulsed light-emitting diode driver of claim 12, wherein: a power converter provides the input voltage; and the source capacitor is charged during two or more sequential switching cycles in response to a determination that conduction losses in the pulsedlight-emitting diode driver are higher than switching losses in the power converter.

14. The pulsed light-emitting diode driver of claim 12, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; wherein selectively controlling the current flow through and from the inductor comprises: determining, by the controller, a difference between a first source voltage level at the source capacitor and a target voltage level during a first switching cycle of the pulsed light-emitting diode driver; disabling, by the controller, the pulse emission switch for the first switching cycle in response to determining that the difference between the source voltage and the target voltage level is greater than a voltage threshold level; and charging, by the controller, the source capacitor to a second source voltage level during a second switching cycle of the pulsed light-emitting diode driver.

15. The pulsed light-emitting diode driver of claim 1, wherein: the source capacitor is charged to a voltage level that is greater than that needed for generating the high-current pulse.

16. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; wherein selectively controlling the current flow through and from the inductor comprises: enabling, by the controller, the pulse emission switch directly after the charge at the source capacitor has been fully refreshed.

17. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch;wherein selectively controlling the current flow through and from the inductor comprises: determining, by the controller, that the charge stored at the source capacitor has been fully refreshed; and enabling, by the controller, the pulse emission switch in response to determining that the charge at the source capacitor has been fully refreshed.

18. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; wherein selectively controlling the current flow through and from the inductor comprises: enabling, by the controller, the pulse emission switch to coincide with a peak source voltage at the source capacitor.

19. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; wherein selectively controlling the current flow through and from the inductor comprises: determining, by the controller, a difference between the amount of charge stored at the source capacitor during a previous switching cycle as compared to a target amount of charge; and adjusting, by the controller, the amount of time that the fluxing switch is enabled to develop a current through the inductor during a switching cycle of the pulsed light-emitting diode driver based on the determined difference.

20. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; wherein selectively controlling the current flow through and from the inductor comprises: determining, by the controller, a difference between the amount of charge supplied to the source capacitor during a previous switching cycle ascompared to a target amount of charge to be supplied to the source capacitor; and adjusting, by the controller, a number of sequential switching cycles of the pulsed light-emitting diode driver used to refresh the source capacitor without enabling the pulse emission switch, based on the determined difference.

21. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; upon determining, by the controller, that the source voltage is less than zero volts, directly electrically connecting the first terminal of the inductor to ground.

22. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; wherein the pulse emission switch is disabled at a first time, by the controller, before the high-current pulse reaches a current amplitude that would have been developed if the pulse emission switch were disabled at a second time, the second time being after the first time.

23. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; wherein the pulse emission switch is disabled at a second time, by the controller, after the high-current pulse reaches a current amplitude peak at a first time and before the source voltage reaches 0 volts.

24. The pulsed light-emitting diode driver of claim 1, further comprising: a controller configured to control the pulse emission switch and the fluxing switch; wherein the controller enables the pulse emission switch within 20 nanoseconds of disabling the fluxing switch.

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