Pixel circuit and display panel

Abstract

A pixel circuit and a display panel. The pixel circuit comprises a driving module (110), a threshold voltage compensation module (130), a second initialization unit (180), and a light-emission module (150), wherein the threshold voltage compensation module (130) is connected to a first end of the driving module (110), and the threshold voltage compensation module (130) is configured to transmit a first initialization voltage (Vini) to the first end of the driving module (110); and the second initialization unit (180) is connected to a first end of the light-emission module (150).

Description

Pixel circuit and display panel

[0001] The present application claims priority to the Chinese patent application No. 202410840575.8, filed on June 26, 2024, to the Chinese Patent Office, the whole content of the above application being incorporated herein by reference. TECHNICAL FIELD

[0002] Embodiments of the present application relate to the technical field of display, for example, to a pixel circuit and a display panel. BACKGROUND

[0003] With the rapid development of display technology, people have higher and higher requirements for the performance of display panels.

[0004] A display panel usually includes a pixel circuit and a scanning circuit, and the scanning circuit is configured to output a scanning signal to the pixel circuit to drive the pixel circuit to work. However, the pixel circuit in the related art is difficult to meet the needs of users. SUMMARY

[0005] Embodiments of the present application provide a pixel circuit and a display panel to simplify the driving signal of the pixel circuit and reduce the width of the frame.

[0006] According to an aspect of the present application, a pixel circuit is provided, comprising: a driving module, a threshold voltage compensation module, a second initialization unit and a light emitting module;

[0007] The threshold voltage compensation module is connected to the first end of the driving module, and the threshold voltage compensation module is configured to transmit a first initialization voltage to the first end of the driving module;

[0008] The second initialization unit is connected to the first end of the light emitting module, and the second initialization unit is configured to transmit a second initialization voltage to the first end of the light emitting module;

[0009] The driving module is configured to generate a driving current to drive the light emitting module to emit light;

[0010] The first initialization voltage is greater than the second initialization voltage.

[0011] According to another aspect of the present application, a pixel circuit is provided, comprising: a driving module, a data writing module, a threshold voltage compensation module and an auxiliary module;

[0012] The data writing module is connected to the first node, and the data writing module is configured to write a data voltage to the first node;

[0013] The auxiliary module is connected between the first node and the first end of the driving module, and the auxiliary module is configured to transmit the data voltage of the first node to the first end of the driving module;

[0014] The threshold voltage compensation module is connected with the first end of the driving module, and the threshold voltage compensation module is configured to transmit a first initialization voltage to the first end of the driving module.

[0015] According to another aspect of the present application, a display panel is provided, which comprises the pixel circuit provided in any of the embodiments of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0016] FIG. 1 is a structural schematic diagram of a pixel circuit provided in an embodiment of the present application;

[0017] FIG. 2 is a structural schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0018] FIG. 3 is a structural schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0019] FIG. 4 is a structural schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0020] FIG. 5 is a structural schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0021] FIG. 6 is a structural schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0022] FIG. 7 is a structural schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0023] FIG. 8 is a structural schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0024] FIG. 9 is a driving timing schematic diagram of a pixel circuit provided in an embodiment of the present application;

[0025] FIG. 10 is a simulation waveform diagram provided in an embodiment of the present application;

[0026] FIG. 11 is a driving timing schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0027] FIG. 12 is a structural schematic diagram of a display panel provided in an embodiment of the present application;

[0028] FIG. 13 is a structural schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0029] FIG. 14 is a structural schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0030] FIG. 15 is a structural schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0031] FIG. 16 is a flowchart of a driving method of a pixel circuit provided in an embodiment of the present application;

[0032] FIG. 17 is a flowchart of another driving method of a pixel circuit according to an embodiment of the present application;

[0033] FIG. 18 is a structural diagram of a display panel according to an embodiment of the present application;

[0034] FIG. 19 is a structural diagram of another display panel according to an embodiment of the present application. DETAILED DESCRIPTION

[0035] FIG. 1 is a structural diagram of a pixel circuit according to an embodiment of the present application. As shown in FIG. 1, the pixel circuit includes a driving module 110, a threshold voltage compensation module 130, a second initialization unit 180 and a light emitting module 150.

[0036] The threshold voltage compensation module 130 is connected to the first end of the driving module 110, and is configured to transmit a first initialization voltage Vini to the first end of the driving module 110. The second initialization unit 180 is connected to the first end of the light emitting module 150, and is configured to transmit a second initialization voltage Vref to the first end of the light emitting module 150. The driving module 110 is configured to generate a driving current to drive the light emitting module 150 to emit light.

[0037] The first initialization voltage Vini is greater than the second initialization voltage Vref.

[0038] For example, the driving module 110 and the light emitting module 150 are connected between a first power line L1 and a second power line L2. The driving module 110 is configured to drive the light emitting module 150 to emit light when a path between the first power line L1 and the second power line L2 is turned on. The first power line L1 is configured to transmit a first power voltage VDD, and the second power line L2 is configured to transmit a second power voltage VSS. The first power voltage VDD is greater than the second power voltage VSS. For example, the first power voltage VDD can be a positive voltage, and the second power voltage VSS can be a negative voltage.

[0039] In the related art, the first end of the driving module 110 and the first end of the light emitting module 150 are both initialized by the second initialization voltage Vref. The second initialization voltage Vref is a negative voltage with a low voltage value. Therefore, the voltage difference between the second end and the first end of the driving module 110 is large, which causes a large reset current of the driving module 110. As a result, the power voltage (e.g., the first power voltage VDD) fluctuates greatly, and display unevenness occurs.

[0040] In the embodiment, the first initialization voltage Vini is used to initialize the first end of the driving module 110 through the threshold voltage compensation module 130, and the second initialization voltage Vref is used to initialize the first end of the light emitting module 150 through the second initialization unit 180. The first initialization voltage Vini and the second initialization voltage Vref are independent of each other. The first initialization voltage Vini is greater than the second initialization voltage Vref, so that the voltage difference between the second end and the first end of the driving module 110, i.e., the voltage difference between the first power supply voltage VDD and the first initialization voltage Vini, is small, which is beneficial to reduce the reset current flowing from the first power supply voltage VDD to the first initialization voltage Vini through the driving module 110, avoid the problem of large fluctuation of the first power supply voltage VDD caused by the large reset current, and improve the display uneven phenomenon caused by the fluctuation of the power supply voltage, thereby improving the display effect.

[0041] Fig. 2 is a structural schematic diagram of another pixel circuit provided by the embodiment of the application. Referring to Fig. 2, on the basis of the above embodiment, the second light emitting control module 170 can be further included in the path between the first power supply line L1 and the second power supply line L2. The second light emitting control module 170 is connected between the first end of the driving module 110 and the first end of the light emitting module 150, so as to isolate the first end of the driving module 110 and the first end of the light emitting module 150 during initialization, and control the on-off of the path between the first power supply line L1 and the second power supply line L2.

[0042] Fig. 3 is a structural schematic diagram of another pixel circuit provided by the embodiment of the application. Referring to Fig. 3, on the basis of the above embodiment, the pixel circuit further includes the data writing module 120. The data writing module 120 is configured to transmit the data voltage Vdata to the first end of the driving module 110 through the output end thereof during the data writing stage.

[0043] The threshold voltage compensation module 130 is further connected with the first control end and the second end of the driving module 110. The threshold voltage compensation module 130 is configured to transmit the first initialization voltage Vini to the first end of the driving module 110 during the initialization stage, and perform threshold voltage compensation on the driving module 110 during the threshold voltage compensation stage.

[0044] For example, the working process of the pixel circuit shown in Fig. 3 includes at least an initialization stage, a data writing stage, a threshold voltage compensation stage and a light emitting stage. The initialization stage can include a first initialization stage and a second initialization stage.

[0045] During the first initialization stage, the threshold voltage compensation module 130 transmits the first initialization voltage Vini to the first end of the driving module 110, so as to initialize the potential of the first end of the driving module 110.

[0046] In the threshold voltage compensation stage, the threshold voltage compensation module 130 controls the first control end of the driving module 110 to discharge until the voltage of the first control end of the driving module 110 is Vini+Vth1, the driving module 110 is turned off, and the threshold voltage compensation is achieved. Wherein, Vth1 is the threshold voltage of the driving module 110.

[0047] In the data writing stage, the data voltage Vdata is written to the first end of the driving module 110 through the data writing module 120.

[0048] In the second initialization stage, the second initialization voltage Vref is transmitted to the first end of the light emitting module 150 through the second initialization unit 180, and the first end of the light emitting module 150 is initialized. The technical scheme provided in the embodiment is that the first initialization voltage Vini and the second initialization voltage Vref are used to respectively initialize the first end of the driving module 110 and the first end of the light emitting module 150, so as to reduce the fluctuation of the first power voltage VDD, thereby improving the phenomenon of uneven low gray scale display caused by the fluctuation of the power voltage.

[0049] In the light emitting stage, the first light emitting control module 160 and the second light emitting control module 170 are turned on, the path between the first power line L1 and the second power line L2 is communicated, the driving module 110 generates the driving current, and the light emitting module 150 is driven to emit light.

[0050] FIG. 4 is a structural schematic diagram of another pixel circuit provided in the embodiment of the application, referring to FIG. 4, the pixel circuit includes a driving module 110, a data writing module 120, a threshold voltage compensation module 130, an auxiliary module 140 and a light emitting module 150;

[0051] The output end of the data writing module 120 and the auxiliary module 140 are connected to the first node N1, the auxiliary module 140 is connected to the first end of the driving module 110, and the data writing module 120 is configured to write the data voltage Vdata to the first node N1 in the data writing stage; the auxiliary module 140 is configured to transmit the data voltage Vdata of the first node N1 to the first end of the driving module 110 after the threshold voltage compensation stage.

[0052] Optionally, in a display cycle, the initialization stage is located before the threshold voltage compensation stage, and the data writing stage is located before the light emitting stage. Here, the data writing stage being located before the light emitting stage means that the data writing stage can be located in the initialization stage, or in the threshold voltage compensation stage. For example, the data writing stage at least partially overlaps with the initialization stage, or the data writing stage at least partially locates in or overlaps with the threshold voltage compensation stage. Here, the data writing stage at least partially overlapping with the initialization stage means that the starting time of the data writing stage can be the same as the starting time of the initialization stage, or can be after the starting time of the initialization stage, and the ending time of the data writing stage can be the same as the ending time of the initialization stage, or can be after the ending time of the initialization stage. Similarly, the data writing stage at least partially locating in the threshold voltage compensation stage means that the starting time of the data writing stage can be the same as the starting time of the threshold voltage compensation stage, and the ending time of the data writing stage is before the ending time of the threshold voltage compensation stage. The data writing stage at least partially overlapping with the threshold voltage compensation stage means that the starting time of the data writing stage can be the same as the starting time of the threshold voltage compensation stage, or can be before the starting time of the threshold voltage compensation stage, and the ending time of the data writing stage can be the same as the ending time of the threshold voltage compensation stage, or can be before the ending time of the threshold voltage compensation stage.

[0053] For example, in the data writing stage, the data voltage Vdata is written to the first node N1 through the data writing module 120. Since the auxiliary module 140 is turned on after the threshold voltage compensation stage, that is, the auxiliary module 140 is in the off state before the light emitting stage, the first node N1 and the first end of the driving module 110 do not generate an impact, and the two maintain a relatively independent potential, so that the data writing stage can be flexibly set, that is, even if the data writing stage overlaps with the threshold voltage compensation stage, the data writing stage and the threshold voltage compensation stage do not affect each other.

[0054] In the light emitting stage, the auxiliary module 140 is controlled to be turned on to transmit the data voltage Vdata of the first node N1 to the first end of the driving module 110, and the driving module 110 drives the light emitting module 150 to emit light.

[0055] The technical scheme provided by the embodiment of the present application is that the auxiliary module 140 is arranged between the first node N1 and the first end of the driving module 110, and the auxiliary module 140 is controlled to be turned on after the threshold voltage compensation stage (for example, the light emitting stage), that is, the auxiliary module 140 is turned off before the light emitting stage, so that the potential between the first node N1 and the first end of the driving module 110 is kept independent of each other before the driving module 110 completes the threshold voltage compensation, thereby preventing the voltage of the first node N1 from affecting the voltage of the first end of the driving module 110, and further allowing the turn-on timing of the data writing module 120 to be flexibly set, which is beneficial to simplifying the number of scanning signals, reducing the number of groups of scanning circuits, and is beneficial to realizing a narrow frame design. In addition, the data writing stage and the threshold voltage compensation stage do not affect each other, so that the time of threshold voltage compensation is not affected by the row time, that is, the threshold voltage of the driving module 110 can be completely compensated even at a high refresh frequency, which is beneficial to improving the difference in display brightness and improving the uniformity of the display picture.

[0056] Fig. 5 is a structural schematic diagram of another pixel circuit provided by the embodiment of the present application. Referring to Fig. 5, on the basis of the above embodiment, the data writing module 120 includes a first voltage writing unit 121, a second voltage writing unit 122 and a first storage unit 123; the first end of the first voltage writing unit 121 is connected with a data line, the second end of the first voltage writing unit 121 is connected with the first node N1 as an output end of the data writing module 120, and the control end of the first voltage writing unit 121 is connected with a first scanning line and is set to be turned on in response to a first scanning signal S1 on the first scanning line to write a data voltage Vdata to the first node N1 in a data writing stage;

[0057] The second voltage writing unit 122 is connected between the first initialization signal line and the second control end of the driving module 110, the control end of the second voltage writing unit 122 is connected with a second scanning line and is set to be turned on in response to a second scanning signal S2 on the second scanning line to transmit a first initialization voltage Vini on the first initialization signal line to the second control end of the driving module 110 in an initialization stage and a threshold voltage compensation stage; and the first storage unit 123 is connected between the second control end of the driving module 110 and the first node N1, and is set to store the data voltage Vdata of the first node N1.

[0058] Since the first storage unit 123 can realize the storage function only when the voltage is written at both ends thereof, the first voltage writing unit 121 is turned on during the turn-on period of the second voltage writing unit 122, and at this time, the voltage difference between both ends of the first storage unit 123 is Vini-Vdata. The turn-on time of the second voltage writing unit 122 can be greater than the turn-on time of the first voltage writing unit 121.

[0059] Thanks to the presence of the auxiliary module 140, the threshold voltage compensation module 130 can be connected to the same scan line as the second voltage writing unit 122, which is conducive to reducing the types of scan signals and the number of scan lines, thereby facilitating the reduction of the frame width. The threshold voltage compensation module 130 is turned on in response to the second scan signal S2 to transmit the first initialization voltage Vini to the first end of the driving module 110 in the initialization stage, and to perform threshold voltage compensation on the driving module 110 in the threshold voltage compensation stage.

[0060] Optionally, continuing to refer to FIG. 5, the pixel circuit further comprises a first light-emitting control module 160 and a second light-emitting control module 170; the first light-emitting control module 160 is connected between the first power supply line L1 and the second end of the driving module 110, and the control end of the first light-emitting control module 160 is connected to the first light-emitting control signal line; the second light-emitting control module 170 is connected between the first end of the driving module 110 and the first end of the light-emitting module 150, and the second end of the light-emitting module 150 is connected to the second power supply line L2; the control end of the second light-emitting control module 170 is connected to the second light-emitting control signal line.

[0061] Optionally, the first light-emitting control module 160 is configured to be turned on in the initialization stage and the light-emitting stage in response to the first light-emitting control signal EM1 on the first light-emitting control signal line, and to be turned off in the threshold voltage compensation stage; the second light-emitting control module 170 is configured to be turned on in the light-emitting stage in response to the second light-emitting control signal EM2 on the second light-emitting control signal line, and to remain turned off in the threshold voltage compensation stage and the initialization stage.

[0062] Optionally, in the initialization stage, the threshold voltage compensation module 130 is turned on in response to the second scan signal S2 to transmit the first initialization voltage Vini to the first end of the driving module 110; the first light-emitting control module 160 remains turned on to transmit the first power supply voltage VDD on the first power supply line L1 to the first control end and the second end of the driving module 110, so as to facilitate the subsequent working process.

[0063] Optionally, the control end of the auxiliary module 140 can be connected to the second light-emitting control signal line, so that the auxiliary module 140 can transmit the data voltage Vdata stored on the first storage unit 123 to the first end of the driving module 110 in the light-emitting stage. Here, the auxiliary module 140 and the second light-emitting control module 170 are both connected to the second light-emitting control signal line, which is conducive to reducing the number of signal lines and the types of signals, and is conducive to realizing narrow frame and high pixel density (Pixels Per Inch, PPI).

[0064] Fig. 6 is a structural schematic diagram of another pixel circuit provided by the embodiment of the present application. Referring to Fig. 6, on the basis of the above-mentioned embodiments, the threshold voltage compensation module 130 optionally comprises a first initialization unit 132, which is connected between the first initialization signal line and the first end of the driving module 110, and the control end of the first initialization unit 132 is connected to the second scan line. The first initialization unit 132 is configured to be turned on in response to the second scan signal S2 on the second scan line in the initialization stage, and transmit the first initialization voltage Vini on the first initialization signal line to the first end of the driving module 110.

[0065] Continuing to refer to Fig. 6, the threshold voltage compensation module 130 optionally further comprises a threshold voltage compensation unit 131 and a second storage unit 133, and the second storage unit 133 is connected between the first control end and the first end of the driving module 110.

[0066] The threshold voltage compensation unit 131 is connected between the first control end and the second end of the driving module 110, and the control end of the threshold voltage compensation unit 131 is connected to the second scan line. The threshold voltage compensation unit 131 is configured to be turned on in response to the second scan signal S2, so as to transmit the first power supply voltage VDD on the first power supply line L1 to the first control end of the driving module 110 in the initialization stage, and control the second storage unit 133 to store the voltage associated with the threshold voltage Vth1 of the driving module 110 in the threshold voltage compensation stage.

[0067] For example, in the threshold voltage compensation stage, the first control end and the second end of the driving module 110 are connected through the threshold voltage compensation unit 131, and the voltage at the first control end of the driving module 110 is discharged through the threshold voltage compensation unit 131, the driving module 110, the first initialization unit 132 and the first initialization signal line, until the voltage at the first control end of the driving module 110 is Vini+Vth1, the driving module 110 is in a critical off state, and the threshold voltage Vth1 of the driving module 110 is compensated. At this time, the voltage difference across the second storage unit 133 is Vth1.

[0068] The threshold voltage Vth1 of the driving module 110 can be adjusted by the voltage at the second control end of the driving module 110. In the embodiment, since the voltage at the second control end of the driving module 110 is the first initialization voltage Vini, the voltage difference between the second control end and the first end of the driving module 110 is 0V, which can make the threshold voltage Vth1 of the driving module 110 also 0V. The specific working principle will be described in subsequent embodiments.

[0069] In the embodiment, the second voltage writing unit 122, the first initialization unit 132 and the threshold voltage compensation unit 131 are connected with the second scan line, which is conducive to reducing the types of scan signals and the number of scan lines, and the second voltage writing unit 122, the first initialization unit 132 and the threshold voltage compensation unit 131 can be provided with the second scan signal S2 by using the same group of scan circuits, so that the number of groups of scan circuits can be reduced, which is conducive to realizing a narrow frame. Due to the presence of the auxiliary module 140, when the second voltage writing unit 122 and the first initialization unit 132 are both turned on, even if the first voltage writing unit 121 is turned on, the voltage of the first node N1 will not affect the voltage of the first end of the driving module 140, so as not to interfere with the threshold voltage compensation stage.

[0070] Optionally, the control end of the second initialization unit 180 is connected with the third scan line, the first end of the second initialization unit 180 is connected with the second initialization signal line, the second end of the second initialization unit 180 is connected with the first end of the light emitting module 150, and the second initialization unit 180 is configured to transmit the second initialization voltage Vref on the second initialization signal line to the first end of the light emitting module 150 in response to the third scan signal S3 on the third scan line. The second initialization unit 180 can be turned on at any stage before the light emitting stage, so the third scan signal S3 can be flexibly set.

[0071] In a specific embodiment, the second initialization unit 180 can be turned on at the same time as the first voltage writing unit 121, and the second initialization unit 180 and the first voltage writing unit 121 can be connected with the same signal line, so as to reduce the number of signal lines. FIG. 7 is a structural schematic diagram of another pixel circuit provided by the embodiment of the application. Referring to FIG. 7, on the basis of the above-mentioned embodiments, optionally, the control end of the second initialization unit 180 is connected with the first scan line, the first end of the second initialization unit 180 is connected with the second initialization signal line, the second end of the second initialization unit 180 is connected with the first end of the light emitting module 150, and the second initialization unit 180 is configured to transmit the second initialization voltage Vref on the second initialization signal line to the first end of the light emitting module 150 in the data writing stage, so as to initialize the potential of the first end of the light emitting module 150.

[0072] In the embodiment, the first initialization unit 132 connects the first initialization signal line, and independently sets the initialization of the first end of the driving module 110 and the initialization of the first end of the light emitting module 150, that is, the initialization voltages of the driving module 110 and the light emitting module 150 are independent. The first initialization voltage Vini transmitted on the first initialization signal line is greater than the second initialization voltage Vref transmitted on the second initialization signal line, so that the voltage difference between the second end and the first end of the driving module 110 can be reduced, which is beneficial to reducing the reset current, thereby improving the phenomenon of low gray scale display unevenness caused by the power supply voltage fluctuation due to the too large reset current.

[0073] FIG. 8 is a structural schematic diagram of another pixel circuit provided by the embodiment of the application, which is a structural schematic diagram of the pixel circuit shown in FIG. 7 refined as a device. Referring to FIG. 8, on the basis of the above embodiment, the driving module 110 includes a first transistor M1, the first transistor M1 is a double-gate transistor, the first voltage writing unit 121 includes a second transistor M2, the second voltage writing unit 122 includes a third transistor M3, and the first storage unit 123 includes a first capacitor C1; the gate of the second transistor M2 is connected with a first scan line, the first electrode of the second transistor M2 is connected with a data line, the second electrode of the second transistor M2 is connected with a first node N1, the gate of the third transistor M3 is connected with a second scan line, the first electrode of the third transistor M3 is connected with a first initialization signal line, the second electrode of the third transistor M3 is connected with the second gate BG of the first transistor M1, and the first gate TG of the first transistor M1 is connected with the threshold voltage compensation module 130.

[0074] The first electrode of the first capacitor C1 is connected with the first node N1, and the second electrode of the first capacitor C1 is connected with the second gate BG of the first transistor M1.

[0075] The first light emitting control module 160 includes a fourth transistor M4, the second light emitting control module 170 includes a fifth transistor M5, the auxiliary module 140 includes a sixth transistor M6, and the light emitting module 150 includes a light emitting diode D1; the gate of the fourth transistor M4 is connected with a first light emitting control signal line, the first electrode of the fourth transistor M4 is connected with a first power supply line L1, the second electrode of the fourth transistor M4 is connected with the second end of the driving module 110 (i.e., the second electrode of the first transistor M1), the gates of the fifth transistor M5 and the sixth transistor M6 are both connected with a second light emitting control signal line, the first electrode of the fifth transistor M5 is connected with the first end of the driving module 110 (i.e., the first electrode of the first transistor M1), the second electrode of the fifth transistor M5 is connected with the first electrode of the light emitting diode D1, the second electrode of the light emitting diode D1 is connected with a second power supply line L2, the first electrode of the sixth transistor M6 is connected with the first node N1, and the second electrode of the sixth transistor M6 is connected with the first end of the driving module 110.

[0076] The first initialization unit 132 includes a seventh transistor M7, the threshold voltage compensation unit 131 includes an eighth transistor M8, and the second storage unit 133 includes a second capacitor C2. The gate of the seventh transistor M7 and the gate of the eighth transistor M8 are connected to the second scan line. The first electrode of the seventh transistor M7 is connected to the first initialization signal line. The second electrode of the seventh transistor M7 is connected to the first end of the driving module 110. The first electrode of the eighth transistor M8 is connected to the second end of the driving module 110. The second electrode of the eighth transistor M8 is connected to the first control end of the driving module 110. The first electrode of the second capacitor C2 is connected to the first control end of the driving module 110. The second electrode of the second capacitor C2 is connected to the first end of the driving module 110.

[0077] The second initialization unit 180 includes a ninth transistor M9. The gate of the ninth transistor M9 is connected to the first scan line. The first electrode of the ninth transistor M9 is connected to the second initialization signal line. The second electrode of the ninth transistor M9 is connected to the first end of the light-emitting module 150.

[0078] The first transistor M1 is a vertical double-gate transistor. The first gate TG of the first transistor M1 can be a top gate, and the second gate BG of the first transistor M1 can be a bottom gate. The threshold voltage Vth1 of the first transistor M1 (i.e., the threshold voltage of the driving module 110) is adjusted by setting the voltage between the second gate BG and the first electrode of the first transistor M1, so as to compensate the threshold voltage Vth1 of the first transistor M1. The first electrode of the first transistor M1 can be a source electrode, and the second electrode can be a drain electrode.

[0079] FIG. 9 is a driving timing diagram of a pixel circuit provided in an embodiment of the present application, which can be applied to the pixel circuit shown in FIG. 8. Referring to FIGS. 8 and 9, the specific working process of the pixel circuit provided in the embodiment includes an initialization stage T1, a data writing stage T2, a threshold voltage compensation stage T3, a transition stage T4, and a light-emitting stage T5, taking the case where all the transistors are N-type transistors as an example.

[0080] In the initialization phase T1 and the data writing phase T2 (i.e. the initialization phase T1 and the data writing phase T2 overlap), the first scan signal S1 is at high level, the second scan signal S2 is at high level, the first light emitting control signal EM1 is at high level, and the second light emitting control signal EM2 is at low level. Therefore, the second transistor M2, the third transistor M3, the fourth transistor M4, the eighth transistor M8, the seventh transistor M7 and the ninth transistor M9 are turned on, and the fifth transistor M5 and the sixth transistor M6 are turned off. The data voltage Vdata is transmitted to the first node N1 through the second transistor M2, the first initialization voltage Vini is transmitted to the second gate BG of the first transistor M1 through the third transistor M3, and the voltage difference across the first capacitor C1 is Vini-Vdata. Meanwhile, the first initialization voltage Vini is transmitted to the first electrode of the first transistor M1 through the seventh transistor M7, and the first electrode of the first transistor M1 is initialized. The first power voltage VDD on the first power line L1 is transmitted to the first gate TG of the first transistor M1 through the fourth transistor M4 and the eighth transistor M8, and the voltage of the first gate TG of the first transistor M1 is VDD. The reset current flowing through the first transistor M1 is determined by the voltage difference (VDD-Vini) between the first electrode and the second electrode of the first transistor M1. Here, by increasing the voltage value of the first initialization voltage Vini, the voltage difference between the first power voltage VDD and the first initialization voltage Vini can be reduced, thereby reducing the reset current, avoiding the problem of uneven display of low gray scale caused by power voltage fluctuation, and improving the display crosstalk, brightness unevenness and other phenomena caused by the voltage drop IR-Drop of the first initialization voltage Vini.

[0081] In addition, the second initialization voltage Vref is transmitted to the first electrode of the light emitting diode D1 through the ninth transistor M9, and the potential of the first electrode of the light emitting diode D1 is initialized. In this phase, the initialization of the first transistor M1 and the light emitting diode D1 is realized, and the data writing of the first node N1 is realized.

[0082] In the threshold voltage compensation stage T3, the first scan signal S1 is low, the second scan signal S2 is high, the first light emitting control signal EM1 is low, and the second light emitting control signal EM2 is low. Therefore, the third transistor M3, the eighth transistor M8, and the seventh transistor M7 are turned on, and the second transistor M2, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, and the ninth transistor M9 are turned off. The first power voltage VDD stored in the second capacitor C2 is discharged through the eighth transistor M8, the first transistor M1, and the seventh transistor M7, and the voltage of the first gate TG of the first transistor M1 gradually decreases until the voltage of the first gate TG of the first transistor M1 decreases to Vini+Vth1. At this time, the first transistor M1 is in a critical off state. Since the voltage difference between the second gate BG and the first electrode of the first transistor M1 is 0V, and the first transistor M1 is in a critical off state, the voltage difference between the second gate BG and the first electrode of the first transistor M1 is equal to Vth1, that is, Vth1=0V, thereby achieving threshold voltage compensation of the first transistor M1. The voltage difference between the second gate BG and the first electrode of the first transistor M1 is controlled to be 0V, and the voltage associated with the threshold voltage Vth1 of the first transistor M1 stored in the second capacitor C2 is Vth1=0V, so that when the threshold voltage Vth1 of the first transistor M1 is 0V, the voltage difference between the first gate TG of the first transistor M1 and the first electrode of the first transistor M1 is VDD-Vini.

[0083] In the transition stage T4, the first scan signal S1 jumps from high to low, the third transistor M3, the eighth transistor M8, and the seventh transistor M7 are turned off, and the voltages stored in the first capacitor C1 and the second capacitor C2 remain unchanged.

[0084] In the light emitting stage T5, the first scan signal S1 is low, the second scan signal S2 is low, the first light emitting control signal EM1 is high, and the second light emitting control signal EM2 is high. Therefore, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 are turned on, and the second transistor M2, the third transistor M3, the eighth transistor M8, the seventh transistor M7, and the ninth transistor M9 are turned off. The data voltage Vdata stored in the first capacitor C1 is transmitted to the first electrode of the first transistor M1 through the sixth transistor M6, and the first transistor M1 generates a driving current Id according to the voltages of the second gate BG and the first electrode to drive the light emitting diode D1 to emit light. The driving current Id can be expressed as:

[0085] Since the threshold voltage Vth1 of the first transistor M1 is compensated to be 0V, the above formula can be expressed as:

[0086] wherein μ is the electron mobility of the first transistor M1, and Cox Cox is the channel capacitance per unit area of the first transistor M1, W / L is the width-length ratio of the first transistor M1, Vth1 is the threshold voltage of the first transistor M1, V BG V is the voltage of the second gate BG, V S V is the voltage of the first electrode of the first transistor M1.

[0087] According to the above formula, the driving current Id is related to the data voltage Vdata and the first initialization voltage Vini. Since the threshold voltage Vth of the first transistor M1 is 0V, it does not affect the size of the driving current Id. Moreover, the driving current Id is not affected by the second power supply voltage VSS, so the IR drop of the second power supply VSS can be compensated.

[0088] FIG. 10 is a simulation waveform diagram provided by an embodiment of the present application, which can be a simulation waveform when the pixel circuit shown in FIG. 8 is driven by the driving timing shown in FIG. 9. According to the simulation result, in the case where the threshold voltage Vth1 of the first transistor M1 fluctuates by 0.2V (which can be obtained from the fluctuation of the voltage difference V BGS between the second gate BS and the first electrode of the first transistor M1), only 1.4nA of change in the driving current Id is caused, which leads to a change of 1.2% in the luminance, and the change in luminance is small. Therefore, the technical solution provided by the embodiment can achieve a better compensation effect for the threshold voltage Vth1 of the first transistor M1, and the reset current is small and can be controlled to be in the same order of magnitude as the driving current Id, which does not cause fluctuation of the power supply voltage.

[0089] FIG. 11 is a driving timing diagram of another pixel circuit provided by an embodiment of the present application, which can also be applied to the pixel circuit shown in FIG. 8. Different from the driving timing shown in FIG. 9, in the driving timing shown in FIG. 11, the data writing stage T2 is located in the threshold voltage compensation stage T3. Due to the presence of the sixth transistor M6, the second transistor M2 can be turned on during the high level time of the second scan signal S2. The duration of the on level of the first scan signal S1 can also be the same as that of the second scan signal S2, and neither of them will affect the initialization stage T1 and the threshold voltage compensation stage T3. The specific working process can be referred to the above description of FIG. 9, and will not be described here.

[0090] With reference to FIG. 9 or FIG. 11, in a display period, the waveform of the first light emitting control signal EM1 is the same as the waveform of the second light emitting control signal EM2, and thus the first light emitting control signal EM1 and the second light emitting control signal EM2 can be generated by the same group of gate driving circuits. The starting time of the inactive level of the second light emitting control signal EM2 is earlier than the starting time of the inactive level of the first light emitting control signal EM1, so as to realize the separate initialization of the first electrode of the first transistor M1 and the first electrode of the light emitting diode D1 in the initialization stage T1.

[0091] FIG. 12 is a structural schematic diagram of a display panel provided in an embodiment of the present application. Referring to FIG. 12, the display panel 210 has a display area AA and a non-display area NA surrounding the display area AA. The display panel 210 includes gate driving circuits 220 and pixel circuits 230 arranged in an array. The pixel circuits 230 are located in the display area AA, and the gate driving circuits 220 are located in the non-display area NA. The second light emitting control signal EM2 is generated by an mth gate driving circuit, the first light emitting control signal EM1 is generated by an (m+1)th gate driving circuit, and the mth gate driving circuit and the (m+1)th gate driving circuit are in the same group. m is an integer greater than or equal to 1. For example, the first gate driving circuit G1 generates the second light emitting control signal EM2 of the pixel circuits 230 in the first row, the second gate driving circuit G2 generates the first light emitting control signal EM1 of the pixel circuits 230 in the first row and also generates the second light emitting control signal EM2 of the pixel circuits 230 in the second row. The third gate driving circuit G3 generates the first light emitting control signal EM1 of the pixel circuits 230 in the second row and also generates the second light emitting control signal EM2 of the pixel circuits 230 in the third row. The fourth gate driving circuit G4 generates the first light emitting control signal EM1 of the pixel circuits 230 in the third row and also generates the second light emitting control signal EM2 of the pixel circuits 230 in the fourth row. Similarly, the last gate driving circuit generates the second light emitting control signal EM2 of the pixel circuits 230 in the last row.

[0092] In the embodiment, the first scanning signal S1 is generated by one group of gate driving circuits, the second scanning signal S2 is generated by another group of gate driving circuits, and the first light emitting control signal EM1 and the second light emitting control signal EM2 can be generated by the same group of gate driving circuits. Therefore, the pixel circuit provided in the embodiment only needs three groups of gate driving circuits and four scanning lines to complete the driving, which is conducive to reducing the frame width and improving the PPI.

[0093] Optionally, in a display period, the time difference between the start time of the inactive level of the second light emitting control signal EM2 and the start time of the inactive level of the first light emitting control signal EM1 is the same as the active level pulse width of the first scanning signal S1, so that the initialization of the first electrode of the first transistor M1 and the first electrode of the light emitting diode D1 are both at the initialization stage T1, and the independent initialization of the first electrode of the first transistor M1 and the first electrode of the light emitting diode D1 is ensured.

[0094] FIG. 13 is a structural schematic diagram of another pixel circuit provided by the embodiment of the present application. Different from the pixel circuit shown in FIG. 8, in the structure shown in FIG. 13, the first gate TG and the second gate BG of the first transistor M1 are interchanged, i.e., the first gate TG is a bottom gate and the second gate BG is a top gate. The working process of the pixel circuit shown in FIG. 13 is the same as that of the pixel circuit shown in FIG. 8, and is also applicable to the driving timing shown in FIG. 9 and FIG. 11.

[0095] FIG. 14 is a structural schematic diagram of another pixel circuit provided by the embodiment of the present application. Referring to FIG. 14, the pixel circuit provided by the embodiment includes a driving module 110, a data writing module 120, a threshold voltage compensation module 130 and an auxiliary module 140. The data writing module 120 is connected with the first node N1, and is configured to write a data voltage Vdata to the first node N1. The auxiliary module 140 is connected between the first node N1 and the first end of the driving module 110, and is configured to transmit the data voltage of the first node N1 to the first end of the driving module 110. The threshold voltage compensation module 130 is connected with the first end of the driving module 110, and is configured to transmit a first initialization voltage Vini to the first end of the driving module 110.

[0096] For example, taking the pixel circuit shown in FIG. 14 as an example, the working process of the pixel circuit at least includes an initialization stage, a data writing stage and a light emitting stage. In the initialization stage, the threshold voltage compensation module 130 transmits the first initialization voltage Vini to the first end of the driving module 110, and initializes the potential of the first end of the driving module 110. In the data writing stage, the data voltage Vdata is written to the first node N1 through the data writing module 120. Then, the data voltage Vdata of the first node N1 is transmitted to the first end of the driving module 110 through the auxiliary module 140. The driving module 110 generates a driving current according to the voltages of the control end and the first end, and drives the light emitting module 150 to emit light.

[0097] In the embodiment, by setting the auxiliary module 140 between the first node N1 and the first end of the driving module 110 and controlling the auxiliary module 140 to be in the off state before the light emitting stage, the potential between the first node N1 and the first end of the driving module 110 can be kept in a state of mutual independence before the driving module 110 completes the threshold voltage compensation, so that the voltage of the first node N1 does not affect the voltage of the first end of the driving module 110, and then the turn-on timing of the data writing module 120 can be flexibly set, which is beneficial to simplify the number of scanning signals, reduce the number of groups of scanning circuits, and is beneficial to realize a narrow frame design.

[0098] FIG. 15 is a structural schematic diagram of another pixel circuit provided by the embodiment of the application. Referring to FIG. 15, on the basis of the above embodiment, the threshold voltage compensation module 130 is further connected with the first control end and the second end of the driving module 110, and the threshold voltage compensation module 130 is set to transmit the first initialization voltage Vini to the first end of the driving module 110 in the initialization stage and perform threshold voltage compensation on the driving module 110 in the threshold voltage compensation stage.

[0099] Optionally, the auxiliary module 140 can be set to transmit the data voltage Vdata of the first node N1 to the first end of the driving module 110 after the threshold voltage compensation stage.

[0100] In a display period, the initialization stage is located before the threshold voltage compensation stage, and the data writing stage is located before the light emitting stage. Here, the data writing stage can be located in the initialization stage or the threshold voltage compensation stage.

[0101] Optionally, in the pixel circuit shown in FIG. 15, the structures of the data writing module 120 and the threshold voltage compensation module 130 can refer to the pixel circuit shown in FIG. 7, have the same working process and effect as the pixel circuit shown in FIG. 7, and will not be described here again.

[0102] Optionally, the embodiment of the application further provides a driving method of a pixel circuit, which can be used to drive the pixel circuit provided by any embodiment based on the pixel circuit shown in FIG. 1 in the application. FIG. 16 is a flow chart of a driving method of a pixel circuit provided by the embodiment of the application. Referring to FIG. 16, the driving method comprises the following steps:

[0103] S110, in the initialization stage, controlling the threshold voltage compensation module to transmit the first initialization voltage to the first end of the driving module.

[0104] S120, in the initialization stage and / or the threshold voltage compensation stage, controlling the second initialization unit to transmit the second initialization voltage to the first end of the light emitting module; wherein the first initialization voltage is greater than the second initialization voltage.

[0105] S130, in the light-emitting stage, the driving module is controlled to generate a driving current to drive the light-emitting module to emit light.

[0106] In combination with FIG. 1, the technical scheme provided by the embodiment of the present application uses the first initialization voltage Vini to initialize the first end of the driving module 110 through the threshold voltage compensation module 130, and uses the second initialization voltage Vref to initialize the first end of the light-emitting module 150 through the second initialization unit 180. The first initialization voltage Vini and the second initialization voltage Vref are independent of each other. The first initialization voltage Vini is greater than the second initialization voltage Vref, so that the voltage difference between the second end and the first end of the driving module 110, i.e., the voltage difference between the first power supply voltage VDD and the first initialization voltage Vini, is small, which is conducive to reducing the reset current flowing from the first power supply voltage VDD to the first initialization voltage Vini through the driving module 110, avoiding the problem of large fluctuation of the first power supply voltage VDD caused by large reset current, thereby improving the phenomenon of display unevenness caused by power supply voltage fluctuation, and being conducive to improving the display effect.

[0107] By setting the auxiliary module 140 between the first node N1 and the first end of the driving module 110, and controlling the auxiliary module 140 to be turned on after the threshold voltage compensation stage (for example, the light-emitting stage), i.e., the auxiliary control 140 is in an off state before the light-emitting stage, the potential between the first node N1 and the first end of the driving module 110 is kept in a state of mutual independence before the threshold voltage compensation of the driving module 110 is completed, so that the voltage of the first node N1 does not affect the voltage of the first end of the driving module 110, and the turn-on timing of the data writing module 120 can be flexibly set, which is conducive to simplifying the number of scanning signals and reducing the number of groups of scanning circuits, and is conducive to realizing a narrow frame design. In addition, the data writing stage and the threshold voltage compensation stage do not affect each other, so that the time of threshold voltage compensation is not affected by the row time, i.e., the threshold voltage of the driving module 110 can be completely compensated even at a high refresh frequency, which is conducive to improving the difference in display brightness and improving the uniformity of the display picture.

[0108] Optionally, in combination with FIG. 7, the pixel circuit further includes a data writing module 120 and an auxiliary module 140, the data writing module 120 and the auxiliary module 140 are connected to the first node N1, and the auxiliary module 140 is connected to the first end of the driving module 110. The threshold voltage compensation module 130 is connected to the first control end, the first end and the second end of the driving module 110, respectively.

[0109] The driving method of the pixel circuit further includes:

[0110] In the threshold voltage compensation stage, the threshold voltage compensation module 130 is controlled to discharge the first control terminal of the driving module 110, so as to compensate the threshold voltage of the driving module 110.

[0111] In the data writing stage, the data writing module 120 is controlled to write the data voltage Vdata to the first node N1.

[0112] Since the auxiliary module 140 is in the off state before the light emitting stage, the first node N1 and the first terminal of the driving module 110 are not affected and maintain relatively independent potentials, so that the data writing stage can be flexibly set, even if it overlaps with the threshold voltage compensation stage, the data writing stage and the threshold voltage compensation stage do not affect each other.

[0113] Optionally, with reference to FIG. 7, the threshold voltage compensation module 130 includes a first initialization unit 132, a threshold voltage compensation unit 131 and a second storage unit 133, and the second storage unit 133 is connected between the first control terminal and the first terminal of the driving module 110. The data writing module 120 includes a first voltage writing unit 121, a second voltage writing unit 122 and a first storage unit 123, and the first storage unit 123 is connected between the second control terminal of the driving module 110 and the first node N1, and the first storage unit 123 is configured to store the data voltage Vdata of the first node N1.

[0114] The driving method of the pixel circuit includes:

[0115] In the initialization stage, the first initialization unit 132 is controlled to transmit the first initialization voltage Vini to the first terminal of the driving module 110.

[0116] In the data writing stage, the first voltage writing unit 121 is controlled to transmit the data voltage Vdata to the first node N1, and the second voltage writing unit 122 is controlled to transmit the first initialization voltage Vini to the second control terminal of the driving module 110, so that the first storage unit 123 stores the data voltage of the first node N1.

[0117] In the threshold voltage compensation stage, the threshold voltage compensation unit 131 is controlled to discharge the voltage of the first control terminal of the driving module 110, so that the second storage unit 133 stores the voltage associated with the threshold voltage of the driving module 110, and the threshold voltage of the driving module 110 is compensated.

[0118] In the embodiment, in a display period, the initialization stage is located before the threshold voltage compensation stage, and the data writing stage is located before the light emitting stage. Alternatively, the data writing stage at least partially overlaps with the initialization stage, or the data writing stage at least partially overlaps with or is located in the threshold voltage compensation stage.

[0119] When the data writing stage overlaps with the initialization stage, in the embodiment, the first scan line, the second scan line, the first light emitting control signal line and the second light emitting control signal line are configured to transmit signals so as to:

[0120] In the initialization stage and the data writing stage, the first voltage writing unit 121, the second voltage writing unit 122, the first initialization unit 132, the second initialization unit 180, the first light emitting control module 160 and the threshold voltage compensation unit 131 are turned on.

[0121] In the threshold voltage compensation stage, the first initialization unit 132, the second voltage writing unit 122 and the threshold voltage compensation unit 131 are turned on.

[0122] In the light emitting stage, the auxiliary module 140, the first light emitting control module 160 and the second light emitting control module 170 are turned on.

[0123] Alternatively, when the data writing stage at least partially overlaps with or is located in the threshold voltage compensation stage:

[0124] In the initialization stage, the first initialization unit 132, the second voltage writing unit 122, the first light emitting control module 160 and the threshold voltage compensation unit 131 are turned on.

[0125] In the threshold voltage compensation stage and the data writing stage, the first voltage writing unit 121, the second initialization unit 180, the first initialization unit 132, the second voltage writing unit 122 and the threshold voltage compensation unit 131 are turned on.

[0126] In the light emitting stage, the auxiliary module 140, the first light emitting control module 160 and the second light emitting control module 170 are turned on.

[0127] The specific working principle of the driving method of the pixel circuit provided in the embodiment can refer to the related description of the pixel circuit in the above-mentioned multiple embodiments, and has the same effect, which will not be described here again.

[0128] Alternatively, the embodiment of the present application also provides a driving method of a pixel circuit, which can be applied to the pixel circuit corresponding to the multiple embodiments based on the pixel circuit shown in FIG. 14; FIG. 17 is a flow chart of another driving method of a pixel circuit provided in the embodiment of the present application, referring to FIG. 17, the driving method of the pixel circuit includes:

[0129] S210, in the initialization phase, the threshold voltage compensation module controls the first initialization voltage to be transmitted to the first end of the driving module.

[0130] S220, in the data writing phase, the data writing module is controlled to write the data voltage to the first node.

[0131] S230, after stopping transmitting the first initialization voltage to the first end of the driving module, the auxiliary module is controlled to transmit the data voltage of the first node to the first end of the driving module.

[0132] The time when the first initialization voltage is stopped being transmitted to the first end of the driving module can be the starting time of the light emitting phase.

[0133] The technical solution provided by the embodiment can keep the potential between the first node N1 and the first end of the driving module 110 independent of each other before the threshold voltage compensation of the driving module 110 is completed, so that the voltage of the first node N1 does not affect the voltage of the first end of the driving module 110, and the on time of the data writing module 120 can be flexibly set, which is beneficial to simplify the number of scanning signals, reduce the number of groups of scanning circuits, and is beneficial to narrow the frame design. Optionally, the application embodiment also provides a display panel comprising the pixel circuit provided by the above embodiment, so the display panel also has the effects described in any of the above embodiments.

[0134] FIG. 18 is a structural schematic diagram of a display panel provided by an embodiment of the application. Referring to FIG. 18, in the embodiment, the display panel 300 can be applied to a mobile phone, and can also be applied to any electronic product with a display function, including but not limited to the following categories: television, notebook computer, desktop display, tablet computer, digital camera, smart bracelet, smart glasses, vehicle-mounted display, medical equipment, industrial control equipment, touch interaction terminal, etc. The application embodiment does not make special limitations on this.

[0135] FIG. 19 is a structural schematic diagram of another display panel provided by an embodiment of the application. As shown in the figure, the display panel comprises a scanning circuit and a pixel circuit as described in any of the above embodiments.

[0136] It should be understood that the above-mentioned various forms of flow can be reordered, added or deleted. For example, the steps described in the application can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions of the application can be achieved, which are not limited herein.

Claims

1. A pixel circuit, comprising: The module consists of a driver module, a threshold voltage compensation module, a second initialization unit, and a light-emitting module. The threshold voltage compensation module is connected to the first end of the drive module, and the threshold voltage compensation module is configured to transmit a first initialization voltage to the first end of the drive module; The second initialization unit is connected to the first end of the light-emitting module, and the second initialization unit is configured to transmit a second initialization voltage to the first end of the light-emitting module; The driving module is configured to generate a driving current to drive the light-emitting module to emit light. Wherein, the first initialization voltage is greater than the second initialization voltage.

2. The pixel circuit according to claim 1 further includes a data writing module, wherein the data writing module is configured to transmit data voltage to the first end of the driving module via an output terminal during the data writing phase; The threshold voltage compensation module is also connected to the first control terminal and the second terminal of the drive module, and is configured to transmit the first initialization voltage to the first terminal of the drive module during the initialization phase, and to perform threshold voltage compensation on the drive module during the threshold voltage compensation phase. The driving module and the light-emitting module are connected between the first power line and the second power line. The driving module is configured to drive the light-emitting module to emit light during the light-emitting phase.

3. The pixel circuit according to claim 2, wherein, The data writing module includes a first voltage writing unit, a second voltage writing unit, and a first storage unit; The first end of the first voltage writing unit is connected to the data line, the second end of the first voltage writing unit serves as the output end of the data writing module, and the control end of the first voltage writing unit is connected to the first scan line and is configured to conduct in response to the first scan signal on the first scan line, so as to transmit the data voltage to the first end of the driving module during the data writing stage. The second voltage writing unit is connected between the first initialization signal line and the second control terminal of the driving module. The control terminal of the second voltage writing unit is connected to the second scan line and is configured to conduct in response to the second scan signal on the second scan line, so as to transmit the first initialization voltage on the first initialization signal line to the second control terminal of the driving module during the initialization phase and the threshold voltage compensation phase. The first storage unit is connected between the second control terminal of the driving module and the second terminal of the first voltage writing unit, and the first storage unit is configured to store the data voltage output by the second terminal of the first voltage writing unit; The control terminal of the threshold voltage compensation module is connected to the second scan line.

4. The pixel circuit according to claim 3, wherein, The driving module includes a first transistor, which is a dual-gate transistor; The first voltage writing unit includes a second transistor, the second voltage writing unit includes a third transistor, and the first storage unit includes a first capacitor; The gate of the second transistor is connected to the first scan line, the first terminal of the second transistor is connected to the data line, the second terminal of the second transistor serves as the output terminal of the data writing module, the gate of the third transistor is connected to the second scan line, the first terminal of the third transistor is connected to the first initialization signal line, the second terminal of the third transistor is connected to the second gate of the first transistor, and the first gate of the first transistor is connected to the threshold voltage compensation module. The first terminal of the first capacitor is connected to the second terminal of the second transistor, and the second terminal of the first capacitor is connected to the second gate of the first transistor. The first gate of the first transistor is a top gate, and the second gate of the first transistor is a bottom gate; or, the first gate of the first transistor is a bottom gate, and the second gate of the first transistor is a top gate.

5. The pixel circuit according to claim 2 further includes an auxiliary module, wherein the output terminal of the data writing module is connected to the first node, the auxiliary module is connected between the first node and the first terminal of the driving module, and the auxiliary module is configured to transmit the data voltage of the first node to the first terminal of the driving module after the threshold voltage compensation stage. The data writing phase is at least partially overlapping with the initialization phase, or the data writing phase is at least partially located within or overlaps with the threshold voltage compensation phase.

6. The pixel circuit according to claim 5 further includes a first light-emitting control module and a second light-emitting control module; The first light-emitting control module is connected between the first power line and the second end of the driving module. The control end of the first light-emitting control module is connected to the first light-emitting control signal line. The second light-emitting control module is connected between the first end of the driving module and the first end of the light-emitting module. The second end of the light-emitting module is connected to the second power line. The control end of the second light-emitting module is connected to the second light-emitting control signal line. The first light-emitting control module is configured to turn on in response to a first light-emitting control signal on the first light-emitting control signal line during the initialization phase and the light-emitting phase, and to turn off during the threshold voltage compensation phase; the second light-emitting module is configured to turn on in response to a second light-emitting control signal on the second light-emitting control signal line during the light-emitting phase; The control terminal of the auxiliary module is connected to the second light-emitting control signal line; The first light-emitting control module includes a fourth transistor, the second light-emitting control module includes a fifth transistor, the auxiliary module includes a sixth transistor, the light-emitting module includes a light-emitting diode, the gate of the fourth transistor is connected to the first light-emitting control signal line, the first electrode of the fourth transistor is connected to the first power supply line, the second electrode of the fourth transistor is connected to the second terminal of the driving module, the gates of the fifth transistor and the sixth transistor are both connected to the second light-emitting control signal line, the first electrode of the fifth transistor is connected to the first terminal of the driving module, the second electrode of the fifth transistor is connected to the first electrode of the light-emitting diode, the second electrode of the light-emitting diode is connected to the second power supply line, the first electrode of the sixth transistor is connected to the first node, and the second electrode of the sixth transistor is connected to the first terminal of the driving module.

7. The pixel circuit according to claim 1, wherein, The threshold voltage compensation module includes a first initialization unit; The first initialization unit is connected between the first initialization signal line and the first end of the driving module. The control end of the first initialization unit is connected to the second scan line. The first initialization unit is configured to respond to the second scan signal on the second scan line during the initialization phase and transmit the first initialization voltage on the first initialization signal line to the first end of the driving module. The first initialization unit includes a seventh transistor, the gate of which is connected to the second scan line, the first terminal of which is connected to the first initialization signal line, and the second terminal of which is connected to the first terminal of the driving module.

8. The pixel circuit according to claim 1, wherein, The threshold voltage compensation module further includes a threshold voltage compensation unit and a second storage unit. The second storage unit is connected between the first control terminal and the first terminal of the drive module; The threshold voltage compensation unit is connected between the first control terminal and the second terminal of the drive module. The control terminal of the threshold voltage compensation unit is connected to the second scan line. The threshold voltage compensation unit is configured to turn on in response to the second scan signal, so as to transmit the voltage on the first power line to the first control terminal of the drive module during the initialization phase, and to control the second storage unit to store the voltage associated with the threshold voltage of the drive module during the threshold voltage compensation phase. The threshold voltage compensation unit includes an eighth transistor, the second storage unit includes a second capacitor, the first terminal of the eighth transistor is connected to the second terminal of the driving module, the second terminal of the eighth transistor is connected to the first control terminal of the driving module, the gate of the eighth transistor is connected to the second scan line, the first terminal of the second capacitor is connected to the first control terminal of the driving module, and the second terminal of the second capacitor is connected to the first terminal of the driving module.

9. The pixel circuit according to claim 1, wherein, The control terminal of the second initialization unit is connected to the third scan line, the first terminal of the second initialization unit is connected to the second initialization signal line, the second terminal of the second initialization unit is connected to the first terminal of the light-emitting module, and the second initialization unit is configured to transmit the second initialization voltage on the second initialization signal line to the first terminal of the light-emitting module in response to the third scan signal on the third scan line. The second initialization unit includes a ninth transistor, the gate of which is connected to the third scan line, the first terminal of which is connected to the second initialization signal line, and the second terminal of which is connected to the first terminal of the light-emitting module.

10. The pixel circuit according to claim 3, wherein, The control terminal of the second initialization unit is connected to the first scan line, the first terminal of the second initialization unit is connected to the second initialization signal line, the second terminal of the second initialization unit is connected to the first terminal of the light-emitting module, and the second initialization unit is configured to transmit the second initialization voltage on the second initialization signal line to the first terminal of the light-emitting module in response to the first scan signal on the first scan line. The second initialization unit includes a ninth transistor, the gate of which is connected to the first scan line, the first terminal of which is connected to the second initialization signal line, and the second terminal of which is connected to the first terminal of the light-emitting module.

11. A pixel circuit, comprising: The module consists of a driver module, a data writing module, a threshold voltage compensation module, and an auxiliary module. The data writing module is connected to the first node, and the data writing module is configured to write data voltage to the first node. The auxiliary module is connected between the first node and the first end of the driving module, and the auxiliary module is configured to transmit the data voltage of the first node to the first end of the driving module. The threshold voltage compensation module is connected to the first end of the driving module, and the threshold voltage compensation module is configured to transmit a first initialization voltage to the first end of the driving module.

12. The pixel circuit according to claim 11, wherein, The data writing module is configured to write data voltage to the first node during the data writing phase; The auxiliary module is configured to transmit the data voltage of the first node to the first end of the driving module after the threshold voltage compensation stage; The threshold voltage compensation module is configured to transmit a first initialization voltage to the first terminal of the drive module during the initialization phase, or the threshold voltage compensation module is also connected to the first control terminal and the second terminal of the drive module to perform threshold voltage compensation on the drive module during the threshold voltage compensation phase.

13. The pixel circuit according to claim 12 further includes a light-emitting module, wherein the driving module and the light-emitting module are connected between the first power line and the second power line, and the driving module is configured to drive the light-emitting module to emit light during the light-emitting phase; Within a display cycle, the data writing phase precedes the light emission phase.

14. The pixel circuit according to claim 11, wherein, The data writing module includes a first voltage writing unit, a second voltage writing unit, and a first storage unit; The first voltage writing unit is connected between the data line and the first node. The control terminal of the first voltage writing unit is connected to the first scan line and is configured to be turned on in response to the first scan signal on the first scan line, so as to write the data voltage to the first node during the data writing stage. The second voltage writing unit is connected between the first initialization signal line and the second control terminal of the driving module. The control terminal of the second voltage writing unit is connected to the second scan line and is configured to conduct in response to the second scan signal on the second scan line, so as to transmit the first initialization voltage on the first initialization signal line to the second control terminal of the driving module during the initialization phase and the threshold voltage compensation phase. The first storage unit is connected between the second control terminal of the drive module and the first node, and the first storage unit is configured to store the data voltage of the first node.

15. The pixel circuit according to claim 14, wherein, The driving module includes a first transistor, which is a dual-gate transistor; The first voltage writing unit includes a second transistor, the second voltage writing unit includes a third transistor, and the first storage unit includes a first capacitor; the gate of the second transistor is connected to the first scan line, the first electrode of the second transistor is connected to the data line, the second electrode of the second transistor is connected to the first node, the gate of the third transistor is connected to the second scan line, the first electrode of the third transistor is connected to the first initialization signal line, the second electrode of the third transistor is connected to the second gate of the first transistor, and the first gate of the first transistor is connected to the threshold voltage compensation module. The first terminal of the first capacitor is connected to the first node, and the second terminal of the first capacitor is connected to the second gate of the first transistor. The first gate of the first transistor is a top gate, and the second gate of the first transistor is a bottom gate; or, the first gate of the first transistor is a bottom gate, and the second gate of the first transistor is a top gate.

16. The pixel circuit according to claim 11, wherein, The threshold voltage compensation module includes a first initialization unit; The first initialization unit is connected between the first initialization signal line and the first end of the driving module. The control end of the first initialization unit is connected to the second scan line. The first initialization unit is configured to respond to the second scan signal on the second scan line during the initialization phase and transmit the first initialization voltage on the first initialization signal line to the first end of the driving module.

17. The pixel circuit according to claim 11, wherein, The threshold voltage compensation module further includes a threshold voltage compensation unit and a second storage unit. The second storage unit is connected between the first control terminal and the first terminal of the drive module; The threshold voltage compensation unit is connected between the first control terminal and the second terminal of the drive module. The control terminal of the threshold voltage compensation unit is connected to the second scan line. The threshold voltage compensation unit is configured to turn on in response to the second scan signal, so as to transmit the voltage on the first power line to the first control terminal of the drive module during the initialization phase, and to control the second storage unit to store the voltage associated with the threshold voltage of the drive module during the threshold voltage compensation phase.

18. The pixel circuit according to claim 14, further comprising a first light-emitting control module and a second light-emitting control module; The first light-emitting control module is connected between the first power line and the second end of the driving module. The control end of the first light-emitting control module is connected to the first light-emitting control signal line. The second light-emitting control module is connected between the first end of the driving module and the first end of the light-emitting module. The second end of the light-emitting module is connected to the second power line. The control end of the second light-emitting module is connected to the second light-emitting control signal line. The first light-emitting control module is configured to turn on during the initialization and light-emitting phases in response to a first light-emitting control signal on the first light-emitting control signal line, and to turn off during the threshold voltage compensation phase; the second light-emitting module is configured to turn on during the light-emitting phase in response to a second light-emitting control signal on the second light-emitting control signal line. Alternatively, the pixel circuit may further include a second initialization unit, wherein the control terminal of the second initialization unit is connected to the third scan line, the first terminal of the second initialization unit is connected to the second initialization signal line, the second terminal of the second initialization unit is connected to the first terminal of the light-emitting module, and the second initialization unit is configured to transmit the second initialization voltage on the second initialization signal line to the first terminal of the light-emitting module in response to the third scan signal on the third scan line. The first initialization voltage is greater than the second initialization voltage.

19. The pixel circuit according to claim 14 further includes a second initialization unit, wherein the control terminal of the second initialization unit is connected to the first scan line, the first terminal of the second initialization unit is connected to a second initialization signal line, the second terminal of the second initialization unit is connected to a first terminal of the light-emitting module, and the second initialization unit is configured to transmit a second initialization voltage on the second initialization signal line to the first terminal of the light-emitting module in response to a first scan signal on the first scan line. The first initialization voltage is greater than the second initialization voltage.

20. A display panel comprising the pixel circuitry of any one of claims 1-19.

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