Display panel and manufacturing method therefor, and display device

Abstract

The present disclosure provides a display panel and a manufacturing method therefor, and a display device. The display panel comprises: a substrate, a driving circuit layer, a pixel defining layer, an isolation layer, and a transparent conductive layer that are successively stacked. The driving circuit layer is located on one side of the substrate. The driving circuit layer comprises a common voltage signal line. The pixel defining layer is located on the side of the driving circuit layer facing away from the substrate. The isolation layer is located on the side of the pixel defining layer facing away from the substrate. The isolation layer is provided with isolation layer openings having one-to-one correspondence to pixel openings of the pixel defining layer. The transparent conductive layer is located on the side of the driving circuit layer facing away from the substrate. The transparent conductive layer comprises transparent electrodes that are located in the isolation layer openings and are isolated from each other by the isolation layer. The isolation layer comprises a first conductive material layer. The transparent electrodes are electrically connected to the first conductive material layer, and the first conductive material layer is electrically connected to the common voltage signal line in the driving circuit layer by means of via holes passing through the pixel defining layer. The circuit structure is simplified, and the bezel size of a display panel is reduced.

Description

Display panel, manufacturing method thereof and display device

[0001] Cross-reference to related applications

[0002] The present application claims priority to the Chinese patent application No. 202410870422.8, filed on June 29, 2024, and entitled "Display panel, manufacturing method thereof and display device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of display, and in particular, to a display panel, a manufacturing method thereof and a display device. BACKGROUND

[0004] An organic light emitting diode (OLED) display device adopts an OLED device as a light emitting element, and can realize active light emitting display. Compared with a liquid crystal display (LCD) device, the OLED display device does not need to use a backlight module, can greatly simplify the device structure, reduce the device size, and has the characteristics of low power consumption, high contrast, fast response speed, etc. At present, the OLED display device is rapidly applied in the field of consumer electronics, etc.

[0005] At present, the line routing of the frame area of the OLED display panel is complex, the routing design is difficult, and the frame size is difficult to further reduce. SUMMARY

[0006] The present disclosure provides a display panel, a manufacturing method thereof and a display device, to reduce the difficulty of frame routing design of the display panel and reduce the frame size.

[0007] In a first aspect, the present disclosure provides a display panel, comprising:

[0008] a substrate;

[0009] a drive circuit layer located on one side of the substrate, the drive circuit layer comprising a common voltage signal line;

[0010] a pixel definition layer located on a side of the drive circuit layer away from the substrate;

[0011] an isolation layer located on a side of the pixel definition layer away from the substrate, the isolation layer being provided with isolation layer openings corresponding one-to-one to pixel openings of the pixel definition layer;

[0012] a transparent conductive layer located on a side of the drive circuit layer away from the substrate, the transparent conductive layer comprising transparent electrodes located in the isolation layer openings and separated from each other by the isolation layer;

[0013] The isolation layer comprises a first conductive material layer; the transparent electrode is electrically connected with the first conductive material layer, and the first conductive material layer is electrically connected with the common voltage signal line in the driving circuit layer through a via hole penetrating through the pixel definition layer.

[0014] The display panel provided by the present disclosure comprises a display area and a non-display area; the pixel opening is located in the display area;

[0015] The driving circuit layer further comprises a gate drive circuit; the gate drive circuit is located in the non-display area;

[0016] The common voltage signal line is located on the side of the gate drive circuit close to the display area.

[0017] In the display panel provided by the present disclosure, the common voltage signal line is located between the gate drive circuit and the pixel opening.

[0018] In the display panel provided by the present disclosure, the isolation layer is located in the display area.

[0019] In the display panel provided by the present disclosure, in the direction away from the display area, the ratio of the width of the gate drive circuit to the width of the non-display area ranges from 0.37 to 0.78.

[0020] In the display panel provided by the present disclosure, the gate drive circuit layer comprises a plurality of conductive film layers; the common voltage signal line is located in the same layer as at least one of the plurality of conductive film layers.

[0021] In the display panel provided by the present disclosure, the display panel further comprises an isolation dam; the isolation dam is located on the side of the gate drive circuit away from the display area;

[0022] The distance between the orthographic projection of the isolation dam on the substrate and the orthographic projection of the gate drive circuit on the substrate ranges from 250 μm to 350 μm.

[0023] In the display panel provided by the present disclosure, the orthographic projection of the film layer where the common signal line is located on the substrate is located outside the orthographic projection of the area between the gate drive circuit and the isolation dam on the substrate;

[0024] In the area between the gate drive circuit and the isolation dam, the film layer located on the side of the common voltage signal line facing the substrate directly contacts the film layer located on the side of the common voltage signal line away from the substrate.

[0025] In the display panel provided by the present disclosure, the display panel further comprises a driving electrode layer; the driving electrode layer is located between the driving circuit layer and the pixel definition layer; the driving electrode layer comprises a driving electrode opposite to the transparent electrode;

[0026] The orthographic projection of the driving electrode on the substrate is located outside the orthographic projection of the area between the gate drive circuit and the isolation dam on the substrate;

[0027] In the region between the gate driving circuit and the isolation dam, the film layer on the side of the driving electrode layer facing the substrate is in direct contact with the film layer on the side of the driving electrode layer facing away from the substrate.

[0028] The display panel provided by the present disclosure includes a common voltage signal line and an isolation layer.

[0029] The display panel provided by the present disclosure includes a common voltage signal line and an isolation layer.

[0030] The display panel provided by the present disclosure includes a common voltage signal line and an isolation layer.

[0031] The transparent electrode is located on the side of the light-emitting material layer facing away from the substrate, and is a cathode or an anode.

[0032] The display panel provided by the present disclosure includes a common voltage signal line and an isolation layer.

[0033] The transparent electrode is in contact with the support portion.

[0034] The display panel provided by the present disclosure includes a common voltage signal line and an isolation layer.

[0035] The display panel provided by the present disclosure includes a common voltage signal line and an isolation layer.

[0036] The top portion further includes a third conductive material layer.

[0037] The display panel provided by the present disclosure includes a common voltage signal line and an isolation layer.

[0038] The first inorganic encapsulation layer is located on the side of the transparent conductive layer facing away from the substrate, and includes an encapsulation unit.

[0039] The second inorganic encapsulation layer is located on the side of the first inorganic encapsulation layer facing away from the substrate.

[0040] The organic encapsulation layer is located between the first inorganic encapsulation layer and the second inorganic encapsulation layer.

[0041] In a second aspect, the present disclosure provides a display device comprising the display panel of any one of the above.

[0042] In a third aspect, the present disclosure provides a method for manufacturing a display panel, comprising:

[0043] A front substrate is provided, the front substrate comprising a driving circuit layer and a pixel defining layer which are sequentially stacked on a substrate, the driving circuit layer comprising a common voltage signal line, and the pixel defining layer comprising a plurality of pixel openings;

[0044] An isolation layer is formed on a side of the pixel defining layer away from the substrate, the isolation layer comprising a first conductive material layer and comprising a plurality of isolation layer openings corresponding to the pixel openings respectively, and the first conductive material layer being electrically connected to the common voltage signal line through a via hole penetrating the pixel defining layer;

[0045] A transparent conductive layer is formed on a side of the isolation layer away from the substrate, the transparent conductive layer comprising transparent electrodes located in the isolation layer openings and separated from each other by the isolation layer, and the transparent electrodes being in contact with the first conductive material layer.

[0046] In the method provided by the present disclosure, the transparent conductive layer is formed on a side of the isolation layer away from the substrate, and specifically comprising:

[0047] A transparent conductive material layer is formed on a side of the isolation layer away from the substrate by a plating process, the transparent conductive material layer comprising a first part located in the isolation layer openings and a second part located above a surface of the side of the isolation layer away from the substrate, and the first part being in contact with the first conductive material layer;

[0048] The second part is removed by an etching process, and the first part is retained, and the first part forms the transparent electrodes.

[0049] In the method provided by the present disclosure, the display panel comprises a plurality of types of light emitting units;

[0050] In the method provided by the present disclosure, the transparent conductive layer is formed on a side of the isolation layer away from the substrate, and specifically comprising:

[0051] For each type of light emitting unit, the light emitting unit and the transparent electrode located on a side of the light emitting unit away from the substrate are formed together by a photolithography process;

[0052] For each type of light emitting unit, the light emitting unit and the transparent electrode located on a side of the light emitting unit away from the substrate are formed together by a photolithography process, and specifically comprising:

[0053] A light emitting material layer of a target color is formed on a side of the isolation layer away from the substrate;

[0054] A transparent conductive material layer is formed on a side of the light emitting material layer of the target color away from the substrate;

[0055] forming an encapsulation material layer on a side of the transparent conductive material layer away from the substrate;

[0056] forming an encapsulation material layer on a side of the transparent conductive material layer away from the substrate;

[0057] The present disclosure has the following beneficial effects:

[0058] The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes a substrate, a drive circuit layer, a pixel definition layer, an isolation layer, and a transparent conductive layer, which are sequentially stacked. The drive circuit layer is located on one side of the substrate. The drive circuit layer includes a common voltage signal line. The pixel definition layer is located on a side of the drive circuit layer away from the substrate. The isolation layer is located on a side of the pixel definition layer away from the substrate. The isolation layer is provided with isolation layer openings corresponding to the pixel openings of the pixel definition layer one by one. The transparent conductive layer is located on a side of the drive circuit layer away from the substrate. The transparent conductive layer includes transparent electrodes located in the isolation layer openings and separated from each other by the isolation layer. The isolation layer includes a first conductive material layer. The transparent electrodes are electrically connected to the first conductive material layer, and the first conductive material layer is electrically connected to the common voltage signal line in the drive circuit layer through a via hole penetrating the pixel definition layer. The first conductive material layer of the isolation layer is electrically connected to the common voltage signal line through a via hole penetrating the pixel definition layer, and the transparent electrodes located in the isolation layer openings are conductive to each other through the first conductive material layer, thereby realizing the electrical connection between the transparent electrodes and the common voltage line, which is conducive to simplifying the circuit structure and reducing the frame size of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0059] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings needed in the embodiments of the present disclosure will be briefly introduced as follows. Obviously, the drawings introduced below are only some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0060] FIG. 1 is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure;

[0061] FIG. 2A is a schematic diagram of a cross-sectional structure of a display panel according to the related art;

[0062] FIG. 2B is a schematic diagram of a top view structure of a display panel according to the related art;

[0063] FIG. 3A is a schematic diagram of a manufacturing process of a display panel according to an embodiment of the present disclosure;

[0064] FIG. 3B is a schematic diagram of a manufacturing process of a transparent electrode of a display panel according to an embodiment of the present disclosure;

[0065] FIG. 4A is a schematic diagram of a manufacturing process of a transparent electrode of a display panel according to an embodiment of the present disclosure;

[0066] FIG. 4B is a schematic diagram of a manufacturing process of a transparent electrode of a display panel according to an embodiment of the present disclosure;

[0067] FIG. 5 is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure;

[0068] FIG. 6A is a schematic diagram of a top view of a display panel according to an embodiment of the present disclosure;

[0069] FIG. 6B is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure;

[0070] FIG. 7 is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure;

[0071] FIG. 8 is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure;

[0072] FIG. 9A is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure;

[0073] FIG. 9B is a schematic diagram of a manufacturing process of an isolation layer according to an embodiment of the present disclosure;

[0074] FIG. 10A is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure;

[0075] FIG. 10B is a schematic diagram of a manufacturing process of an isolation layer according to an embodiment of the present disclosure;

[0076] FIG. 11 is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure;

[0077] FIG. 12 is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure;

[0078] FIG. 13 is a flowchart of a manufacturing method of a display panel according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0079] In order to make the above objectives, characteristics and advantages of the present disclosure more apparent, comprehensible and easier to understand, the present disclosure will be further described below with reference to the accompanying drawings and embodiments. However, the example embodiments can be implemented in various forms, and should not be understood as being limited to the embodiments set forth herein; on the contrary, these embodiments are provided so as to make the present disclosure more comprehensive and complete, and to fully convey the ideas of the example embodiments to those skilled in the art. The same reference signs in the drawings represent the same or similar structures, and thus repeated descriptions thereof will be omitted. The words expressing position and direction described in the present disclosure are described with reference to the drawings, but can be changed as needed, and the changes made are included in the scope of protection of the present disclosure. The drawings of the present disclosure are only used to illustrate the relative positional relationship and do not represent the true proportions.

[0080] An organic light emitting diode (OLED) display device adopts an OLED device as a light emitting element, and can realize active light emitting display. Compared with a liquid crystal display (LCD) device, the OLED display device does not need to use a backlight module, and can greatly simplify the device structure, reduce the device size, and also has the characteristics of low power consumption, high contrast, fast response speed, etc. At present, the OLED display device is rapidly applied in the field of consumer electronics, etc.

[0081] At present, the line routing of the frame area of the OLED display panel is complex, the routing design is difficult, and the frame size is difficult to further reduce.

[0082] Therefore, in a first aspect, the embodiments of the present disclosure provide a display panel to solve the above problems.

[0083] FIG. 1 is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure.

[0084] In the embodiments of the present disclosure, as shown in FIG. 1, the display panel includes a substrate 100, a driving line layer 200, a pixel definition layer 300, an isolation layer 400, and a transparent conductive layer 500.

[0085] The substrate 100 is located at the bottom of the display panel and is used to carry the film layers (such as the driving circuit layer 200 and the like) located thereon. The shape of the substrate 100 is adapted to the shape of the display panel, and can be set as a square, a rectangle and the like, and when applied to a special-shaped display, the shape of the substrate 100 can also be set as a circle or other shapes, which are not limited herein. The size of the substrate 100 is adapted to the size of the display panel, which is not limited herein. In some embodiments, the substrate 100 can be made of a flexible material such as polyimide (PI) and the like to make a flexible display panel. In some embodiments, the substrate 100 can be made of a rigid material such as glass and the like to make a rigid display panel, which is not limited herein. In some embodiments, the substrate 100 can be made of a transparent material, for example, in a bottom-emitting OLED display panel, light is emitted from the bottom of the display panel, and the substrate 100 needs to be made of a good light-transmitting material to improve the light transmittance. In some embodiments, the substrate 100 can also be made of a non-transparent material, for example, in a top-emitting OLED display panel, the substrate 100 is made of a non-transparent material, which can avoid the influence of ambient light incident from the bottom of the display panel on the contrast ratio of the display panel, which is not limited herein.

[0086] The driving circuit layer 200 is located on one side of the substrate 100. The driving circuit layer 200 usually includes a plurality of conductive film layers arranged in a stack and an insulating layer arranged between two adjacent conductive film layers. The conductive film layers are used to arrange signal traces to form driving circuits, such as pixel driving circuits located in the display area of the display panel and gate driving (GOA) circuits located in the non-display area of the display panel, which are not limited herein.

[0087] The pixel defining layer 300 is located on the side of the driving circuit layer 200 away from the substrate 100. The pixel defining layer 300 is provided with a plurality of pixel openings P, and the pixel openings P are used to define the positions of the sub-pixel units of the display panel, one pixel opening P corresponding to one sub-pixel unit. The pixel defining layer 300 can be made of a photosensitive resin material, such as photosensitive polyimide and the like, so as to facilitate the pixel defining layer 300 to be provided with the pixel openings P, which is not limited herein.

[0088] The isolation layer 400 is located on the side of the pixel defining layer 300 away from the substrate 100. The isolation layer 400 is provided with isolation layer openings S corresponding to the pixel openings P, and adjacent isolation layer openings S are isolated from each other by the isolation layer 400. In a specific implementation, as shown in FIG. 1, the orthographic projection of the pixel opening P1 on the substrate 100 can be located within the orthographic projection of the corresponding isolation layer opening S on the substrate 100, that is, the opening size of the isolation layer opening S is greater than the opening size of the pixel opening P, thereby facilitating improvement of the aperture ratio of the display panel. The isolation layer 400 includes a first conductive material layer 401. The conductive material used in the first conductive material layer 401 has good electrical conductivity, for example, the material of the first conductive material layer 401 can be aluminum or the like, which is not limited herein.

[0089] The transparent conductive layer 500 is located on the side of the driving circuit layer 200 away from the substrate 100. The transparent conductive layer 500 includes transparent electrodes 501 located in the isolation layer openings S and separated from each other by the isolation layer 400. Specifically, the transparent conductive layer 500 can include a plurality of transparent electrodes 501, one transparent electrode 501 corresponding to one isolation layer opening S, and the transparent electrode 501 being located in the corresponding isolation layer opening S.

[0090] In particular, in the embodiments of the present disclosure, the transparent electrode 501 is electrically connected to the first conductive material layer 401. For example, the transparent electrode 501 can be in direct contact with the first conductive material layer 401, so that the transparent electrodes 501 located in different isolation layer openings S are conductive to each other through the first conductive material layer 401. The driving circuit layer 200 includes a common voltage signal line 201, and the first conductive material layer 401 is electrically connected to the common voltage signal line 201 through a via hole penetrating the pixel defining layer 300, so that each transparent electrode 501 is electrically connected to the common voltage signal line 201 through the first conductive material layer 401.

[0091] As shown in FIG. 1, in the embodiments of the present disclosure, the display panel further includes a driving electrode layer 600 and a light emitting material layer 700.

[0092] The driving electrode layer 600 is located between the driving circuit layer 200 and the pixel defining layer 300. The driving electrode layer 600 includes a plurality of driving electrodes 601. One driving electrode 601 corresponds to one pixel opening P, and the orthographic projection of the pixel opening P on the substrate 100 at least partially overlaps with the orthographic projection of the corresponding driving electrode 601 on the substrate 100. For example, the orthographic projection of the pixel opening P on the substrate 100 can fall entirely within the orthographic projection of the corresponding driving electrode 601 on the substrate 100, which is not limited herein.

[0093] The light-emitting material layer 700 is located on the side of the driving circuit layer 200 away from the substrate 100, and is located between the driving electrode layer 600 and the transparent conductive layer 500. The light-emitting material layer 700 includes a plurality of light-emitting units 701, one light-emitting unit 701 corresponds to one pixel opening P, the light-emitting unit 701 is located in the corresponding pixel opening P, and each light-emitting unit 701 is separated from each other by the pixel defining layer 300 and the isolation layer 400.

[0094] As shown in FIG. 1, the light-emitting unit 701 is electrically connected with the driving electrode 601 and the transparent electrode 501 located on both sides of the light-emitting unit 701 respectively, and one light-emitting unit 701 and the driving electrode 601 and the transparent electrode 501 located on both sides of the light-emitting unit 701 respectively form a light-emitting device. In the embodiment of the present disclosure, the light-emitting device can be an OLED device, the light-emitting unit 701 is an OLED unit, and the driving electrode 601 and the transparent electrode 501 are used to load voltages on both sides of the OLED unit respectively to form a potential difference, and then form a current to drive the OLED unit to emit light. In specific implementation, the OLED unit includes a plurality of light-emitting functional film layers, for example, the OLED unit can include a hole injection layer (HIL), a hole transport layer (HTL), a light-emitting layer (EL), an electron transport layer (ETL), and an electron injection layer (EIL) and the like five-layer structure, which is not limited here.

[0095] In some embodiments, the driving electrode 601 can be an anode of the OLED device, and the transparent electrode 501 can be a cathode of the OLED device. The driving electrode 601 is used to provide holes, and the transparent electrode 501 is used to provide electrons. The holes provided by the driving electrode 601 are input by the hole input end (such as the hole injection layer) of the OLED unit, and the electrons provided by the transparent electrode 501 are input by the electron input end (such as the electron injection layer) of the OLED unit. The holes and the electrons recombine in the light-emitting layer EL of the OLED unit to radiate light.

[0096] In some embodiments, the driving electrode 601 can be a cathode of the OLED device, and the transparent electrode 501 can be an anode of the OLED device. The driving electrode 601 is used to provide electrons, and the transparent electrode 501 is used to provide holes. The holes provided by the transparent electrode 501 are input by the hole input end (such as the hole injection layer) of the OLED unit, and the electrons provided by the driving electrode 601 are input by the electron input end (such as the electron injection layer) of the OLED unit. The holes and the electrons recombine in the light-emitting layer EL of the OLED unit to radiate light.

[0097] In the embodiment of the present disclosure, the OLED device is driven to emit light by the driving electrode 601. Specifically, in the embodiment of the present disclosure, the driving electrode 601 and the transparent electrode 501 are both electrically connected to the driving circuit layer 200, the difference is that the transparent electrode 501 is connected to the common voltage signal line 201 in the driving circuit layer 200, and the driving electrode 601 is connected to the pixel driving circuit (not shown in the figure) in the driving circuit layer 200. For all OLED devices in the display panel, the transparent electrodes 501 of each OLED device are mutually conductive through the first conductive material layer 401, and are electrically connected to the common voltage signal line 201 through the first conductive material layer, so that the transparent electrodes 501 of each OLED device are loaded with a common voltage of substantially the same size and fixed during the entire display process. The driving electrode 601 of each OLED device is electrically connected to a pixel driving circuit, and each driving electrode 601 can be individually loaded with a driving voltage by the pixel driving circuit connected thereto. During the entire display process, the OLED device with the driving electrode 601 loaded with the driving voltage emits light, and the OLED device with the driving electrode 601 not loaded with the driving voltage does not emit light, thereby realizing driving the OLED device to emit light by the driving electrode 601.

[0098] For example, the transparent electrode 501 can be the cathode of the OLED device, the common voltage signal line 201 can be a negative voltage signal line VSS for loading a negative voltage, and the driving electrode 601 can be the anode of the OLED device. During the display process, the pixel driving circuit loads a positive voltage on the driving electrode 601 of the OLED device that needs to emit light to drive the OLED device to emit light. When the transparent electrode 501 is the anode of the OLED device and the driving electrode 601 is the cathode of the OLED device, the common voltage signal line 201 can be a positive voltage signal line VDD. This is not limited herein.

[0099] In the display panel provided by the embodiment of the present disclosure, the first conductive material layer 401 of the isolation layer 400 is electrically connected to the common voltage signal line 201 through the via penetrating the pixel limiting layer 300, and the transparent electrodes 501 of each OLED device are mutually conductive through the first conductive material layer 401, thereby realizing simultaneously applying a common voltage to each OLED device, which is beneficial to simplify the line structure of the frame region of the display panel and further realize narrow frame.

[0100] FIG. 2A is a schematic diagram of the cross-sectional structure of the display panel in the related art; and FIG. 2B is a schematic diagram of the top view structure of the display panel in the related art.

[0101] Specifically, the display panel generally includes a display area and a non-display area surrounding the display area. As shown in FIGS. 2A and 2B, in the related art, the common voltage signal line 201 is located in the non-display area FA and away from the display area AA on one side of the gate driving circuit 202, the orthogonal projection of the common voltage signal line 201 on the substrate 100 does not overlap with the orthogonal projection of the isolation layer 400 on the substrate 1, and there is a certain overlap distance between the transparent electrode of the OLED device and the common voltage signal line 201. For example, in the related art, the transparent conductive layer 500 where the transparent electrode is located is generally made by full-area evaporation, the transparent electrode located in the opening of the isolation layer is electrically connected with the transparent conductive layer 500 located outside the opening of the isolation layer, the transparent conductive layer 500 located outside the opening of the isolation layer is overlapped on the surface of the overlap signal line 602 which is located in the same layer as the driving electrode 601, and the overlap signal line 602 is connected with the common voltage signal line 201 through the via hole penetrating the insulating layer in the signal line layer 200, that is, the transparent electrode of the OLED device needs to be connected with the common voltage signal line 201 through multiple overlap structures such as the transparent conductive layer 500 located outside the opening of the isolation layer and the overlap signal line 602, which leads to complex signal line wiring in the non-display area of the display panel and large area for signal line wiring in the non-display area of the display panel, and it is difficult to reduce the width of the display panel.

[0102] In the embodiments of the present disclosure, the transparent electrode of the OLED device is electrically connected with the common voltage signal line through the first conductive material layer in the isolation layer, compared with the related art as shown in FIG. 2A, there is no need to set too many overlap structures, for example, there is no need to set the overlap signal line 602 and there is no need to set the part of the transparent conductive layer 500 located outside the opening of the isolation layer for connecting the overlap signal line 602, which is conducive to reducing the design difficulty of the signal line wiring in the non-display area of the display panel and reducing the thickness of the non-display area of the display panel. Moreover, since the first conductive material layer is electrically connected with the common voltage signal line through the via hole penetrating the pixel definition layer, the common voltage signal line can be arranged below the isolation layer, that is, the orthogonal projection of the common voltage signal line on the substrate falls within the orthogonal projection of the isolation layer on the substrate, and the common voltage signal line can be designed by using the area already occupied by the isolation layer, so that the common voltage signal line does not need to occupy another wiring area, which is conducive to reducing the frame size of the display panel.

[0103] FIG. 3A is a schematic diagram of a manufacturing process of a display panel according to an embodiment of the present disclosure; and FIG. 3B is a schematic diagram of a manufacturing process of a transparent electrode of a display panel according to an embodiment of the present disclosure.

[0104] Specifically, as shown in FIG. 3A, when manufacturing the display panel, the embodiments of the present disclosure specifically include the following processes:

[0105] 1. A front substrate is provided; the front substrate comprises a driving circuit layer 200 and a pixel defining layer 300 which are sequentially stacked on a substrate 100; the driving circuit layer 200 comprises a common voltage signal line 201; the pixel defining layer 300 is provided with a plurality of pixel openings P; a driving electrode layer 600 is further provided between the pixel defining layer 300 and the driving circuit layer 200, the driving electrode layer 600 comprises a plurality of driving electrodes 601 corresponding to the pixel openings P one by one, and the pixel openings P expose at least part of the driving electrodes 601;

[0106] 2. An isolation layer 400 is made on the side of the pixel defining layer 300 away from the substrate 100; the isolation layer 400 is provided with isolation layer openings S corresponding to the pixel openings P one by one; the isolation layer 400 comprises a first conductive material layer 401; the first conductive material layer 401 is electrically connected to the common voltage signal line 201 through a via hole penetrating the pixel defining layer 300;

[0107] 3. A transparent conductive layer 500 is made on the side of the isolation layer 400 away from the substrate 100; the transparent conductive layer 500 comprises transparent electrodes 501 located in the isolation layer openings S and separated from each other by the isolation layer 400; the transparent electrodes 501 are in contact with the first conductive layer.

[0108] In some embodiments, as shown in FIG. 3B, a transparent conductive layer is made on the side of the isolation layer away from the substrate, comprising the following processes:

[0109] 1. A transparent conductive material layer is formed on the side of the isolation layer 400 away from the substrate 100 by a plating process; the transparent conductive material layer comprises a first part 5011 located in the isolation layer opening S and a second part 5012 located above the surface of the side of the isolation layer 400 away from the substrate 100; the first part 5011 is in contact with the first conductive material layer 401;

[0110] 2. The second part 5012 is removed by an etching process, and the first part 5011 is retained, which is the transparent electrode 501.

[0111] The display panel provided by the embodiments of the present disclosure can adopt AP (Advanced Pattern, AP for short) technology when it is specifically made. The AP technology uses photolithography to make a single OLED unit, which can further improve the position accuracy of the sub-pixel unit compared with the horizontal plating method in the related art, and prevent crosstalk between adjacent sub-pixel units.

[0112] FIG. 4A is a second schematic diagram of a transparent electrode manufacturing process of a display panel provided by an embodiment of the present disclosure; and FIG. 4B is a third schematic diagram of a transparent electrode manufacturing process of a display panel provided by an embodiment of the present disclosure.

[0113] The display panel provided by the embodiments of the present disclosure includes a light-emitting material layer 700, which includes a plurality of light-emitting units. The plurality of light-emitting units can be divided into a plurality of types. Light-emitting units of the same type are used to emit light of the same color, and light-emitting units of different types emit light of different colors. In the AP technology, each type of light-emitting unit is manufactured by etching process. Light-emitting units of the same type are manufactured in the same etching process. The transparent electrode and the corresponding light-emitting unit are etched at the same time to form an OLED device. Light-emitting units of different types are manufactured in sequence. For example, for any type of light-emitting unit, the following processes are included when the AP process is used for manufacturing:

[0114] 1. Form a target color light-emitting material layer on the side of the isolation layer away from the substrate; the target color light-emitting material layer includes a part located in the pixel opening and a part located on the surface of the side of the isolation layer away from the substrate; wherein the target color light-emitting material layer is used to manufacture a light-emitting unit corresponding to the target color. For example, when the target color light-emitting material layer is a red light-emitting material layer, it can be used to manufacture a red light-emitting unit. When the target color light-emitting material layer is a blue light-emitting material layer, it can be used to manufacture a blue light-emitting unit. When the target color light-emitting material layer is a green light-emitting material layer, it can be used to manufacture a green light-emitting unit. Details are not described here;

[0115] 2. Form a transparent conductive material layer on the side of the target color light-emitting material layer away from the substrate; the transparent conductive material layer includes a part located in the isolation layer opening and a part located on the surface of the side of the isolation layer away from the substrate; the transparent conductive material layer is used to manufacture a transparent electrode; in specific implementation, the part of the transparent conductive layer located in the isolation layer opening can be in contact with the first conductive material layer to achieve electrical connection;

[0116] 3. Form an encapsulating material layer on the side of the transparent conductive material layer away from the substrate; the encapsulating material layer includes a part located in the isolation layer opening and a part located above the surface of the side of the isolation layer away from the substrate; the encapsulating material layer is used to protect the light-emitting unit in subsequent processes and during use;

[0117] 4. Etching the target color light emitting material layer, the transparent conductive material layer and the encapsulating material layer formed in the preceding steps 1-3 by a photolithography process, retaining the target color light emitting material layer, the transparent conductive material layer and the encapsulating material layer located in the target pixel opening and the target isolation layer opening, removing the target color light emitting material layer, the transparent conductive material layer and the encapsulating material layer located in other pixel openings and isolation layer openings, and removing the target color light emitting material layer, the transparent conductive material layer and the encapsulating material layer located on the surface of the side of the isolation layer away from the substrate; wherein the target isolation layer opening is located directly above the target pixel opening, the target color light emitting material layer retained in the target pixel opening forms a target color light emitting unit, the transparent conductive material layer retained in the target isolation layer opening forms a transparent electrode, and the encapsulating material layer retained in the target isolation layer opening forms an encapsulating unit.

[0118] For example, the plurality of light emitting units in the display panel can include red light emitting units, green light emitting units and blue light emitting units, wherein the red light emitting units are used to emit red light, the green light emitting units are used to emit green light, and the blue light emitting units are used to emit blue light. Taking the display panel including red light emitting units, green light emitting units and blue light emitting units as an example, as shown in FIGS. 4A and 4B, when the AP technology is adopted, the transparent conductive layer is specifically manufactured by the following steps:

[0119] 1. As shown in FIG. 4A, a red light emitting material layer 710 is formed on the side of the isolation layer 400 away from the substrate 100; the red light emitting material layer 710 includes a portion located in the pixel opening P and a portion located on the surface of the side of the isolation layer 400 away from the substrate 100; in specific implementation, the red light emitting material layer 710 can be manufactured by film plating methods such as vapor deposition, evaporation, etc., and when the evaporation method is adopted to manufacture the red light emitting material layer, open mask (Open Mask) can be used for evaporation or evaporation can be performed without using a mask, which is not limited herein;

[0120] 2. A transparent conductive material layer 510 is formed on the side of the red light emitting material layer 710 away from the substrate 100; the transparent conductive material layer 510 includes a portion located in the isolation layer opening S and a portion located on the surface of the side of the isolation layer 400 away from the substrate 100; wherein the portion of the transparent conductive material layer 510 located in the isolation layer opening S is in contact with the first conductive material layer 401; in specific implementation, the transparent conductive material layer 510 can be manufactured by film plating methods such as vapor deposition, evaporation, etc., and when the evaporation method is adopted to manufacture the transparent conductive material layer, open mask can be used for evaporation or evaporation can be performed without using a mask, which is not limited herein;

[0121] 3. Forming an inorganic encapsulation material layer 8011 on the side of the transparent conductive material layer 510 away from the substrate 100; the inorganic encapsulation material layer 8011 includes a portion located in the isolation layer opening S and a portion located above the surface of the isolation layer 400 away from the substrate 100; the inorganic encapsulation material layer 8011 can be made of an insulating material, for example, the material of the inorganic encapsulation material layer 8011 can be silicon oxide (SiO), silicon nitride (SiN) or silicon oxynitride (SiON), etc., which is not limited here;

[0122] 4. As shown in FIG. 4B, the red luminescent material layer 710, the transparent conductive material layer 510 and the inorganic encapsulation material layer 8011 located above the surface of the isolation layer 400 away from the substrate 100 are removed by a photolithography process, the red luminescent material layer 710, the transparent conductive material layer 510 and the inorganic encapsulation material layer 8011 located in the blue luminescent unit corresponding isolation layer opening S and pixel opening P are removed, and the red luminescent material layer 710, the transparent conductive material layer 510 and the inorganic encapsulation material layer 8011 located in the green unit corresponding isolation layer opening S and pixel opening P are removed, and the portion of the red luminescent material layer 710, the transparent conductive material layer 510 and the inorganic encapsulation material layer 8011 located in the red luminescent unit corresponding isolation layer opening S and pixel opening P is reserved; wherein the red luminescent material layer 710 reserved in the pixel opening P corresponding to the red luminescent unit 71 forms the red luminescent unit 71, the transparent conductive material layer 510 reserved in the isolation layer opening S corresponding to the red luminescent unit 71 forms the transparent electrode 501, and the red luminescent unit 71, the driving electrode 601 and the transparent electrode 501 located on both sides of the red luminescent unit 71 respectively constitute the red OLED device; the inorganic encapsulation material layer 8011 reserved in the isolation layer opening S corresponding to the red luminescent unit 71 forms the encapsulation unit 81, which is used to protect the red OLED device in subsequent processes and during use;

[0123] 5. Repeat steps 1-4 to form a blue OLED device and a passivation layer structure in the pixel opening and the isolation layer opening corresponding to the blue luminescent unit 72 in turn, and form a green OLED device and an encapsulation unit 81 in the pixel opening and the isolation layer opening corresponding to the green luminescent unit 73; wherein the luminescent unit and the transparent electrode of adjacent OLED devices, and the encapsulation unit 81 above the OLED device are all separated by the isolation layer 400 and / or the pixel definition layer, and the transparent electrodes of adjacent OLED devices are electrically connected by the first conductive material layer 401; the luminescent unit of each OLED device constitutes a luminescent material layer, the transparent electrode of each OLED device constitutes a transparent conductive layer, and the encapsulation unit 81 above each OLED device constitutes a first inorganic encapsulation layer 801.

[0124] The display panel provided in the embodiments of the present disclosure is manufactured by using the AP technology. In the manufacturing process, the light emitting units of each OLED device are manufactured by using the photolithography process. Compared with the process of using the fine metal mask (FMM) to evaporate the light emitting units in the related art, the positions of the light emitting units are more accurate, and a greater aperture ratio and pixel density can be achieved. In addition, the AP technology etches away the connection part of the two adjacent light emitting units by using the photolithography process, for example, etches away the part above the surface on the side of the isolation layer away from the substrate, so as to avoid the problem of crosstalk in the display process caused by the direct connection of the two adjacent light emitting units. In the scheme of evaporating by using the FMM in the related art, as shown in FIG. 2A, the light emitting material above the surface on the side of the isolation layer 400 away from the substrate 100 is not etched, and the two adjacent light emitting units are easily directly connected, thereby causing crosstalk.

[0125] In the above embodiments of the present disclosure, the manufacturing method of the display panel by using the AP technology is exemplarily described by taking the light emitting material layer of the display panel including three kinds of light emitting units of red, green and blue. In specific implementation, the light emitting material layer of the display panel can further include more kinds of light emitting units or include fewer kinds of light emitting units. In specific manufacturing, the above manufacturing process can be referred to, and details are not described herein. In specific manufacturing, the manufacturing sequence of the OLED devices of various colors can not be limited to the manufacturing sequence in the above embodiments. For example, the green OLED device, the blue OLED device and the red OLED device can be sequentially manufactured, and details are not limited herein.

[0126] FIG. 5 is a schematic view of a cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0127] In the embodiments of the present disclosure, as shown in FIG. 5, the display panel is divided into a display area AA and a non-display area FA. The non-display area FA is usually arranged around the display area AA. The pixel opening P is located in the display area AA. The driving circuit layer 200 further includes a gate driving circuit 202. The gate driving circuit 202 is arranged in the non-display area FA.

[0128] In some embodiments, as shown in FIG. 5, the common voltage signal line 201 is located on the side of the gate driving circuit 202 close to the display area AA. The common voltage signal line 201 is arranged on the side of the gate driving circuit 202 close to the display area AA, so as to avoid arranging the isolation layer 400 to cross the wiring area of the gate driving circuit 202 with a wide width from above the gate driving circuit 202, which is beneficial to save space and reduce the width of the frame.

[0129] In some embodiments, as shown in FIG. 5, the common voltage signal line 201 is located between the gate driving circuit 202 and the pixel opening P. Specifically, when arranging the routing of the common voltage signal line 201, the common voltage signal line 201 can be arranged at the edge region of the orthographic projection of the isolation layer 400 and the pixel defining layer 300 on the substrate 100. Since the inner region of the orthographic projection of the isolation layer 400 and the pixel defining layer 300 on the substrate 100 needs to be arranged with the OLED device, and the pixel driving circuit for driving the OLED device to emit light is also arranged in the driving circuit layer 200 under the OLED device, arranging the common voltage signal line 201 at the edge region of the orthographic projection of the isolation layer 400 and the pixel defining layer 300 on the substrate 100 can avoid the interference between the routing of the common voltage signal line 201 and the pixel driving circuit, and increase the routing design space of the pixel driving circuit.

[0130] FIG. 6A is a top view of a display panel according to an embodiment of the present disclosure; and FIG. 6B is a cross-sectional view of the display panel according to an embodiment of the present disclosure.

[0131] In some embodiments, as shown in FIGS. 6A and 6B, the isolation layer 400 is located within the display area AA (the region within the dashed line). As shown in FIG. 6B, the isolation layer 400 is located within the display area AA, and the edge of the isolation layer 400 extends in the direction close to the non-display area FA (the region within the dashed line) with a small width, which can reserve more space for the edge region of the display area and the non-display area for arranging other structures. Moreover, the isolation layer 400 is located within the display area AA, and the part of the common voltage signal line 201 for connecting with the isolation layer 400 is arranged directly below the isolation layer 400, which can reduce the area of the non-display area FA for arranging the routing of the common voltage signal line 201, and further reduce the frame width. In this embodiment, the display area AA of the display panel can be defined by the arrangement area of the isolation layer, for example, the arrangement area of the isolation layer is the display area AA. In actual implementation, the display area AA can also be defined by other manners, which is not limited herein.

[0132] As shown in FIGS. 6A and 6B, the isolation layer 400 is arranged in the display area AA, and the common voltage signal line 201 is located at the side of the gate driving circuit 202 close to the display area AA, the width of the non-display area FA of the display panel is greatly reduced compared with the width of the non-display area FA of the display panel in the related art, and the proportion of the area occupied by the gate driving circuit 202 in the non-display area FA is increased. In some embodiments, in the direction away from the display area AA, the ratio of the width W1 of the gate driving circuit 202 to the width of the non-display area FA ranges from 0.37 to 0.78, and can be 0.40, 0.45, 0.50, 0.55, 0.60, 0.65, 0.70, 0.75, etc. without limitation. In a specific implementation, the width of the gate driving circuit 202 can range from 350 μm to 550 μm, and can be 400 μm, for example; the width of the non-display area FA can range from 700 μm to 950 μm, and can be 800 μm, for example, without limitation.

[0133] In some embodiments, as shown in FIG. 6A, the common voltage signal line 201 is electrically connected to the isolation layer 400 through a plurality of through holes H penetrating the pixel definition layer. Specifically, the orthogonal projection of the common voltage signal line 201 on the substrate 100 and the orthogonal projection of the isolation layer 400 on the substrate 100 have a large overlapping area, and a plurality of through holes H penetrating the pixel definition layer are arranged in the overlapping area of the common voltage signal line 201 and the isolation layer 400 for electrical connection between the common voltage signal line 201 and the isolation layer 400, which is conducive to improving the transmission efficiency of the signal.

[0134] FIG. 7 is a schematic diagram of a cross-sectional structure of a display panel according to an embodiment of the present disclosure.

[0135] In some embodiments, as shown in FIG. 7, the display panel further includes an isolation dam 310. The isolation dam 310 can be located in the same layer as the planar layer 300, that is, the isolation dam 310 can be manufactured by the same mask process as the planar layer 300. The isolation dam 310 can also include other film layers, which are not limited herein. FIG. 7 shows a partial cross-sectional structure of the non-display area FA of the display panel. As shown in FIG. 7, the isolation dam 310 is located in the non-display area FA and on the side of the gate drive circuit 202 away from the display area AA. Generally, after the OLED light-emitting device is manufactured, the display panel needs to be packaged by a packaging layer. The packaging layer usually adopts a sandwich structure including a first inorganic packaging layer 801, an organic packaging layer 802, and a second inorganic packaging layer 803 arranged in layers. The organic packaging layer 802 is usually made of organic material by Ink Jet Printed (IJP) method. The isolation dam 310 is used to block the organic material during the manufacturing of the organic packaging layer 802, and the organic material is limited to the side of the isolation dam 310 facing the display area AA, so as to ensure the packaging effect.

[0136] Compared with the related art shown in FIG. 2A, in which the common voltage signal line is arranged between the gate drive circuit and the isolation dam, in the embodiment of the present disclosure, the common voltage signal line is arranged on the side of the gate drive circuit 202 away from the isolation dam 310, so that the distance between the gate drive circuit 202 and the isolation dam 310 can be reduced, the width of the non-display area FA of the display panel can be reduced, and the frame width of the display panel can be reduced. Specifically, in some embodiments, the distance W3 between the orthographic projection of the isolation dam 310 on the substrate 100 and the orthographic projection of the gate drive circuit 202 on the substrate 100 can be set to 250 μm-350 μm, for example, 280 μm, 300 μm, 320 μm, 340 μm, etc., which are not limited herein. The distance between the orthographic projection of the isolation dam 310 on the substrate 100 and the orthographic projection of the gate drive circuit 202 on the substrate 100 can be specifically the distance between the side of the orthographic projection of the isolation dam 310 on the substrate 100 close to the gate drive circuit 202 and the side of the orthographic projection of the gate drive circuit 202 on the substrate 100 close to the isolation dam, which is not limited herein.

[0137] In some embodiments, as shown in FIG. 7, since the common voltage signal line is not arranged between the gate drive circuit 202 and the isolation dam 310, the orthographic projection of the film layer on which the common voltage signal line is located on the substrate can be located outside the area between the orthographic projection of the gate drive circuit 202 on the substrate 100 and the orthographic projection of the isolation dam 310 on the substrate 100.

[0138] In a specific implementation, since the common voltage signal line is not arranged between the gate driving circuit 202 and the isolation dam 310, the film layer on the side of the common voltage signal line facing the substrate can be directly in contact with the film layer on the side of the common voltage signal line away from the substrate in the region between the gate driving circuit 202 and the isolation dam 310. For example, the common voltage signal line can be arranged in the source-drain metal layer. In the region between the gate driving circuit 202 and the isolation dam 310, the film layer on the side of the source-drain metal layer facing the substrate is the interlayer insulating layer 204, and the film layer on the side of the source-drain metal layer away from the substrate is the planarization layer 90. The interlayer insulating layer 204 is directly in contact with the planarization layer 90. The interlayer insulating layer 204 includes at least one of an interlayer dielectric layer ILD, a gate insulating layer GI, and the like, which are not limited herein.

[0139] In some embodiments, as shown in FIG. 7, compared with the related art shown in FIG. 2A, the driving electrode layer does not need to be arranged with the lap signal line 602 in FIG. 2A to electrically connect the common voltage signal line and the transparent electrode, so that the driving electrode layer is not needed in the region between the gate driving circuit 202 and the isolation dam 310. Specifically, the orthographic projection of the driving electrode layer on the substrate can be arranged outside the orthographic projection of the region between the gate driving circuit 202 and the isolation dam 310 on the substrate 100.

[0140] In a specific implementation, in the region between the gate driving circuit 202 and the isolation dam 310, the film layer on the side of the driving electrode layer facing the substrate can be directly in contact with the film layer on the side of the driving electrode layer away from the substrate.

[0141] In some embodiments, as shown in FIG. 7, the orthographic projection of the transparent electrode layer on the substrate 100 can also be arranged outside the orthographic projection of the region between the gate driving circuit 202 and the isolation dam 310 on the substrate 100. This is not limited herein.

[0142] In some embodiments, as shown in FIG. 7, the cap layer 91 and the lithium fluoride layer 92 can also be arranged between the encapsulation layer and the transparent electrode layer. The cap layer 91 and the lithium fluoride layer 92 can be used to adjust the optical parameters and improve the light extraction efficiency.

[0143] FIG. 8 is a partial enlarged schematic view of a cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0144] In some embodiments, as shown in FIG. 8, the isolation layer 400 includes a support portion 410 and a top portion 420. The top portion 420 is located on the side of the support portion 410 away from the substrate 100. The orthogonal projection of the support portion 410 on the substrate 100 falls within the orthogonal projection of the top portion 420 on the substrate 100, and the distance between the edge of the orthogonal projection of the support portion 410 on the substrate 100 and the edge of the orthogonal projection of the top portion 420 on the substrate 100 is greater than 0. That is, the isolation layer 400 forms an undercut structure or a roof structure, etc. in which the cross-sectional area of the top portion 420 is greater than the cross-sectional area of the support portion 410, for example, the isolation layer 400 forms an inverted trapezoidal structure, a "T" shaped structure or an "H" shaped structure. By setting the isolation layer 400 to the structure in which the cross-sectional area of the top portion 420 is greater than the cross-sectional area of the support portion 410, when the light emitting unit 701 and the transparent electrode 501 are made by deposition or evaporation, the light emitting unit 701 and the transparent electrode 501 can be prevented from climbing along the sidewall of the support portion 410, thereby facilitating the isolation of the light emitting unit 701 and the transparent electrode 501 in the isolation layer opening from the light emitting unit 701 and the transparent electrode 501 in the adjacent isolation layer opening. When the transparent electrode 501 is made by evaporation, the transparent electrode 501 can be evaporated to the position between the top portion 420 of the isolation layer 400 and the pixel defining layer 300 which is shielded by the top portion 420 by controlling the evaporation angle of the nozzle, thereby directly realizing the contact of the transparent electrode 501 and the support portion 410 in the evaporation process. In specific implementation, the support portion 410 can be located in the first conductive material layer 401, that is, the support portion 410 can be formed in the first conductive material layer 401, thereby realizing the electrical connection of the transparent electrodes 501 in different isolation layer openings through the first conductive material layer 401. When the light emitting unit 701 is made by evaporation, as shown in FIG. 8, the light emitting unit 701 can be prevented from contacting the support portion 410 by controlling the evaporation angle of the nozzle, thereby further avoiding the crosstalk between adjacent light emitting units, which is not limited herein.

[0145] FIG. 9A is a partial enlarged schematic view of the cross-sectional structure of the display panel according to an embodiment of the present disclosure; and FIG. 9B is a schematic view of the process of making the isolation layer according to an embodiment of the present disclosure.

[0146] In some embodiments, as shown in FIG. 9A, the isolation layer 400 further comprises an insulating material layer 402. The insulating material layer 402 is located on the side of the first conductive material layer 401 away from the substrate 100. The top portion 420 of the isolation layer 400 comprises the insulating material layer 402, that is, the top portion 420 of the isolation layer 400 is at least partially formed by the insulating material layer 402. The insulating material layer 402 can insulate and protect the first conductive material layer 401 in the isolation layer 400. In implementation, the first conductive material layer 401 can be etched by a secondary etching process to form a "T" shaped isolation layer structure. Specifically, as shown in FIG. 9B, the manufacturing of the isolation layer 400 can include the following processes:

[0147] 1. Form the first conductive material layer 401 and the insulating material layer 402 on the side of the pixel defining layer 300 away from the substrate 100 by a film plating process such as vapor deposition;

[0148] 2. Perform a first etching on the isolation layer, which simultaneously etches the first conductive material layer 401 and the insulating material layer 402 to form a first opening S1 exposing the pixel opening P of the pixel defining layer 300. The first etching can be performed by dry etching;

[0149] 3. Perform a second etching on the isolation layer, which selectively etches the first conductive material layer 401 to make the first conductive material layer 401 inwardly shrink a certain distance from the edge of the insulating material layer 402 to the inside of the insulating material layer 402, forming a "T" shaped isolation layer structure. The second etching can be performed by wet etching using an etching liquid that selectively etches the first conductive material layer 401.

[0150] In the embodiment shown in FIG. 9A, the isolation layer 400 can also be manufactured by other methods, which are not limited herein.

[0151] FIG. 10A is a partial enlarged schematic view of the cross-sectional structure of a display panel according to an embodiment of the present disclosure; and FIG. 10B is a schematic view of a process of manufacturing an isolation layer according to an embodiment of the present disclosure.

[0152] In some embodiments, the isolation layer further comprises a second conductive material layer 403 and a third conductive material layer 404. The second conductive material layer 403 is located on the side of the first conductive material layer 401 away from the insulating material layer 402, and the third conductive material layer 404 is located between the first conductive material layer 401 and the insulating material layer 402. The second conductive material layer 403 and the third conductive material layer 404 form a stack structure with the first conductive material layer 401 to improve the electrical and mechanical properties of the isolation layer. In specific implementations, the second conductive material layer 403 and the third conductive material layer 404 can be made of materials with lower electrical conductivity and reactivity than the first conductive material layer 401, thereby providing protection for the first conductive material layer 401. For example, the first conductive material layer 401 can be made of a material such as aluminum (Al) that has good electrical conductivity, and the second conductive material layer 403 and the third conductive material layer 404 can be made of an inert metal such as titanium (Ti) that has excellent ductility and low electrical conductivity, without being limited thereto.

[0153] In specific implementations, the top portion 420 of the isolation layer further comprises a third conductive material layer 404. That is, part of the top portion 420 of the isolation layer is formed by the insulating material layer 402, and part of the top portion 420 of the isolation layer is formed by the third conductive material layer 404. In specific implementations, the first conductive material layer 401 can be etched by a secondary etching process to form an "H" type isolation layer structure. Specifically, as shown in FIG. 10B, the manufacturing of the isolation layer 400 can include the following processes:

[0154] 1. Form the second conductive material layer 403, the first conductive material layer 401, the third conductive material layer 404, and the insulating material layer 402 on the side of the pixel definition layer 300 away from the substrate 100 by a film plating process such as vapor deposition;

[0155] 2. Perform a first etching on the isolation layer, which simultaneously etches the second conductive material layer 403, the first conductive material layer 401, the third conductive material layer 404, and the insulating material layer 402 to form a first opening S1 that exposes the pixel opening P of the pixel definition layer 300. The first etching can be performed by dry etching;

[0156] 3. Perform a second etching on the isolation layer, which selectively etches the first conductive material layer 401 to make the first conductive material layer 401 inwardly shrink a certain distance from the edges of the second conductive material layer 403 and the third conductive material layer 404 to the inside of the insulating layer 402, thereby forming an "H" type isolation layer structure. The second etching can be performed by wet etching using an etching solution that selectively etches the first conductive material layer 401.

[0157] In the embodiment shown in FIG. 10A, the isolation layer 400 can also be manufactured by other methods, without being limited thereto.

[0158] FIG. 11 is a schematic view of a cross-sectional structure of a display panel according to an embodiment of the present disclosure.

[0159] In some embodiments, as shown in FIG. 11, the display panel further includes a first inorganic encapsulation layer 801, a second inorganic encapsulation layer 803, and an organic encapsulation layer 802. The first inorganic encapsulation layer 801 is located on the side of the transparent conductive layer away from the substrate 100. The first inorganic encapsulation layer 801 includes a plurality of encapsulation units 81, which are located in the isolation layer openings S and are separated by the isolation layer 400. The second inorganic encapsulation layer 803 is located on the side of the first inorganic encapsulation layer 801 away from the substrate 100. The organic encapsulation layer 802 is located between the first inorganic encapsulation layer 401 and the second inorganic encapsulation layer 803. The first inorganic encapsulation layer 801, the second inorganic encapsulation layer 803, and the organic encapsulation layer 802 can protect the display panel. In specific implementations, the first inorganic encapsulation layer 801 can be made of SiON, the organic encapsulation layer 802 can be made of resin, and the second inorganic encapsulation layer 803 can be made of SiN, which are not limited herein. The display panel can further include more or fewer encapsulation layers, which are not limited herein.

[0160] FIG. 12 is a schematic view of a cross-sectional structure of a display panel according to an embodiment of the present disclosure.

[0161] In some embodiments, the gate drive circuit includes a plurality of conductive film layers. The common voltage signal line can be located in the same layer as at least one of the plurality of conductive film layers of the gate drive circuit, so as to reduce the number of film layers and reduce the thickness of the display panel. Specifically, as shown in FIG. 12, the line structure of the gate drive circuit 202 can be arranged in a plurality of different conductive film layers, and the common voltage signal line is located in the same layer as at least one of the plurality of conductive film layers of the gate drive circuit, specifically, the common voltage signal line can be located in the same layer as one or more conductive film layers in the gate drive circuit. For example, the gate drive circuit 202 includes a thin film transistor 22, which includes a gate, an active layer, a source, and a drain located in different film layers, and the common voltage signal line 201 can be arranged in the same layer as the source and the drain of the thin film transistor, specifically, the source and the drain can be arranged in the source-drain metal layer, and the common voltage signal line 201 can also be arranged in the source-drain metal layer. This is not limited herein.

[0162] The display panel provided by the embodiments of the present disclosure can further include other structures necessary for implementing specific functions. In specific implementations, the display panel provided by the embodiments of the present disclosure can be set by combining the setting method in the related art, which is not described herein.

[0163] In a second aspect, the present disclosure provides a display device. In some embodiments, the display device comprises the display panel provided in any of the preceding embodiments. In some embodiments, the display device provided in the present disclosure has the same or similar technical effects as the display panel provided in any of the preceding embodiments, and thus repeated description is omitted herein.

[0164] FIG. 13 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present disclosure.

[0165] In a third aspect, the present disclosure provides a method for manufacturing a display panel. As shown in FIG. 13, the method for manufacturing a display panel according to an embodiment of the present disclosure comprises the following steps:

[0166] S121: providing a front substrate; the front substrate comprises a driving circuit layer and a pixel defining layer which are sequentially stacked on a substrate; the driving circuit layer comprises a first power common voltage signal line; the pixel defining layer is provided with a plurality of pixel openings;

[0167] S122: manufacturing an isolation layer on a side of the pixel defining layer away from the substrate; the isolation layer is provided with an isolation layer opening corresponding to each of the pixel openings; the isolation layer comprises a first conductive material layer; the first conductive material layer is electrically connected to the first power common voltage signal line through a via hole penetrating the pixel defining layer;

[0168] S123: manufacturing a transparent conductive layer on a side of the isolation layer away from the substrate; the transparent conductive layer comprises transparent electrodes located in the isolation layer openings and separated from each other by the isolation layer; the transparent electrodes are in contact with the first conductive material layer.

[0169] In the method for manufacturing a display panel according to an embodiment of the present disclosure, the first conductive material layer of the isolation layer is electrically connected to the common voltage signal line through the via hole penetrating the pixel defining layer, and the transparent electrodes located in the isolation layer openings are electrically connected to each other through the first conductive material layer, so as to realize the electrical connection between the transparent electrodes and the common voltage line, which is conducive to simplifying the circuit structure and reducing the frame size of the display panel.

[0170] In some embodiments, the transparent conductive layer is manufactured on a side of the isolation layer away from the substrate, and specifically comprises:

[0171] forming a transparent conductive material layer on the side of the isolation layer away from the substrate by a coating process; the transparent conductive material layer comprises a first part located in the isolation layer opening and a second part located above the surface of the side of the isolation layer away from the substrate; the first part is in contact with the first conductive material layer;

[0172] removing the second part by an etching process and retaining the first part, and the first part forms the transparent electrodes.

[0173] In some embodiments, the display panel can be manufactured by using the AP technology. Specifically, the display panel includes multiple types of light emitting units. A transparent conductive layer is manufactured on the side of the isolation layer away from the substrate, specifically including:

[0174] For each type of light emitting unit, the light emitting unit and the transparent electrode on the side of the light emitting unit away from the substrate are manufactured together by a photolithography process.

[0175] For each type of light emitting unit, the light emitting unit and the transparent electrode on the side of the light emitting unit away from the substrate are manufactured together by a photolithography process, specifically including:

[0176] A light emitting material layer of a target color is formed on the side of the isolation layer away from the substrate;

[0177] A transparent conductive material layer is formed on the side of the light emitting material layer of the target color away from the substrate;

[0178] An encapsulating material layer is formed on the side of the transparent conductive material layer away from the substrate;

[0179] The light emitting material layer of the target color, the transparent conductive material layer and the encapsulating material layer are etched by a photolithography process, the light emitting material layer of the target color, the transparent conductive material layer and the encapsulating material layer located within the target pixel opening and the target isolation layer opening are reserved, the light emitting material layer of the target color, the transparent conductive material layer and the encapsulating material layer located within other pixel openings and isolation layer openings are removed, and the light emitting material layer, the transparent conductive material layer and the encapsulating material layer on the surface of the side of the isolation layer away from the substrate are removed.

[0180] The structure of the display panel provided by the embodiments of the present disclosure has been described in detail in the foregoing embodiments of the display panel structure. In actual implementation, the manufacturing method of the display panel provided by the embodiments of the present disclosure can refer to the related description of the display panel structure in the foregoing content, and details are not described herein.

[0181] Although the preferred embodiments of the present disclosure have been described, those skilled in the art can make additional changes and modifications to the embodiments once they know the basic inventive concept. Therefore, the appended claims are intended to be interpreted as including all changes and modifications falling within the scope of the present disclosure.

[0182] Obviously, various modifications and changes can be made to the present disclosure by those skilled in the art without departing from the spirit and scope of the present disclosure. Thus, it is intended that the present disclosure cover the modifications and changes as falling within the scope of the claims of the present disclosure and their equivalents.

Claims

1. A display panel, wherein, The display panel comprises: a substrate; a drive circuit layer located on one side of the substrate; the drive circuit layer comprises a common voltage signal line; a pixel definition layer located on a side of the drive circuit layer away from the substrate; an isolation layer located on a side of the pixel definition layer away from the substrate, the isolation layer being provided with isolation layer openings corresponding to the pixel openings of the pixel definition layer; a transparent conductive layer located on a side of the drive circuit layer away from the substrate; the transparent conductive layer comprises transparent electrodes located in the isolation layer openings and separated from each other by the isolation layer; the isolation layer comprises a first conductive material layer; the transparent electrodes are electrically connected to the first conductive material layer, and the first conductive material layer is electrically connected to the common voltage signal line in the drive circuit layer through a via hole penetrating the pixel definition layer.

2. The display panel of claim 1, wherein, The display panel comprises a display area and a non-display area; the pixel openings are located in the display area; the drive circuit layer further comprises a gate drive circuit; the gate drive circuit is located in the non-display area; the common voltage signal line is located on a side of the gate drive circuit close to the display area.

3. The display panel of claim 2, wherein, The common voltage signal line is located between the gate drive circuit and the pixel openings.

4. The display panel of claim 2, wherein, The isolation layer is located in the display area.

5. The display panel of claim 4, wherein, In a direction away from the display area, the ratio of the width of the gate drive circuit to the width of the non-display area ranges from 0.37 to 0.

78.

6. The display panel of claim 2, wherein, The gate drive circuit layer comprises a plurality of conductive film layers; the common voltage signal line and at least one of the plurality of conductive film layers are located in the same layer.

7. The display panel of claim 2, wherein, The display panel further comprises an isolation dam; the isolation dam is located on a side of the gate drive circuit away from the display area; The distance between the orthogonal projection of the isolation dam on the substrate and the orthogonal projection of the gate drive circuit on the substrate ranges from 250 μm to 350 μm.

8. The display panel of claim 7, wherein, The orthogonal projection of the film layer where the common signal line is located on the substrate is outside the orthogonal projection of the area between the gate drive circuit and the isolation dam on the substrate; In the area between the gate drive circuit and the isolation dam, the film layer located on the side of the common voltage signal line facing the substrate is in direct contact with the film layer located on the side of the common voltage signal line away from the substrate.

9. The display panel of claim 7, wherein, The display panel further comprises a drive electrode layer; the drive electrode layer is located between the drive circuit layer and the pixel definition layer; the drive electrode layer comprises a drive electrode opposite to the transparent electrode; The orthogonal projection of the drive electrode on the substrate is outside the orthogonal projection of the area between the gate drive circuit and the isolation dam on the substrate; In the area between the gate drive circuit and the isolation dam, the film layer located on the side of the drive electrode layer facing the substrate is in direct contact with the film layer located on the side of the drive electrode layer away from the substrate.

10. The display panel of claim 1, wherein, The common voltage signal line is electrically connected to the isolation layer through a plurality of the via holes.

11. The display panel of any one of claims 1 to 10, wherein, The display panel further comprises: A light-emitting material layer is located on a side of the driving circuit layer facing away from the substrate; the light-emitting material layer comprises a plurality of light-emitting units; the light-emitting units are located in the pixel openings, and the plurality of light-emitting units are separated by the pixel defining layer and the isolation layer; The transparent electrode is located on a side of the light-emitting material layer facing away from the substrate; the transparent electrode is a cathode or an anode.

12. The display panel of any one of claims 1 to 10, wherein, The isolation layer comprises a support portion and a top portion; the top portion is located on a side of the support portion facing away from the substrate; a footprint of the support portion on the substrate falls within a footprint of the top portion on the substrate, and a distance between an edge of the footprint of the support portion on the substrate and an edge of the footprint of the top portion on the substrate is greater than 0; The transparent electrode is in contact with the support portion.

13. The display panel of claim 12, wherein, The isolation layer further comprises an insulating material layer; the insulating material layer is located on a side of the first conductive material layer facing away from the substrate; the top portion comprises the insulating material layer.

14. The display panel of claim 13, wherein, The isolation layer further comprises a second conductive material layer and a third conductive material layer; the second conductive material layer is located on a side of the first conductive material layer facing away from the insulating material layer; the third conductive material layer is located between the first conductive material layer and the insulating material layer; The top portion further comprises the third conductive material layer.

15. The display panel of any one of claims 1-10, wherein, The display panel further comprises: A first inorganic encapsulation layer is located on a side of the transparent conductive layer facing away from the substrate; the first inorganic encapsulation layer comprises encapsulation units; the encapsulation units are located in the isolation layer openings and are separated by the isolation layer; A second inorganic encapsulation layer is located on a side of the first inorganic encapsulation layer facing away from the substrate; An organic encapsulation layer is located between the first inorganic encapsulation layer and the second inorganic encapsulation layer.

16. A display device comprising: The display panel comprises any one of claims 1-15.

17. A method of manufacturing a display panel, wherein, The display panel comprises: A front substrate is provided; the front substrate comprises a driving circuit layer and a pixel defining layer which are sequentially stacked on a substrate; the driving circuit layer comprises a common voltage signal line; the pixel defining layer is provided with a plurality of pixel openings; An isolation layer is made on a side of the pixel defining layer facing away from the substrate; the isolation layer is provided with isolation layer openings corresponding to the pixel openings one by one; the isolation layer comprises a first conductive material layer; the first conductive material layer is electrically connected with the common voltage signal line through a via hole penetrating through the pixel defining layer; A transparent conductive layer is made on a side of the isolation layer facing away from the substrate; the transparent conductive layer comprises transparent electrodes located in the isolation layer openings and separated by the isolation layer; the transparent electrodes are in contact with the first conductive material layer.

18. The method of claim 17, wherein, The transparent conductive layer is made on a side of the isolation layer facing away from the substrate, specifically comprising: A transparent conductive material layer is formed on a side of the isolation layer facing away from the substrate by a plating process; the transparent conductive material layer comprises a first part located in the isolation layer openings and a second part located above a surface of the isolation layer facing away from the substrate; the first part is in contact with the first conductive material layer; The second part is removed by an etching process, and the first part is reserved, and the first part forms the transparent electrode.

19. The method of claim 17, wherein, The display panel comprises a plurality of types of light emitting units; The transparent conductive layer is formed on the side of the isolation layer away from the substrate, and specifically comprises: For each type of light emitting unit, the light emitting unit and the transparent electrode on the side of the light emitting unit away from the substrate are formed together by a photolithography process; For each type of light emitting unit, the light emitting unit and the transparent electrode on the side of the light emitting unit away from the substrate are formed together by a photolithography process, and specifically comprises: A target color light emitting material layer is formed on the side of the isolation layer away from the substrate; A transparent conductive material layer is formed on the side of the target color light emitting material layer away from the substrate; An encapsulating material layer is formed on the side of the transparent conductive material layer away from the substrate; The target color light emitting material layer, the transparent conductive material layer and the encapsulating material layer are etched by a photolithography process, the target color light emitting material layer, the transparent conductive material layer and the encapsulating material layer located within the target pixel opening and the target isolation layer opening are reserved, the target color light emitting material layer, the transparent conductive material layer and the encapsulating material layer located within other pixel openings and isolation layer openings are removed, and the target color light emitting material layer, the transparent conductive material layer and the encapsulating material layer on the surface of the side of the isolation layer away from the substrate are removed.

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