Display panel and display device
By using low-resistance Cu material and nitride film layers to block oxidation diffusion in the display panel, combined with conductive and insulating film layers, the signal delay and brightness unevenness problems of large-size display products are solved, improving display effect and stability.
Patent Information
- Application Number
- PCT/CN2025/096723
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-06-25
- Filing Date
- 2025-05-23
- Publication Date
- 2026-01-02
AI Technical Summary
As display product sizes increase, gate traces become longer, leading to signal transmission delays, which in turn affect display quality and cause uneven brightness.
Signal lines are made of low-resistance Cu material, and a nitride film is coated on the Cu layer to block oxidation and diffusion. Combined with stacked conductive and insulating membrane layers, a stable conductive functional layer structure is formed.
It effectively improves signal transmission delay, reduces the resistance of the conductive functional layer, avoids Cu oxidation and diffusion, and enhances the display effect and brightness uniformity of the display panel.
Smart Images

Figure CN2025096723_02012026_PF_FP_ABST
Abstract
Description
Display panel and display device
[0001] Cross-reference to related applications
[0002] This application claims priority to Chinese Patent Application No. 202410832092.3, filed on June 25, 2024, the contents of which are incorporated herein by reference in its entirety. TECHNICAL FIELD
[0003] The present disclosure relates to the technical field of display, and in particular, to a display panel and a display device. BACKGROUND
[0004] With the continuous development of display technology, the application field of display products is becoming more and more extensive. In order to meet the needs of more application scenarios, more and more medium and large-sized display products are being developed. With the continuous increase in the size of display products, the gate line becomes longer, which causes the scanning signal transmitted by the gate line to be delayed, resulting in poor display effect, uneven display brightness, and other problems. Referring to FIG. 1, the middle region X1 of the screen appears cyan in vision, and the two side regions X2 and X3 of the screen appear purple, which seriously affects the display effect. SUMMARY
[0005] The purpose of the present disclosure is to provide a display panel and a display device.
[0006] In order to achieve the above-mentioned purpose, the present disclosure provides the following technical solutions:
[0007] The first aspect of the present disclosure provides a display panel, comprising: a substrate and a conductive functional layer disposed on the substrate, the conductive functional layer comprising a conductive film layer and a conductive barrier sub-film layer which are stacked; the display panel further comprises:
[0008] a first insulating layer, the first insulating layer being located on the side of the conductive barrier sub-film layer away from the conductive film layer, the first insulating layer comprising a first insulating barrier sub-film layer and a first insulating sub-film layer which are stacked, the first insulating barrier sub-film layer being located between the first insulating sub-film layer and the conductive barrier sub-film layer.
[0009] Optionally, the display panel further comprises a first active layer, the first active layer being located on the side of the first insulating sub-film layer away from the conductive barrier sub-film layer, the first insulating sub-film layer comprising an oxide insulating sub-film layer.
[0010] Optionally, the conductive functional layer comprises a light-shielding metal layer, at least part of the light-shielding metal layer being located between the first active layer and the substrate;
[0011] The light-shielding metal layer comprises a first conductive film layer and a first conductive barrier film layer, and the first conductive film layer is located between the first conductive barrier film layer and the substrate substrate; or the light-shielding metal layer comprises a second conductive barrier film layer, a first conductive film layer and a first conductive barrier film layer which are sequentially stacked in a direction away from the substrate substrate.
[0012] The first insulating layer comprises a buffer layer, and the buffer layer is located between the light-shielding metal layer and the first active layer.
[0013] Optionally, in the buffer layer, the thickness of the first insulating barrier film layer is less than the thickness of the first insulating film layer.
[0014] Optionally, the thickness d1 of the first insulating film layer satisfies:
[0015] The thickness d2 of the first insulating barrier film layer satisfies:
[0016] Optionally, the conductive functional layer comprises a first gate metal layer, and at least part of the first gate metal layer is located on a side of the first active layer away from the substrate substrate.
[0017] The first gate metal layer comprises a third conductive barrier film layer, a second conductive film layer and a fourth conductive barrier film layer which are sequentially stacked in a direction close to the substrate substrate.
[0018] The first insulating layer comprises a first gate insulating layer, and the first gate insulating layer is located between the first active layer and the first gate metal layer.
[0019] Optionally, in the first gate insulating layer, the thickness of the first insulating barrier film layer is greater than the thickness of the first insulating film layer.
[0020] Optionally, the thickness d3 of the first insulating film layer satisfies:
[0021] The thickness d4 of the first insulating barrier film layer satisfies:
[0022] Optionally, the conductive functional layer comprises a first gate metal layer; and the display panel further comprises:
[0023] A second active layer, and the second active layer is located on a side of the first gate metal layer away from the substrate substrate.
[0024] A second insulating layer is located at least partially between the first gate metal layer and the second active layer, and includes two second insulating sub-film layers arranged in a stack, and a second insulating barrier sub-film layer located between the two second insulating sub-film layers, wherein the second insulating sub-film layers include oxide insulating sub-film layers.
[0025] Optionally, the conductive functional layer includes a source-drain metal layer.
[0026] The source-drain metal layer includes a third conductive sub-film layer and a fifth conductive barrier sub-film layer, and the fifth conductive barrier sub-film layer is located between the third conductive sub-film layer and the substrate substrate; or the source-drain metal layer includes a fifth conductive barrier sub-film layer, a third conductive sub-film layer and a sixth conductive barrier sub-film layer arranged in a stack in a direction away from the substrate substrate.
[0027] Optionally, the first insulating barrier sub-film layer and the second insulating barrier sub-film layer include nitride insulating sub-film layers.
[0028] Based on the above technical solutions of the display panel, the second aspect of the present disclosure provides a display device including the above display panel. BRIEF DESCRIPTION OF DRAWINGS
[0029] The drawings described herein are used to provide further understanding of the present disclosure, and form a part of the present disclosure. The illustrative embodiments of the present disclosure and their descriptions serve to explain the present disclosure, and do not constitute an improper limitation on the present disclosure. In the drawings:
[0030] FIG. 1 is a schematic diagram of the display effect difference of different display areas of a display screen in the related art;
[0031] FIG. 2 is a first schematic diagram of a conductive functional layer provided by an embodiment of the present disclosure;
[0032] FIG. 3 is a second schematic diagram of a conductive functional layer provided by an embodiment of the present disclosure;
[0033] FIG. 4 is a third schematic diagram of a conductive functional layer provided by an embodiment of the present disclosure;
[0034] FIG. 5 is a schematic diagram of a first conductive sub-film layer, a first conductive barrier sub-film layer and a second conductive barrier sub-film layer provided by an embodiment of the present disclosure;
[0035] FIG. 6 is a schematic diagram of a first conductive sub-film layer and a first conductive barrier sub-film layer provided by an embodiment of the present disclosure;
[0036] FIG. 7 is a schematic diagram of a second conductive sub-film layer, a third conductive barrier sub-film layer and a fourth conductive barrier sub-film layer provided by an embodiment of the present disclosure;
[0037] FIG. 8 is a schematic view of a third conductive sub-film layer and a fifth conductive barrier sub-film layer and a sixth conductive barrier sub-film layer according to an embodiment of the present disclosure;
[0038] FIG. 9 is a schematic view of a third conductive sub-film layer and a fifth conductive barrier sub-film layer according to an embodiment of the present disclosure;
[0039] FIG. 10 is a first cross-sectional schematic view of a display panel according to an embodiment of the present disclosure;
[0040] FIG. 11 is a second cross-sectional schematic view of a display panel according to an embodiment of the present disclosure;
[0041] FIG. 12 is an effect diagram of silicon nitride blocking copper diffusion after high-temperature processing according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0042] To further illustrate the display panel and display device provided by the embodiments of the present disclosure, the following will be described in detail in conjunction with the accompanying drawings.
[0043] Based on the problems pointed out in the background, it is found through research that as the size of the display product continues to increase, the length of the signal line in the display product becomes longer, and the signal line itself has resistance, which will cause the signal line to delay when transmitting signals, thereby affecting the display effect.
[0044] To overcome the above problems, it is considered to use Cu material with low resistance to make signal lines or other conductive structures in display products to reduce the resistance of signal lines or other conductive structures, thereby ensuring the display effect of medium and large size display products. However, when introducing Cu process into the process of LTPS display products and LTPO display products, the Cu material will have high-temperature oxidation and diffusion problems, so its process compatibility needs to be considered.
[0045] Referring to FIGS. 2-4, 10 and 11, the display panel provided by the embodiments of the present disclosure includes a substrate 1 and a conductive functional layer 2 disposed on the substrate 1, the conductive functional layer 2 includes a conductive sub-film layer A1 and a conductive barrier sub-film layer (such as B1, B2) stacked.
[0046] A first insulating layer 3 is located on the side of the conductive barrier sub-film layer away from the conductive sub-film layer A1, and the first insulating layer 3 includes a first insulating barrier sub-film layer 32 and a first insulating sub-film layer 31 stacked, and the first insulating barrier sub-film layer 32 is located between the first insulating sub-film layer 31 and the conductive barrier sub-film layer.
[0047] Exemplarily, the conductive film layer adopts a metal Cu material, but is not limited thereto. The conductive barrier film layer adopts a conductive material with stable electrical properties, for example, a single element such as Mo, Ti, Ni, or an alloy such as MoW, MoCu, MoAl, MoNi, MoNb, MoTi, MoAlTi, MoNiTi, and preferably MoNiTi, but is not limited thereto.
[0048] Exemplarily, the conductive functional layer 2 includes a conductive film layer A1 and a conductive barrier film layer (for example, B1 and B2) arranged in a stack. The conductive barrier film layer can be located on a side of the conductive functional layer 2 facing the substrate 1. Alternatively, the conductive barrier film layer can be located on a side of the conductive functional layer 2 facing away from the substrate 1. Alternatively, the conductive functional layer 2 includes two conductive barrier film layers, and the conductive functional layer 2 is located between the two conductive barrier film layers.
[0049] Exemplarily, the first insulating layer 3 includes a first insulating barrier film layer 32 and a first insulating film layer 31 arranged in a stack. For example, the first insulating barrier film layer 32 adopts a SiN material, and the first insulating film layer 31 adopts a SiO material, but is not limited thereto.
[0050] According to the specific structure of the display panel, in the display panel provided by the embodiment of the present disclosure, the conductive functional layer 2 includes a conductive film layer and a conductive barrier film layer arranged in a stack. The conductive film layer can adopt a conductive material with low resistance, thereby ensuring the transmission performance of the conductive functional layer 2 with a large size and effectively improving the transmission signal delay phenomenon. Meanwhile, the conductive barrier film layer can adopt a conductive material with better electrical stability, thereby effectively improving the problems of high-temperature oxidation and diffusion of the conductive film layer.
[0051] Furthermore, in the display panel provided by the embodiment of the present disclosure, the first insulating layer 3 of the display panel is located on a side of the conductive barrier film layer facing away from the conductive film layer, and the first insulating layer 3 includes a first insulating barrier film layer 32 and a first insulating film layer 31 arranged in a stack, and the first insulating barrier film layer 32 is located between the first insulating film layer 31 and the conductive barrier film layer. The first insulating barrier film layer 32 can further block the oxidation and diffusion of the conductive film layer in high-temperature processing, and the first insulating film layer 31 can further ensure the insulation of the first insulating layer 3 as a whole, thereby avoiding the influence of the conductive functional layer 2 on other functional structures located on a side of the first insulating layer 3 facing away from the conductive functional layer 2, and thereby well ensuring the characteristic stability of other functional structures in the display panel.
[0052] Therefore, in the display panel provided by the embodiments of the present disclosure, by arranging the conductive functional layer 2 and the first insulating layer 3 in the display panel, the stability of the conductive functional layer 2 is further ensured in the case of effectively improving the signal transmission delay of the conductive functional layer 2, and the problems of diffusion and oxidation of the conductive functional layer 2 are avoided, thereby well solving the problems of poor display effect, uneven display brightness and the like of the medium and large size display products.
[0053] More specifically, in order to verify the above effects, the following experiments are performed:
[0054] The source-drain metal layer is made of Cu material, and a planar layer is made on the source-drain metal layer, the planar layer is in contact with the source-drain metal layer, and during the curing process (Curing), it needs to be cured in a 250°C environment for 60 minutes, which causes Cu to easily oxidize and diffuse. Sampling is performed in the planar layer in contact with the side of the source-drain metal layer, and the content of Cu and oxygen is detected in the sampling, which verifies that Cu will oxidize and diffuse.
[0055] When the technical solutions provided by the embodiments of the present disclosure are used, it is verified that covering a nitride film layer on the Cu layer can effectively block the oxidation and diffusion of Cu. Referring to FIG. 12, FIG. 12 is an effect diagram of silicon nitride blocking copper diffusion after high-temperature process provided by the embodiments of the present disclosure. The abscissa in FIG. 12 represents the depth of the sample, that is, the depth of part of the film layer and the substrate in the display panel, from 0 to 1 μm. The left ordinate in FIG. 12 represents the H concentration, and the right ordinate represents the element intensity.
[0056] In FIG. 12, SiO2 and SiN x In the depth range of about 0 to 0.2 μm, Cu is in the depth range of about 0.25 μm to 0.65 μm, Nb and Mo are in the depth range of about 0.35 μm to 0.7 μm, and the glass substrate is in the depth range of about 0.7 μm to deeper.
[0057] As can be seen from FIG. 12, the area framed in FIG. 12, that is, the area where the Cu layer is in contact with the SiN x layer, the Cu element can be effectively blocked by the SiN x layer, preventing the Cu element from diffusing to the depth range of 0 to 0.2 μm.
[0058] As shown in FIGS. 10 and 11, in some embodiments, the display panel further comprises a first active layer Poly, which is located on the side of the first insulating sub-film layer 31 away from the conductive barrier sub-film layer, and the first insulating sub-film layer 31 comprises an oxide insulating sub-film layer.
[0059] Exemplarily, the first active layer Poly includes a polysilicon active layer, but is not limited thereto.
[0060] Exemplarily, the first insulating layer 3 includes a first insulating barrier sub-film layer 32 and a first insulating sub-film layer 31 which are arranged in a stack, and the first active layer Poly is located on a side of the first insulating sub-film layer 31 which is away from the first insulating barrier sub-film layer 32.
[0061] The above arrangement of the first active layer Poly on the side of the first insulating sub-film layer 31 which is away from the conductive barrier sub-film layer, and the first insulating sub-film layer 31 including an oxide insulating sub-film layer, makes the first insulating sub-film layer 31 adjacent to the first active layer Poly, which can better avoid the influence of the conductive functional layer 2 on the first active layer Poly, thereby well ensuring the stability of the characteristics of the first active layer Poly.
[0062] As shown in FIGS. 5, 6 and 10, in some embodiments, the conductive functional layer 2 includes a light-shielding metal layer BSM, at least part of which is located between the first active layer Poly and the substrate 1.
[0063] The light-shielding metal layer BSM includes a first conductive sub-film layer A11 and a first conductive barrier sub-film layer B11, and the first conductive sub-film layer A11 is located between the first conductive barrier sub-film layer B11 and the substrate 1; or the light-shielding metal layer BSM includes a second conductive barrier sub-film layer B21, a first conductive sub-film layer A11 and a first conductive barrier sub-film layer B11 which are arranged in a stack in a direction away from the substrate 1.
[0064] The first insulating layer 3 includes a buffer layer Buf which is located between the light-shielding metal layer BSM and the first active layer Poly.
[0065] Exemplarily, the light-shielding metal layer BSM can be used to form a bottom gate of a transistor structure; can be used as a compensation line in parallel with a data fan-out line in a fan-out area of a display panel to reduce the overall resistance of a data line; can be used to form a signal transmission line in a display area of a display panel; and can be used to form a signal transmission line connected with a shift register unit in a non-display area of a display panel, such as a clock signal line, but is not limited thereto.
[0066] Exemplarily, the first conductive sub-film layer A11 adopts a metal Cu material, and the thickness of the first conductive sub-film layer A11 can be selected from , and can take an end point value. The thickness of the first conductive barrier sub-film layer B11 and the second conductive barrier sub-film layer B21 can be selected from , and can take an end point value.
[0067] Exemplarily, since the light-shielding metal layer BSM is located between the first active layer Poly and the substrate 1, whether to set a second conductive barrier sub-film layer B21 on the side of the light-shielding metal layer BSM facing away from the first active layer Poly can be selected according to requirements.
[0068] Exemplarily, in the buffer layer Buf, the thickness of the first insulating barrier sub-film layer 32 is less than the thickness of the first insulating sub-film layer 31.
[0069] Exemplarily, the thickness d1 of the first insulating sub-film layer 31 satisfies: the thickness d2 of the first insulating barrier sub-film layer 32 satisfies:
[0070] Exemplarily, the thickness d1 of the first insulating sub-film layer 31 can take a value of: But not only limited to this.
[0071] Exemplarily, the thickness d2 of the first insulating barrier sub-film layer 32 can take a value of: But not only limited to this.
[0072] The light-shielding metal layer BSM includes a first conductive film layer A11 and a first conductive barrier sub-film layer B11, so that the first conductive film layer A11 can adopt a low-resistance conductive material, so that the resistance of the light-shielding metal layer BSM can be reduced by 70% to 80%, to ensure the transmission performance of the first conductive functional layer 2 and effectively improve the transmission signal delay phenomenon; at the same time, the first conductive barrier sub-film layer B11 can adopt a conductive material with better electrical stability, which can effectively improve the problem of high-temperature oxidation and diffusion of the first conductive film layer A11. Therefore, when various functional structures in the display substrate are formed by using the light-shielding metal layer BSM, it is beneficial to reduce the power consumption of the display panel and improve the display frequency of the display panel.
[0073] The first insulating layer 3 includes a buffer layer Buf located between the light-shielding metal layer BSM and the first active layer Poly, so that the buffer layer Buf can further block the first conductive film layer A11 from being oxidized and diffused in high-temperature processes, and can avoid the influence of the light-shielding metal layer BSM on the first active layer Poly, thereby well ensuring the characteristic stability of the first active layer Poly.
[0074] As shown in FIG. 7, FIG. 10 and FIG. 11, in some embodiments, the conductive functional layer 2 includes a first gate metal layer Gate1, at least part of the first gate metal layer Gate1 is located on the side of the first active layer Poly facing away from the substrate base plate 1.
[0075] The first gate metal layer Gate1 includes a third conductive barrier sub-film layer B22, a second conductive sub-film layer A12 and a fourth conductive barrier sub-film layer B12 which are sequentially stacked in the direction close to the substrate base plate 1.
[0076] The first insulating layer 3 includes a first gate insulating layer GI1, which is located between the first active layer Poly and the first gate metal layer Gate1.
[0077] For example, the first gate metal layer Gate1 can be used to form a top gate of a transistor structure; it can also be used to form a gate line transversely penetrating the display area, but is not limited thereto.
[0078] For example, the second conductive sub-film layer A12 adopts a metal Cu material, and the thickness of the second conductive sub-film layer A12 can be selected from to , and can take an end point value.
[0079] Since the side of the first gate metal layer Gate1 facing the substrate base plate 1 has the first active layer Poly, and the side of the second gate metal layer Gate2 facing away from the substrate base plate 1 has the second active layer ACT, by arranging the first gate metal layer Gate1 to include a third conductive barrier sub-film layer B22, a second conductive sub-film layer A12 and a fourth conductive barrier sub-film layer B12 which are sequentially stacked in the direction close to the substrate base plate 1, a barrier effect can be formed on both sides of the first gate metal layer Gate1.
[0080] For example, in the first gate insulating layer GI1, the thickness of the first insulating barrier sub-film layer 32 is greater than the thickness of the first insulating sub-film layer 31. For example, the thickness d3 of the first insulating sub-film layer 31 satisfies: the thickness d4 of the first insulating barrier sub-film layer 32 satisfies:
[0081] For example, the thickness d3 of the first insulating sub-film layer 31 can take a value of but is not limited thereto.
[0082] Exemplarily, the thickness d4 of the first insulating barrier sub-film layer 32 can be taken as: But not only limited to this.
[0083] The first gate metal layer Gate1 is arranged in a direction close to the substrate 1, and includes a third conductive barrier sub-film layer B22, a second conductive film layer A12 and a fourth conductive barrier sub-film layer B12 arranged in sequence. The second conductive film layer A12 can be made of low-resistance conductive material, so that the resistance of the first gate metal layer Gate1 can be reduced by 70% to 80%, the transmission performance of the second conductive functional layer 2 is ensured, and the transmission signal delay phenomenon is effectively improved. At the same time, the third conductive barrier sub-film layer B22 and the fourth conductive barrier sub-film layer B12 can be made of conductive material with better electrical stability, which can effectively improve the problem of high-temperature oxidation and diffusion of the second conductive film layer A12. Therefore, when various functional structures in the display substrate are formed by using the first gate metal layer Gate1, the power consumption of the display panel is reduced, the low gray scale display of the high-resolution product is better realized, the uniformity of the display panel is effectively improved, and the refresh frequency of the display panel is improved.
[0084] The first insulating layer 3 includes a first gate insulating layer GI1 between the first gate metal layer Gate1 and the first active layer Poly. The first gate insulating layer GI1 can further block the oxidation and diffusion of the second conductive film layer A12 in high-temperature process, and can avoid the influence of the first gate metal layer Gate1 on the first active layer Poly, so as to well ensure the characteristic stability of the first active layer Poly.
[0085] As shown in FIG. 10, in some embodiments, the conductive functional layer 2 includes a first gate metal layer Gate1; the display panel further includes:
[0086] A second active layer ACT located on the side of the first gate metal layer Gate1 away from the substrate 1;
[0087] A second insulating layer 4, at least part of which is located between the first gate metal layer Gate1 and the second active layer ACT, and includes two second insulating sub-film layers and a second insulating barrier sub-film layer located between the two second insulating sub-film layers, and the second insulating sub-film layer includes an oxide insulating sub-film layer.
[0088] Exemplarily, the second active layer ACT includes a metal oxide active layer, for example, the second active layer ACT includes an indium gallium zinc oxide active layer, but not only limited to this.
[0089] Exemplarily, the second insulating sub-film layer adopts a silicon oxide material, and the second insulating barrier sub-film layer adopts a silicon nitride material, but is not limited thereto.
[0090] The second insulating layer 4 is provided as two layers of second insulating sub-film layers and a second insulating barrier sub-film layer between the two layers of second insulating sub-film layers, so that the second insulating layer 4 can further prevent the second conductive sub-film layer A12 from being oxidized and diffused in high-temperature processing, and can avoid the influence of the first gate metal layer Gate1 on the second active layer ACT, thereby well ensuring the stability of the characteristics of the second active layer ACT.
[0091] As shown in FIGS. 8-11, in some embodiments, the conductive functional layer 2 includes a source-drain metal layer SD.
[0092] The source-drain metal layer SD includes a third conductive sub-film layer A13 and a fifth conductive barrier sub-film layer B23 between the third conductive sub-film layer A13 and the substrate 1, or the source-drain metal layer SD includes, in sequence from the substrate 1, the fifth conductive barrier sub-film layer B23, the third conductive sub-film layer A13, and a sixth conductive barrier sub-film layer B13.
[0093] Exemplarily, the source-drain metal layer SD can be used to form a data line, or can be used to form a high-level signal transmission line and a low-level signal transmission line connected to a shift register unit in a display panel.
[0094] Exemplarily, the third conductive sub-film layer A13 adopts a metal Cu material, and the thickness of the third conductive sub-film layer A13 can be selected from , and can take an end point value. The thickness of the fifth conductive barrier sub-film layer B23 can be selected from , and can take an end point value.
[0095] Exemplarily, since the side of the source-drain metal layer SD away from the substrate 1 does not have an active layer structure, the source-drain metal layer SD can be provided with or without the sixth conductive barrier sub-film layer B13 according to actual needs.
[0096] The source-drain metal layer SD is provided with the above structure, so that the third conductive sub-film layer A13 can adopt a low-resistance conductive material, the resistance of the source-drain metal layer SD can be reduced by 15%-20%, thereby well reducing the Loading of a signal line made of the source-drain metal layer SD, meeting the requirement of the data line for the write data signal time, thereby well reducing the IR Drop of the display panel and improving the display uniformity of the display panel.
[0097] In some embodiments, the first insulating barrier sub-film layer and the second insulating barrier sub-film layer comprise a nitride insulating sub-film layer. The nitride insulating sub-film layer has better barrier properties, which is beneficial to better block the oxidation and diffusion of Cu.
[0098] As shown in FIG. 11, in the display panel provided by the above embodiment, when the LTPS transistor structure is included, the specific manufacturing method is as follows:
[0099] The substrate 1 is manufactured, and the specific steps include: firstly, performing initial cleaning on the glass substrate, then coating a double-layer polyimide (PI) adhesive on the stripping substrate, and curing the PI adhesive in an environment at 300-400°C to form a PI film with a thickness of about 10 μm.
[0100] The buffer layer Buf is deposited on the substrate 1 by using a plasma enhanced chemical vapor deposition method, for example, a silicon nitride layer with a thickness of 50-300 nm is firstly deposited, then a silicon dioxide layer with a thickness of 100-300 nm is deposited, then an amorphous silicon layer with a thickness of 40-50 nm is deposited according to requirements, then after the deposition of the amorphous silicon layer is completed, the amorphous silicon layer is heated at a temperature of 400°C for 0.5-3 hours, then the amorphous silicon region is subjected to an excimer laser annealing (ELA) process, and the polysilicon is patterned to form an active layer in the transistor structure and a doping process is performed.
[0101] The first gate insulating layer GI1 is continuously deposited, and the specific manufacturing process is as follows: a dielectric layer (the dielectric layer is a double-layer structure of SiN x / SiO2 film) is deposited by using a plasma enhanced chemical vapor deposition method, a silicon oxide layer with a thickness of 400-1000 nm is firstly deposited, then a silicon nitride layer with a thickness of 800-1000 nm is deposited, then a first gate metal material layer is deposited by using a plasma sputtering method, and the first gate metal material layer is patterned to form a first gate metal layer Gate1; the patterning process can adopt a conventional patterning process, and the specific process includes exposure, development, etching and other process flows.
[0102] Then, the second gate insulating layer GI2 is deposited, and the specific manufacturing process is as follows: a dielectric layer (the dielectric layer is a single-layer structure, and is a SiN x film layer with a thickness of 100-150 nm) is deposited by using a plasma enhanced chemical vapor deposition method, then a second gate metal material layer is deposited by using a plasma sputtering method, and the second gate metal material layer is patterned to form a second gate metal layer Gate2; the second gate metal layer Gate2 can adopt a stacked structure of a conductive barrier sub-film layer, a conductive sub-film layer and a conductive barrier sub-film layer arranged in sequence away from the substrate 1.
[0103] Then, an interlayer dielectric layer ILD is formed by deposition. The specific process is as follows: a dielectric layer is deposited by plasma enhanced chemical vapor deposition. The dielectric layer has a double-layer structure, including SiN x / SiO2 film. First, a silicon oxide layer with a thickness of 150-200 nm is deposited, and then a silicon nitride layer with a thickness of 200-300 nm is deposited. Then, the dielectric layer is patterned by one-step etching or multi-step etching to form the interlayer dielectric layer ILD.
[0104] Then, a source-drain metal material layer is formed by plasma sputtering, and the source-drain metal material layer is patterned to form a source-drain metal layer SD. It is worth noting that when the source-drain metal layer SD includes a stacked structure of at least two layers, the stacked structure can be formed in one patterning process.
[0105] Then, a passivation layer is deposited by plasma enhanced chemical vapor deposition. The passivation layer is a silicon nitride film with a thickness of After that, the film layers are sequentially formed in the order of a planarization layer PLN, an anode layer Ano, a pixel definition layer PDL, and a spacer layer, and the entire LTPS TFT substrate is completed. Then, the subsequent evaporation and packaging processes are completed according to the normal process to form a light-emitting functional layer EL, a cathode layer Cath, a first inorganic packaging layer CVD1, an organic packaging layer IJP, and a second inorganic packaging layer CVD2, and the display panel is completed.
[0106] As shown in FIG. 10, in the display panel provided by the above embodiment, when the LTPS transistor structure and the LTPO transistor structure are included, the specific manufacturing method is as follows:
[0107] The substrate 1 is manufactured, and the specific steps include: first, the glass substrate is initially cleaned, and then a double-layer polyimide (PI) adhesive is coated on the release substrate, and a PI film with a thickness of about 10 μm is formed by curing in an environment of 300-400 °C.
[0108] The isolation layer Bar is formed by plasma enhanced chemical vapor deposition. The isolation layer Bar includes SiN x film, SiO2 film, and SiNx film, which are sequentially stacked. Specifically, a silicon nitride layer with a thickness of 50-300 nm is first deposited, and then a silicon dioxide layer with a thickness of 100-300 nm is deposited, and then a silicon nitride layer with a thickness of 50-300 nm is deposited.
[0109] Then, a light-blocking metal material layer is deposited by plasma sputtering, and is patterned to form a light-blocking metal layer BSM. The patterning process can use a conventional patterning process, which specifically includes exposure, development, etching, and other process flows.
[0110] A buffer layer Buf is formed on the substrate 1 by a plasma enhanced chemical vapor deposition method, for example, a silicon nitride layer with a thickness of 50-300 nm is first deposited, then a silicon dioxide layer with a thickness of 100-300 nm is deposited, then an amorphous silicon layer with a thickness of 40-50 nm is deposited as required, then the amorphous silicon layer is heated at a temperature of 400°C for 0.5-3 hours after the deposition of the amorphous silicon layer, then a polycrystalline silicon pattern is formed into an active layer in a transistor structure by an excimer laser annealing (ELA) process, and a doping process is performed.
[0111] A first gate insulating layer GI1 is continuously formed, and the specific manufacturing process is as follows: a dielectric layer (the dielectric layer is a double-layer structure of SiN x / SiO2 film) is deposited by a plasma enhanced chemical vapor deposition method, a silicon oxide layer with a thickness of 400-1000 nm is first deposited, then a silicon nitride layer with a thickness of 800-1000 nm is deposited, then a first gate metal material layer is deposited by a plasma sputtering method, and the first gate metal material layer is patterned to form a first gate metal layer Gate1; the patterning process can adopt a conventional patterning process, and specifically includes exposure, development, etching and other process flows.
[0112] Then a second insulating layer 4 is deposited, and the specific manufacturing process is as follows: a dielectric layer is deposited by a plasma enhanced chemical vapor deposition method, the dielectric layer is a laminated structure, and is a laminated structure of a SiN x film layer, a SiO film layer, and a SiN x film layer in sequence, and each film layer has a thickness of 100-150 nm.
[0113] Then a second active material layer is deposited by a plasma sputtering method, and the second active material layer is patterned to form a second active layer ACT.
[0114] Then a second gate insulating layer GI2 is deposited, and the specific manufacturing process is as follows: a dielectric layer (the dielectric layer is a single-layer structure, and is a SiN x film layer with a thickness of 100-150 nm) is deposited by a plasma enhanced chemical vapor deposition method, then a second gate metal material layer is deposited by a plasma sputtering method, and is patterned to form a second gate metal layer Gate2; the second gate metal layer Gate2 can adopt a laminated structure of a conductive barrier sub-film layer, a conductive sub-film layer, and a conductive barrier sub-film layer arranged in sequence away from the substrate 1.
[0115] Then a second gate metal material layer is deposited by plasma sputtering and is patterned to form a second gate metal layer Gate2. The second gate metal layer Gate2 can have a stacked structure of a conductive barrier sub-film layer, a conductive sub-film layer and a conductive barrier sub-film layer arranged in sequence away from the substrate 1.
[0116] Then an interlayer insulating layer ILD is deposited. The specific manufacturing process is as follows: a dielectric layer is deposited by plasma enhanced chemical vapor deposition. The dielectric layer has a double-layer structure including a SiN x / SiO2 film. First, a silicon nitride layer with a thickness of 80-200 nm is deposited, and then a silicon oxide layer with a thickness of 200-300 nm is deposited. Then the dielectric layer is patterned by etching in one step or in multiple steps to form the interlayer insulating layer ILD.
[0117] Then a source-drain metal material layer is deposited by plasma sputtering, and the source-drain metal material layer is patterned to form a source-drain metal layer SD. It is worth noting that when the source-drain metal layer SD includes a stacked structure of at least two layers, the stacked structure can be formed in one patterning process.
[0118] Then a passivation layer PVX is deposited by plasma enhanced chemical vapor deposition. The passivation layer PVX is a silicon nitride film with a thickness of After that, each film layer is formed in sequence according to the third gate metal layer Gate3 (which can be made of Mo), a planarization layer PLN, an anode layer Ano, a pixel definition layer PDL and a spacer layer PS. At this point, the entire LTPS TFT substrate is manufactured. Then, the subsequent evaporation and packaging processes are completed according to the normal process to form a light-emitting functional layer, a cathode layer, a first inorganic packaging layer, an organic packaging layer and a second inorganic packaging layer, and the display panel is manufactured.
[0119] The present disclosure also provides a display device including the display panel provided by the above embodiments.
[0120] For example, the display device includes an active matrix organic light-emitting diode display device. The display device can specifically include an LTPS active matrix organic light-emitting diode display device, an LTPO active matrix organic light-emitting diode display device, etc.
[0121] It should be noted that the display device can be a television, a display, a digital photo frame, a mobile phone, a tablet computer or any product or component with display function. The display device further includes a flexible circuit board, a printed circuit board and a back plate, etc.
[0122] In the display panel provided by the above embodiment, the conductive functional layer 2 in the display panel is provided to include a conductive film layer and a conductive barrier sub-film layer arranged in a stack, so that the conductive film layer can be made of a conductive material with low resistance, ensuring the transmission performance of the conductive functional layer 2 when having a large size, and effectively improving the transmission signal delay phenomenon; at the same time, the conductive barrier sub-film layer can be made of a conductive material with better electrical stability, which can effectively improve the problem of high-temperature oxidation and diffusion of the conductive film layer. Moreover, in the display panel provided by the above embodiment, the first insulating layer 3 in the display panel is arranged on the side of the conductive barrier sub-film layer away from the conductive film layer, and the first insulating layer 3 includes a first insulating barrier sub-film layer 32 and a first insulating sub-film layer 31 arranged in a stack, and the first insulating barrier sub-film layer 32 is located between the first insulating sub-film layer 31 and the conductive barrier sub-film layer; so that the first insulating barrier sub-film layer 32 can further block the oxidation and diffusion of the conductive film layer during high-temperature processing, and the first insulating sub-film layer 31 can further ensure the insulation of the first insulating layer 3 as a whole, avoiding the influence of the conductive functional layer 2 on other functional structures located on the side of the first insulating layer 3 away from the conductive functional layer 2, thereby well ensuring the stability of the characteristics of other functional structures in the display panel. Therefore, in the display panel provided by the above embodiment, by arranging the conductive functional layer 2 and the first insulating layer 3 in the display panel, the stability of the conductive functional layer 2 is further ensured under the condition of effectively improving the transmission signal delay of the conductive functional layer 2, avoiding the problems of diffusion and oxidation of the conductive functional layer 2, thereby well solving the problems of poor display effect, uneven display brightness and the like in medium and large-sized display products.
[0123] Therefore, the display device provided by the embodiments of the present disclosure also has the beneficial effects described above when including the display panel described above, which will not be described again here.
[0124] It should be noted that the "same layer" of the embodiments of the present disclosure can refer to a film layer on the same structure layer. Alternatively, for example, the film layers on the same layer can be layer structures formed by using the same film forming process to form a film layer for forming a specific pattern, and then patterning the film layer by using the same mask plate through a one-time patterning process. According to different specific patterns, the one-time patterning process can include multiple exposure, development or etching processes, and the specific patterns in the formed layer structures can be continuous or discontinuous. These specific patterns can also be at different heights or have different thicknesses.
[0125] In the embodiments of the methods of the present disclosure, the sequence numbers of the steps do not serve to limit the order of the steps, and for those skilled in the art, the changes in the order of the steps without creative effort are within the protection scope of the present disclosure.
[0126] It should be noted that each of the embodiments in the present disclosure is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment mainly describes the differences from other embodiments. In particular, for the method embodiments, since they are basically similar to the product embodiments, the description is relatively simple, and the relevant parts can be referred to the part of the description of the product embodiments.
[0127] Unless otherwise defined, technical terms or scientific terms used in the present disclosure should be understood as the common meanings of those terms for those skilled in the art to which the present disclosure pertains. The terms "first", "second", and similar terms used in the present disclosure do not denote any order, quantity, or importance, but are used to distinguish different components. The terms "include", "contain", and similar terms mean that the elements or objects before the terms encompass the elements or objects listed after the terms and their equivalents, and do not exclude other elements or objects. The terms "connect", "couple", or "link" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right", and the like are only used to represent relative positional relationships, and when the absolute positions of the described objects are changed, the relative positional relationships can also be changed accordingly.
[0128] It can be understood that when an element such as a layer, a film, a region, or a substrate is referred to as being "on" or "under" another element, it can be "directly" on or under the other element, or an intermediate element can be present.
[0129] In the description of the above-described embodiments, specific features, structures, materials, or characteristics can be combined in any one or more embodiments or examples in a suitable manner.
[0130] The above description is merely specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.
Claims
1. A display panel, comprising: A substrate and a conductive functional layer disposed on the substrate, the conductive functional layer comprising a conductive film layer and a conductive barrier sub-film layer which are disposed in a stack; The display panel further comprises: A first insulating layer, the first insulating layer being located on a side of the conductive barrier sub-film layer away from the conductive film layer, the first insulating layer comprising a first insulating barrier sub-film layer and a first insulating sub-film layer which are disposed in a stack, the first insulating barrier sub-film layer being located between the first insulating sub-film layer and the conductive barrier sub-film layer.
2. The display panel of claim 1, wherein, The display panel further comprises a first active layer, the first active layer being located on a side of the first insulating sub-film layer away from the conductive barrier sub-film layer, the first insulating sub-film layer comprising an oxide insulating sub-film layer.
3. The display panel of claim 2, wherein, The conductive functional layer comprises a light-shielding metal layer, at least part of the light-shielding metal layer being located between the first active layer and the substrate; The light-shielding metal layer comprises a first conductive film layer and a first conductive barrier sub-film layer, the first conductive film layer being located between the first conductive barrier sub-film layer and the substrate; or, the light-shielding metal layer comprises a second conductive barrier sub-film layer, a first conductive film layer and a first conductive barrier sub-film layer which are disposed in a stack in a direction away from the substrate; The first insulating layer comprises a buffer layer, the buffer layer being located between the light-shielding metal layer and the first active layer.
4. The display panel of claim 3, wherein, In the buffer layer, a thickness of the first insulating barrier sub-film layer is less than a thickness of the first insulating sub-film layer.
5. The display panel of claim 4, wherein The thickness d1 of the first insulating sub-film layer satisfies: The thickness d2 of the first insulating barrier sub-film layer satisfies:
6. The display panel of claim 2, wherein, The conductive functional layer comprises a first gate metal layer, at least part of the first gate metal layer being located on a side of the first active layer away from the substrate; The first gate metal layer comprises a third conductive barrier sub-film layer, a second conductive film layer and a fourth conductive barrier sub-film layer which are disposed in a stack in a direction close to the substrate; The first insulating layer comprises a first gate insulating layer, the first gate insulating layer being located between the first active layer and the first gate metal layer.
7. The display panel of claim 6, wherein, In the first gate insulating layer, a thickness of the first insulating barrier sub-film layer is greater than a thickness of the first insulating sub-film layer.
8. The display panel of claim 7, wherein The thickness d3 of the first insulating sub-film layer satisfies: The thickness d4 of the first insulating barrier sub-film layer satisfies:
9. The display panel according to any one of claims 2 to 8, wherein The conductive functional layer comprises a first gate metal layer; the display panel further comprises: A second active layer, the second active layer being located on a side of the first gate metal layer away from the substrate; A second insulating layer, at least part of the second insulating layer being located between the first gate metal layer and the second active layer, the second insulating layer comprising two layers of second insulating sub-film layers and a second insulating barrier sub-film layer which are disposed in a stack between the two layers of second insulating sub-film layers, the second insulating sub-film layers comprising oxide insulating sub-film layers.
10. The display panel of claim 1, wherein, The conductive functional layer comprises a source-drain metal layer; The source-drain metal layer comprises a third conductive sub-film layer and a fifth conductive sub-film layer, and the fifth conductive sub-film layer is located between the third conductive sub-film layer and the substrate; or the source-drain metal layer comprises a fifth conductive sub-film layer, a third conductive sub-film layer and a sixth conductive sub-film layer which are sequentially stacked in a direction away from the substrate.
11. The display panel of claim 9, wherein, The first insulating sub-film layer and the second insulating sub-film layer comprise a nitride insulating sub-film layer.
12. A display device comprising the display panel according to any one of claims 1 to 11.
Citation Information
Patent Citations
Display panel and display device
CN114823730A
Display panel and display device
CN118695729A
Thin-film wiring structure, and thin-film transistor and its manufacturing method
JP2002261291A
Thin film transistor and method for manufacturing same, and display substrate and display device
WO2023050250A1