Methods for manufacturing an avalanche photodetector based on repair of lattice mismatch and reduction of electrical field spikes

Abstract

The disclosure relates to methods for manufacturing an avalanche photodetector (APD) (100). The methods comprise: providing an SOI substrate (101, 102), wherein a p-doped charge layer (106) forms with an embedded intrinsic layer (104), an intrinsic multiplication layer (105) and a n-doped layer (103) a junction of the APD (100) which is configured to cause a photoelectric effect to convert light energy to electrical energy; depositing a germanium absorption layer (107) overlaying the p doped charge layer to function as a light absorption layer to absorb light. A first method comprises: implanting non-dopant species at an interface region (118) between the p doped charge layer and the germanium absorption layer, the non-dopant species being configured to repair a defectivity due to lattice mismatch at the interface region. Another method comprises: implanting p-type dopant at the interface region (118), the p-type dopant being configured to smoothen a doping transition (201) between the germanium absorption layer and the p doped charge layer in order to reduce formation of electrical field spikes at the interface region. The above methods can be combined for improving APD performance.

Description

[0001] METHODS FOR MANUFACTURING AN AVALANCHE PHOTODETECTOR BASED ON REP IR OF LATTICE MISMATCH AND REDUCTION OF ELECTRICAL FIELD SPIKES

[0002] TECHNICAL FIELD

[0003] The disclosure relates to the field of Avalanche Photodetectors (APDs) and Avalanche Photodiodes, in particular Infrared (IR) APDs and IR Si / Ge APDs and methods for manufacturing APDs based on repair of lattice mismatch and reduction of electrical field spikes. In particular, the disclosure relates to performance and ruggedness improvements in Si / Ge Avalanche Photodiodes.

[0004] BACKGROUND

[0005] Si / Ge Avalanche Photodiodes need to operate with high performance (high signal to noise ratio and high frequency) during their whole lifetime. The working in avalanche condition, therefore close to breakdown, can be critical for the long time operation of the devices, resulting in performance degradation or sometimes in early failures. For this reason the APD’s design and process need to be optimized in order to guarantee long-term operation with stable characteristics. On one hand, due to the existence of 4.2% lattice mismatch between Ge and Si, the deposited Ge layer contains a huge amount of dislocations (both misfit and threading) mostly located at the interface between the two layers. The fundamental reason of leakage current is the generation and recombination of minority carriers in the depletion region from the dislocation related deep level states. On the other hand, steep doping transitions between highly doped and low doped layers in the epitaxial structure (e.g. the transition region between the n-Si multiplication (doping~1015-1016cm'3) and underlying n+ Si contact (doping~1019cm'3) layers) can potentially induce not irrelevant weaknesses for reliability and timing response.

[0006] SUMMARY

[0007] This disclosure provides a solution for an optimized design and process features to improve the robustness of the technology, while guarantees at the same time optimized performances in terms of dark current reduction and timing response.

[0008] The foregoing and other objects are achieved by the features of the independent claims. Further implementation forms are apparent from the dependent claims, the description and the figures.

[0009] Embodiments of the disclosure present techniques for implantation of neutral species after amorphous Ge seed layer deposition and before the Ge crystallization process for defect repair at the Si / Ge layers interface. Likewise, P type dopant (e.g. boron) can be implanted through the same Ge amorphous layer to smoothen the P doping transition between the low doped Germanium absorption layer and underlying highly doped Si charge layer.

[0010] Additional embodiments are presented to avoid steep doping transitions between the low doped Si multiplication layer and the underlying highly doped bottom cathode layer. Epitaxial or implanted layers with intermediate doping between the two regions or a multi-epitaxial stack with graded doping profile are provided in main and secondary embodiments.

[0011] In order to describe the disclosure in detail, the following terms and notations will be used.

[0012] IR Infrared

[0013] APD Avalanche Photodetector, Avalanche Photodiode

[0014] Si / Ge Silicon / Germanium

[0015] GBP Gain bandwidth product SACM Separate absorption charge multiplication

[0016] SOI Silicon on insulator

[0017] In this disclosure, avalanche photodetectors and avalanche photodiodes, respectively, and particularly Infrared avalanche photodiodes are described. Such devices are required for telecommunication optical integrated circuits, due to their higher sensitivity and internal gain compared to PIN photodiodes. The avalanche multiplication process causes an internal noise related to the ratio of the electron and hole ionization coefficients which limits the performance of the device. Si has a large asymmetry of electron and hole ionization coefficients, which makes it a useful candidate for APDs. However, Si is not able to absorb light at telecommunication wavelengths in the IR range (e.g. 1.3 um, 1.55 um), unlike smaller bandgap materials such as Ge and InGaAs. However, InGaAs APDs have high multiplication noise that limits the gain-bandwidth product (GBP). APDs using Ge for absorption and Si for charge multiplication (Si / Ge APDs) are more promising candidates having shown much higher GBP. Moreover their fabrication is compatible with CMOS process flow, with relevant advantages in terms of integration, scalability and cost reduction. Relevant applications for Si / Ge APDs include high speed communications, spectroscopy and imaging systems (e.g. LIDARs).

[0018] Si / Ge APD is a separate-absorption-charge-multiplication (SACM) germanium on silicon avalanche photodiode. It is an advanced photodetector structure that combines the properties of germanium and silicon to achieve efficient light detection and signal amplification. In the SACM Si / Ge APD, the light is absorbed by the top Ge layer converting photons into e-h pairs while the underlying Si multiplication region provides the electric field required to accelerate the charge carriers and initiate the avalanche multiplication process. Thanks to its low bandgap (0.66 eV), Ge provides effective absorption at wavelengths in the entire visible and infrared ranges up to a maximum wavelength of approximately 1600 nm, while the fast mobility of electrons and holes offers the potential for fast response times. On the other hand, the low Si excess to noise factor, due to the much higher electrons impact ionization coefficient, compared to holes, results in a shorter time for avalanche buildup and multiplication and better gain-bandwidth product.

[0019] In the following, a solution for forming a charge layer in APDs, in particular Si / Ge APDs with very low detectivity and optimized doping control for electrical field confinement is presented.

[0020] According to a first aspect, the disclosure relates to a method for manufacturing an avalanche photodetector, APD, the method comprising: providing a silicon-on-insulator substrate comprising an oxide layer and a silicon layer disposed on the oxide layer, the silicon-on-insulator substrate further comprising a central region with an n-doped layer embedded in the silicon layer, an embedded intrinsic layer, an intrinsic multiplication layer and a p doped charge layer, wherein the embedded intrinsic layer is overlaying the n-doped layer, wherein the intrinsic multiplication layer is overlaying both, the embedded intrinsic layer and the n-doped layer, and wherein the p-doped charge layer is overlaying the intrinsic multiplication layer; wherein the p-doped charge layer forms with the embedded intrinsic layer, the intrinsic multiplication layer and the n-doped layer a junction of the APD which is configured to cause a photoelectric effect to convert light energy to electrical energy; depositing a germanium absorption layer overlaying the p doped charge layer; wherein the germanium absorption layer is configured to function as a light absorption layer to absorb light; and implanting non-dopant species at an interface region between the p doped charge layer and the germanium absorption layer, the non-dopant species being configured to repair a detectivity due to lattice mismatch at the interface region.

[0021] The junction can be a PIN junction or a Schottky junction, for example.

[0022] Such a method provides the process features for an optimized design to improve the robustness of the technology, while guaranteeing at the same time optimized performances in terms of dark current reduction and timing response. In an exemplary implementation of the method, the germanium absorption layer comprises a bottom area facing the p doped charge layer; wherein the non-dopant species are implanted at the bottom area of the germanium absorption layer; and wherein the non-dopant species are implanted to cross the interface region between the p doped charge layer and the germanium absorption layer.

[0023] This feature guarantees less detectivity at the Ge / Si interface due to the annealing effect generated by the implant of neutral species at the interface region and subsequent thermal step. This results in a lower dark current.

[0024] In an exemplary implementation of the method, depositing the germanium absorption layer comprises: depositing an amorphous germanium seed layer; and crystallizing the amorphous germanium seed layer by a crystallization process, in particular by annealing, to obtain the germanium absorption layer; wherein the implanting of the non-dopant species is carried out after the deposition of the amorphous germanium seed layer and before the crystallization process.

[0025] Such features reduce the detectivity at the Si charge / Ge absorption layers interface and consequently minimize the leakage current.

[0026] In an exemplary implementation of the method, the amorphous germanium seed layer functions as an implantation screen layer which is configured to contribute to a dopant depth accuracy and dopant distribution accuracy.

[0027] The amorphous germanium seed layer functioning as an implantation screen layer can thus enable creation of shallower junctions.

[0028] In an exemplary implementation of the method, the non-dopant implanted species are configured to suppress doping diffusion and / or modify material property, in order to improve device reliability.

[0029] This has obvious benefits such as good amorphization performance, less end of range defect and stress relaxation.

[0030] In an exemplary implementation of the method, the non-dopant implanted species comprise one or more of the following species: Carbon, Fluorine and Nitrogen.

[0031] These species can be easily processed and implanted.

[0032] In an exemplary implementation of the method, the method comprises: implanting p-type dopant at the interface region to form a p-type doped intermediate layer between the p doped charge layer and the germanium absorption layer, the p-type dopant being configured to smoothen a doping transition between the germanium absorption layer and the p doped charge layer, in order to reduce formation of electrical field spikes at the interface region.

[0033] Such implantation avoids or smoothens the otherwise steep doping transition between the Ge absorption and Si charge layers. This results in better timing characteristics and lower dark current.

[0034] In an exemplary implementation of the method, the p-type dopant is implanted with the non-dopant species at a same implantation step or at different implantation steps.

[0035] This allows to achieve the benefits from both features, i.e., p-type dopant implantation and non-dopant species implantation. In an exemplary implementation of the method, the method comprises: forming an n-type doped intermediate epitaxial layer between the embedded intrinsic layer and the n doped layer, the n-type doped intermediate epitaxial layer being configured to smoothen a doping transition between the embedded intrinsic layer and the n doped layer in order to reduce a peak electric field at an interface between the embedded intrinsic layer and the n doped layer.

[0036] Such feature avoids or smoothens the otherwise steep doping transition between the Si multiplication and cathode contact layer. This results in enhanced ruggedness and better timing performance.

[0037] According to a second aspect, the disclosure relates to a method for manufacturing an avalanche photodetector, APD, the method comprising: providing a silicon-on-insulator substrate comprising an oxide layer and a silicon layer disposed on the oxide layer, the silicon-on-insulator substrate further comprising a central region with an n-doped layer embedded in the silicon layer, an embedded intrinsic layer, an intrinsic multiplication layer and a p doped charge layer, wherein the embedded intrinsic layer is overlaying the n-doped layer, wherein the intrinsic multiplication layer is overlaying both, the embedded intrinsic layer and the n-doped layer, and wherein the p-doped charge layer is overlaying the intrinsic multiplication layer; wherein the p- doped charge layer forms with the embedded intrinsic layer, the intrinsic multiplication layer and the n-doped layer a junction of the APD which is configured to cause a photoelectric effect to convert light energy to electrical energy; depositing a germanium absorption layer overlaying the p doped charge layer; wherein the germanium absorption layer is configured to function as a light absorption layer to absorb light; and implanting p-type dopant at an interface region between the p doped charge layer and the germanium absorption layer to form a p-type doped intermediate layer, the p-type dopant being configured to smoothen a doping transition between the germanium absorption layer and the p doped charge layer in order to reduce formation of electrical field spikes at the interface region.

[0038] Such a method provides the process features for an optimized design to improve the robustness of the technology, while guaranteeing at the same time optimized performances in terms of dark current reduction and timing response. p-type dopant can be Boron, for example.

[0039] In an exemplary implementation of the method, depositing the germanium absorption layer comprises: depositing an amorphous germanium seed layer; and crystallizing the amorphous germanium seed layer by a crystallization process, in particular by annealing, to obtain the germanium absorption layer; wherein the implanting of the p-type dopant is carried out after the deposition of the amorphous germanium seed layer and before the crystallization process.

[0040] Such features reduce the defectivity at the Si charge / Ge absorption layers interface and consequently minimize the leakage current.

[0041] In an exemplary implementation of the method, the method comprises: forming an n-type doped intermediate epitaxial layer between the embedded intrinsic layer and the n doped layer, the n-type doped intermediate epitaxial layer being configured to smoothen a doping transition between the embedded intrinsic layer and the n doped layer in order to reduce a peak electric field at an interface between the embedded intrinsic layer and the n doped layer.

[0042] Such feature avoids or smoothens the otherwise steep doping transition between the Si multiplication and cathode contact layer. This results in enhanced ruggedness and better timing performance.

[0043] Forming the n-type doped intermediate epitaxial layer has benefits in terms of enhanced ruggedness and timing characteristics improvement. In an exemplary implementation of the method, the p-type dopant is configured to create a doping peak with an intermediate value between a doping peak of the germanium absorption layer and a doping peak of the p doped charge layer.

[0044] This results in a smooth doping profile and hence in enhanced ruggedness and better timing performance.

[0045] In an exemplary implementation of the method, the method comprises: implanting non-dopant species at the interface region between the p doped charge layer and the germanium absorption layer, the non-dopant species being configured to repair a defectivity due to lattice mismatch at the interface region.

[0046] This feature guarantees less defectivity at the Ge / Si interface due to the annealing effect generated by the implant of neutral species at the interface region and subsequent thermal step. This results in a lower dark current.

[0047] In an exemplary implementation of the method, the non-dopant species and the p-type dopant are co-implanted to generate a pre-determined doping profile at the interface region between the p doped charge layer and the germanium absorption layer.

[0048] When co-implanting the non-dopant species with the p-type dopant, the advantages of both doping can be achieved, i.e., advantages of features I and II.

[0049] In an exemplary implementation of the method, the method comprises: creating a predetermined doping profile of the p doped charge layer, the interface region and the p-type doped intermediate layer by the implantation of the non-dopant species and the p-type dopant.

[0050] By such implantation, a desired doping profile can be generated.

[0051] In an exemplary implementation of the method, the method comprises: forming a lateral doping profile of the p doped charge layer with increasing doping from a center of the central region outwards.

[0052] Compared to constant lateral doping profile, the use of a lateral doping gradient is beneficial to slightly improve the timing characteristics.

[0053] In an exemplary implementation of the method, the method comprises: forming an n-type doped intermediate epitaxial layer between the embedded intrinsic layer and the n doped layer, the n-type doped intermediate epitaxial layer having a constant doping profile or a gradient doping profile in between a doping profile of the embedded intrinsic layer and a doping profile of the n doped layer.

[0054] Such feature improves the timing characteristics.

[0055] In an exemplary implementation of the method, the method comprises: forming multiple n-type doped intermediate epitaxial layers between the embedded intrinsic layer and the n doped layer, the multiple n-type doped intermediate epitaxial layers having a multi-step graded doping profile in between a doping profile of the embedded intrinsic layer and a doping profile of the n doped layer.

[0056] This feature is effective to further smoothen electrical filed peaks at the interface and improve timing characteristic. According to a third aspect, the disclosure relates to an avalanche photodetector (APD), obtainable by the method of manufacture according to the first aspect or the second aspect.

[0057] Such an APD provides optimized performances in terms of dark current reduction and timing response.

[0058] BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Further embodiments of the disclosure will be described with respect to the following figures, in which:

[0060] Figure 1 shows a cross sections of an avalanche photodetector (APD) 100 obtained by a method for manufacturing such APD 100 according to the disclosure;

[0061] Figure 2 shows different cross sections 200a, 200b, 200c of an avalanche photodetector (APD) after different processing stages for improving the quality of the Si / Ge interface according to the disclosure;

[0062] Figures 3a and 3b show different cross sections of an APD according to an exemplary process flow to integrate the implant of neutral and P dopant species at the interface between the Ge absorption and Si charge layers according to a first embodiment;

[0063] Figures 4a to 4d show different cross sections of an APD after respective processing stages according to four different variants of a method according to a second embodiment;

[0064] Figures 5a to 5d show different cross sections of an APD after respective processing stages according to four different variants of a method according to a third embodiment; and

[0065] Figure 6 shows a schematic diagram illustrating a method 600 for manufacturing an avalanche photodetector (APD) according to the disclosure.

[0066] DETAILED DESCRIPTION OF EMBODIMENTS

[0067] In the following detailed description, reference is made to the accompanying drawings, which form a part thereof, and in which is shown by way of illustration specific aspects in which the disclosure may be practiced. It is understood that other aspects may be utilized and structural or logical changes may be made without departing from the scope of the disclosure. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the disclosure is defined by the appended claims.

[0068] It is understood that comments made in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa. For example, if a specific method step is described, a corresponding device may include a unit to perform the described method step, even if such unit is not explicitly described or illustrated in the figures. Further, it is understood that the features of the various exemplary aspects described herein may be combined with each other, unless specifically noted otherwise.

[0069] Figure 1 shows a cross section of an avalanche photodetector (APD) 100 obtained by a method for manufacturing such APD 100 according to the disclosure. Such method comprises: providing a silicon-on-insulator substrate 101, 102 comprising an oxide layer 101 and a silicon layer 102 disposed on the oxide layer 101, the silicon-on-insulator substrate 101, 102 further comprising a central region 110 with an n-doped layer 103 embedded in the silicon layer 102, an embedded intrinsic layer 104, an intrinsic multiplication layer 105 and a p doped charge layer 106, wherein the embedded intrinsic layer 104 is overlaying the n-doped layer 103, wherein the intrinsic multiplication layer 105 is overlaying both, the embedded intrinsic layer 104 and the n-doped layer 103, and wherein the p-doped charge layer 106 is overlaying the intrinsic multiplication layer 105, as shown int the cross section of the APD in Figure 1.

[0070] The p-doped charge layer 106 forms with the embedded intrinsic layer 104, the intrinsic multiplication layer 105 and the n- doped layer 103 a junction of the APD 100 which is configured to cause a photoelectric effect to convert light energy to electrical energy.

[0071] The method further comprises: depositing a germanium absorption layer 107 overlaying the p doped charge layer 106, as shown in Figure 1; wherein the germanium absorption layer 107 is configured to function as a light absorption layer to absorb light.

[0072] Now, there are three different features that can be implemented either alone or in combination by the above-described method.

[0073] A first feature (I) is referred to as “defect improvement (non-dopant implantation)”.

[0074] For implementing this feature, the method further comprises: implanting non-dopant species at an interface region 118 between the p doped charge layer 106 and the germanium absorption layer 107, the non-dopant species being configured to repair a defectivity due to lattice mismatch at the interface region 118.

[0075] A second feature (II) is referred to as ‘lime response improvement (P)”.

[0076] For implementing this feature, the method further comprises: implanting p-type dopant at an interface region 118 between the p doped charge layer 106 and the germanium absorption layer 107 to form a p-type doped intermediate layer 109, the p-type dopant being configured to smoothen a doping transition 201 as shown in Figure 2 between the germanium absorption layer 107 and the p doped charge layer 106 in order to reduce formation of electrical field spikes at the interface region 118.

[0077] A third feature (III) is referred to as “time response improvement (N)”.

[0078] For implementing this feature, the method further comprises: forming an n-type doped intermediate epitaxial layer 117 between the embedded intrinsic layer 104 and the n doped layer 103, the n-type doped intermediate epitaxial layer 117 being configured to smoothen a doping transition 202 as shown in Figure 2 between the embedded intrinsic layer 104 and the n doped layer 103 in order to reduce a peak electric field at an interface between the embedded intrinsic layer 104 and the n doped layer 103.

[0079] Forming the n-type doped intermediate epitaxial layer 117 has benefits in terms of enhanced ruggedness and timing characteristics improvement.

[0080] The three features are further described below with respect to Figure 2.

[0081] Figure 2 shows different cross sections 200a, 200b, 200c of an avalanche photodetector (APD) after different processing stages for improving the quality of the Si / Ge interface according to the disclosure. In particular, processing stages related to feature I (200a), feature II (200b) and feature III (200c) as described above are shown.

[0082] The germanium absorption layer 107 may comprise a bottom area 107a facing the p doped charge layer 106. The non-dopant species are implanted at the bottom area 107a of the germanium absorption lay er 107. The non-dopant species may be implanted to cross the interface region 118 between the p doped charge layer 106 and the germanium absorption layer 107 as shown in Figure 1.

[0083] Depositing the germanium absorption layer 107 may comprise: depositing an amorphous germanium seed layer; and crystallizing the amorphous germanium seed layer by a crystallization process, in particular by annealing, to obtain the germanium absorption layer 107; wherein the implanting of the non-dopant species may be carried out after the deposition of the amorphous germanium seed layer and before the crystallization process.

[0084] The amorphous germanium seed layer may function as an implantation screen layer which is configured to contribute to a dopant depth accuracy and dopant distribution accuracy. The amorphous germanium seed layer functioning as an implantation screen layer can thus enable creation of shallower junctions.

[0085] The non-dopant implanted species may be configured to suppress doping diffusion and / or modify material property in order to improve device reliability. This has obvious benefits such as good amorphization performance, less end of range defect and stress relaxation.

[0086] The non-dopant implanted species may comprise one or more of the following species, for example: Carbon, Fluorine and Nitrogen or others.

[0087] The p-type dopant may be implanted with the non-dopant species at a same implantation step or at different implantation steps.

[0088] The p-type dopant can be Boron, for example. Depositing the germanium absorption layer 107 may comprise: depositing an amorphous germanium seed layer; and crystallizing the amorphous germanium seed layer by a crystallization process, in particular by annealing, to obtain the germanium absorption layer 107; wherein the implanting of the p-type dopant is carried out after the deposition of the amorphous germanium seed layer and before the crystallization process.

[0089] The method may further comprise implementation of feature IH (200c), i.e.: forming an n-type doped intermediate epitaxial layer 117 between the embedded intrinsic layer 104 and the n doped layer 103, the n-type doped intermediate epitaxial layer

[0090] 117 being configured to smoothen a doping transition 202 between the embedded intrinsic layer 104 and the n doped layer 103 in order to reduce a peak electric field at an interface between the embedded intrinsic layer 104 and the n doped layer 103.

[0091] Forming the n-type doped intermediate epitaxial layer 117 has benefits in terms of enhanced ruggedness and timing characteristics improvement.

[0092] The p-type dopant may be configured to create a doping peak with an intermediate value between a doping peak of the germanium absorption layer 107 and a doping peak of the p doped charge layer 106.

[0093] The method may further comprise implementation of feature I (200a), i.e.: implanting non-dopant species at the interface region

[0094] 118 between the p doped charge layer 106 and the germanium absorption layer 107, the non-dopant species being configured to repair a defectivity due to lattice mismatch at the interface region 118.

[0095] The non-dopant species and the p-type dopant may be co-implanted to generate a pre-determined doping profile at the interface region 118 between the p doped charge layer 106 and the germanium absorption layer 107.

[0096] The method may further comprise: creating a predetermined doping profile 402, 403 of the p doped charge layer 106, the interface region 118 and the p-type doped intermediate layer 109 by the implantation of the non-dopant species and the p-type dopant, e.g. as shown in Figures 4a to 4d.

[0097] The method may further comprise: forming a lateral doping profile of the p doped charge layer 106 with increasing doping from a center of the central region 110 outwards, e.g. as shown in Figures 4d and 5d.

[0098] The method may further comprise: forming an n-type doped intermediate epitaxial layer 117 between the embedded intrinsic layer 104 and the n doped layer 103, the n-type doped intermediate epitaxial layer 117 having a constant doping profile 504a or a gradient doping profile 504c in between a doping profile of the embedded intrinsic layer 104 and a doping profile of the n doped layer 103, e.g. as shown in Figures 5a to 5c.

[0099] The method may further comprise: forming multiple n-type doped intermediate epitaxial layers 117a, 117b, 117c between the embedded intrinsic layer 104 and the n doped layer 103, the multiple n-type doped intermediate epitaxial layers 117a, 117b, 117c having a multi-step graded doping profile 504b in between a doping profile of the embedded intrinsic layer 104 and a doping profile of the n doped layer 103, e.g. as shown in Figure 5b.

[0100] For implementing feature III corresponding to processing step 200c, the analog processing steps or stages as described above for features I and II may be implemented.

[0101] In the following, specific embodiments of the method for manufacturing the APD 100 are described. A preferred embodiment may be represented by Figures 1 and 2, where the above-described three features I, II and III are integrated and highlighted with dashed lines at the different interface regions.

[0102] The implant of neutral species at the Ge / Si interface can be carried out after amorphous Ge layer deposition and before the Ge crystallization process such to repair the detectivity at the Si / Ge layer interface due to lattice mismatch (Feature I in Figures 1 and 2). Amorphous Ge seed layer can be used as implantation screen layer, which can contribute to the accuracy of dopant depth and distribution creating shallower junctions, applying into both non-dopant and dopant implanted species. Non-dopant implanted species, such as Carbon (C), Fluorine (F) and Nitrogen (N), can either suppress doping diffusion or modify material property and improve device reliability. This has obvious benefits, such as good amorphization performance, less end of range defect and stress relaxation.

[0103] Likewise, P type dopant (e.g., boron) can be implanted at the same implantation step together with neutral species or in a different implantation step in order to smoothen the steep doping transition existing between the low doped Ge absorption layer and highly doped Si charge layer (Feature II in Figures 1 and 2). This avoids the formation of electrical field spikes at the same interface which can have an impact on leakage current and timing characteristics. A process flow to integrate the features I and II into an exemplary Ge / Si APD structure in shown in Figure 3.

[0104] As shown in Figures 1 and 2, the use of an intermediate epitaxial layer placed between the highly doped bottom Si cathode layer and low doped Si multiplication region may be applied to smoothen the steep doping transition between the same two layers (about 3 orders of magnitude of doping difference), reducing the peak electrical field at this interface with consequential benefits in terms of enhanced ruggedness and timing characteristics improvement.

[0105] The schematic cross section illustrated in Figures 1 and 2 does not include the anode metallization layer on top of the Germanium layer.

[0106] The process sequence described at high level in Figures 1 and 3 can be applied to any SACM APDs based on the use of hetero structures.

[0107] The embodiment shown in Figures 1 and 2 represents the preferred features to improve Si / Ge interface and smoothen the doping transitions between the Ge absorption and Si charge layers and Si absorption and bottom contact layers, respectively. Figures 3a and 3b show different cross sections of an APD according to an exemplary process flow to integrate the implant of neutral and P dopant species at the interface between the Ge absorption and Si charge layers according to a first embodiment.

[0108] Figure 3a shows a device 300a obtainable by the first processing stage of the method described above with respect to Figures 1 and 2, i.e.: providing a silicon-on-insulator substrate 101, 102 comprising an oxide layer 101 and a silicon layer 102 disposed on the oxide layer 101, the silicon-on-insulator substrate 101, 102 further comprising a central region 110 with an n-doped layer 103 embedded in the silicon layer 102, an embedded intrinsic layer 104, an intrinsic multiplication layer 105 and a p doped charge layer 106, wherein the embedded intrinsic layer 104 is overlaying the n-doped layer 103, wherein the intrinsic multiplication layer 105 is overlaying both, the embedded intrinsic layer 104 and the n-doped layer 103, and wherein the p- doped charge layer 106 is overlaying the intrinsic multiplication layer 105, as shown in the cross section of the device 300a in Figure 3a.

[0109] The p-doped charge layer 106 forms with the embedded intrinsic layer 104, the intrinsic multiplication layer 105 and the n- doped layer 103 a junction of the APD 100 which is configured to cause a photoelectric effect to convert light energy to electrical energy. SiOx may be used, for example, to create an Si window in the central region 110 as shown in Figure 1 for Ge epi growing selectively on the Si charge layer 106 as shown in Figure 3b.

[0110] The device 300b shown in Figure 3b is obtainable from the device 300a after the second processing stage of the method described above with respect to Figures 1 and 2, i.e.: depositing a germanium absorption layer 107 overlaying the p doped charge layer 106, as shown in Figure 3b; wherein the germanium absorption layer 107 is configured to function as a light absorption layer to absorb light.

[0111] A p doped termination ring 114 may be arranged to surround the p doped charge layer 106 as shown in Figure 3b.

[0112] The Ge Epi process may comprise the following stages, for example:

[0113] 1. Native oxide removal (at about 1150°C);

[0114] 2. Amorphous Ge seed layer deposition (at about 350-400°C, <250A);

[0115] 2.1 non-dopant implantation to Ge / Si interface (defect repair) to implement feature I as described above;

[0116] 2.2 dopant implantation to change steep doping transition at the interface (timing response improvement) to implement feature II as described above;

[0117] 3. Ge crystallization, mainly to lock mis-fit dislocation (ramp to about >600°C);

[0118] 4. Ge deposition, major Ge Bulk (at about 600-680°C).

[0119] Figures 4a to 4d show different cross sections 400a, 400b, 400c, 400d of an APD after respective processing stages according to four different variants of a method according to a second embodiment.

[0120] In this second embodiment additional variants are presented to implant neutral and P dopant impurities after the formation of the first thin Ge seed layer and before the Ge crystallization phase. They include:

[0121] Variant 1 (as reported in Figures 1 and 2), also referred to as the basic implementation with implantation after Ge seed layer to form P intermediate layer 109 and non-dopant region 118. Neutral and dopant implants are separate and carried out in two different steps allowing to optimize the implanted profile 402, 403 of the different species. The P type implant 109 generates a doping peak with intermediate value between the low doped Ge layer 107 and underlying highly doped Si charge layer 106.

[0122] Variant 2, co-implantation for both, P intermediate layer 109 and non-dopant region 118. Neutral and dopant impurities are co-implanted by using suitable energy and dose values to generate the whished implanted profiles 402, 403 at Ge / Si interface. The P type implant 109 is always calibrated such to generate a doping peak with intermediate value between the low doped Ge layer 107 and highly doped Si charge layer 106. This implementation allows to reduce the overall number of additional implantation steps.

[0123] Variant 3, 3 in 1, combining p+ charge layer 106, P intermediate layer 109 and non-dopant region 118. Neutral and dopant impurities are implanted to create the P+ charge layer 106, an intermediate P doped region 109 and intermediate region 118 with neutral impurities. In this embodiment, also the P+ doped charge layer 106 can be formed after Ge seed layer deposition in order to optimize its doping profile 402, 403 through a series of suitable chain implants. Neutral species can be implanted simultaneously with the P dopant during all or only some of the implant steps used for P dopant chain implantation. This implementation allows to finely tune the charge layer and interface regions doping profiles and better match the electrical specifications. Variant 4, basic implementation. The Ge seed layer 121 is sloped through a suitable wet etch process such to allow the formation of a lateral gradient doping profile 401 after implantation for both neutral and P doped species with increasing doping from the center outwards. This implementation has beneficial effects to improve timing characteristics. This variant can be combined with the above-described variants 1, 2 or 3.

[0124] Figures 5a to 5d show different cross sections of an APD after respective processing stages according to four different variants of a method according to a third embodiment.

[0125] In the third embodiment additional variants are reported to optimize the transition region between the low doped Si multiplication layer and underlying highly doped bottom contact layer as shown in Figures 5a to 5d. They include:

[0126] Variant A, basic implementation (as reported in Figures 1 and 2). An epitaxial layer 117 with intermediate constant doping is grown between the bottom contact 103 and Si multiplication layers 104. Typical doping and thickness of the intermediate layer can be, for example, between 1E17 cm-3 and 1E18 cm-3 and 0.5 um and 1 um, respectively.

[0127] Variant B, additional. The intermediate layer 117 can have a gradient doping profile 504c directly generated by epitaxy or by a N-type implant carried out onto an epitaxial layer with constant doping. The doping is increasing from the multiplication layer 104 to the bottom contact layer 103. This feature is effective to further smoothen electrical field peaks at the interface and to improve timing characteristics.

[0128] Variant C, additional. Multiple epitaxial layers 117a, 117b, 117c, each with constant doping, are sequentially grown on top of the bottom contact layer 103, such to generate a multi-step graded doping profile 504b with increasing doping towards the contact layer 103. The envisaged advantages of this implementation are the same already illustrated for the variant B.

[0129] Variant D, basic implementation. A sloped dielectric mask layer 122 (e.g., an oxide mask) can be generated by a suitable wet etch process such to generate a lateral doping profile 504 in the bottom contact layer 103 after an N-type dopant implantation. The lateral doping is increasing from the center outwards. This implementation brings beneficial effects to improve electrical carrier collection and to enhance timing characteristics. This variant can be combined with the variants A, B or C described above.

[0130] Figure 6 shows a schematic diagram illustrating a method 600 for manufacturing an avalanche photodetector (APD) according to the disclosure.

[0131] The method 600 comprises: providing 601 a silicon-on-insulator substrate 101, 102 comprising an oxide layer 101 and a silicon layer 102 disposed on the oxide layer 101, the silicon-on-insulator substrate 101, 102 further comprising a central region 110 with an n-doped layer 103 embedded in the silicon layer 102, an embedded intrinsic layer 104, an intrinsic multiplication layer

[0132] 105 and a p doped charge layer 106, wherein the embedded intrinsic layer 104 is overlaying the n-doped layer 103, wherein the intrinsic multiplication layer 105 is overlaying both, the embedded intrinsic layer 104 and the n-doped layer 103, and wherein the p-doped charge layer 106 is overlaying the intrinsic multiplication layer 105; wherein the p-doped charge layer

[0133] 106 forms with the embedded intrinsic layer 104, the intrinsic multiplication layer 105 and the n-doped layer 103 a junction of the APD 100 which is configured to cause a photoelectric effect to convert light energy to electrical energy, as described above with respect to Figures 1 to 5. The method 600 comprises: depositing 602 a germanium absorption layer (107) overlaying the p doped charge layer (106); wherein the germanium absorption layer (107) is configured to function as a light absorption layer to absorb light.

[0134] The method 600 further comprises an implanting step or stage 603 according to any one or any combination of features I, II and III as described above with respect to Figure 1 :

[0135] (Feature I): implanting non-dopant species at an interface region (118) between the p doped charge layer (106) and the germanium absorption layer (107), the non-dopant species being configured to repair a defectivity due to lattice mismatch at the interface region (118); and / or

[0136] (Feature II): implanting p-type dopant at an interface region 118 between the p doped charge layer 106 and the germanium absorption layer 107 to form a p-type doped intermediate layer 109, the p-type dopant being configured to smoothen a doping transition 201 between the germanium absorption layer 107 and the p doped charge layer 106 in order to reduce formation of electrical field spikes at the interface region 118; and / or

[0137] (Feature IH): forming an n-type doped intermediate epitaxial layer 117 between the embedded intrinsic layer 104 and the n doped layer 103, the n-type doped intermediate epitaxial layer 117 being configured to smoothen a doping transition 202 between the embedded intrinsic layer 104 and the n doped layer 103 in order to reduce a peak electric field at an interface between the embedded intrinsic layer 104 and the n doped layer 103.

[0138] The solution described in this disclosure can be applied to any kind of avalanche photodiode based on the use of separate absorption and charge multiplication layers (SACM) forming heterojunctions like Si / Ge APDs.

[0139] While a particular feature or aspect of the disclosure may have been disclosed with respect to only one of several implementations, such feature or aspect may be combined with one or more other features or aspects of the other implementations as may be desired and advantageous for any given or particular application. Furthermore, to the extent that the terms "include", "have", "with", or other variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term "comprise". Also, the terms "exemplary", "for example" and "e.g." are merely meant as an example, rather than the best or optimal. The terms “coupled” and “connected”, along with derivatives may have been used. It should be understood that these terms may have been used to indicate that two elements cooperate or interact with each other regardless whether they are in direct physical or electrical contact, or they are not in direct contact with each other.

[0140] Although specific aspects have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and / or equivalent implementations may be substituted for the specific aspects shown and described without departing from the scope of the disclosure. This application is intended to cover any adaptations or variations of the specific aspects discussed herein.

[0141] Although the elements in the following claims are recited in a particular sequence with corresponding labeling, unless the claim recitations otherwise imply a particular sequence for implementing some or all of those elements, those elements are not necessarily intended to be limited to being implemented in that particular sequence.

[0142] Many alternatives, modifications, and variations will be apparent to those skilled in the art in light of the above teachings. Of course, those skilled in the art readily recognize that there are numerous applications of the disclosure beyond those described herein. While the disclosure has been described with reference to one or more particular embodiments, those skilled in the art recognize that many changes may be made thereto without departing from the scope of the disclosure. It is therefore to be understood that within the scope of the appended claims and their equivalents, the disclosure may be practiced otherwise than as specifically described herein.

Claims

CLAIMS:

1. A method for manufacturing an avalanche photodetector, APD (100), the method comprising: providing a silicon-on-insulator substrate (101, 102) comprising an oxide layer (101) and a silicon layer (102) disposed on the oxide layer (101), the silicon-on-insulator substrate (101, 102) further comprising a central region (110) with an n-doped layer (103) embedded in the silicon layer (102), an embedded intrinsic layer (104), an intrinsic multiplication layer (105) and a p doped charge layer (106), wherein the embedded intrinsic layer (104) is overlaying the n-doped layer (103), wherein the intrinsic multiplication layer (105) is overlaying both, the embedded intrinsic layer (104) and the n-doped layer (103), and wherein the p-doped charge layer (106) is overlaying the intrinsic multiplication layer (105); wherein the p-doped charge layer (106) forms with the embedded intrinsic layer (104), the intrinsic multiplication layer(105) and the n-doped layer (103) a junction of the APD (100) which is configured to cause a photoelectric effect to convert light energy to electrical energy; depositing a germanium absorption layer (107) overlaying the p doped charge layer (106); wherein the germanium absorption layer (107) is configured to function as a light absorption layer to absorb light; and implanting non-dopant species at an interface region (118) between the p doped charge layer (106) and the germanium absorption layer (107), the non-dopant species being configured to repair a defectivity due to lattice mismatch at the interface region (118).

2. The method of claim 1 , wherein the germanium absorption layer (107) comprises a bottom area (107a) facing the p doped charge layer (106); wherein the non-dopant species are implanted at the bottom area (107a) of the germanium absorption layer (107); and wherein the non-dopant species are implanted to cross the interface region (118) between the p doped charge layer(106) and the germanium absorption layer (107).

3. The method of claim 1 or 2, wherein depositing the germanium absorption layer (107) comprises: depositing an amorphous germanium seed layer; and crystallizing the amorphous germanium seed layer by a crystallization process, in particular by annealing, to obtain the germanium absorption layer (107); wherein the implanting of the non-dopant species is carried out after the deposition of the amorphous germanium seed layer and before the crystallization process.

4. The method of claim 3, wherein the amorphous germanium seed layer functions as an implantation screen layer which is configured to contribute to a dopant depth accuracy and dopant distribution accuracy.

5. The method of any of the preceding claims, wherein the non-dopant implanted species are configured to suppress doping diffusion and / or modify material property in order to improve device reliability.

6. The method of any of the preceding claims, wherein the non-dopant implanted species comprise one or more of the following species: Carbon, Fluorine and Nitrogen.

7. The method of any of the preceding claims, comprising: implanting p-type dopant at the interface region (118) to form a p-type doped intermediate layer (109) between the p doped charge layer (106) and the germanium absorption layer (107), the p-type dopant being configured to smoothen a doping transition (201) between the germanium absorption layer (107) and the p doped charge layer (106) in order to reduce formation of electrical field spikes at the interface region (118).

8. The method of claim 7, wherein the p-type dopant is implanted with the non-dopant species at a same implantation step or at different implantation steps.

9. The method of any of the preceding claims, comprising: forming an n-type doped intermediate epitaxial layer (117) between the embedded intrinsic layer (104) and the n doped layer (103), the n-type doped intermediate epitaxial layer (117) being configured to smoothen a doping transition (202) between the embedded intrinsic layer (104) and the n doped layer (103) in order to reduce a peak electric field at an interface between the embedded intrinsic layer (104) and the n doped layer (103).

10. A method for manufacturing an avalanche photodetector, APD (100), the method comprising: providing a silicon-on-insulator substrate (101, 102) comprising an oxide layer (101) and a silicon layer (102) disposed on the oxide layer (101), the silicon-on-insulator substrate (101, 102) further comprising a central region (110) with an n-doped layer (103) embedded in the silicon layer (102), an embedded intrinsic layer (104), an intrinsic multiplication layer (105) and a p doped charge layer (106), wherein the embedded intrinsic layer (104) is overlaying the n-doped layer (103), wherein the intrinsic multiplication layer (105) is overlaying both, the embedded intrinsic layer (104) and the n-doped layer (103), and wherein the p-doped charge layer (106) is overlaying the intrinsic multiplication layer (105); wherein the p-doped charge layer (106) forms with the embedded intrinsic layer (104), the intrinsic multiplication layer (105) and the n-doped layer (103) a junction of the APD (100) which is configured to cause a photoelectric effect to convert light energy to electrical energy; depositing a germanium absorption layer (107) overlaying the p doped charge layer (106); wherein the germanium absorption layer (107) is configured to function as a light absorption layer to absorb light; and implanting p-type dopant at an interface region (118) between the p doped charge layer (106) and the germanium absorption layer (107) to form a p-type doped intermediate layer (109), the p-type dopant being configured to smoothena doping transition (201) between the germanium absorption layer (107) and the p doped charge layer (106) in order to reduce formation of electrical field spikes at the interface region (118).

11. The method of claim 10, wherein depositing the germanium absorption layer (107) comprises: depositing an amorphous germanium seed layer; and crystallizing the amorphous germanium seed layer by a crystallization process, in particular by annealing, to obtain the germanium absorption layer (107); wherein the implanting of the p-type dopant is carried out after the deposition of the amorphous germanium seed layer and before the crystallization process.

12. The method of claim 10 or 11, comprising: forming an n-type doped intermediate epitaxial layer (117) between the embedded intrinsic layer (104) and the n doped layer (103), the n-type doped intermediate epitaxial layer (117) being configured to smoothen a doping transition (202) between the embedded intrinsic layer (104) and the n doped layer (103) in order to reduce a peak electric field at an interface between the embedded intrinsic layer (104) and the n doped layer (103).

13. The method of any one of claims 10 to 12, wherein the p-type dopant is configured to create a doping peak with an intermediate value between a doping peak of the germanium absorption layer (107) and a doping peak of the p doped charge layer (106).

14. The method of any one of claims 10 to 13, comprising: implanting non-dopant species at the interface region (118) between the p doped charge layer (106) and the germanium absorption layer (107), the non-dopant species being configured to repair a defectivity due to lattice mismatch at the interface region (118).

15. The method of claim 14, wherein the non-dopant species and the p-type dopant are co-implanted to generate a pre-determined doping profile at the interface region (118) between the p doped charge layer (106) and the germanium absorption layer (107).

16. The method of claim 14 or 15, comprising: creating a predetermined doping profile (402, 403) of the p doped charge layer (106), the interface region (118) and the p-type doped intermediate layer (109) by the implantation of the non-dopant species and the p-type dopant.

17. The method of any one of claims 10 to 16, comprising: forming a lateral doping profile of the p doped charge layer (106) with increasing doping from a center of the central region (110) outwards.

18. The method of any one of claims 10 to 17, comprising: forming an n-type doped intermediate epitaxial layer (117) between the embedded intrinsic layer (104) and the n doped layer (103), the n-type doped intermediate epitaxial layer (117) having a constant doping profile (504a) or a gradient doping profile (504c) in between a doping profile of the embedded intrinsic layer (104) and a doping profile of the n doped layer (103).

19. The method of any one of claims 10 to 18, comprising: forming multiple n-type doped intermediate epitaxial layers (117a, 117b, 117c) between the embedded intrinsic layer (104) and the n doped layer (103), the multiple n-type doped intermediate epitaxial layers (117a, 117b, 117c) having a multi-step graded doping profile (504b) in between a doping profile of the embedded intrinsic layer (104) and a doping profile of the n doped layer (103).

20. An avalanche photodetector, APD (100), obtainable by the method of manufacture according to any one of the preceding claims.

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