Method for controlling a semiconductor switching element, driver circuit for controlling a semiconductor switching element, half-bridge circuit, and electric converter

Abstract

The invention relates to the controlling of semiconductor switching elements in a half-bridge. According to the invention, after a semiconductor switching element has been opened, an active Miller clamping function is carried out in order to connect, with low resistance, the gate terminal of the semiconductor switching element to a low potential. However, the active Miller clamping is activated only for a predetermined period of time and then deactivated, with the result that the low-resistance connection to the low potential is cancelled again.

Description

[0001] Description

[0002] title

[0003] Method for controlling a semiconductor switching element, driver circuit for controlling a semiconductor switching element, half-bridge circuit and electrical power converter

[0004] Technical field

[0005] The present invention relates to a method for controlling a semiconductor switching element and a driver circuit for controlling a semiconductor switching element. The present invention further relates to a half-bridge circuit and an electrical power converter.

[0006] background

[0007] Half-bridge circuits with two series-connected semiconductor switching elements are used in numerous applications, such as inverters in electric drive systems. When switching a power semiconductor, the control terminal of the power semiconductor can be connected to a low potential in a late phase of the turn-off process or even immediately after turn-off to counteract unwanted re-switching due to parasitic effects. This function is generally known as "Active Miller Clamping" (AMCL). For example, German patent application DE 10 2014 108 576 A1 describes a driver circuit with Miller clamping functionality for power semiconductor switches.

[0008] Disclosure of the invention

[0009] The present invention provides a method for controlling a semiconductor switching element in a half-bridge, a driver circuit for controlling a semiconductor switching element in a half-bridge, a half-bridge circuit, and an electrical power converter with the features of the independent claims. Further advantageous embodiments are the subject of the dependent claims.

[0010] Accordingly, the following is planned:

[0011] A method for controlling a semiconductor switching element in a half-bridge. The half-bridge comprises two semiconductor switching elements connected in series and linked at a junction. The semiconductor switching element to be controlled is located between a first terminal of a DC power supply and the junction. Another semiconductor switching element is located between the junction and a second terminal of the DC power supply. The method includes a step for receiving a commutation signal. This commutation signal is intended for a commutation process in which the semiconductor switching element to be controlled is to be opened and the other semiconductor switching element is to be closed. Furthermore, the method includes a step for activating active Miller clamping for the semiconductor switching element.Active Miller clamping is activated after the commutation signal has been received. In a subsequent step, the active Miller clamping is deactivated for the semiconductor switching element. Specifically, the active Miller clamping is deactivated after a predetermined time interval following activation.

[0012] Furthermore, the following is planned:

[0013] A driver circuit for controlling a semiconductor switching element in a half-bridge with two semiconductor switching elements. The semiconductor switching element to be controlled by the driver circuit is located between the first connection point of a DC voltage terminal and a node. Another semiconductor switching element is located between the node and a second connection point of the DC voltage terminal. The driver circuit is designed to receive a commutation signal for a commutation process. During this commutation process, the semiconductor switching element to be controlled by the driver circuit is to be opened, and the other semiconductor switching element is to be closed. Furthermore, the driver circuit is designed to activate active Miller clamping for the semiconductor switching element after receiving the commutation signal.Furthermore, the driver circuit is designed to deactivate the active Miller clamping for the semiconductor switching element. Specifically, the active Miller clamping is deactivated after a predetermined time interval following its activation.

[0014] Furthermore, the following is planned:

[0015] A bridge circuit with a half-bridge comprising two driver circuits according to the invention. The half-bridge includes two semiconductor switching elements. A first semiconductor switching element is arranged between a first connection point of a DC voltage terminal and a node, and a second semiconductor switching element is arranged between the node and a second connection point of the DC voltage terminal. The first driver circuit according to the invention is provided for controlling the first semiconductor switching element. The second driver circuit according to the invention is provided for controlling the second semiconductor switching element.

[0016] Finally, the following is planned:

[0017] An electrical power converter with an AC input, a DC input, and several half-bridge circuits according to the invention. Each node of a half-bridge circuit is connected to a terminal of the AC input. Furthermore, all half-bridges are connected to the terminals of the DC input.

[0018] Advantages of the invention

[0019] When switching off, that is, when a semiconductor switching element is opened, particularly during a commutation process in which the electric current through the switching element is to be commutated to another semiconductor switching element of a half-bridge, a rapid voltage rise typically occurs across the switching element. During this process, an electric current can be induced via an internal capacitance between the control terminal and an input terminal of the switching element, thereby increasing the voltage at the control terminal of the switching element. To effectively counteract this and prevent unintentional re-switching of the switching element, the control terminal is connected with a low resistance to a low potential. This function is known as active Miller clamping.In conventional approaches, this low-resistance electrical path remains open for the entire duration that the semiconductor switching element is supposed to be switched off. If the semiconductor switching element fails, there is a risk of a short circuit between the control terminal and an input terminal of the semiconductor switching element. If, during such a short circuit, the control terminal of the semiconductor switching element is connected to a low potential with low resistance, high electrical currents can flow. These high electrical currents can potentially damage the driver circuit for the semiconductor switching element.

[0020] Based on this understanding, one aspect of the present invention is to limit the duration of active Miller clamping—that is, the low-resistance connection of the control terminal to a low potential—to a specific time. Furthermore, the present invention is based on the understanding that the risk of a voltage rise at the control terminal of the semiconductor switching element is typically particularly high at the beginning of a commutation process in a half-bridge with two semiconductor switching elements. Once the commutation process is complete, the semiconductor switching element generally remains reliably open even without active Miller clamping.

[0021] The time limitation of the active Miller clamping during a commutation process, as described in the invention, significantly reduces the risk of the associated driver stage being overloaded by a defect in the semiconductor switching element. If the defect in the semiconductor switching element occurs after the active Miller clamping has ended, the higher-resistance connection provided for this purpose will result in a correspondingly lower and therefore manageable electrical current. Furthermore, even in the event of a fault during the active Miller clamping, the electrical energy dissipated in such a fault condition is significantly lower until the end of the active Miller clamping, thus potentially preventing damage to the corresponding driver stage even in such cases.

[0022] For the purposes of the present invention, a commutation signal can be understood, for example, as a signal that specifies the desired switching state of the semiconductor switching element. Additionally or alternatively, the commutation signal can also be understood as a signal for specifying the switching state of the further, i.e., the complementary, semiconductor switching element.

[0023] The semiconductor switching elements can be, for example, MOSFETs. Accordingly, the control terminal is the gate terminal of such a transistor, while the drain and source represent the input and output of the semiconductor switching element, respectively. Alternatively, the semiconductor switching elements can also include bipolar transistors, such as insulated-gate bipolar transistors (IGBTs). In this case, the base of such a transistor can be the control terminal, while the emitter and collector represent the input and output, respectively.

[0024] According to one embodiment, the commutation signal includes a signal to open the semiconductor switching element. This corresponds to the signal for the desired switching state of this semiconductor switching element. Accordingly, the active Miller clamping can be activated based on this signal to open the semiconductor switching element. The activation of the active Miller clamping can be delayed by a predetermined initial time interval compared to the time of opening the semiconductor switching element.

[0025] According to a further embodiment, the commutation signal includes a signal to close the additional, i.e., the complementary, semiconductor switching element. In this case, the activation of the active Miller clamping can be delayed by a predetermined second time interval compared to the time of the signal to close the additional semiconductor switching element. This predetermined second time interval can optionally also be zero. In this case, the activation of the active Miller clamping occurs simultaneously with the closing of the additional semiconductor switching element.

[0026] According to one embodiment, the active Miller clamping comprises a low-resistance connection of a control terminal of the semiconductor switching element to a low potential or a potential for opening the semiconductor switching element.

[0027] According to one embodiment, the predetermined time interval during which the active Miller clamping is deactivated after the preceding activation can be adjusted using a parameterization for a control signal at the control terminal of the additional semiconductor switching element. Such a parameterization can, for example, include a parameterization for a current profile that is to be provided at the control terminal for switching on the additional semiconductor switching element. Accordingly, the switch-on time of the additional semiconductor switching element can depend on this parameterization, such as the current profile.By appropriately adjusting the time until the Active-Miller clamping is deactivated, it can be ensured that the Active-Miller clamping is always only deactivated after the other semiconductor switching element is reliably switched on, thus eliminating any further risk of voltage overshoot between the input terminal and the control terminal on the semiconductor switching element for the Active-Miller clamping.

[0028] According to one embodiment, the predetermined time period for the

[0029] The deactivation time for the active Miller clamping may be greater than the time required for a complete turn-on cycle of the other semiconductor switching element. Furthermore, the predetermined time for deactivating the active Miller clamping may be significantly shorter than the pulse duration of the turn-on signal for the other semiconductor switching element.

[0030] The above embodiments and further developments can be combined with one another as appropriate. Further embodiments, further developments, and implementations of the invention also include combinations of features of the invention described previously or subsequently with regard to the exemplary embodiments, even if not explicitly mentioned. In particular, those skilled in the art will also add individual aspects as improvements or additions to the respective basic forms of the invention.

[0031] Brief description of the drawings

[0032] Further features and advantages of the invention are explained below with reference to the figures. These show:

[0033] Fig. 1 : a schematic representation of a principle diagram of a half-bridge circuit with driver circuits according to one embodiment;

[0034] Fig. 2: a timing diagram to illustrate the operating principle for controlling a semiconductor switching element according to one embodiment;

[0035] Fig. 3: a schematic representation of a principle diagram of a half-bridge circuit with driver circuits according to a further embodiment; Fig. 4: a timing diagram to illustrate the operating principle for controlling a semiconductor switching element according to a further embodiment;

[0036] Fig. 5: a schematic representation of a principle diagram of an electrical power converter with half-bridge circuits according to one embodiment; and

[0037] Fig. 6: a flowchart as it underlies a method for controlling a semiconductor switching element according to one embodiment.

[0038] Description of embodiments

[0039] Figure 1 shows a schematic diagram of a half-bridge circuit according to one embodiment. The half-bridge circuit comprises a first semiconductor switching element 21 and a second semiconductor switching element 22. The first semiconductor switching element 21 is arranged between a first terminal 31 of a DC voltage terminal 30 and a node K. The second semiconductor switching element 22 is arranged between node K and a second terminal 32 of the DC voltage terminal 30. The first semiconductor switching element 21 is controlled at a control terminal by a driver circuit 11. Similarly, the second semiconductor switching element 22 is controlled at a control terminal by another driver circuit 12. The driver circuits 11 and 12 control the semiconductor switching elements 21 and 22 according to signals from a control unit 10.For example, the control unit 10 can signal a logic high (1) to the driver circuits 11 and 12 when the corresponding semiconductor switching element 21 or 22 is to be closed. Similarly, a logic low signal from the control unit 10 can cause the corresponding driver circuit 11 or 12 to open the respective semiconductor switching element 21 or 22. To close a semiconductor switching element 21 or 22, the driver circuit can apply a high potential to the control terminal of the respective semiconductor switching element 21 or 22 or provide a suitable current or current profile at the respective control terminal. To open the respective semiconductor switching element 21 or 22, the corresponding driver circuit 11 or 12 can apply a low potential to the corresponding control terminal of the semiconductor switching element 21 or 22.

[0040] During a commutation process, that is, for example, during a change from a state in which the first semiconductor switching element 21 is initially closed and the second semiconductor switching element 22 is open, to a state in which the first semiconductor switching element 21 is open and the second semiconductor switching element 22 is closed, a voltage rise can occur between the control terminal of the first semiconductor switching element 21 and the input terminal connected to the first DC voltage terminal 31. Due to the capacitance between the control terminal and the input terminal, this can lead to an electric current flowing towards the control terminal. This poses a risk of unintentionally switching on or closing the first semiconductor switching element 21.To prevent this, the control terminal of the first semiconductor switching element 21 can be switched to a low-impedance, low-potential state for opening the first semiconductor switching element 21. This process is called active Miller clamping.

[0041] Figure 2 shows a timing diagram illustrating the active Miller clamping according to a first embodiment. In the upper section, reference numeral 100 represents the control signal from the control unit 10 for the first driver circuit 11. After this control signal changes from a logic high to a logic low, the first semiconductor switching element 21 opens during a time interval 110. Furthermore, starting from the time at which the control signal 100 changes from logic high to logic low, the driver circuit 11 can activate the active Miller clamping 120 for the first semiconductor switching element 21 after a first time interval t1.

[0042] In the lower section, reference numeral 200 shows the control signal from the control unit 10 for the driver circuit 12 of the second semiconductor switching element 22. When this control signal changes from a logic low to a logic high, the corresponding driver circuit 12 can provide a suitable voltage or current or current profile at the control terminal of the second semiconductor switching element 22 to close the second semiconductor switching element 22. Subsequently, the transition from the blocking to the conducting state occurs in the second semiconductor switching element 22 within a time interval 210.

[0043] As can be seen further in Figure 2, the active Miller clamping 120 for the first semiconductor switching element 21 is not maintained for the entire period in which the second semiconductor switching element 22 is conductive. Rather, the active Miller clamping 120 is terminated after a predetermined time interval tA. Subsequently, the low-resistance connection to the low potential at the control terminal of the first semiconductor switching element 21 can be removed.

[0044] If different parameters, such as different current profiles or similar, are used to close the second semiconductor switching element 22, the time interval for turning on 210 of the second semiconductor switching element 22 can also vary depending on this parameterization. In such a case, the time interval tA during which the active Miller clamping is active can also be adjusted depending on this parameterization. The preceding section described the commutation process from an initially closed first semiconductor switching element 21 and an initially open second semiconductor switching element 22 to an open first semiconductor switching element 21 and a closed second semiconductor switching element 22. Naturally, the reverse commutation process can also be implemented accordingly.The active Miller clamping for the second semiconductor switching element 22 is implemented in the same way by the second driver circuit 12.

[0045] Figure 3 shows a schematic representation of a principle diagram of a half-bridge circuit according to a further embodiment. The embodiment according to Figure 3 differs from the embodiment described above, in particular in that the control signals for both semiconductor switching elements 21, 22 are provided by the control unit 10 at the driver circuits 11, 12. Furthermore, all the above statements also apply in connection with the statements in Figures 1 and 2.

[0046] If a driver circuit 11 (or 12) also receives the control signal for the other semiconductor switching element 22 (or 21), the activation of the Active-Miller-Clamping 120 can also be based on this signal.

[0047] As shown in the timing diagram in Figure 4, the active Miller clamping 120 can be activated with a delay of a predefined second time interval t2 after the change from logic low to logic high of the control signal for the second semiconductor switching element 22. This delay t2 can optionally be zero, so that the active Miller clamping 120 is started directly with the change from logic low to logic high. In this case as well, the active Miller clamping 120 can be terminated after a predefined time interval tA. Here, the active Miller clamping 120 is terminated after the switch-on process 210 for the second semiconductor switching element 22 is complete.

[0048] Figure 5 shows a schematic representation of an electrical power converter. The power converter includes a DC input 30, which can be connected to a DC network or a DC voltage source. Furthermore, the power converter includes an AC input 40 with several AC inputs 41, 42, 43. The embodiment shown here with three AC inputs 41, 42, 43 and three half-bridges is, however, only exemplary and does not represent a limitation of the present invention. In principle, a different number of AC inputs and half-bridges than three is also possible.

[0049] The power converter further comprises several half-bridges, in particular several half-bridges which can be configured according to the preceding embodiments. Each node K of a half-bridge is connected to a connection point 41, 42, 43 of the AC voltage terminal 40. An electric machine (not shown), for example, can be connected to the AC voltage terminal 40. Thus, the power converter can generate an AC voltage to drive the electric machine connected to the AC voltage terminal 40 using an electric DC voltage provided at the input terminal 30.

[0050] Finally, Figure 6 shows a flowchart of a method for controlling a semiconductor switching element 21, 22 in a half-bridge according to one embodiment. The method can, in principle, comprise any steps suitable for implementing the operating strategies described above in connection with the embodiments mentioned above. Similarly, the half-bridges described above, in particular the driver circuits 11, 12, can also comprise any components suitable for implementing the method described below. The method can, in particular, be applied to one of the half-bridges described above.

[0051] In step S1, a commutation signal is received for a commutation operation. This commutation signal could, for example, be a control signal from the control unit 10. Such a commutation signal could be, for instance, the control signal to open or close the semiconductor 21 (or 22) to be controlled in the half-bridge. Alternatively, the commutation signal could also be the control signal for the respective complementary semiconductor switching element 22 (or 21).

[0052] After the semiconductor switching element 21 (or 22) to be controlled has been opened, an active Miller clamping can be activated for this semiconductor switching element 21 (or 22) in step S2. The time for activating the active Miller clamping can be shifted by a predetermined time interval t1 or t2 compared to the time of receiving the commutation signal. The active Miller clamping is then activated for a predetermined time interval tA and deactivated again in step S3 after this predetermined time interval tA has elapsed.

[0053] In summary, the present invention relates to the control of semiconductor switching elements in a half-bridge. It is provided that, after opening a semiconductor switching element, an active Miller clamping function is implemented to connect the control terminal of the semiconductor switching element to a low potential with low resistance. However, the active Miller clamping is only activated for a predetermined period and then deactivated, so that the low-resistance connection to the low potential is removed.

Claims

1. Claims 1. Method for controlling a semiconductor switching element (21) in a half-bridge with two semiconductor switching elements (21, 22), wherein the semiconductor switching element (21) is arranged between a first connection point (31) of a DC voltage terminal (30) and a node (K) and a further semiconductor switching element (22) is arranged between the node (K) and a second connection point (32) of the DC voltage terminal (30), comprising the steps: Receiving (S1) a commutation signal for a commutation process in which the semiconductor switching element (21) is to be opened and the further semiconductor switching element (22) is to be closed; Activating (S2) an active Miller clamp for the semiconductor switching element (21) after the commutation signal has been received; and Deactivating (S3) the active Miller clamping for the semiconductor switching element (21) after a predetermined time interval (tA).

2. Method according to claim 1, wherein the commutation signal comprises a signaling to open the semiconductor switching element (21), and wherein the activation (S2) of the active Miller clamping is performed with a delay (t1) relative to the reception of the signaling to open the semiconductor switching element (21).

3. The method of claim 1, wherein the commutation signal comprises a signaling to close the further semiconductor switching element (22), and wherein the activation (S2) of the active Miller clamping is opposed to the reception of the signaling to close the further The semiconductor switching element (22) is executed with a delay of a predetermined second time interval (t2).

4. Method according to any one of claims 1 to 3, wherein the Active-Miller clamping comprises a low-resistance connection of a control terminal of the semiconductor switching element (21) to a potential for opening the semiconductor switching element (21).

5. Method according to any one of claims 1 to 4, wherein the predetermined time interval (tA) for deactivating (S3) the active Miller clamping is adjustable using a parameterization for a control signal at a control terminal of the further semiconductor switching element (22).

6. Method according to claim 5, wherein the parameterization for the control signal comprises a parameterization for a current profile of the control signal.

7. Method according to any one of claims 1 to 6, wherein the predetermined time interval (tA) for deactivating (S3) the active Miller clamping is greater than a time interval for a complete switch-on process of the further semiconductor switching element (22) and less than a pulse duration of a switch-on signal of the further semiconductor switching element (22).

8. Driver circuit (11) for controlling a semiconductor switching element (21) in a half-bridge with two semiconductor switching elements (21, 22), wherein the semiconductor switching element (21) is arranged between a first terminal (31) of a DC voltage terminal (30) and a node (K), and a further semiconductor switching element (22) is arranged between the node (K) and a second terminal (32) of the DC voltage terminal (30), wherein the driver circuit (11) is designed to receive a commutation signal for a commutation process, wherein during the commutation process the semiconductor switching element (21) is opened to activate an active Miller clamping for the semiconductor switching element (21) after the commutation signal has been received and to deactivate the active Miller clamping for the semiconductor switching element after a predetermined time period (tA) in order for the further semiconductor switching element (22) to be closed.

9. Half-bridge circuit comprising: a half-bridge with two semiconductor switching elements (21, 22), wherein a first semiconductor switching element (21) is arranged between a first connection point (31) of a DC voltage terminal (30) and a node (K), and a second semiconductor switching element (22) is arranged between the node (K) and a second connection point (32) of the DC voltage terminal (30); and a first driver circuit (11) according to claim 8, for controlling the first semiconductor switching element (21), and a second driver circuit (12) according to claim 8, for controlling the second semiconductor switching element (22).

10. Electrical power converter, comprising: an AC voltage connection (40); a DC voltage connection (30); several half-bridge circuits according to claim 9, wherein each node (K) of a half-bridge circuit is connected to a connection point (41, 42, 43) of the AC voltage connection (40), and the multiple half-bridges are connected to the DC voltage terminal (30).

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