Methods and systems for constructing a multi-qubit gate with a tunable coupler and SFQ-control using differentiable simulation

Abstract

A method for constructing a multi-qubit gate on a circuit using differentiable simulation of the multi-qubit gate. The circuit comprises a first qubit, a second qubit, and a coupler qubit. At least one of the first qubit or the second qubit is controlled at least in part using SFQ control. The first qubit and the second qubit each comprises a tunable frequency qubit. The first qubit and the second qubit are directly and capacitively coupled. The first qubit and the second qubit each is capacitively coupled to the coupler qubit. The first qubit and the second qubit are capacitively driven by an external SFQ train of pulses. The coupler qubit is inductively driven by an SFQ pulse generator for adding and for removing flux portions.

Description

WSGR Docket No.49676-738.601 METHODS AND SYSTEMS FOR CONSTRUCTING A MULTI-QUBIT GATE WITH A TUNABLE COUPLER AND SFQ-CONTROL USING DIFFERENTIABLE SIMULATION CROSS-REFERENCE

[0001] This application claims the benefit of U.S. Provisional Application No.63 / 663,567, filed June 24, 2024, and U.S. Provisional Application No.63 / 736,084, filed December 19, 2024, which applications are each incorporated herein by reference in their entireties. BACKGROUND

[0002] A single-flux quantum (SFQ) may be a single quantum of magnetic flux. For example, a single quantum of magnetic flux may be generated using an electronic device that uses one or more Josephson junctions to generate and / or process digital signals. An SFQ-based control technique may be a digital approach to resolving issues of scalability related to the control of quantum systems and quantum hardware, such as, for example, physical space and heat. SFQ control may be a control technique that utilizes single-flux quanta for control. SUMMARY

[0003] Superconducting qubits (see, for example, P. Krantz, M. Kjaergaard, F. Yan, T. P. Orlando, S. Gustavsson, and W. D. Oliver, “A quantum engineer’s guide to superconducting qubits”, Applied Physics Reviews 6 (2019), which is incorporated by reference herein in its entirety) are a promising physical system for the implementation of quantum computing. These systems demonstrate good coherence times, on the order of hundreds of microseconds, and high quantum gate fidelities with relatively short gate durations, typically around tens of nanoseconds. Furthermore, superconducting quantum computers have been scaled to hundreds of qubits, providing promising prototypes for future fault-tolerant quantum machines.

[0004] Quantum processors with superconducting qubits may be controlled via a classical controller, which may send microwave voltage pulses to each qubit to perform a certain operation. This approach may suffer from limitations associated with the difficulties of generating and sending microwave signals from the classical controller at room temperature to a quantum chip in a cryogenic refrigerator. Furthermore, heat dissipation at millikelvin temperatures may also be an issue to consider (see, for example, S. Krinner, S. Storz, P. Kurpiers, P. Magnard, J. Heinsoo, R. Keller, J. Luetolf, C. Eichler, and A. Wallraff, “Engineering cryogenic setups for 100-qubit scale super-conducting circuit systems”, EPJ Quantum Technology 6, 2 (2019), which is incorporated by reference herein for all purposes).WSGR Docket No.49676-738.601

[0005] One possible solution to this problem is to use single-flux-quantum (SFQ) technology (see, for example, J.-C. Lin and V. Semenov, “Timing circuits for rsfq digital systems”, IEEE transactions on applied superconductivity 5, 3472 (1995); and C. A. Mancini and M. F. Bocko, “Phase-locked operation of rsfq ring oscillators”, Superconductor Science and Technology 12, 789 (1999), each of which is incorporated by reference herein in its entirety) and push the controller to the refrigerator, which allows for control of the qubits via a train of short voltage pulses, each with an area equal to the magnetic flux quantum Φ0 = h / 2e. This approach has been proposed as a scalable alternative to microwave control and has been used to implement single- qubit and two-qubit gates, obtaining fidelities comparable to those achieved with microwave control (see, for example, E. Leonard Jr., M. A. Beck, J. Nelson, B. G. Christensen, T. Thorbeck, C. Howington, A. Opremcak, I. V. Pechenezhskiy, K. Dodge, N. P. Dupuis, et al., “Digital coherent control of a superconducting qubit”, Physical Review Applied 11, 014009 (2019); K. Li, R. McDermott, and M. G. Vavilov, “Hardware-efficient qubit control with single-flux- quantum pulse sequences”, Physical Review Applied 12, 014044 (2019); R. McDermott and M. Vavilov, “Accurate qubit control with single flux quantum pulses”, Physical Review Applied 2, 014007 (2014); L. Howe, M. Castellanos-Beltran, A. Sirois, D. Olaya, J. Biesecker, P. Dresselhaus, S. P. Benz, and P. Hop- kins, “Digital control of a superconducting qubit using a Josephson pulse generator at 3 k”, PRX quantum 3, 010350 (2022); C.-H. Liu, A. Ballard, D. Olaya, D. R. Schmidt, J. Biesecker, T. Lucas, J. Ullom, S. Patel, O. Rafferty, A. Opremcak, et al., “Single flux quantum-based digital control of superconducting qubits in a multichip module”, PRX Quantum 4, 030310 (2023); P. J. Liebermann and F. K. Wilhelm, “Optimal qubit control using single-flux quantum pulses”, Physical Review Applied 6, 024022 (2016); R. McDermott, M. Vavilov, B. Plourde, F. Wilhelm, P. Liebermann, O. Mukhanov, and T. Ohki, “Quantum– classical interface based on single flux quantum digital logic”, Quantum science and technology 3, 024004 (2018); M. Dalgaard, F. Motzoi, J. J. Sørensen, and J. Sherson, “Global optimization of quantum dynamics with alphazero deep exploration”, npj quantum information 6, 6 (2020); M. R. Jokar, R. Rines, and F. T. Chong, “Practical implications of sfq-based two-qubit gates”, in 2021 IEEE International Conference on Quantum Computing and Engineering (QCE) (IEEE, 2021) pp.402–412; M. R. Jokar, R. Rines, G. Pasandi, H. Cong, A. Holmes, Y. Shi, M. Pedram, and F. T. Chong, “Digiq: A scalable digital controller for quantum computers using sfq logic”, in 2022 IEEE International Symposium on High- Performance Computer Architecture (HPCA) (IEEE, 2022) pp.400–414; and Y. Wang, W. Gao, K. Liu, B. Ji, Z. Wang, and Z. Lin, “Single- flux-quantum-activated controlled-z gate for transmon qubits”, Physical Review Applied 19, 044031 (2023), each of which is incorporated by reference herein in its entirety.)WSGR Docket No.49676-738.601

[0006] Disclosed herein are methods for constructing high-fidelity two-qubit gates via SFQ control in a tunable-coupler architecture. Systems and methods of the present disclosure may optimize the SFQ sequence to produce a specific target gate. This may be done, for example, by direct gradient-based optimization, using an analytical decomposition of a controlled-Z (CZ) or controlled-NOT(CNOT) gate into fermionic simulation (fSim) gates and single-qubit rotations, etc. Systems and methods of the present disclosure may be applied to produce at least three types of two-qubit gates: an fSim-like gate, a CZ gate, and a CNOT gate. Furthermore, single-qubit gates such as those disclosed in, for example, R. Shillito, F. Hopfmueller, B. Kulchytskyy, and P. Ronagh, “Compact pulse schedules for high-fidelity single-flux quantum qubit control”, arXiv:2309.04606 (2023), which is incorporated by reference herein in its entirety, may be applied in the disclosed generalized architecture, which may provide a modular and scalable application. High performance has been achieved, with average gate fidelity close to 99.99% for the fSim gate, and in the 99.9% – 99.99% interval for the CZ or CNOT and single-qubit gates.

[0007] Methods for two-qubit gate implementation have almost exclusively been based on microwave control, which can suffer from limitations associated with the difficulties in generating and sending microwave signals from a classical controller at room temperature to a quantum chip in a dilution refrigerator. Furthermore, heat dissipation at millikelvin temperatures is also an issue to be considered, due to the limited cooling power of refrigerators, as well as the dissipative nature of certain components, such as attenuators and filters. In addition, the limited number of studies on SFQ-based two-qubit gates are implemented with the use of architectures that do not possess tunable couplers and rely on genetic algorithms for optimal control optimization.

[0008] In contrast, methods and systems disclosed herein propose a tunable-coupler architecture, which may be a useful alternative approach, because it can suppress residual ZZ interactions. Furthermore, the tunable coupler may allow biasing the system such that the qubits idle at equal frequencies. The disclosed approach presents a promising path for scaling to a larger number of qubits. Finally, the method disclosed herein may find the optimal SFQ sequences using gradient- based optimization, which is computationally more efficient than genetic algorithms.

[0009] In an aspect, the present disclosure provides a method for constructing a multi-qubit gate on a circuit comprising qubits controlled at least in part using single-flux quantum (SFQ) control, the method comprising: (a) providing said circuit, wherein said circuit comprises a first qubit, a second qubit, and a coupler qubit, (b) applying single-qubit SFQ control comprising an SFQ train of pulses to at least one of said first qubit or said second qubit, and (c) turning on said coupler qubit by adding or removing SFQ flux portions.WSGR Docket No.49676-738.601

[0010] In some embodiments, applying said single-qubit SFQ control, in (b), comprises optimized SFQ trains of pulses. In some embodiments, applying said single-qubit SFQ control, in (b), comprises applying said SFQ train of pulses to said first qubit and said second qubit. In some embodiments, the method further comprises subsequent to (c), turning off said coupler qubit. In some embodiments, said first qubit and said second qubit each comprises a tunable frequency qubit. In some embodiments, said first qubit and said second qubit are directly and capacitively coupled, and wherein each of said first qubit and said second qubit is capacitively coupled to said coupler qubit. In some embodiments, in (b), said first qubit and said second qubit are capacitively driven by said SFQ train of pulses. In some embodiments, said SFQ train of pulses comprises an external SFQ train of pulses. In some embodiments, in (c), said coupler qubit is inductively driven by an SFQ pulse generator for adding and removing said SFQ flux portions. In some embodiments, said first qubit and said second qubit comprise a transmon qubit. In some embodiments, said first qubit, said second qubit, or both is frequency tunable using a Josephson junction. In some embodiments, said Josephson junction comprises a superconducting quantum interference device (SQUID) loop. In some embodiments, said first qubit, said second qubit, or both is driven by an SFQ pulse generator. In some embodiments, said multi-qubit gate comprises a controlled-Z (CZ) gate or a controlled-NOT (CNOT) gate. In some embodiments, the method further comprises, prior to (a), decomposing said CZ gate or said CNOT gate into a pair of fermionic simulation (fSIM) gates and one or more single-qubit gates. In some embodiments, said decomposing is based at least in part on an analytical decomposition. In some embodiments, (c) is used to produce an approximation of each of the gates in said pair of fSIM gates; and (b) is used to produce said one or more single-qubit gates. In some embodiments, (b) – (c) are repeated one time and (a) is repeated subsequently one or more times creating (A) three layers of single-qubit control of said first qubit and of said second qubit, and (B) two layers of control of said coupler qubit. In some embodiments, said coupler qubit generates an fSim gate. In some embodiments, the method further comprises capacitively driving said first qubit and said second qubit by an external SFQ train of pulses; and inductively driving said coupler qubit by an SFQ pulse generator thereby adding or removing said SFQ flux portions. In some embodiments, the method further comprises comprising optimizing said external SFQ train of pulses and a schedule for said SFQ flux portions for said multi-qubit gate. In some embodiments, the method further comprises (i) constructing a cost function comprising an infidelity between a quantum channel generated by said circuit and a target gate, (ii) minimizing said cost function, and (iii) selecting at least one feasible solution. In some embodiments, (ii) and (iii) are repeated one or more times. In some embodiments, a number of repetitions is based at least in part on a threshold of fidelity of said at least one feasible solution.WSGR Docket No.49676-738.601 In some embodiments, (ii) comprises a gradient-based procedure. In some embodiments, (ii) further comprises one or more members of the group consisting of: the limited-memory Broyden–Fletcher–Goldfarb–Shanno algorithm (L-BFGS), gradient descent, a nonlinear conjugate gradient method, Powell’s method, genetic algorithms, and differential evolution. In some embodiments, said gradient is estimated using said differentiable simulation. In some embodiments, said infidelity is computed using a differentiable simulation. In some embodiments, said differentiable simulation comprises deriving the Hamiltonian of the circuit and simulating said Hamiltonian in the charge basis. In some embodiments, the method further comprises (I) for said first qubit and said second qubit, relaxing said external SFQ train of pulses to have continuous values, wherein said relaxing comprises allowing continuous amplitudes for said external SFQ train of pulses, and (II) relaxing SFQ arrival times of said SFQ flux portions of said coupler qubit to have continuous values, wherein said cost function comprises a penalty term. In some embodiments, said cost function comprises a smoothing term. In some embodiments, weights of said penalty term and said smoothing term comprise a scheduling that allows relative weights to be changed during optimization. In some embodiments, said smoothing term comprises regularization to avoid local minima. In some embodiments, said smoothing term comprises amplitude values of said external SFQ train of pulses. In some embodiments, said penalty term comprises regularization to force said continuous amplitudes to approach zero or one; and aligning a start or an end time of a schedule of said SFQ flux portions of said coupler qubit to align with ticks of an SFQ clock of said first qubit and said second qubit. In some embodiments, the method further comprises constraining said first qubit and said second qubit to have a same frequency based at least in part by optimizing flux values for said coupler qubit, said first qubit, and said second qubit to match a target frequency.

[0011] In another aspect, the present disclosure provides a circuit comprising, a first qubit, a second qubit, and a coupler qubit, wherein said first qubit, said second qubit, and said coupler qubit are configured to be controlled at least in part using SFQ control, wherein said SFQ control comprises, an external SFQ train of pulses configured to drive at least one of said first qubit or said second qubit, and an SFQ pulse generator configured to add or remove SFQ flux portions to drive said coupler qubit.

[0012] In some embodiments, said first qubit and said second qubit comprise a tunable frequency qubit. In some embodiments, said first qubit and said second qubit are directly and capacitively coupled. In some embodiments, said first qubit and said second qubit are capacitively coupled to said coupler qubit. In some embodiments, said external SFQ train of pulses is configured to capacitively drive said first qubit and said second qubit. In some embodiments, said SFQ pulse generator is configured to add or remove SFQ flux portions to inductively drive said couplerWSGR Docket No.49676-738.601 qubit. In some embodiments, said first qubit and said second qubit comprise a transmon qubit. In some embodiments, said first qubit, said second qubit, or both is frequency tunable using a Josephson junction. In some embodiments, said Josephson junction comprises a superconducting quantum interference device (SQUID) loop. In some embodiments, the circuit further comprises a multi-qubit gate on said circuit, wherein said multi-qubit gate comprises a controlled-Z (CZ) gate or a controlled-NOT (CNOT) gate.

[0013] In another aspect, the present disclosure provides a system comprising a digital processor communicatively coupled to a circuit comprising a multi-qubit gate, wherein said circuit comprises a first qubit, a second qubit, and a coupler qubit, wherein the digit processor is configured to control said circuit at least in part using single-flux quantum (SFQ) control, and wherein processor is configured to: apply single-qubit SFQ control comprising an SFQ train of pulses to at least one of said first qubit or said second qubit; and turn on said coupler qubit by adding or removing SFQ flux portions.

[0014] In some embodiments, the processor is further configured to perform the method of any of the embodiments herein.

[0015] In another aspect, the present disclosure provides a non-transitory medium with instructions stored thereon which when executed by a processor is configured to (a) apply single- qubit SFQ control comprising an SFQ train of pulses to at least one of a first qubit or a second qubit of a multi-qubit gate on a circuit, and (b) turn on a coupler qubit of said multi-qubit gate by adding or removing SFQ flux portions.

[0016] In some embodiments, said instructions are further configured to perform the method of any of the embodiments herein.

[0017] In another aspect, the present disclosure provides a method of controlling qubits of a circuit comprising a first qubit, a second qubit, and a coupler qubit, said controlling comprising at least in part using single-flux quantum (SFQ) control, the method comprising constructing a multi-qubit gate on a circuit at least in part by using a differentiable simulation of said multi- qubit gate, wherein said multi-qubit gate comprises a first qubit, a second qubit, and a coupler qubit, wherein said first qubit, said second qubit, and said coupler qubit are configured to be controlled at least in part using SFQ control.

[0018] In some embodiments, said first qubit and said second qubit comprise a transmon qubit. In some embodiments, said first qubit, said second qubit, or both is frequency tunable using a Josephson junction. In some embodiments, said Josephson junction comprises a superconducting quantum interference device (SQUID) loop. In some embodiments, said first qubit, said second qubit, or both is driven by an SFQ pulse generator. In some embodiments, said multi-qubit gate comprises a controlled-Z (CZ) gate or a controlled-NOT (CNOT) gate. In some embodiments,WSGR Docket No.49676-738.601 the method further comprises decomposing said CZ gate or said CNOT gate into a pair of fermionic simulation (fSIM) gates and one or more single-qubit gates. In some embodiments, the decomposing is based at least in part on an analytical decomposition. In some embodiments, the method further comprises (a) applying single-qubit SFQ control comprising an SFQ train of pulses to at least one of said first qubit or said second qubit, and (b) turning on said coupler qubit by adding or removing SFQ flux portions. In some embodiments, applying said single-qubit SFQ control, in (a), comprises applying optimized SFQ trains of pulses. In some embodiments, applying said single-qubit SFQ control, in (a), comprises applying said SFQ trains of pulses to said first qubit and said second qubit. In some embodiments, said first qubit and said second qubit each comprises a tunable frequency qubit. In some embodiments, said first qubit and said second qubit are directly and capacitively coupled, and wherein each of said first qubit and said second qubit is capacitively coupled to said coupler qubit. In some embodiments, in (a), said first qubit and said second qubit are capacitively driven by said SFQ train of pulses. In some embodiments, said SFQ train of pulses comprises an external SFQ train of pulses. In some embodiments, in (b), said coupler qubit is inductively driven by an SFQ pulse generator for adding and removing said SFQ flux portions. In some embodiments, said multi-qubit gate comprises a controlled-Z (CZ) gate or a controlled-NOT (CNOT) gate. In some embodiments, (b) is used to produce an approximation of each of the gates in said pair of fSIM gates; and (a) is used to produce said one or more single-qubit gates. In some embodiments, (a) – (b) are repeated one time and (a) is repeated subsequently one or more times creating (A) three layers of single- qubit control of said first qubit and of said second qubit, and (B) two layers of control of said coupler qubit. In some embodiments, said coupler qubit generates an fSim gate. In some embodiments, the method further comprises capacitively driving said first qubit and said second qubit by an external SFQ train of pulses; and inductively driving said coupler qubit by an SFQ pulse generator thereby adding or removing said SFQ flux portions. In some embodiments, the method further comprises optimizing said external SFQ train of pulses and a schedule for said SFQ flux portions for said multi-qubit gate. In some embodiments, the method further comprises (i) constructing a cost function comprising an infidelity between a quantum channel generated by said circuit and a target gate, (ii) minimizing said cost function, and (iii) selecting at least one feasible solution. In some embodiments, (ii) and (iii) are repeated one or more times. In some embodiments, (ii) further comprises one or more members of the group consisting of: the limited- memory Broyden–Fletcher–Goldfarb–Shanno algorithm (L-BFGS), gradient descent, a nonlinear conjugate gradient method, Powell’s method, genetic algorithms, and differential evolution. In some embodiments, said gradient is estimated using said differentiable simulation. In some embodiments, said infidelity is computed using a differentiable simulation. In someWSGR Docket No.49676-738.601 embodiments, said differentiable simulation comprises deriving the Hamiltonian of the circuit and simulating said Hamiltonian in the charge basis. In some embodiments, the method further comprises (I) for said first qubit and said second qubit, relaxing said external SFQ train of pulses to have continuous values, wherein said relaxing comprises allowing continuous amplitudes for said external SFQ train of pulses, and (II) relaxing the SFQ arrival times of said SFQ flux portions of said coupler qubit to have continuous values, wherein said cost function comprises a penalty term. In some embodiments, said cost function comprises a smoothing term. In some embodiments, weights of said penalty term and said smoothing term comprise a scheduling that allows relative weights to be changed during optimization. In some embodiments, said smoothing term comprises regularization to avoid local minima. In some embodiments, said smoothing term comprises amplitude values of said pulses. In some embodiments, said penalty term comprises regularization to force said continuous amplitudes to approach zero or one; and aligning a start or an end time of a schedule of said SFQ flux portions of said coupler qubit to align with ticks of an SFQ clock of said first qubit and said second qubit. In some embodiments, the method further comprises constraining said first qubit and said second qubit to have the same frequency based at least in part by optimizing flux values for said coupler qubit, said first qubit, and said second qubit to match a target frequency.

[0019] Additional aspects and advantages of the present disclosure will become readily apparent to those skilled in this art from the following detailed description, wherein only illustrative embodiments of the present disclosure are shown and described. As will be realized, the present disclosure is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the disclosure. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive. INCORPORATION BY REFERENCE

[0020] All publications, patents, and patent applications mentioned in this specification are herein incorporated by reference to the same extent as if each individual publication, patent, or patent application was specifically and individually indicated to be incorporated by reference. To the extent publications and patents or patent applications incorporated by reference contradict the disclosure contained in the specification, the specification is intended to supersede and / or take precedence over any such contradictory material. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The novel features of the present disclosure are set forth with particularity in the appended claims. A better understanding of the features and advantages of the present disclosureWSGR Docket No.49676-738.601 will be obtained by reference to the following detailed description that sets forth illustrative embodiments, in which the principles of the present disclosure are utilized, and the accompanying drawings of which:

[0022] FIG.1 is a circuit diagram of a tunable coupler comprising two qubits capacitively coupled both directly, and also to a coupler qubit, in accordance with some embodiments.

[0023] FIG.2 is a flowchart of an example method for constructing a multi-qubit gate on a circuit using differentiable simulation of the multi-qubit gate, in accordance with some embodiments.

[0024] FIG.3 is a flowchart of an example method for optimizing external SFQ trains of pulses and an SFQ flux portion schedule for a multi-qubit quantum gate, in accordance with some embodiments.

[0025] FIG.4 illustrates a control sequence for producing a CZ gate using direct optimization. SFQ kick sequences acting on qubit 1 (top panel) and qubit 2 (middle panel), as well as a coupler qubit’s excursion (bottom panel) from the off-point to the on-point, are shown. The value of the kick angle is π / 100, the SFQ clock frequency is 20 GHz, and the coupler qubit’s on and off SFQ. flux values are Φoff = 0.352 Φ0 and Φon = 0.376 Φ0, where Φ0 is a magnetic flux quantum. The four kick plots top and middle panels correspond to the four possible SFQ-clock slotsduring a qubit period. Each operation in a single SFQ sequence corresponds to a sequence of kicks repeated at each qubit rotation.

[0026] FIG.5 illustrates infidelities of two-qubit gates for different clock frequencies and durations, in accordance with some embodiments.

[0027] FIG.6 illustrates infidelities of single-qubit rotations for different clock frequencies and rotation angles, in accordance with some embodiments.

[0028] FIG.7 illustrates a control sequence for producing a CZ gate using a decomposition method. SFQ kick sequences acting on qubit 1 (top panel) and qubit 2 (middle panel), as well as a coupler qubit’s excursion (bottom panel) from the off-point to the on-point, are shown. The value of the kick angle is π / 100, the SFQ clock frequency is 40 GHz, and the coupler qubit’s on and off SFQ flux values are Φoff = 0.352 Φ0 and Φon = 0.376 Φ0, where Φ0 is a magnetic flux quantum. The eight kick plots in the top and middle panels correspond to the eight possible SFQ- clock slots during a qubit period. Each operation in a single SFQ sequence corresponds to a sequence of kicks repeated at each qubit rotation.

[0029] FIG.8 illustrates a circuit of a decomposition generating a CZ gate.

[0030] FIG.9 is a flowchart of an example decomposition procedure for constructing a CZ gate.WSGR Docket No.49676-738.601 DETAILED DESCRIPTION

[0031] While various embodiments of the present disclosure have been shown and described herein, it will be obvious to those skilled in the art that such embodiments are provided by way of example only. Numerous variations, changes, and substitutions may occur to those skilled in the art without departing from the present disclosure. It should be understood that various alternatives to the embodiments of the present disclosure described herein may be employed.

[0032] Neither the Title nor the Abstract is to be taken as limiting in any way the scope of the disclosed present disclosure(s). The title of the present application and headings of sections provided in the present application are for convenience only and are not to be taken as limiting the disclosure in any way.

[0033] Recognized herein is the need for improved methods and systems that may overcome at least one of the above-identified drawbacks.

[0034] Unless otherwise defined, all technical terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this present disclosure belongs. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” include plural references unless the context clearly dictates otherwise. Any reference to “or” herein is intended to encompass “and / or” unless otherwise stated.

[0035] The term “plurality” generally refers to “two or more,” unless expressly specified otherwise.

[0036] The term “e.g.” and like terms mean “for example,” and thus do not limit the terms or phrases they explain. For example, in a sentence “the computer sends data (e.g., instructions, a data structure) over the Internet,” the term “e.g.” explains that “instructions” are an example of “data” that the computer may send over the Internet, and also explains that “a data structure” is an example of “data” that the computer may send over the Internet. However, both “instructions” and “a data structure” are merely examples of “data,” and other things besides “instructions” and “a data structure” can be “data.

[0037] Whenever the term “at least,” “greater than,” or “greater than or equal to” precedes the first numerical value in a series of two or more numerical values, the term “at least,” “greater than” or “greater than or equal to” applies to each of the numerical values in that series of numerical values. For example, greater than or equal to 1, 2, or 3 is equivalent to greater than or equal to 1, greater than or equal to 2, or greater than or equal to 3.

[0038] Whenever the term “no more than,” “less than,” or “less than or equal to” precedes the first numerical value in a series of two or more numerical values, the term “no more than,” “less than,” or “less than or equal to” applies to each of the numerical values in that series of numericalWSGR Docket No.49676-738.601 values. For example, less than or equal to 3, 2, or 1 is equivalent to less than or equal to 3, less than or equal to 2, or less than or equal to 1.

[0039] Certain inventive embodiments herein contemplate numerical ranges. When ranges are present, the ranges include the range endpoints. Additionally, every sub range and value within the range is present as if explicitly written out.

[0040] The term “about” or “approximately” may mean within an acceptable error range for the particular value, which will depend in part on how the value is measured or determined, e.g., the limitations of the measurement system. For example, “about” may mean within 1 or more than 1 standard deviation, per the practice in the art. Alternatively, “about” may mean a range of up to 20%, up to 10%, up to 5%, or up to 1% of a given value. Where particular values are described in the application and claims, unless otherwise stated the term “about” meaning within an acceptable error range for the particular value may be assumed. Quantum Device / Quantum Hardware

[0041] Any type of quantum hardware, for example, a quantum computer, may be suitable for the technologies disclosed herein. A quantum computer may be a computer that makes use of quantum mechanical phenomena to process, store, or manipulate information. A quantum operation may be an operation or sequence of operations performed on a quantum computer. A quantum computation, quantum procedure, quantum operation, and quantum computer may refer to any method or system for performing computations using quantum mechanical operations (such as unitary transformations or completely positive trace-preserving (CPTP) maps on quantum channels) on a Hilbert space represented by a quantum device. A quantum gate operation may refer to a quantum gate, a sequence of quantum gates or a combination of quantum gates and quantum measurements that perform an isometry on the quantum state of qubits. The terms “gates,” “two-qubit gates,” and “one-qubit gates” may refer to quantum logic gates that consist of two qubits (“two-qubit gate”) or one qubit (“one-qubit gate”), and which are used to perform logical operations. The term “quantum chip” may refer to a physical device that can utilize quantum phenomena that allows the execution of quantum gates for the purpose of computing. The term “circuit” may refer to the representation of a computational model in which the computation comprises a sequence of gates. In some cases, a circuit may be used in gate model quantum computation. In some cases, a circuit may be a quantum circuit, such as a sequence of qubit gates used in a gate model quantum computation. The term “quantum circuit” may refer to an initial state preparation for a set of qubits, followed by performing a gate operation and measurements on it. The term “quantum measurement” may refer to a process for extracting classical information from quantum states generated on quantum devices.WSGR Docket No.49676-738.601

[0042] A quantum device or quantum hardware such as a quantum computer or quantum processor may comprise one or more quantum gate arrays, one-way quantum computers, topological quantum computers, superconductor-based quantum computers, trapped ion quantum computers, trapped atom quantum computers, optical lattices, quantum dot computers, spin-based quantum computers, spatial-based quantum computers, Loss–DiVincenzo quantum computers, nuclear magnetic resonance (NMR) based quantum computers, solution-state NMR quantum computers, solid-state NMR quantum computers, solid-state NMR Kane quantum computers, electrons-on-helium quantum computers, cavity-quantum-electrodynamics based quantum computers, molecular magnet quantum computers, fullerene-based quantum computers, linear optical quantum computers, diamond-based quantum computers, nitrogen-vacancy (NV) diamond-based quantum computers, Bose–Einstein condensate-based quantum computers, transistor-based quantum computers, and rare-earth-metal-ion-doped inorganic crystal based quantum computers. The quantum processor or quantum computer may comprise one or more of: quantum annealers, Ising solvers, optical parametric oscillators (OPO), and gate model quantum computers.

[0043] A quantum processor or quantum computer may comprise one or more qubits. A qubit may be a unit of quantum information processing whose quantum state is a complex unit vector of dimension 2. These two dimensions may be referred to as 0 and 1, but may also be + or -, up and down, etc. A physical qubit may be a physical implementation of a qubit. For example, a superconducting qubit may be a physical qubit implemented using superconducting electronic circuits. The one or more qubits may comprise superconducting qubits, trapped ion qubits, trapped atom qubits, photon qubits, quantum dot qubits, electron spin-based qubits, nuclear spin- based qubits, molecular magnet qubits, fullerene-based qubits, diamond-based qubits, nitrogen- vacancy (NV) diamond-based qubits, Bose–Einstein condensate-based qubits, transistor-based qubits, or rare-earth-metal-ion-doped inorganic crystal-based qubits.

[0044] In some cases, a quantum device with a limitation of a two-dimensional structure of a quantum chip or a limitation on how many neighboring qubits each qubit is connected to may benefit from methods and systems disclosed herein. In accordance with the description herein, suitable quantum computers may include, by way of non-limiting examples, including the associated references, each of which is incorporated by reference herein in its entirety: superconducting quantum computers (qubits implemented as small superconducting circuits— Josephson junctions) (Clarke et al., “Superconducting quantum bits”, Nature 453, no.7198, pp. 1031–1042, 2008); trapped-ion quantum computers (qubits implemented as states of trapped ions) (Kielpinski et al., “Architecture for a large-scale ion-trap quantum computer”, Nature 417, no.6890, pp.709–711, 2002); optical lattice quantum computers (qubits implemented as states ofWSGR Docket No.49676-738.601 neutral atoms trapped in an optical lattice) (Deutsch et al., “Quantum computing with neutral atoms in an optical lattice”, Fortschritte der Physik: Progress of Physics 48, no.9–11, pp.925– 943, 2000); spin-based quantum dot computers (qubits implemented as the spin states of trapped electrons) (Imamoḡlu et al., “Quantum information processing using quantum dot spins and cavity QED”, Physical Review Letters 83, no.20, p.4204, 1999); spatial-based quantum dot computers (qubits implemented as electron positions in a double quantum dot) (Fedichkin et al., “Novel coherent quantum bit using spatial quantization levels in semiconductor quantum dot”, arXiv:quant-ph / 0006097, 2000); coupled quantum wires (qubits implemented as pairs of quantum wires coupled by quantum point contact) (Bertoni et al., “Quantum logic gates based on coherent electron transport in quantum wires”, Physical Review Letters 84, no.25, p.5912, 2000); nuclear magnetic resonance quantum computers (qubits implemented as nuclear spins and probed by radio waves) (Cory et al., “Nuclear magnetic resonance spectroscopy: An experimentally accessible paradigm for quantum computing”, arXiv: quant-ph / 9709001, 1997); solid-state NMR Kane quantum computers (qubits implemented as the nuclear spin states of phosphorus donors in silicon) (Kane, “A silicon-based nuclear spin quantum computer”, Nature 393, no.6681, pp.133–137, 1998); electrons-on-helium quantum computers (qubits implemented as electron spins) (Lyon, “Spin-based quantum computing using electrons on liquid helium”, arXiv:cond-mat / 0301581, 2006); cavity quantum electrodynamics-based quantum computers (qubits implemented as states of trapped atoms coupled to high-finesse cavities) (Burell, “An Introduction to Quantum Computing using Cavity QED concepts,” arXiv:1210.6512, 2012); molecular magnet-based quantum computers (qubits implemented as spin states) (Leuenberger et al., “Quantum Computing in Molecular Magnets”, arXiv:cond-mat / 0011415, 2001); fullerene- based electron spin resonance (ESR) quantum computers (qubits implemented as electronic spins of atoms or molecules encased in fullerenes) (Harneit, “Spin Quantum Computing with Endohedral Fullerenes”, arXiv:1708.09298, 2017); linear optical quantum computers (qubits implemented as processing states of different modes of light through linear optical elements such as mirrors, beam splitters and phase shifters) (Knill et al. “Efficient linear optics quantum computation”, arXiv:quant-ph / 0006088, 2000); diamond-based quantum computers (qubits implemented as electronic or nuclear spins of nitrogen-vacancy (NV) centres in diamond) (Nizovtsev et al., “A quantum computer based on NV centers in diamond: optically detected nutations of single electron and nuclear spins”, Optics and spectroscopy 99, no.2, pp.233–244, 2005); Bose–Einstein condensate-based quantum computers (qubits implemented as two- component Bose–Einstein condensates) (Byrnes et al., “Macroscopic quantum computation using Bose–Einstein condensates”, arXiv:quantum-ph / 1103.5512, 2011); transistor-based quantum computers (qubits implemented as semiconductors coupled to nanophotonic cavities) (Sun et al.,WSGR Docket No.49676-738.601 “A single-photon switch and transistor enabled by a solid-state quantum memory”, arXiv:quant- ph / 1805.01964, 2018); rare-earth-metal-ion-doped inorganic crystal-based quantum computers (qubits implemented as atomic ground state hyperfine levels in rare-earth-ion-doped inorganic crystals) (Ohlsson et al. “Quantum computer hardware based on rare-earth-ion-doped inorganic crystals”, Optics Communications 201, no.1–3, pp.71–77, 2002); metal-like carbon nanospheres based quantum computers (qubits implemented as electron spins in conducting carbon nanospheres) (Náfrádi et al., “Room temperature manipulation of long lifetime spins in metallic- like carbon nanospheres”, arXiv:cond-mat / 1611.07690, 2016); topological quantum computers (qubits implemented as non-Abelian anyons) (Nayak et al., “Non-Abelian Anyons and Topological Quantum Computation,” arXiv:0707.1889, 2007); photonic continuous-variable quantum computing hardware (quantum variables represented by the quadrature operators of the quantum harmonic oscillators in a quantum optical mode) (Arrazola et al., “Quantum circuits with many photons on a programmable nanophotonic chip,” Nature 591, pp.54–60, 2021); photonic qubit-based quantum hardware (qubits implemented on pairs of optical paths) (O’Brien et al., “Photonic quantum technologies,” Nature Photonics 3, pp.687–695, 2009); quantum computing hardware based on bosonic codes (error-protected qubits are formed by embedding a finite-dimensional code space within the infinite-dimensional Fock space associated with a bosonic quantum field mode; examples include the Gottesman–Kitaev–Preskill (GKP) code, cat codes, and binomial codes, respectively) (Gottesman et al., “Encoding a qubit in an oscillator,” Physical Review A 64, 012310, 2001; Chamberland et al., “Building a Fault-Tolerant Quantum Computer Using Concatenated Cat Codes,” PRX Quantum 3, 010329, 2022; Michael et al., “New Class of Quantum Error-Correcting Codes for a Bosonic Mode,” Physical Review X 6, 031006, 2016); quantum hardware based on coherent network computing (operating by sampling low-energy eigenstates of an Ising Hamiltonian by encoding the spins in a network of optical parametric oscillators with all-to-all connectivity; and future architectures may exploit quantum entanglement for computation) (Inui et al., “Entanglement and quantum discord in optically coupled coherent Ising machines,” Physical Review A 102, 062419, 2020; and Yanagimoto et al., “Embedding entanglement generation within a measurement-feedback coherent Ising machine,” arXiv:1906.04902, 2019, each which is incorporated by reference herein).

[0045] Quantum computing devices may use quantum gates. A quantum gate may be a manipulation of qubits that can be represented by unitary operation on the quantum state of the qubits. A quantum gate operation may comprise a quantum gate, a sequence of quantum gates or a combination of quantum gates and quantum measurements that perform an isometry on the quantum state of qubits. For example, gates, two-qubit gates, and one-qubit gates may be used toWSGR Docket No.49676-738.601 perform logical operations. A one-qubit gate may comprise one qubit. A two-qubit gate may comprise two qubits. Digital Computer

[0046] In some cases, a digital computer comprises one or more hardware central processing units (CPU) that carry out a classical computer’s functions. In some cases, the classical computer further comprises an operating system (OS) configured to perform executable instructions. In some cases, the classical computer is connected to a computer network.

[0047] In some cases, the classical computer is connected to a computer network. In some cases, the classical computer is connected to the Internet such that it accesses the World Wide Web. In some cases, the classical computer is connected to one or more computer servers, which can enable distributed computing, such as a cloud computing infrastructure. In some cases, the classical computer is connected to an intranet and / or extranet or an intranet and / or extranet that is in communication with the Internet. In some cases, the classical computer is connected to a data storage device. In some cases, the network is a telecommunication and / or data network. In some cases, the network is a peer-to-peer network, which may enable devices coupled to the computer system to behave as a client or a server.

[0048] In accordance with the description herein, suitable classical computers may include, by way of non-limiting examples, server computers, desktop computers, laptop computers, notebook computers, sub-notebook computers, netbook computers, netpad computers, set-top computers, media streaming devices, handheld computers, Internet appliances, mobile smartphones, tablet computers, personal digital assistants, video game consoles, and vehicles. Smartphones may be suitable for use with methods and systems described herein. Select televisions, video players, and digital music players, in some cases, with computer network connectivity, may be suitable for use in the systems and methods described herein. Suitable tablet computers may include those with booklet, slate, and convertible configurations.

[0049] In some cases, the classical computer includes an operating system configured to perform executable instructions. The operating system may be, for example, software, including programs and data, which manages the device’s hardware and provides services for execution of applications. Suitable server operating systems include, by way of non-limiting examples, FreeBSD, OpenBSD, NetBSD®, Linux®, Apple® Mac OS X Server®, Oracle® Solaris®, Windows Server®, and Novell® NetWare®. Suitable personal computer operating systems may include, by way of non-limiting examples, Microsoft® Windows®, Apple® Mac OS X®, Apple® macOS®, UNIX®, and UNIX-like operating systems such as GNU / Linux®. In some cases, the operating system is provided by cloud computing. Suitable mobile smart phone operating systems may include, by way of non-limiting examples, Nokia® Symbian® OS,WSGR Docket No.49676-738.601 Apple® iOS®, Research In Motion® BlackBerry OS®, Google® Android®, Microsoft® Windows Phone® OS, Microsoft® Windows Mobile® OS, Linux®, and Palm® WebOS®. Suitable media streaming device operating systems may include, by way of non-limiting examples, Apple TV®, Roku®, Boxee®, Google TV®, Google Chromecast®, Amazon Fire®, and Samsung® HomeSync®. Suitable video game console operating systems may include, by way of non-limiting examples, Sony® PS3®, Sony® PS4®, Microsoft® Xbox 360®, Microsoft® Xbox One®, Nintendo® Wii®, Nintendo® Wii U®, and Ouya®.

[0050] In some cases, the classical computer includes a storage and / or memory device. In some cases, the storage and / or memory device is one or more physical apparatuses used to store data or programs on a temporary or permanent basis. In some cases, the storage and / or memory device may have one or more additional data storage units that are external to the classical computer, for example, being located on a remote server that is in communication with the classical computer through an intranet or the Internet. In some cases, the device comprises a volatile memory and requires power to maintain stored information. In some cases, the device comprises non-volatile memory and retains stored information when the classical computer is not powered. In some cases, the non-volatile memory comprises flash memory. In some cases, the non-volatile memory comprises dynamic random-access memory (DRAM). In some cases, the non-volatile memory comprises ferroelectric random-access memory (FRAM). In some cases, the non-volatile memory comprises phase-change random-access memory (PRAM). In some cases, the non- volatile memory comprises resistive random-access memory (RRAM). In some cases, the device comprises a storage device including, by way of non-limiting examples, CD-ROMs, DVDs, flash memory devices, magnetic disk drives, magnetic tapes drives, optical disk drives, and cloud computing-based storage. In some cases, the storage and / or memory device comprises a combination of devices such as those disclosed herein.

[0051] In some cases, the classical computer includes a display to send visual information to a user. In some cases, the display is a cathode ray tube (CRT). In some cases, the display is a liquid crystal display (LCD). In some cases, the display is a thin film transistor liquid crystal display (TFT-LCD). In some cases, the display is an organic light emitting diode (OLED) display. In some cases, on OLED display is a passive-matrix OLED (PMOLED) or active-matrix OLED (AMOLED) display. In some cases, the display is a plasma display. In some cases, the display is a video projector. In some cases, the display is a combination of devices such as those disclosed herein.

[0052] In some cases, the classical computer includes an input device to receive information from a user. In some cases, the input device is a keyboard. In some cases, the input device is a pointing device including, by way of non-limiting examples, a mouse, trackball, track pad,WSGR Docket No.49676-738.601 joystick, game controller, or stylus. In some cases, the input device is a touch screen or a multi- touch screen. In some cases, the input device is a microphone to capture voice or other sound input. In some cases, the input device is a video camera or other sensor to capture motion or visual input. In some cases, the input device is a Kinect®, Leap Motion®, or the like. In some cases, the input device is a combination of devices such as those disclosed herein. Single-Flux Quantum (SFQ) Technology

[0053] A single-flux quantum (SFQ) may refer to a single quantum of magnetic flux, generated using an electronic device that uses one or more Josephson junctions to generate and / or process digital signals. The SFQ-based control technique is a digital approach to resolving issues of scalability related to the standard control of quantum systems, such as physical space and heat. It has been proposed and experimentally demonstrated in McDermott et al, “Accurate Qubit Control with Single Flux Quantum Pulses,” Physical Review Applied: 2, 014007, 2014, which is incorporated by reference herein in its entirety).

[0054] A SFQ control may refer to a control technique that utilizes single-flux quanta for quantum control.

[0055] Accurate quantum control may be useful for reliable quantum computing. One possible architecture is superconducting quantum computers that make use of Josephson junctions. One challenge to building large-scale superconducting quantum computers is related to quantum control, such as sending accurate microwave signals to control thousands of qubits (qudits), reducing the number of required control wires, etc. As used herein, a qudit may be a multi-level quantum system, e.g., to a qubit in the case of the number of levels in the system being two. Another challenge is related to the wiring heat load. Single-flux quantum (SFQ) pulses have been introduced to mitigate these problems. SFQ pulses may enable the digital control of qubits (qudits) by using fluxons in superconducting qubits (qudits). The accuracy of SFQ-based control may be due in part to the fact that time integration of a voltage pulse has a quantized value ℎ / 2^^, where ℎ is a Planck constant and ^^ is an electric charge. Furthermore, an SFQ technology is cryogenic, which may address at least some of the problems resulting from heat load from control wiring as well as the number of required wires, and is also in situ. References on the status of SFQ technology in quantum computing include McDermott et al., “Accurate Qubit Control with Single Flux Quantum Pulses,” Physical Review Applied 2, 014007, 2014 and Li et al., “Hardware-Efficient Qubit Control with Single-Flux-Quantum Pulse Sequences,” Physical Review Applied 12, 014044, 2019, each of which is incorporated herein by reference in its entirety.WSGR Docket No.49676-738.601

[0056] Disclosed herein are systems and methods for constructing high-fidelity two-qubit quantum gates in a system of two transmon qubits, coupled via a tunable coupler. In particular, the focus is on single-flux-quantum (SFQ) pulses as a promising and scalable alternative to other control schemes using microwave electronics. This approach has allowed achieving optimized fSim-type gates with average gate fidelities on the order of 99.99% and CZ and CNOT gates with fidelities above 99.9% (B. Torosov, B. Kulchytskyy, F. Hopfmueller, J. Gunderson, X. Kong, and P. Ronagh, “Optimization of Two-Qubit Gates in Tunable-Coupler Architectures Using Single Flux Quantum Control”, arXiv:2412.15816 (2024), which is incorporated by reference herein in its entirety). Furthermore, an exact decomposition using a pair of fSim gates has been utilized to construct the CZ or CNOT gates in a semi-analytical way and with reduced memory requirements.

[0057] In the following detailed description, reference is made to the accompanying figures, which form a part hereof. In the figures, similar symbols typically identify similar components, unless context dictates otherwise. The illustrative embodiments described in the detailed description, figures, and claims are not meant to be limiting. Other embodiments may be used, and other changes may be made, without departing from the scope of the subject matter presented herein. It will be readily understood that the aspects of the present disclosure, as generally described herein, and illustrated in the figures, can be arranged, substituted, combined, separated, and designed in a wide variety of different configurations, all of which are explicitly contemplated herein.

[0058] Now referring to FIG.1, there is shown a schematic of a circuit diagram of a tunable coupler comprising two qubits capacitively coupled both directly, and also to a coupler qubit. The circuit may comprise two qubits 102 and 104 capacitively coupled directly via the coupling 106. The circuit may comprise a coupler qubit 108. The two qubits 102 and 104 may each be capacitively coupled to the coupler qubit 108 via the couplings 116 and 118, respectively. The two qubits 102 and 104 may be controlled at least in part using SFQ control provided by SFQ generators 112 and 114. In some cases, each of the two qubits 102 and 104 may comprise a tunable frequency qubit. In some cases, the two qubits 102 and 104 may be capacitively driven by an external SFQ train of pulses. In some cases, the coupler qubit 108 may be inductively driven by an SFQ pulse generator 110 which is used for adding and for removing SFQ flux portions (such as disclosed in A. F. Kirichenko, A. Jafarisalim, P. Truitt, N. K. Katam, C. Jordan, and O. A. Mukhanov, “System and method of flux bias for superconducting quantum circuits” (2022), US Patent App.17 / 838,207, which is incorporated by reference herein in its entirety).

[0059] In some cases, the coupler qubit 108 generates an fSim (fermionic simulation) gate.WSGR Docket No.49676-738.601

[0060] In some cases, each of the two qubits 102 and 104 may comprise a transmon qubit. A transmon qubit represents a weakly anharmonic superconducting qubit that is robust against charge noise.

[0061] In some cases, each of the two qubits 102 and 104 may be frequency tunable each using two Josephson junctions. In some cases, each pair of Josephson junctions comprises a SQUID loop. This may make the Josephson energy of the qubit dependent on the external SFQ flux through the SQUID loop and may allow the frequency of the qubit to be tuned. The single-qubit Hamiltonians of these qubits may be described by ^^^ ൌ 4^^^^^^^^^^,^^^^^ െ ^^^,^ cos^^^^,where k = 1, c, 2 is an index ^^^^and ^^^^are the reducedcharge and flux operators, depend on external SFQfluxes through the loops, and ECis the coupling matrix.

[0062] In some cases, each of the two qubits 102 and 104 each may be driven by an SFQ pulse generator. The SFQ pulse generators for providing SFQ control may be such as the SFQ generators 112 and 114 disclosed with respect to FIG.1. The Hamiltonian describing the single- qubit SFQ driving may be given by ^^ௗ ൌ െ8^^^⃗ ^ ∙ ^^^^^ ∙ ^^^^⃗ .

[0063] This may couple the charge operators ^^^ ൌ ^^^^^,^^^^ ,^^^ଶ^் to the external SFQ pulses,represented by ^^^⃗ ^ ൌ ^^^^^ , 0,^^ଶ^^். The latter may approximately be described as sequences of delta-function-shaped voltage spikes. The drive term may describe only the single-qubit driving, while the coupler qubit’s control may be implicitly described through the single-qubit Hamiltonians, whose Josephson-energy terms depend on the external SFQ flux value.

[0064] The circuit may be used to construct a multi-qubit gate using differentiable simulation of the underlying circuit. The Hamiltonian of the system may be derived using circuit quantum electrodynamics (QED) methods (see, for example, U. Vool and M. Devoret, “Introduction to quantum electromagnetic circuits”, International Journal of Circuit Theory and Applications 45, 897 (2017), which incorporated by reference herein in its entirety). More precisely, starting from the classical Lagrangian, the classical Hamiltonian may be written using the Legendre transform, and then the classical Hamiltonian may be quantized. The resulting Hamiltonian ^^ may be split into three parts: single-qubit Hamiltonians ^^^, a coupling part ^^^, and a drive part ^^ௗ, given by ^^ ൌ ^^^^ ^ ^^^ ^ ,where the coupling Hamiltonian^^^ ൌ 4 ^ 4^^^^^^^^^^,^^^^^^,^ஷ^WSGR Docket No.49676-738.601 and the coupling matrix EC is proportional to the inverse of the capacitance matrix ^^^^ ^ ^^^ ^ ^^^^ ^ ^^^ଶ െ^^^^ െ^^^ଶ^^^ ൌ ^ െ^^^^ ^^^ ^ ^^^^ ^ ^^ଶ^ െ^^ଶ^ ൩.^^ ^

[0065] To may be introduced.bases.

[0066] In some cases, the differentiable simulation of the multi-qubit gate may comprise deriving the Hamiltonian of the circuit and simulating the Hamiltonian in the charge basis ^ ^^^ ൌ ^ ^^|^^^^^^|, which may have the benefit of of the variable ^^^. Moreexplicitly, ^ ^ 1 cos^^ ൌ ^ ^|^^^^^^ ^ 1| ^ |^^ ^ 1^^^^|^,

[0067] For the numerical applied:^ Express the single-qubit terms ^^^in this basis, truncating at some value of n, e.g., n = ±50. ^ Diagonalize numerically, setting the phase of the eigenvectors |^^^^ such that ^^^^|^^^|^^^ା^^ is negative imaginary (similarly to ^^^ in the Fock basis). ^ Express ^^^ and ^^^in this basis. ^ Truncate to the first couple of eigenlevels.

[0068] To deal with time-dependent flux, the coupler control may be implemented via a finite discrete set of flux values. Hence, the Hamiltonian may be diagonalized at each flux value, and the basis-change unitaries may be calculated that are between eigenbases at different fluxes.

[0069] As disclosed elsewhere herein, the simulation basis may be built from single-qubit-Hamiltonian bases. The eigenstates of the total Hamiltonian ^^ ൌ ∑^ ^^^ ^ ^^^ ^ ^^ௗ , even at theoff-point and without drives, are not product states. Therefore, the next operation is to define logical states. A method that minimizes idling errors may be beneficial. Namely, the logical states may be defined as eigenstates of the joint Hamiltonian at idling fluxes and zero drive. This may ensure that there are no state transitions and leakage during idling (though some conditional phases might still be present and lead to idling errors). The logical 00 state is thus the ground state of the joint Hamiltonian, fixing the sign such that the overlap with the 000 simulation state is positive. Similarly, the logical 11 state is the sixth excited state, fixing the sign such that theWSGR Docket No.49676-738.601 overlap with the 101 simulation state is positive. The next operation is to select the logical 01 and 10 states. By definition, these states are degenerate, which means that numerical diagonalization is not going to separate them in a reliable way. To tease these states apart, Lowdin’s symmetric orthogonalization may be applied (see, for example, I. Mayer, “On Lowdin’s method of symmetric orthogonalization”, International Journal of Quantum Chemistry 90, 63 (2002), which is incorporated by reference herein in its entirety), which provides an orthonormal set of states with the least distance from the original states. Similar to the previous operations, the signs of the computational 01 and 10 states may be selected for positive overlap with the corresponding “bare” states, wherein the bare states comprise states with no interaction between the first and the second qubits.

[0070] By simulating the evolution of the system disclosed herein, driven by SFQ pulses, certain target gates may be produced. These gates may be obtained by simulating the propagator of the full joint Hamiltonian and then projecting it onto the logical subspace.

[0071] The simulated Hamiltonian may depend on the specific values of the capacitances and Josephson-junction currents of the circuit disclosed with respect to FIG.1. For the simulations, examples of the values of the capacitances may be ^^^ ൌ ^^ଶ ൌ 70 ^^^^,^^^ ൌ 60 ^^^^,^^^ଶ ൌ 0.25 ^^^^,^^^^ ൌ ^^ଶ^ ൌ 2 ^^^^,and the values of the Josephson currents may be ^^^^ ൌ ^^ଶ^ ൌ 7 ^^^^,^^^ோ ൌ ^^ଶோ ൌ 21 ^^^^,^^^^ ൌ 18 ^^^^,^^^ோ ൌ 36 ^^^^,where ^^^^and ^^^ோare the critical currents of the left and right Josephson junctions of qubit ^^,with ^^ ൌ 1, ^^, 2. In addition, the optimized off-point and on-point flux values may be^^୭^^ ^ ^0.130, 0.352, 0.130^^^^,^^୭୬ ^ ^0.130, 0.376, 0.130^^^^,where the three vector components correspond to qubit 1, the coupler qubit, and qubit 2, respectively.

[0072] Now referring to FIG.2, there is shown a flowchart of an example method for constructing a multi-qubit gate on a circuit using differentiable simulation of the multi-qubit gate. The circuit may comprise two qubits, and a coupler qubit, the qubits controlled at least in partWSGR Docket No.49676-738.601 using SFQ control. The circuit may be of various types, such as any circuit disclosed herein with respect to FIG.1.

[0073] According to processing operation 202, a single-qubit optimized SFQ control is applied to the first qubit and the second qubits. The applying of the optimized SFQ control may comprise sequences of delta function shaped voltage kicks being delivered to the first and the second qubits.

[0074] According to processing operation 204, the coupler qubit is turned on by adding SFQ flux to, or removing SFQ flux from, the coupler qubit. Adding SFQ flux to, or removing SFQ flux from, the coupler may control the effective coupling between the first and the second qubits and generate a two-qubit entangling gate.

[0075] According to processing operation 206, the coupler qubit is turned off by removing SFQ flux back to the idling point of the coupler qubit.

[0076] In some cases, processing operations 202 – 206 are repeated one time and processing operation 202 is repeated subsequently one more time creating (i) three layers of single-qubit control of the first qubit and of the second qubit; and (ii) two layers of control of the coupler qubit.

[0077] In some cases, the method may comprise optimizing the external SFQ trains of pulses and the SFQ flux portion schedule for a multi-qubit quantum gate having SFQ-based control with a tunable coupler, as disclosed herein with respect to FIG.3. The multi-qubit quantum gate may comprise the first qubit, the second qubit, and the coupler qubit.

[0078] Now referring to FIG.3, there is shown a flowchart of an example method for optimizing external SFQ trains of pulses and an SFQ flux portion schedule for a multi-qubit quantum gate.

[0079] According to processing operation 302, a cost function comprising infidelity between a quantum channel generated by the circuit and a target gate is constructed. The infidelity is a measure of how distinct the performed operation is from the target gate. In some cases, the infidelity may be computed using the differentiable Hamiltonian simulation. In some cases, thecost function may be constructed as ^^^^^^ ൌ 1 െ ^^^^⃗^^, where ^^ is the average gate fidelity and^^ is a set of variational control parameters. More precisely, ^^ contains a binary vector with information about the presence or absence of an SFQ pulse at each clock period (and at each qubit), as well as the start and the end times of the coupler qubit’s excursion (e.g., the turning on and off of the coupler qubit), which may require being aligned with the ticks of an SFQ clock.

[0080] According to processing operation 304, the cost function is minimized. In some cases, the minimization may comprise a gradient-based procedure. In some cases, the gradient may be estimated using the differentiable Hamiltonian simulation. In some cases, the minimization may comprise one or more members of the group consisting of: the limited-memory Broyden–WSGR Docket No.49676-738.601 Fletcher–Goldfarb–Shanno algorithm (L-BFGS), gradient descent, a nonlinear conjugate gradient method, Powell’s method, genetic algorithms, and differential evolution.

[0081] According to processing operation 306, at least one feasible solution is selected.

[0082] In some cases, processing operations 304 and 306 are repeated one or more times. This may be due to the large number of local-minima solutions. In some cases, the number of repetitions may be based at least in part on a threshold of fidelity of the at least one feasible solution.

[0083] In some cases, prior to processing operation 302, for the first qubit and the second qubit, the external SFQ train of pulses may be relaxed to have continuous values by allowing continuous amplitudes for the pulses. In some cases, the SFQ arrival times of the flux portions of the coupler qubit may be relaxed to have continuous values. These two relaxations may be required to allow for the calculations of the gradients.

[0084] In some cases, the cost function may comprise a penalty term. In some cases, the cost function may further comprise a smoothing term. The total cost function may be constructed as ^^൫^^൯ ൌ 1 െ ^^൫^^൯ ^ ^^൫^⃗^൯ ^ ^^൫^^൯.In some cases, the penalty term and the smoothing term may comprise scheduling. This may allow the relative weight of the smoothing and regularization to be changed during the optimization. In some cases, the penalty term may comprise regularization to force the pulse amplitudes to approach zero or one, and the coupler qubit SFQ flux portion schedule start and end times to align with the ticks of the SFQ clock of the first qubit and the second qubit. In some cases, the regularization term may be given by ^ ^^ ^^ ^ ^^^2^^^^^^. The regularization termapproach either 0 or 1, and the coupler qubit’s SFQ flux portion schedule’s start and end times ^^^^ to align with the ticks of the SFQ clock. The hyperparameter γ denotes the weight of the regularization term, and T denotes the SFQ clock’s period.

[0085] In some cases, the smoothing term may comprise regularization to avoid local minima. In some cases, the smoothing term may comprise amplitude values of the SFQ pulses. In some cases, the smoothing term may be given by a logarithmic smoothing, for example: ^^൫^^൯ ^^ ^^^୯ ^ ln൫1 െ ^^^^^୯൯൯. ^ The logarithmic smoothing ^^൫^^൯avoid local minima at the boundaries, with µ being a smoothing hyperparameter. The hyperparameters γ and µ may need to follow some schedule.WSGR Docket No.49676-738.601 Most commonly, γ increases exponentially during the optimization, while µ decreases exponentially.

[0086] In some cases, prior to processing operation 302, the first qubit and the second qubit are constrained such that they have the same frequency by optimizing the flux values for the coupler qubit and the first qubit and the second qubit to match the same target frequency for both the first qubit and the second qubit. After building a simulation basis out of bases of single-qubit Hamiltonians, and before running the optimizations, the values of the external SFQ fluxes of the frequency-tunable transmons may require adjustment. During the execution of quantum circuits, these are the SFQ flux values at which idling happens. These external SFQ fluxes may be called idling SFQ fluxes or off-point SFQ fluxes. Finding external SFQ flux values that cause the first qubit and the second qubit to have the same given frequency, and the effective coupling being off, may be beneficial. Such values may be obtained by numerical optimization, which minimizes the difference between the first and second excited energies of the joint Hamiltonian and setsthem equal to a target value. The target value may be, for example, ^^^ ൌ ^^ଶ ൌ 2^^ x 5 GHz.

[0087] In some cases, the multi-qubit gate disclosed elsewhere herein may comprise a CZ gate ora CNOT gate.

[0088] In some cases, the constructing of a CZ gate (or a CNOT gate) may comprise a decomposition procedure disclosed herein with respect to FIG.9.

[0089] Now referring to FIG.9, there is shown a flowchart of an example decomposition procedure for constructing a CZ gate (or a CNOT gate).

[0090] According to processing operation 902, the CZ gate (or a CNOT gate) is decomposed into a pair of fSIM gates and one or more single-qubit gates. In some cases, the decomposition may comprise using analytical decomposition. The analytical decomposition may comprise a parameterized family of analytical decompositions, which allows a further choice of parameters, so as to maximize the fidelity of the produced gate. A circuit depicting such a decomposition, generating a CZ gate (or a CNOT gate), is shown in FIG.8, in which Rxare single-qubit rotations along the x axis, wherein Γ^^^,^^^ ൌ ^^ି^ఏ^^^ା^^^ / ଶ^^ି^థ^^ / ସis essentially an fSim gate with compensated for single-qubit Z rotations, and ^^ ൌ arctan tan^^ cos ^^^^ ^ cos^^ / 2 2^1 െ sgn^cos^^ / 2^^,^^ ൌ arctan tan^^ sin^^^^ ^ sin^^ / 2 2^1 െ sgn^sin^^ / 2^^,WSGR Docket No.49676-738.601 1 ଶ െsi^^ ar 2 n ^^^^ ൌ 2. The decomposition is not unique but is of decompositions, each of which is valid if either of the|sin^^| ^ sin^^ / 4 ^ |sin^^ / 2|,|sin^^ / 2| ^ sin^^ / 4 ^ |sin ^^|.

[0091] According to processing operation 904, the coupler qubit is turned on by adding or removing SFQ flux to produce an approximation of each of the gates of the pair of fSIM gates used in the decomposition. The duration for which the coupler qubit is turned on can be used to control the parameter values of the fSIM gate which corresponds to the Γ^^^,^^^ block, disclosed herein with respect to FIG.8., in the decomposition. By controlling the duration of the coupler qubit being on, an fSIM gate with optimized fidelity may be produced.

[0092] According to processing operation 906, the one or more single-qubit gates are produced using optimized SFQ trains of pulses. The latter may provide the single-qubit rotations that may be required by the decomposition. Z rotations may be compiled into X and Y rotations, which may be natively implemented in the disclosed method. The latter may be produced by using recently developed DRAG-inspired SFQ sequences disclosed in PCT / IB2024 / 053518, which is incorporated by reference herein in its entirety, which have been shown to provide X and Y rotations with average gate fidelities above 0.9999 for a single-qubit transmon architecture. In the two-qubit tunable-coupler architecture disclosed herein, due to the higher dimension of the Hilbert space, these SFQ sequences generate single-qubit gates with fidelities greater than 0.999, as shown in FIG.6, which illustrates infidelities of single-qubit rotations for different clock frequencies and rotation angles. An example of a tunable-coupler architecture is provided in F. Yan, P. Krantz, Y. Sung, M. Kjaergaard, D. L. Campbell, T. P. Orlando, S. Gustavsson, and W. D. Oliver, Tunable coupling scheme for implementing high-fidelity two-qubit gates, Phys. Rev. Appl.10, 054062 (2018), which is incorporated by reference herein in its entirety. Optimization Results

[0093] The goal of the disclosed optimization of SFQ control is to maximize the fidelity between the generated unitary evolution and a target two-qubit gate, such as a CZ or CNOT gate.Minimizing a cost function ^^^^^^ ൌ 1 െ ^^^^^^, where ^^ is the average gate fidelity and ^^ is a setof variational control parameters, may achieve this goal. Namely, ^^ is a binary vector with information about the presence or absence of an SFQ pulse at each clock period (and for eachWSGR Docket No.49676-738.601 qubit), as well as the start and end times of the coupler qubit’s excursion, which may require being aligned with the ticks of an SFQ clock.

[0094] A. Direct optimization - The variational parameters of the introduced cost functions are discrete and therefore straightforward gradient-based optimization is not feasible. To deal with this issue, the restriction of the arguments being discrete may be relaxed and the SFQ pulse amplitudes may be allowed to take continuous values between 0 and 1. Also, the on and off times of the coupler may take arbitrary values. The gradient of the cost function may thenbe calculated at the cost of obtaining nonphysical solutions. To deal with this problem, additional terms may be added to the cost function (see, for example, W. Murray and K.-M. Ng, “An algorithm for nonlinear optimization problems with binary variables,” Computational optimization and applications 47, 257 (2010), which is incorporated by reference herein in its entirety), for example, ^^൫^^൯ ൌ 1 െ ^^൫^^൯ ^ ^^൫^⃗^൯ ^ Φ൫^⃗^൯,where 2^^^^ ^ ^^ ^^^^ ^ ^^^^^^^ cos^ is a regularization term approach either 0 or 1, andthe coupler qubit’s SFQ flux portion schedule’s start and end times ^^^^ to align with the ticks of the SFQ clock. The hyperparameter γ is the weight of the regularization term, and T is the SFQ clock’s period. The last term Φ൫^⃗^൯ ൌ െ^^^൫ln^^ ^^^୯ ^ ln൫1 െ ^^^^^୯൯൯ ^ is a logarithmic smoothing,local minima at the boundaries, where µ is a smoothing hyperparameter. The hyperparameters γ and µ may need to follow some schedule. Most commonly, γ increases exponentially during the optimization, while µ decreases exponentially.

[0095] The optimization itself includes a large number of parameters. For instance, if the duration is set to 80 ns and the clock frequency to 40 GHz, this corresponds to 40 x 80 = 3200 amplitudes for each qubit. Including the start and end times of the two coupler qubit excursions (illustrated by humps, disclosed with respect to FIG.4), this amounts to 6404 variational parameters. To calculate the gradients of the cost function, backpropagation may be used, for example, implemented in JAX (see, for example, J. Bradbury, R. Frostig, P. Hawkins, M. J. Johnson, C. Leary, D. Maclaurin, G. Necula, A. Paszke, J. Vanderplas, S. Wanderman-Milne,WSGR Docket No.49676-738.601 and Q. Zhang, JAX: composable transformations of Python+NumPy programs (2018), which is incorporated by reference herein in its entirety).

[0096] The optimization experiments also include a large number of hyperparameters. In addition to γ and µ, there may be different durations of the gates, different clock frequencies, different kick angles, and different initializations of the variational parameters. Furthermore, a different number of humps and number of operations for the coupler qubit may be considered. An example of the result of such an optimization is presented in FIG.4 for a CZ target gate with a duration of 70 ns. A seemingly random sequence of SFQ kicks is delivered to the two qubits (illustrated in the top and middle panels) and two coupler qubit excursions illustrated by humps (depicted in the bottom panel) comprise the two-qubit interaction. The coupler qubit’s on and off ramp parts of the SFQ pulse sequences appear linear in the figure but are in fact piecewise- constant and generated by the addition or removal of SFQ flux portions. The four kick plots in the top and middle panels correspond to the four possible SFQ-clock slots during a qubit period. Each operation in a single SFQ sequence corresponds to a sequence of kicks repeated at each qubit rotation.

[0097] Now referring to FIG.5, there are shown infidelities of two-qubit gates for different clock frequencies and durations. The infidelities are of the optimized sequences, with target CZ and CNOT gates. SFQ clock frequencies of 20 and 40 GHz were used, which correspond to 4 and 8 times the qubit frequency. The SFQ kick angle for the 20 GHz frequency is π / 100, while for the 40 GHz frequency it is π / 200. The results for two gate durations are depicted in the figure. It appears in the figure that higher SFQ frequencies and higher gate durations generate better results.

[0098] B. Analytical Decomposition - Instead of using direct optimization, an alternative method may be used to build CZ and CNOT gates out of simpler native gates. This modular approach allows generating target gates using reduced SFQ memory requirements. The native two-qubit interaction of the tunable-coupler architecture may be described by a Hamiltonian of the form ^^ ൌ ^^୧ୗ^^^^^^^^ ^ ^^^^^ ^ ^^௭^^^^^ ^ ^^^^^ ^ ^^௭௭^^^^,which may be used to generate an fSim gate along with additional single-qubit Z rotations. The^^^^^ ^ ^^^^^ term commutes with the iSWAP and the ZZ terms, and therefore can be factored outand compensated for in a decomposition. It has been shown in F. Arute, K. Arya, R. Babbush, D. Bacon, J. C. Bardin, R. Barends, R. Biswas, S. Boixo, F. G. Brandao, D. A. Buell, et al., “Quantum supremacy using a programmable superconducting processor,” Nature 574, 505 (2019), which is incorporated by reference herein in its entirety, that a CZ (and therefore a CNOT) gate may be decomposed out of two layers of fSim gates in between three layers of single-qubit gates.WSGR Docket No.49676-738.601

[0099] A circuit of such a decomposition, generating a CZ gate, is shown in FIG.8. In the figure, Rxare single-qubit rotations along the x axis, wherein Γ^^^,^^^ ൌ ^^ି^ఏ^^^ା^^^ / ଶ^^ି^థ^^ / ସis essentially an fSim gate with compensated for single-qubit Z rotations, and^^ ൌcos^^ / 2 2 ^^ ൌ arctan tan^^ sin^^^^ ^ sin^^ / 2 2^1 െ sgn^sin^^ / 2^^,1 ଶ െsin ^^^ ^^ ൌ.

[0100] Furthermore, this a continuous family ofdecompositions, each of which is valid conditions is satisfied: |sin^^| ^ sin^^ / 4 ^ |sin^^ / 2|,|sin^^ / 2| ^ sin^^ / 4 ^ |sin ^^|.

[0101] Therefore, these are valid decompositions that correspond to different values of the iSWAP and CZ angles in the fSim Hamiltonian disclosed herein. This decomposition may be used to produce CZ or CNOT gates by choosing the optimal parameter values of the decomposition, leading to the highest fidelity. The numerical analysis shows that an iSWAP rotation angle close to π / 4, corresponding to sqrt(iSWAP), minimizes leakage and provides a 0.9999 fidelity. The final operation of the process is to produce high-fidelity single-qubit rotations. To achieve this, the recently developed DRAG-inspired SFQ sequences disclosed in PCT / IB2024 / 053518, which is incorporated by reference herein in its entirety, may be applied. The DRAG-inspired SFQ sequences have been shown to provide X and Y rotations with average gate fidelities above 0.9999 for a single-qubit transmon architecture. In the two-qubit tunable- coupler architecture disclosed herein, due to the higher dimension of the Hilbert space, these SFQ sequences generate single-qubit gates with fidelities greater than 0.999, as shown in FIG.6, which illustrates infidelities of single-qubit rotations for different clock frequencies and rotation angles. The full generated SFQ sequence produces sequences with average gate fidelities slightly below 0.999. An example of such an SFQ sequence for a CZ gate is shown in FIG.7, where the SFQ control sequences, used to produce a CZ gate using the decomposition method, are plotted. In contrast to FIG.4, these are much less random SFQ sequences, which can be compressed to use less memory, but at the price of longer durations. The eight kick plots in the top and middle panels correspond to the eight possible SFQ-clock slots during a qubit period. Each operation in a single SFQ sequence corresponds to a sequence of kicks repeated at each qubit rotation.WSGR Docket No.49676-738.601

[0102] While preferred embodiments of the present disclosure have been shown and described herein, it will be obvious to those skilled in the art that such embodiments are provided by way of example only. It is not intended that the present disclosure be limited by the specific examples provided within the specification. While the present disclosure has been described with reference to the aforementioned specification, the descriptions and illustrations of the embodiments herein are not meant to be construed in a limiting sense. Numerous variations, changes, and substitutions will now occur to those skilled in the art without departing from the present disclosure. Furthermore, it shall be understood that all aspects of the present disclosure are not limited to the specific depictions, configurations or relative proportions set forth herein which depend upon a variety of conditions and variables. It should be understood that various alternatives to the embodiments of the present disclosure described herein may be employed in practicing the present disclosure. It is therefore contemplated that the present disclosure shall also cover any such alternatives, modifications, variations, or equivalents. It is intended that the following claims define the scope of the present disclosure and that methods and structures within the scope of these claims and their equivalents be covered thereby.

Claims

WSGR Docket No.49676-738.601 CLAIMS WHAT IS CLAIMED IS:

1. A method for constructing a multi-qubit gate on a circuit comprising qubits controlled at least in part using single-flux quantum (SFQ) control, the method comprising: (a) providing said circuit, wherein said circuit comprises a first qubit, a second qubit, and a coupler qubit; (b) applying single-qubit SFQ control comprising an SFQ train of pulses to at least one of said first qubit or said second qubit; and (c) turning on said coupler qubit by adding or removing SFQ flux portions.

2. The method of claim 1, wherein applying said single-qubit SFQ control, in (b), comprises applying optimized SFQ trains of pulses.

3. The method of claim 1, wherein applying said single-qubit SFQ control, in (b), comprises applying said SFQ train of pulses to said first qubit and said second qubit.

4. The method of claim 1, further comprising, subsequent to (c), turning off said coupler qubit.

5. The method of claim 1, wherein said first qubit and said second qubit each comprises a tunable frequency qubit.

6. The method of claim 1, wherein said first qubit and said second qubit are directly and capacitively coupled, and wherein each of said first qubit and said second qubit is capacitively coupled to said coupler qubit.

7. The method of claim 1, wherein, in (b), said first qubit and said second qubit are capacitively driven by said SFQ train of pulses.

8. The method of claim 7, wherein said SFQ train of pulses comprises an external SFQ train of pulses.

9. The method of claim 1, wherein, in (c), said coupler qubit is inductively driven by an SFQ pulse generator for adding and removing said SFQ flux portions.

10. The method of claim 1, wherein said first qubit and said second qubit comprise a transmon qubit.

11. The method of claim 1, wherein said first qubit, said second qubit, or both is frequency tunable using a Josephson junction.

12. The method of claim 11, wherein said Josephson junction comprises a superconducting quantum interference device (SQUID) loop.

13. The method of claim 1, wherein said first qubit, said second qubit, or both is driven by an SFQ pulse generator.WSGR Docket No.49676-738.601 14. The method of claim 1, wherein said multi-qubit gate comprises a controlled-Z (CZ) gate or a controlled-NOT (CNOT) gate.

15. The method of claim 14, further comprising, prior to (a), decomposing said CZ gate or said CNOT gate into a pair of fermionic simulation (fSIM) gates and one or more single- qubit gates.

16. The method of claim 15, wherein said decomposing is based at least in part on an analytical decomposition.

17. The method of claim 16, wherein (c) is used to produce an approximation of each of gate in said pair of fSIM gates; and (b) is used to produce said one or more single-qubit gates.

18. The method of claim 17, wherein (b) – (c) are repeated one time and (a) is repeated subsequently one or more times creating (A) three layers of single-qubit control of said first qubit and of said second qubit, and (B) two layers of control of said coupler qubit.

19. The method of claim 1, wherein said coupler qubit generates an fSim gate.

20. The method of claim 1, further comprising capacitively driving said first qubit and said second qubit by an external SFQ train of pulses; and inductively driving said coupler qubit by an SFQ pulse generator thereby adding or removing said SFQ flux portions.

21. The method of claim 1, further comprising optimizing said external SFQ train of pulses and a schedule for said SFQ flux portions for said multi-qubit gate.

22. The method of claim 21, further comprising: (i) constructing a cost function comprising an infidelity between a quantum channel generated by said circuit and a target gate; (ii) minimizing said cost function; and (iii) selecting at least one feasible solution.

23. The method of claim 22, wherein (ii) and (iii) are repeated one or more times.

24. The method of claim 23, wherein a number of repetitions is based at least in part on a threshold of fidelity of said at least one feasible solution.

25. The method of claim 22, wherein (ii) comprises a gradient-based procedure.

26. The method of claim 25, wherein (ii) further comprises one or more members of the group consisting of: the limited-memory Broyden–Fletcher–Goldfarb–Shanno algorithm (L- BFGS), gradient descent, a nonlinear conjugate gradient method, Powell’s method, genetic algorithms, and differential evolution.

27. The method of claim 25, wherein said gradient is estimated using said differentiable simulation.

28. The method of claim 22, wherein said infidelity is computed using a differentiable simulation.WSGR Docket No.49676-738.601 29. The method of claim 27 or 28, wherein said differentiable simulation comprises deriving the Hamiltonian of the circuit and simulating said Hamiltonian in the charge basis.

30. The method of claim 22, further comprising: (I) for said first qubit and said second qubit, relaxing said external SFQ train of pulses to have continuous values, wherein said relaxing comprises allowing continuous amplitudes for said external SFQ train of pulses; and (II) relaxing SFQ arrival times of said SFQ flux portions of said coupler qubit to have continuous values; wherein said cost function comprises a penalty term.

31. The method of claim 30, wherein said cost function comprises a smoothing term.

32. The method of claim 31, wherein said penalty term and said smoothing term comprise a scheduling that allows relative weights to be changed during optimization.

33. The method of claim 31, wherein said smoothing term comprises regularization to avoid local minima.

34. The method of claim 31, wherein said smoothing term comprises amplitude values of said external SFQ train of pulses.

35. The method of claim 30, wherein said penalty term comprises regularization to force said continuous amplitudes to approach zero or one; and aligning a start or an end time of a schedule of said SFQ flux portions of said coupler qubit to align with ticks of an SFQ clock of said first qubit and said second qubit.

36. The method of claim 1, further comprising constraining said first qubit and said second qubit to have a same frequency based at least in part by optimizing flux values for said coupler qubit, said first qubit, and said second qubit to match a target frequency.

37. A circuit comprising: a first qubit, a second qubit, and a coupler qubit, wherein said first qubit, said second qubit, and said coupler qubit are configured to be controlled at least in part using SFQ control, wherein said SFQ control comprises: an external SFQ train of pulses configured to drive at least one of said first qubit or said second qubit, and an SFQ pulse generator configured to add or remove SFQ flux portions to drive said coupler qubit.

38. The circuit gate of claim 37, wherein said first qubit and said second qubit comprise a tunable frequency qubit.

39. The circuit gate of claim 37, wherein said first qubit and said second qubit are directly and capacitively coupled.WSGR Docket No.49676-738.601 40. The circuit gate of claim 37, wherein said first qubit and said second qubit are capacitively coupled to said coupler qubit.

41. The circuit gate of claim 37, wherein said external SFQ train of pulses is configured to capacitively drive said first qubit and said second qubit.

42. The circuit gate of claim 37, wherein said SFQ pulse generator is configured to add or remove SFQ flux portions to inductively drive said coupler qubit.

43. The circuit gate of claim 37, wherein said first qubit and said second qubit comprise a transmon qubit.

44. The circuit gate of claim 37, wherein said first qubit, said second qubit, or both is frequency tunable using a Josephson junction.

45. The circuit gate of claim 44, wherein said Josephson junction comprises a superconducting quantum interference device (SQUID) loop.

46. The circuit gate of claim 37, further comprising a multi-qubit gate on said circuit, wherein said multi-qubit gate comprises a controlled-Z (CZ) gate or a controlled-NOT (CNOT) gate.

47. A system comprising: a digital processor communicatively coupled to a circuit comprising a multi-qubit gate, wherein said circuit comprises a first qubit, a second qubit, and a coupler qubit, wherein the digit processor is configured to control said circuit at least in part using single-flux quantum (SFQ) control, and wherein processor is configured to: apply single-qubit SFQ control comprising an SFQ train of pulses to at least one of said first qubit or said second qubit; and turn on said coupler qubit by adding or removing SFQ flux portions.

48. The system of claim 47, wherein the processor is further configured to perform the method of any one of claims 1-36.

49. A non-transitory medium with instructions stored thereon which when executed by a processor is configured to: (a) apply single-qubit SFQ control comprising an SFQ train of pulses to at least one of a first qubit or a second qubit of a multi-qubit gate on a circuit; and (b) turn on a coupler qubit of said multi-qubit gate by adding or removing SFQ flux portions.

50. The non-transitory medium of claim 49, wherein said instructions are further configured to perform the method of any one of claims 1-36.

51. A method of controlling qubits of a circuit comprising a first qubit, a second qubit, and a coupler qubit, said controlling comprising at least in part using single-flux quantum (SFQ) control, the method comprising:WSGR Docket No.49676-738.601 constructing a multi-qubit gate on a circuit at least in part by using a differentiable simulation of said multi-qubit gate, wherein said multi-qubit gate comprises a first qubit, a second qubit, and a coupler qubit, wherein said first qubit, said second qubit, and said coupler qubit are configured to be controlled at least in part using SFQ control.

52. The method of claim 51, wherein said first qubit and said second qubit comprise a transmon qubit.

53. The method of claim 51, wherein said first qubit, said second qubit, or both is frequency tunable using a Josephson junction.

54. The method of claim 53, wherein said Josephson junction comprises a superconducting quantum interference device (SQUID) loop.

55. The method of claim 51, wherein said first qubit, said second qubit, or both is driven by an SFQ pulse generator.

56. The method of claim 51, wherein said multi-qubit gate comprises a controlled-Z (CZ) gate or a controlled-NOT (CNOT) gate.

57. The method of claim 56, further comprising, decomposing said CZ gate or said CNOT gate into a pair of fermionic simulation (fSIM) gates and one or more single-qubit gates.

58. The method of claim 57, wherein the decomposing is based at least in part on an analytical decomposition.

59. The method of claim 51, further comprising: (a) applying single-qubit SFQ control comprising an SFQ train of pulses to at least one of said first qubit or said second qubit; and (b) turning on said coupler qubit by adding or removing SFQ flux portions.

60. The method of claim 59, wherein applying said single-qubit SFQ control, in (a), comprises applying optimized SFQ trains of pulses.

61. The method of claim 59, wherein applying said single-qubit SFQ control, in (a), comprises applying said SFQ trains of pulses to said first qubit and said second qubit.

62. The method of claim 59, further comprising, subsequent to (b), turning off said coupler qubit.

63. The method of claim 59, wherein said first qubit and said second qubit each comprises a tunable frequency qubit.

64. The method of claim 59, wherein said first qubit and said second qubit are directly and capacitively coupled, and wherein each of said first qubit and said second qubit is capacitively coupled to said coupler qubit.

65. The method of claim 59, wherein, in (a), said first qubit and said second qubit are capacitively driven by said SFQ train of pulses.WSGR Docket No.49676-738.601 66. The method of claim 65, wherein said SFQ train of pulses comprises an external SFQ train of pulses.

67. The method of claim 59, wherein, in (b), said coupler qubit is inductively driven by an SFQ pulse generator for adding and removing said SFQ flux portions.

68. The method of claim 59, wherein said multi-qubit gate comprises a controlled-Z (CZ) gate or a controlled-NOT (CNOT) gate.

69. The method of claim 68, wherein (b) is used to produce an approximation of each of gate in said pair of fSIM gates; and (a) is used to produce said one or more single-qubit gates.

70. The method of claim 69, wherein (a) – (b) are repeated one time and (a) is repeated subsequently one or more times creating (A) three layers of single-qubit control of said first qubit and of said second qubit, and (B) two layers of control of said coupler qubit.

71. The method of claim 51, wherein said coupler qubit generates an fSim gate.

72. The method of claim 51, further comprising capacitively driving said first qubit and said second qubit by an external SFQ train of pulses; and inductively driving said coupler qubit by an SFQ pulse generator thereby adding or removing said SFQ flux portions.

73. The method of claim 72, further comprising optimizing said external SFQ train of pulses and a schedule for said SFQ flux portions for said multi-qubit gate.

74. The method of claim 73, further comprising: (i) constructing a cost function comprising an infidelity between a quantum channel generated by said circuit and a target gate; (ii) minimizing said cost function; and (iii) selecting at least one feasible solution.

75. The method of claim 74, wherein (ii) and (iii) are repeated one or more times.

76. The method of claim 75, wherein a number of repetitions is based at least in part on a threshold of fidelity of said at least one feasible solution.

77. The method of claim 74, wherein (ii) comprises a gradient-based procedure.

78. The method of claim 77, wherein (ii) further comprises one or more members of the group consisting of: the limited-memory Broyden–Fletcher–Goldfarb–Shanno algorithm (L- BFGS), gradient descent, a nonlinear conjugate gradient method, Powell’s method, genetic algorithms, and differential evolution.

79. The method of claim 77, wherein said gradient is estimated using said differentiable simulation.

80. The method of claim 74, wherein said infidelity is computed using a differentiable simulation.WSGR Docket No.49676-738.601 81. The method of claim 79 or 80, wherein said differentiable simulation comprises deriving the Hamiltonian of the circuit and simulating said Hamiltonian in the charge basis.

82. The method of claim 74, further comprising: (I) for said first qubit and said second qubit, relaxing said external SFQ train of pulses to have continuous values, wherein said relaxing comprises allowing continuous amplitudes for said external SFQ train of pulses; and (II) relaxing the SFQ arrival times of said SFQ flux portions of said coupler qubit to have continuous values; wherein said cost function comprises a penalty term.

83. The method of claim 80, wherein said cost function comprises a smoothing term.

84. The method of claim 81, wherein said penalty term and said smoothing term comprise a scheduling that allows relative weights to be changed during optimization.

85. The method of claim 81, wherein said smoothing term comprises regularization to avoid local minima.

86. The method of claim 81, wherein said smoothing term comprises amplitude values of said pulses.

87. The method of claim 80, wherein said penalty term comprises regularization to force said continuous amplitudes to approach zero or one; and aligning a start or an end time of a schedule of said SFQ flux portions of said coupler qubit to align with ticks of an SFQ clock of said first qubit and said second qubit.

88. The method of claim 51, further comprising constraining said first qubit and said second qubit to have the same frequency based at least in part by optimizing flux values for said coupler qubit, said first qubit, and said second qubit to match a target frequency.

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