Optoelectronic interconnection packaging structure and preparation method therefor

Abstract

The present invention provides an optoelectronic interconnection packaging structure and a preparation method therefor. The method comprises: using a laser method, forming a first blind hole and a second blind hole, the bases of the first blind hole and the second blind hole being in a glass substrate, then performing thinning processing on a first surface of the glass substrate and a second surface of the glass substrate, to form a first through hole and a second through hole, respectively, that are arranged in an offset manner. On the basis of the laser method and the thinning processing, the present application can prepare a high-performance TGV adapter plate on a glass substrate that has a relatively small pitch and a relatively small CD size, is thin and suitable for high-density arrangement, and can effectively prevent metal posts from overlapping. In addition, an optical waveguide layer is disposed between the glass substrate and a rewiring layer, and the TGV adapter plate is used to connect an electrical chip and an optical chip, which can make metal wiring more flexible, achieve photoelectric interconnection integration, reduce package size, lower power consumption, and improve reliability. The application is thus applicable to high-density integrated packaging, and can achieve good optoelectronic signal transmission.

Description

Optoelectronic interconnection package structure and preparation method thereof TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor, and relates to an optoelectronic interconnection package structure and a preparation method thereof. BACKGROUND

[0002] Optical signals have excellent performances such as low signal attenuation, low energy consumption, high bandwidth and CMOS compatibility. It is generally believed in the industry that introducing optical technology into semiconductor processes can not only reduce chip size, cost and power consumption, but also improve reliability, so that functional chips can be connected by optical fibers in an edge coupling manner. However, with the reduction of chip spacing, the application mode of optical fiber coupling is limited.

[0003] In semiconductor 2.5D / 3D packaging, organic adapter plates, through-silicon via (TSV) adapter plates and through-glass via (TGV) adapter plates are the mainstream adapter plate materials. The main purpose of setting the adapter plate is to solve some challenges in semiconductor packaging, such as improving integration, reducing cost and improving electrical performance.

[0004] Among them, since glass is an insulating material, its dielectric constant is low (about 1 / 3 of that of silicon), and its loss factor is small (about 2-3 orders of magnitude smaller than that of silicon), and its high-frequency performance is excellent, which enables glass to significantly reduce insertion loss and crosstalk at high frequencies. However, the key problem faced by TGV technology is the lack of a deep etching process similar to silicon, making it difficult to quickly manufacture glass deep holes or trenches with high aspect ratio. Traditional TGV adapter plate preparation methods include sandblasting, mechanical drilling, dry etching, wet etching, focused discharge and laser methods. However, all of the above methods have obvious shortcomings. The most widely used method at present is the laser method. However, because the energy curve excited by the laser itself is a Gaussian energy curve, the glass via formed by the laser method is tapered and cannot form a 90° vertical hole. Therefore, when high-density openings are made, the over layer phenomenon may occur on the upper part of the hole, causing the metal in the adjacent opening to be in contact. In order to avoid the over layer phenomenon, the pitch of the adjacent TGV hole needs to be increased, so that the existing laser method cannot be applied to the preparation of high-density and high-performance products.

[0005] Therefore, it is necessary to provide an optoelectronic interconnection package structure and a preparation method thereof. SUMMARY

[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide an optoelectronic interconnection package structure and a preparation method thereof, which solves the problem of limited application of optical fiber coupling in the prior art.

[0007] To achieve the above object and other related objects, the present application provides a preparation method of an optoelectronic interconnection packaging structure, comprising the following steps:

[0008] A glass substrate is provided, which comprises a first surface and a second surface arranged oppositely;

[0009] A first blind hole with a bottom in the glass substrate is formed from the first surface of the glass substrate by using a first laser method, and a second blind hole with a bottom in the glass substrate is formed from the second surface of the glass substrate by using a second laser method;

[0010] A thinning process is performed from the first surface of the glass substrate and the second surface of the glass substrate respectively, so that the first blind hole is changed into a first through hole penetrating through the glass substrate from top to bottom, and the second blind hole is changed into a second through hole penetrating through the glass substrate from bottom to top, and the first through hole and the second through hole are arranged alternately;

[0011] A first TGV metal column filling the first through hole is formed in the first through hole, and a second TGV metal column filling the second through hole is formed in the second through hole;

[0012] A first groove with a bottom in the glass substrate is formed from the first surface of the glass substrate by using a third laser method;

[0013] A first optical waveguide layer is formed in the first groove;

[0014] A first rewiring layer is formed on the first surface of the glass substrate, and a second rewiring layer is formed on the second surface of the glass substrate, wherein the first rewiring layer and the second rewiring layer are electrically connected with the first TGV metal column and the second TGV metal column respectively;

[0015] The first rewiring layer is patterned to form a second groove in the first rewiring layer, and the second groove exposes the first optical waveguide layer;

[0016] A second optical waveguide layer is formed in the second groove, and the second optical waveguide layer is connected with the first optical waveguide layer;

[0017] An electrical chip and an optical chip with a photosensitive region are provided, and the electrical chip and the optical chip are bonded on the first rewiring layer, wherein the electrical chip and the optical chip are electrically connected with the first rewiring layer, and the photosensitive region of the optical chip is arranged correspondingly with the second optical waveguide layer.

[0018] Optionally, the first laser method comprises a laser ablation method or a laser-induced modification etching method; the second laser method comprises a laser ablation method or a laser-induced modification etching method; and the third laser method comprises a laser ablation method or a laser-induced modification etching method.

[0019] Optionally, the first TGV metal pillar and the second TGV metal pillar are synchronously formed, and a method for forming the first TGV metal pillar and the second TGV metal pillar comprises electroless plating or electroplating.

[0020] Optionally, a method for forming the first re-wiring layer on the first surface of the glass substrate comprises a semiconductor process method or a substrate bonding method; and a method for forming the second re-wiring layer on the second surface of the glass substrate comprises a semiconductor process method or a substrate bonding method.

[0021] Optionally, a distance between the first via and the second via ranges from 30 μm to 100 μm.

[0022] Optionally, a CD size of the first TGV metal pillar ranges from 40 μm to 50 μm; and a CD size of the second TGV metal pillar ranges from 40 μm to 50 μm.

[0023] Optionally, a thickness of the glass substrate before thinning ranges from 200 μm to 300 μm; and a thickness of the glass substrate after thinning ranges from 100 μm to 200 μm.

[0024] The application further provides an optoelectronic interconnection packaging structure, which comprises:

[0025] a glass substrate comprising a first surface and a second surface arranged oppositely;

[0026] a first via penetrating the glass substrate from top to bottom from the first surface of the glass substrate, and a second via penetrating the glass substrate from bottom to top from the second surface of the glass substrate, and the first via and the second via are arranged alternately;

[0027] wherein a method for preparing the first via and the second via is:

[0028] a first blind hole with a bottom in the glass substrate is formed from the first surface of the glass substrate by using a first laser method, and a second blind hole with a bottom in the glass substrate is formed from the second surface of the glass substrate by using a second laser method;

[0029] a thinning process is performed from the first surface of the glass substrate and the second surface of the glass substrate respectively, so that the first blind hole is converted into the first via, and the second blind hole is converted into the second via;

[0030] a first TGV metal post filling the first via hole;

[0031] a second TGV metal post filling the second via hole;

[0032] a first groove prepared by a third laser method, and the first groove extending into the glass substrate from the first surface of the glass substrate;

[0033] a first optical waveguide layer located in the first groove;

[0034] a first rewiring layer located on the first surface of the glass substrate, and the first rewiring layer being electrically connected with the first TGV metal post and the second TGV metal post;

[0035] a second rewiring layer located on the second surface of the glass substrate, and the second rewiring layer being electrically connected with the first TGV metal post and the second TGV metal post;

[0036] a second groove located in the first rewiring layer, and the second groove exposing the first optical waveguide layer;

[0037] a second optical waveguide layer located in the second groove, and the second optical waveguide layer being connected with the first optical waveguide layer;

[0038] an electric chip and an optical chip with a photosensitive region, the electric chip and the optical chip being bonded on the first rewiring layer, the electric chip and the optical chip being electrically connected with the first rewiring layer, and the photosensitive region of the optical chip being arranged correspondingly to the second optical waveguide layer.

[0039] Optionally, the distance between the adjacent first TGV metal post and the second TGV metal post ranges from 30 to 100 μm; the CD size of the first TGV metal post ranges from 40 to 50 μm; the CD size of the second TGV metal post ranges from 40 to 50 μm; and the first TGV metal post and the second TGV metal post have the same morphology.

[0040] Optionally, the glass substrate further comprises a metal mirror located on the sidewall of the first groove; the glass substrate further comprises a convex lens located on the second optical waveguide layer; and the glass substrate further comprises a metal convex block located on the second rewiring layer.

[0041] As described above, the photoelectric interconnection packaging structure and the preparation method thereof of the present application adopt the first laser method to form the first blind hole with the bottom located in the glass substrate, and adopt the second laser method to form the second blind hole with the bottom located in the glass substrate, and then perform the thinning process from the first surface of the glass substrate and the second surface of the glass substrate respectively, so that the first blind hole is converted into the first through hole, and the second blind hole is converted into the second through hole, and the first through hole and the second through hole are staggered, so that the present application can prepare the high-performance TGV adapter plate with smaller spacing, smaller CD size, thinner, suitable for high-density arrangement, and can effectively avoid the overlapping of the metal column based on the laser method and the thinning process; further, the optical waveguide layer is arranged in the glass substrate and the rewiring layer, and the electrical chip and the optical chip are connected in combination with the TGV adapter plate, so that the metal wiring is more flexible, the photoelectric interconnection integration is realized, the packaging size is reduced, the power consumption is reduced, the reliability is improved, and the high-density integrated packaging is suitable, and good photoelectric signal transmission can be realized. BRIEF DESCRIPTION OF DRAWINGS

[0042] FIG. 1 shows a flowchart of preparing the photoelectric interconnection packaging structure in the embodiment of the present application.

[0043] FIG. 2 shows a structure diagram after forming the first blind hole and the second blind hole in the embodiment of the present application.

[0044] FIG. 3 shows a structure diagram after forming the first through hole and the second through hole by the thinning process in the embodiment of the present application.

[0045] FIG. 4 shows a structure diagram after forming the first TGV metal column and the second TGV metal column in the embodiment of the present application.

[0046] FIG. 5 shows a structure diagram after forming the first groove in the embodiment of the present application.

[0047] FIG. 6 shows a structure diagram after forming the metal mirror in the embodiment of the present application.

[0048] FIG. 7 shows a structure diagram after forming the first optical waveguide layer in the embodiment of the present application.

[0049] FIG. 8 shows a structure diagram after forming the first rewiring layer and the second rewiring layer in the embodiment of the present application.

[0050] FIG. 9 shows a structure diagram after forming the second groove in the embodiment of the present application.

[0051] FIG. 10 shows a structure diagram after forming the second optical waveguide layer in the embodiment of the present application.

[0052] FIG. 11 shows a structure diagram after forming the convex lens in the embodiment of the present application.

[0053] Figure 12 shows a schematic diagram of the structure after bonding the electrical chip, the optical chip and forming the metal bumps in an embodiment of the present application.

[0054] Reference Sign Description 100 Glass substrate 101 First blind via 102 Second blind via 111 First through via 112 Second through via 103 First groove 104 Second groove 201 First TGV metal post 202 Second TGV metal post 300 Metal mirror 401 First optical waveguide layer 402 Second optical waveguide layer 501 First rewiring layer 502 Second rewiring layer 600 Convex lens 701 Electrical chip 702 Optical chip 712 Photosensitive region 800 Metal bump DETAILED DESCRIPTION

[0055] The present application is herein described, by way of example only, with reference to certain embodiments thereof. It is to be understood that the terminology used herein is for the purpose of describing specific embodiments only and is not intended to be limiting, since the scope of the present application will be limited only by the appended claims. Numerous specific aspects are described with reference to particular embodiments. These references are intended to serve as illustrations only and should be construed in a non-limiting manner. A person skilled in the art will readily recognize that there are a great number of ways in which the described application could be practiced. As will be apparent, any feature of the application can be implemented in any combination of hardware and software.

[0056] In the following detailed description of embodiments of the application, numerous specific details are set forth in order to provide a thorough understanding of the application. However, there can be embodiments of the application to which the specific details are not needed. Those skilled in the relevant art will recognize that the application can be practiced with

[0057] For convenience of description, spatial relationship words such as "under", "below", "lower", "underneath", "above", "upper" and the like can be used herein to describe the relationship of one element or feature to another element or feature as shown in the drawings. It will be understood that these spatial relationship words are intended to encompass different orientations of the device in use or operation, in addition to the orientations depicted in the drawings. For example, the spatial relationship words can include embodiments in which the first and second features are arranged in direct contact, and embodiments in which other features are arranged between the first and second features such that the first and second features can not be in direct contact. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers can also be present.

[0058] It should be noted that the diagrams provided in the embodiments only schematically illustrate the basic concepts of the present application, and thus only the components related to the present application are shown in the diagrams, rather than being drawn according to the number, shape and size of the components in actual implementation. The shapes, number and proportions of the components in actual implementation can be arbitrarily changed, and the layout pattern of the components can be more complex.

[0059] Referring to FIG. 1, the present embodiment provides a preparation method of an optoelectronic interconnection packaging structure, which can prepare a high-performance TGV adapter plate with smaller pitch, smaller CD size, thinner, suitable for high-density arrangement, and can effectively avoid metal column overlapping based on a laser method; further, an optical waveguide layer is arranged in the glass substrate and the re-routed layer, and the connection of the electrical chip and the optical chip is performed in combination with the TGV adapter plate, which can make the metal wiring more flexible, realize optoelectronic interconnection integration, reduce the packaging size, reduce the power consumption, improve the reliability, and be suitable for high-density integrated packaging, and can achieve good optoelectronic signal transmission.

[0060] The preparation of the optoelectronic interconnection packaging structure will be further described below in combination with FIGS. 2-12, which specifically includes:

[0061] First, referring to FIGS. 1 and 2, step S1 is performed to provide a glass substrate 100, which includes oppositely arranged first and second surfaces.

[0062] Specifically, the glass substrate 100 can include a wafer-level glass substrate, such as 4 inches, 6 inches, 8 inches, 12 inches, etc. The thickness of the glass substrate 100 can be 200-300 μm, such as 200 μm, 250 μm, 300 μm, etc. However, the size of the glass substrate 100 is not limited thereto, and can be set as needed, which is not excessively limited herein.

[0063] Next, referring to FIG. 1 and FIG. 2, a first blind hole 101 with a bottom in the glass substrate 100 is formed from a first surface of the glass substrate 100 by a first laser method, and a second blind hole 102 with a bottom in the glass substrate 100 is formed from a second surface of the glass substrate 100 by a second laser method.

[0064] The first laser method can include, for example, a laser ablation method or a laser-induced phase-change etching method. Similarly, the second laser method can include, for example, a laser ablation method or a laser-induced phase-change etching method. According to requirements, the first laser method and the second laser method preferably use the same preparation method to reduce the complexity of the process, facilitate the management and operation of the process, but are not limited thereto. According to requirements, the first laser method and the second laser method can also use different preparation methods. The specific operations of the laser ablation method and the laser-induced phase-change etching method are not described here and can be referred to existing preparation methods.

[0065] Next, referring to FIG. 1 and FIG. 3, a thinning process is performed from the first surface of the glass substrate 100 and the second surface of the glass substrate 100, respectively, so that the first blind hole 101 becomes a first through hole 111 that penetrates the glass substrate 100 from top to bottom, and the second blind hole 102 becomes a second through hole 112 that penetrates the glass substrate 100 from bottom to top, and the first through hole 111 and the second through hole 112 are staggered.

[0066] Specifically, most of the existing methods for preparing TGV adapter plates use laser methods to prepare TGV holes in the glass substrate. However, the TGV holes formed by the laser method are conical, as shown in the morphology of the first blind hole 101 in FIG. 2. Therefore, to avoid the over layer phenomenon between the TGV holes, the distance between the TGV holes is usually increased in the process, for example, the pitch between adjacent TGV holes is set to 120-150 μm. This way of increasing the pitch to avoid over layer is difficult to apply to high-density products. Therefore, referring to FIG. 2, in this embodiment, the laser method is cleverly implemented on the first surface and the second surface of the glass substrate 100, respectively, so that the first blind hole 101 and the second blind hole 102 can be formed in the glass substrate 100, and referring to FIG. 3, after the first blind hole 101 and the second blind hole 102 are formed, a double-sided thinning process can be used to convert the first blind hole 101 into the first through hole 111 that penetrates the glass substrate 100 from top to bottom, and convert the second blind hole 102 into the second through hole 112 that penetrates the glass substrate 100 from bottom to top, and the first through hole 111 and the second through hole 112 are staggered.

[0067] In the embodiment, the pitch between the first via hole 111 and the second via hole 112 can be reduced while avoiding over layer. The thickness of the glass substrate 100 after thinning can be 100-200 μm, such as 100 μm, 150 μm, 200 μm, etc. The area with a larger width in the blind hole can be removed by thinning to reduce the CD size of the TGV metal column prepared subsequently.

[0068] The thinning process can be, for example, chemical mechanical polishing (CMP) or mechanical polishing, which is not limited herein.

[0069] Referring to FIGS. 2, 3 and 4, the first blind hole 101 is formed by laser, so that the first blind hole 101 has an opening width greater than a bottom width. Similarly, the second blind hole 102 is formed by laser, so that the second blind hole 102 has an opening width greater than a bottom width. The first blind hole 101 and the second blind hole 102 are arranged in an overlapping manner, so that the first blind hole 101 and the second blind hole 102 can make full use of the effective space of the glass substrate 100, and the pitch D between the adjacent TGV holes can be reduced. The pitch D between the first via hole 111 and the second via hole 112 can be 80-100 μm, such as 80 μm, 90 μm, 100 μm, etc.

[0070] In the embodiment, the first blind hole 101 and the second blind hole 102 have a separation space therebetween when the first blind hole 101 and the second blind hole 102 are prepared, so that the over layer phenomenon can be effectively avoided.

[0071] In another embodiment, the first blind hole 101 and the second blind hole 102 can also be overlapping, i.e., the end portion has an over layer phenomenon. When the glass substrate 100 is subjected to a double-sided thinning process, the overlapping area causing the over layer phenomenon can be removed by the thinning process, so that the pitch D between the first blind hole 101 and the second blind hole 102 can be further reduced. The pitch D between the first blind hole 101 and the second blind hole 102 can be 30-100 μm, such as 30 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, etc. Thus, the over layer phenomenon can be effectively avoided, the density of TGV hole distribution is improved, and high-quality products can be prepared.

[0072] Next, referring to FIGS. 1 and 4, step S4 is performed to form a first TGV metal column 201 filling the first via hole 111 in the first via hole 111, and a second TGV metal column 202 filling the second via hole 112 in the second via hole 112.

[0073] Specifically, the first TGV metal pillar 201 and the second TGV metal pillar 202 are preferably formed synchronously to reduce the process steps, and of course, the first TGV metal pillar 201 and the second TGV metal pillar 202 can also be prepared step by step according to the needs, which is not limited here.

[0074] The method for forming the first TGV metal pillar 201 can include, for example, electroless plating or electroplating, and the method for forming the second TGV metal pillar 202 can include, for example, electroless plating or electroplating, and the specific preparation method of the first TGV metal pillar 201 and the second TGV metal pillar 202 is not limited here. The specific operation of electroless plating or electroplating is not repeated here, and can be referred to the existing preparation method.

[0075] In this embodiment, the material of the first TGV metal pillar 201 and the second TGV metal pillar 202 is copper metal, but the material of the TGV metal pillar is not limited to this, and other conductive metal materials can also be used.

[0076] As shown in FIG. 4, the critical dimension (CD) of the first TGV metal pillar 201, i.e. d, can be 40-50 μm, such as 40 μm, 45 μm, 50 μm, etc., and the critical dimension (CD) of the second TGV metal pillar 202 can be 40-50 μm, such as 40 μm, 45 μm, 50 μm, etc.

[0077] Further, after the first via hole 111 and the second via hole 112 are prepared by the laser method, in order to facilitate the formation of the first TGV metal pillar 201 and the second TGV metal pillar 202 which fill the via hole, the first via hole 111 and the second via hole 112 can be surface treated, such as wet etching, etc., so that the first via hole 111 and the second via hole 112 have a smooth inner surface, and the method of surface treatment is not limited here.

[0078] Further, after the first TGV metal pillar 201 and the second TGV metal pillar 202 are formed, in order to facilitate the preparation of the subsequent rewiring layer, the glass substrate 100 can be surface treated, such as grinding, wet etching, etc., to avoid electrical connection between the TGV metal pillars and obtain a flat surface.

[0079] Next, referring to FIGS. 1 and 5, step S5 is performed, and a first groove 103 is formed in the glass substrate 100 from the first surface of the glass substrate 100 by a third laser method.

[0080] The third laser method can include a laser ablation method or a laser-induced denaturation etching method, and preferably the first laser method, the second laser method and the third laser method adopt the same preparation method to reduce the process complexity and facilitate the management and operation of the process, but are not limited thereto, and the first laser method, the second laser method and the third laser method can also adopt different preparation methods according to needs.

[0081] Since the first groove 103 is prepared by a laser method, the opening width of the first groove 103 is greater than the bottom width, that is, the sidewall of the first groove 103 has an inclined surface, which is beneficial to the subsequent transmission of optical signals. The inclination angle of the inclined surface can be set according to specific needs, which is not limited here.

[0082] Next, referring to FIGS. 1, 6 and 7, step S6 is performed to form a first optical waveguide layer 401 in the first groove 104.

[0083] To reduce optical loss and improve optical transmission efficiency, preferably, a metal mirror 300 is formed on the sidewall of the first groove 103 in the embodiment, such as a titanium metal mirror prepared by sputtering and etching, and the metal mirror 300 formed can also cover the bottom of the first groove 103, which is not limited here.

[0084] The first optical waveguide layer 401 can be prepared by a semiconductor process, that is, prepared by coating, exposure, development, etching and the like. The first optical waveguide layer 401 formed can include an organic polymer optical waveguide wiring layer, a silicon-based optical waveguide wiring layer, a lithium niobate optical waveguide wiring layer or a lithium borate optical waveguide wiring layer, etc.

[0085] Next, referring to FIGS. 1 and 8, step S7 is performed to form a first re-wiring layer 501 on the first surface of the glass substrate 100 and a second re-wiring layer 502 on the second surface of the glass substrate 100, wherein the first re-wiring layer 501 and the second re-wiring layer 502 are respectively electrically connected to the first TGV metal column 201 and the second TGV metal column 202.

[0086] Specifically, the method for forming the first re-wiring layer 501 on the first surface of the glass substrate 100 can include a semiconductor process or a substrate bonding method, and similarly, the method for forming the second re-wiring layer 502 on the second surface of the glass substrate 100 can include a semiconductor process or a substrate bonding method.

[0087] The semiconductor process method is a method for preparing the first rewiring layer 501 and the second rewiring layer 502 on the glass substrate 100 through steps such as coating, exposure, development, deposition, and etching. The substrate bonding method is a method for directly bonding the first rewiring layer 501 and the second rewiring layer 502 with the glass substrate 100 after the first rewiring layer 501 and the second rewiring layer 502 are prepared in advance.

[0088] The specific preparation of the first rewiring layer 501 and the second rewiring layer 502 is not limited here, and the same preparation method can be used, or different preparation methods can be used. The specific material and structure of the first rewiring layer 501 and the second rewiring layer 502 are not limited here and can be selected as needed.

[0089] Then, referring to FIGS. 1 and 9, step S8 is performed to pattern the first rewiring layer 501 to form a second groove 104 in the first rewiring layer 501, and the second groove 104 exposes the first optical waveguide layer 401.

[0090] Specifically, the etching method of the first rewiring layer 501 can be selected as needed, and the appearance of the second groove 104 is not limited here.

[0091] Then, referring to FIGS. 1 and 10, step S9 is performed to form a second optical waveguide layer 402 in the second groove 104, and the second optical waveguide layer 402 is connected with the first optical waveguide layer 401.

[0092] Specifically, the second optical waveguide layer 402 can be prepared by a semiconductor process method, that is, prepared through steps such as coating, exposure, development, and etching. The formed second optical waveguide layer 402 can include an organic polymer optical waveguide wiring layer, a silicon-based optical waveguide wiring layer, a lithium niobate optical waveguide wiring layer, or a lithium borate optical waveguide wiring layer. Preferably, the preparation and material of the second optical waveguide layer 402 are the same as those of the first optical waveguide layer 401 to reduce the process complexity.

[0093] Referring to FIG. 11, further, a convex lens 600 is preferably formed on the second optical waveguide layer 402 to play a role of light condensation through the convex lens 600 to further reduce the optical loss. The preparation method of the convex lens 600 is not limited here and can be a bonding method, but is not limited to this.

[0094] Then, referring to FIG. 1 and FIG. 12, an electric chip 701 and a light chip 702 with a light sensing area 712 are provided, and the electric chip 701 and the light chip 702 are bonded on the first re-wiring layer 501, the electric chip 701 and the light chip 702 are electrically connected with the first re-wiring layer 501, and the light sensing area 712 of the light chip 702 is arranged corresponding to the second optical waveguide layer 402.

[0095] Specifically, referring to FIG. 12, the electrically leading ends of the electric chip 701 and the light chip 702 are electrically connected with the first re-wiring layer 501 through metal bumps, and the light sensing area 712 of the light chip 702 is arranged corresponding to the second optical waveguide layer 402 to form an optical transmission path together with the first optical waveguide layer 401, as shown by the dotted line with arrows in FIG. 12.

[0096] Further, referring to FIG. 12, metal bumps 800 or the like can also be formed on the surface of the second re-wiring layer 502 to facilitate subsequent electrical connection.

[0097] It can be understood that, in order to improve productivity, the optoelectronic interconnection packaging structure in FIG. 12 can be regarded as a single structure formed after a cutting process, and of course, according to needs, the optoelectronic interconnection packaging structure in FIG. 12 can also be a single structure directly prepared without a cutting process, which is not limited here.

[0098] Referring to FIG. 2-FIG. 12, the present embodiment also provides an optoelectronic interconnection packaging structure, wherein the optoelectronic interconnection packaging structure can be directly prepared by the above preparation process, so the material, structure and the like of the optoelectronic interconnection packaging structure can be referred to the above content, and of course, according to needs, the optoelectronic interconnection packaging structure can also be prepared by other preparation processes.

[0099] In the present embodiment, the optoelectronic interconnection packaging structure comprises:

[0100] a glass substrate 100, the glass substrate 100 comprises a first surface and a second surface arranged oppositely;

[0101] a first through hole 111, the first through hole 111 penetrates the glass substrate 100 from top to bottom at the first surface of the glass substrate 100, a second through hole 112, the second through hole 112 penetrates the glass substrate 100 from bottom to top at the second surface of the glass substrate 100, and the first through hole 111 and the second through hole 112 are arranged alternately;

[0102] wherein the method for preparing the first through hole 111 and the second through hole 112 is:

[0103] a first blind via 101 is formed in the glass substrate 100 from a first side of the glass substrate 100 using a first laser method, and a second blind via 102 is formed in the glass substrate 100 from a second side of the glass substrate 100 using a second laser method;

[0104] a thinning process is performed from the first side of the glass substrate 100 and the second side of the glass substrate 100 respectively, so that the first blind via 100 is converted into the first through-hole 111, and the second blind via 102 is converted into the second through-hole 112;

[0105] a first TGV metal post 201 fills the first through-hole 111;

[0106] a second TGV metal post 202 fills the second through-hole 112;

[0107] a first recess 103 is prepared using a third laser method, and the first recess 103 extends into the glass substrate 100 from the first side of the glass substrate 100;

[0108] a first optical waveguide layer 401 is located in the first recess 103;

[0109] a first rewiring layer 501 is located on the first side of the glass substrate 100, and the first rewiring layer 501 is electrically connected with the first TGV metal post 201 and the second TGV metal post 202;

[0110] a second rewiring layer 502 is located on the second side of the glass substrate 100, and the second rewiring layer 502 is electrically connected with the first TGV metal post 201 and the second TGV metal post 202;

[0111] a second recess 104 is located in the first rewiring layer 501, and the second recess 104 exposes the first optical waveguide layer 401;

[0112] a second optical waveguide layer 402 is located in the second recess 104, and the second optical waveguide layer 402 is connected with the first optical waveguide layer 401;

[0113] The electric chip 701 and the light chip 702 with the light sensing area 712 are bonded on the first re-wiring layer 501, the electric chip 701 and the light chip 702 are electrically connected with the first re-wiring layer 501, and the light sensing area 712 of the light chip 702 is arranged correspondingly with the second light waveguide layer 402.

[0114] The distance D between the adjacent first TGV metal column 201 and the second TGV metal column 202 can be 30-100 μm, such as 30 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, etc., and since the first via hole 111 and the second via hole 112 are arranged in overlapping manner, the first TGV metal column 201 and the second TGV metal column 202 are arranged in overlapping manner, and an effective spacing area can be formed therebetween to effectively avoid over layer phenomenon, improve the density of TGV metal column distribution, and prepare high-quality products.

[0115] The glass substrate 100 can include a wafer-level glass substrate, such as 4 inches, 6 inches, 8 inches, 12 inches, etc. The thickness of the glass substrate 100 before thinning can be 200-300 μm, such as 200 μm, 250 μm, 300 μm, etc., and the thickness of the glass substrate 100 after thinning can be 100-200 μm, such as 10 μm, 150 μm, 200 μm, etc. The size of the glass substrate 100 is not limited thereto, and can be set as needed.

[0116] As shown in FIG. 4, the CD of the first TGV metal column 201, i.e. d, can be 40-50 μm, such as 40 μm, 45 μm, 50 μm, etc., and the CD of the second TGV metal column 202 can be 40-50 μm, such as 40 μm, 45 μm, 50 μm, etc.

[0117] Further, the first TGV metal column 201 and the second TGV metal column 202 can have the same topography. As shown in FIG. 12, the first TGV metal column 201 and the second TGV metal column 202 can be conical and have the same topography, but are not limited thereto. For example, the first TGV metal column 201 and the second TGV metal column 202 can also be conical with different sizes, which can be achieved by adjusting the laser process to meet the specific product requirements, and the present disclosure is not limited thereto. As shown in FIG. 6 and FIG. 12, to reduce light loss and improve light transmission efficiency, a metal mirror 300 is preferably arranged on the sidewall of the first groove 103. Of course, the metal mirror 300 can also cover the bottom of the first groove 103 as needed, and the present disclosure is not limited thereto.

[0118] Further, referring to Fig. 12, a convex lens 600 is preferably arranged on the second optical waveguide layer 402 to play a role of light condensation through the convex lens 600 to further reduce light loss.

[0119] Further, referring to Fig. 12, a metal bump 800 or the like can also be arranged on the surface of the second rewiring layer 502 to facilitate subsequent electrical connection.

[0120] In summary, the optoelectronic interconnection packaging structure and the preparation method thereof adopt a first laser method to form a first blind hole with a bottom located in a glass substrate, a second laser method to form a second blind hole with a bottom located in the glass substrate, and then perform a thinning process from a first surface of the glass substrate and a second surface of the glass substrate, so that the first blind hole is converted into a first through hole, and the second blind hole is converted into a second through hole, and the first through hole and the second through hole are arranged alternately, so that the application can prepare a high-performance TGV adapter with a small pitch, a small CD size, a small thickness, suitable for high-density arrangement, and effectively avoiding the overlapping of metal columns based on the laser method and the thinning process; further, the optical waveguide layer is arranged in the glass substrate and the rewiring layer, and the electrical chip and the optical chip are connected in combination with the TGV adapter, which can make the metal wiring more flexible, realize optoelectronic interconnection integration, reduce the packaging size, reduce power consumption, improve reliability, and be suitable for high-density integrated packaging, and can realize good optoelectronic signal transmission.

[0121] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes completed by those skilled in the art without departing from the spirit and technical thought disclosed by the present application should be covered by the claims of the present application.

Claims

1. A method of fabricating an optoelectronic interconnect package structure, comprising: The method comprises the following steps: ​ providing a glass substrate comprising a first surface and a second surface arranged oppositely; forming a first blind hole with a bottom in the glass substrate from the first surface of the glass substrate by a first laser method, and forming a second blind hole with a bottom in the glass substrate from the second surface of the glass substrate by a second laser method; performing a thinning process from the first surface of the glass substrate and the second surface of the glass substrate respectively, so that the first blind hole is converted into a first through hole penetrating through the glass substrate from top to bottom, and the second blind hole is converted into a second through hole penetrating through the glass substrate from bottom to top, and the first through hole and the second through hole are arranged alternately; forming a first TGV metal column filling the first through hole in the first through hole, and forming a second TGV metal column filling the second through hole in the second through hole; forming a first groove with a bottom in the glass substrate from the first surface of the glass substrate by a third laser method; forming a first optical waveguide layer in the first groove; forming a first rewiring layer on the first surface of the glass substrate, and forming a second rewiring layer on the second surface of the glass substrate, wherein the first rewiring layer and the second rewiring layer are electrically connected with the first TGV metal column and the second TGV metal column respectively; patterning the first rewiring layer to form a second groove in the first rewiring layer, and the second groove exposes the first optical waveguide layer; forming a second optical waveguide layer in the second groove, and the second optical waveguide layer is connected with the first optical waveguide layer; providing an electrical chip and an optical chip with a photosensitive region, and bonding the electrical chip and the optical chip on the first rewiring layer, wherein the electrical chip and the optical chip are electrically connected with the first rewiring layer, and the photosensitive region of the optical chip is arranged correspondingly with the second optical waveguide layer.

2. The method of claim 1, wherein: The first laser method comprises a laser ablation method or a laser-induced denaturation etching method; the second laser method comprises a laser ablation method or a laser-induced denaturation etching method; and the third laser method comprises a laser ablation method or a laser-induced denaturation etching method.

3. The method of claim 1, wherein: The first TGV metal column and the second TGV metal column are formed synchronously, and the method for forming the first TGV metal column and the second TGV metal column comprises chemical plating or electroplating.

4. The method of claim 1, wherein: The method for forming the first rewiring layer on the first surface of the glass substrate comprises a semiconductor process method or a substrate bonding method; and the method for forming the second rewiring layer on the second surface of the glass substrate comprises a semiconductor process method or a substrate bonding method.

5. The method of claim 1, wherein: The distance between the adjacent first through hole and the second through hole ranges from 30 to 100 μm.

6. The method of claim 1, wherein: The CD size of the first TGV metal column ranges from 40 to 50 μm; and the CD size of the second TGV metal column ranges from 40 to 50 μm.

7. The method of claim 1, wherein: The thickness of the glass substrate before thinning ranges from 200 to 300 μm; and the thickness of the glass substrate after thinning ranges from 100 to 200 μm.

8. An optoelectronic interconnect package structure, comprising: The optoelectronic interconnection packaging structure comprises: a glass substrate comprising a first surface and a second surface arranged oppositely; a first via hole and a second via hole, the first via hole and the second via hole being staggered; wherein the method for preparing the first via hole and the second via hole is: a first blind hole with a bottom in the glass substrate is formed from the first surface of the glass substrate by a first laser method, and a second blind hole with a bottom in the glass substrate is formed from the second surface of the glass substrate by a second laser method; a thinning process is performed from the first surface of the glass substrate and the second surface of the glass substrate respectively, so that the first blind hole is converted into the first via hole, and the second blind hole is converted into the second via hole; a first TGV metal column fills the first via hole; a second TGV metal column fills the second via hole; a first groove is prepared by a third laser method, and the first groove extends into the glass substrate from the first surface of the glass substrate; a first optical waveguide layer is located in the first groove; a first rewiring layer is located on the first surface of the glass substrate, and the first rewiring layer is electrically connected with the first TGV metal column and the second TGV metal column; a second rewiring layer is located on the second surface of the glass substrate, and the second rewiring layer is electrically connected with the first TGV metal column and the second TGV metal column; a second groove is located in the first rewiring layer, and the second groove exposes the first optical waveguide layer; a second optical waveguide layer is located in the second groove, and the second optical waveguide layer is connected with the first optical waveguide layer; an electrical chip and an optical chip with a photosensitive area are bonded on the first rewiring layer, the electrical chip and the optical chip are electrically connected with the first rewiring layer, and the photosensitive area of the optical chip is arranged correspondingly with the second optical waveguide layer.

9. The optoelectronic interconnect package structure of claim 8, wherein: The distance between the first TGV metal column and the second TGV metal column is in the range of 30-100 μm; the CD size of the first TGV metal column is 40-50 μm; the CD size of the second TGV metal column is 40-50 μm; the first TGV metal column and the second TGV metal column have the same morphology.

10. The optoelectronic interconnect package structure of claim 8, wherein: A metal mirror is further located on the sidewall of the first groove; a convex lens is further located on the second optical waveguide layer; and a metal bump is further located on the second rewiring layer.

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