Gate drive circuit and electronic device

Abstract

Provided in the present disclosure are a gate drive circuit and an electronic device, which are applied to the technical field of semiconductor process devices. The circuit comprises a first switching circuit, a second switching circuit and a charging circuit, wherein a first input end of the first switching circuit receives a power supply signal, a second input end receives a drive signal, and an output end is connected to an input end of the charging circuit; a first input end of the second switching circuit is grounded, a second input end is used for receiving a drive signal, and an output end is connected to the input end of the charging circuit; an output end of the charging circuit is configured to be connected to a gate of a target switching transistor; the first switching circuit and the second switching circuit are alternately switched on; and the charging circuit is configured to forwardly charge a gate-source capacitor when the first switching circuit is switched on, so as to drive the target switching transistor to switch on, and to reversely charge the gate-source capacitor when the second switching circuit is switched on, so as to drive the target switching transistor to switch off. Therefore, the circuit requires only one power supply to control the conduction state of the target switching transistor, which can effectively reduce the overall cost of the circuit.

Description

A gate drive circuit and electronic equipment TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor process equipment, in particular to a gate drive circuit and electronic equipment. BACKGROUND

[0002] Wide bandgap semiconductor devices represented by SiC (silicon carbide) and GaN (gallium nitride) are widely used in high-frequency power electronic converters in recent years. Like other types of semiconductor devices, wide bandgap semiconductor devices are also affected by their own parasitic parameters, such as the parasitic capacitance between the source and the gate or the parasitic capacitance between the drain and the gate. These parasitic parameters, which have little effect in low-frequency application scenarios, can affect the on-state voltage of the wide bandgap semiconductor device in high-frequency application scenarios, and even cause the device to misfire, thereby damaging the normal operation of the system.

[0003] To solve the above problems, the prior art usually uses a drive circuit capable of providing negative voltage to control the reliable turn-off of the wide bandgap semiconductor device. Although this can improve the reliability of the wide bandgap semiconductor device driving process, the drive circuit of the prior art needs to be connected to a positive voltage source and a negative voltage source respectively to realize the control process of the turn-on and turn-off of the wide bandgap semiconductor device. Obviously, this will increase the overall cost of the drive circuit and the system to which the drive circuit belongs. SUMMARY

[0004] Therefore, the present application aims to provide a gate drive circuit and electronic equipment that uses one power supply to drive the turn-on and reliable turn-off of a wide bandgap semiconductor device, thereby reducing the overall cost of the gate drive circuit and the system to which the gate drive circuit belongs.

[0005] In a first aspect, the present application provides a gate drive circuit for driving a target switch tube to turn on or turn off, the gate drive circuit comprising: a first switching circuit, a second switching circuit and a charging circuit, wherein

[0006] The first input end of the first switching circuit is used to receive a power supply signal, the second input end of the first switching circuit is used to receive a drive signal, and the output end of the first switching circuit is connected to the input end of the charging circuit;

[0007] The first input end of the second switching circuit is used to be grounded, the second input end of the second switching circuit is used to receive the drive signal, and the output end of the second switching circuit is connected to the input end of the charging circuit;

[0008] The output end of the charging circuit is used to be connected to the gate of the target switch tube, and the source of the target switch tube is grounded;

[0009] The first switch circuit and the second switch circuit are configured to be alternately turned on in response to the driving signal;

[0010] The charging circuit is configured to forward charge the gate-source capacitance of the target switch tube to turn on the target switch tube when the first switch circuit is turned on, and to reverse charge the gate-source capacitance of the target switch tube to turn off the target switch tube when the second switch circuit is turned on.

[0011] In some embodiments, the charging circuit comprises an energy storage adjusting sub-circuit, a first unidirectional conduction sub-circuit, and a second unidirectional conduction sub-circuit, wherein,

[0012] The input end of the first unidirectional conduction sub-circuit is connected to the output end of the first switch circuit;

[0013] The output end of the second unidirectional conduction sub-circuit is connected to the output end of the second switch circuit;

[0014] The first end of the energy storage adjusting sub-circuit is connected to the output end of the first unidirectional conduction sub-circuit and the input end of the second unidirectional conduction sub-circuit, respectively;

[0015] The second end of the energy storage adjusting sub-circuit serves as the output end of the charging circuit;

[0016] The conduction direction of the first unidirectional conduction sub-circuit is the same as the pressure drop direction of forward charging, and the conduction direction of the second unidirectional conduction sub-circuit is the same as the pressure drop direction of reverse charging.

[0017] In some embodiments, the energy storage adjusting sub-circuit comprises a first resistor and a first inductor, wherein,

[0018] One end of the first resistor serves as the first end of the energy storage adjusting sub-circuit, and the other end of the first resistor is connected to one end of the first inductor;

[0019] The other end of the first inductor serves as the second end of the energy storage adjusting sub-circuit.

[0020] In some embodiments, the energy storage adjusting sub-circuit comprises a second resistor, a third resistor, and a second inductor, wherein,

[0021] One end of the second resistor is connected to the output end of the first unidirectional conduction sub-circuit;

[0022] One end of the third resistor is connected to the input end of the second unidirectional conduction sub-circuit;

[0023] One end of the second inductor is connected to the other end of the second resistor and the other end of the third resistor, respectively, and the other end of the second inductor serves as the second end of the energy storage adjusting sub-circuit.

[0024] In some embodiments, the first unidirectional conducting sub-circuit comprises a first diode, and the second unidirectional conducting sub-circuit comprises a second diode.

[0025] In some embodiments, the gate drive circuit provided by the first application of the present application further comprises a discharge circuit, wherein

[0026] One end of the discharge circuit is connected to the output end of the charging circuit, and the other end of the discharge circuit is grounded.

[0027] The discharge circuit is used to release the electrical energy of the gate-source capacitor in the case of power-off of the gate drive circuit.

[0028] In some embodiments, the gate drive circuit provided by the first application of the present application further comprises a compensation circuit, wherein

[0029] One end of the compensation circuit is connected to the output end of the charging circuit, and the other end of the compensation circuit is grounded.

[0030] The compensation circuit is used to adjust the capacitance value between the source and the gate of the target switch tube.

[0031] In some embodiments, the gate drive circuit provided by the first application of the present application further comprises a protection circuit, wherein the protection circuit comprises a first voltage stabilizing tube and a second voltage stabilizing tube, and

[0032] The cathode of the first voltage stabilizing tube is connected to the output end of the charging circuit, and the anode of the first voltage stabilizing tube is connected to the anode of the second voltage stabilizing tube.

[0033] The cathode of the second voltage stabilizing tube is grounded.

[0034] In some embodiments, the first switch circuit comprises a first controllable switch and a first drive sub-circuit, wherein

[0035] The first end of the first controllable switch serves as the first input end of the first switch circuit, and the second end of the first controllable switch serves as the output end of the first switch circuit.

[0036] The output end of the first drive sub-circuit is connected to the control end of the first controllable switch, and the input end of the first drive sub-circuit is used to receive the drive signal.

[0037] The first drive sub-circuit is used to configure the on-delay and off-delay of the first controllable switch.

[0038] In some embodiments, the first driving sub-circuit comprises: a first buffer, a second buffer, and a first delay circuit, the first delay circuit comprises: a third diode, a first capacitor, and a fourth resistor, wherein,

[0039] an input end of the first buffer is an input end of the first driving sub-circuit;

[0040] a cathode of the third diode is connected to an output end of the first buffer, and an anode of the third diode is connected to an input end of the second buffer;

[0041] the fourth resistor is connected in parallel with the third diode;

[0042] one end of the first capacitor is connected to the anode of the third diode, and the other end of the first capacitor is grounded;

[0043] an output end of the second buffer is an output end of the first driving sub-circuit.

[0044] In some embodiments, the second switch circuit comprises a second controllable switch and a second driving sub-circuit, wherein,

[0045] a first end of the second controllable switch is a first input end of the second switch circuit, and a second end of the second controllable switch is an output end of the second switch circuit;

[0046] an output end of the second driving sub-circuit is connected to a control end of the second controllable switch, and an input end of the second driving sub-circuit is configured to receive the driving signal;

[0047] the second driving sub-circuit is configured to configure turn-on delay and turn-off delay of the second controllable switch.

[0048] In some embodiments, the second driving sub-circuit comprises: an inverter, a third buffer, and a second delay circuit, the second delay circuit comprises: a fourth diode, a second capacitor, and a fifth resistor, wherein,

[0049] an input end of the inverter is an input end of the second driving sub-circuit;

[0050] a cathode of the fourth diode is connected to an output end of the inverter, and an anode of the fourth diode is connected to an input end of the third buffer;

[0051] the fifth resistor is connected in parallel with the fourth diode;

[0052] one end of the second capacitor is connected to the anode of the fourth diode, and the other end of the second capacitor is grounded;

[0053] The output end of the third buffer is used as the output end of the second driving sub-circuit.

[0054] In a second aspect, the application provides an electronic device, comprising a power module, a signal output module, a target switch tube and the gate drive circuit according to any one of the first aspect of the application, wherein,

[0055] The power module is connected with the first input end of the first switch circuit in the gate drive circuit, and is used for providing a power signal to the first switch circuit;

[0056] The signal output module is connected with the second input end of the first switch circuit and the second switch circuit in the gate drive circuit respectively, and is used for outputting a driving signal to the first switch circuit and the second switch circuit;

[0057] The gate drive circuit is connected with the gate of the target switch tube, and is used for driving the target switch tube to turn on or turn off in response to the driving signal.

[0058] Based on the above, the gate drive circuit provided by the application is applied to the target switch tube with a gate-source capacitor between the gate and the source. The gate drive circuit comprises a first switch circuit, a second switch circuit and a charging circuit. The first input end of the first switch circuit receives a power signal, the first input end of the second switch circuit is grounded, and the input end of the charging circuit is connected with the output end of the first switch circuit and the output end of the second switch circuit respectively. The output end is connected with the gate of the target switch tube. In actual application, the first switch circuit and the second switch circuit are alternately turned on in response to the driving signal, that is, only one switch circuit is turned on at the same time. When the first switch circuit is turned on, the charging circuit charges the gate-source capacitor of the target switch tube in a forward direction, applies a forward voltage between the gate and the source of the target switch tube, and drives the target switch tube to turn on. Correspondingly, when the second switch circuit is turned on, since the source of the target switch tube and the first input end of the second switch circuit are both grounded, a closed charging loop can be formed. The charging circuit charges the gate-source capacitor of the target switch tube in a reverse direction, applies a reverse voltage between the gate and the source of the target switch tube, and drives the target switch tube to reliably turn off. As can be seen, the gate drive circuit provided by the application can control the turn-on state of the target switch tube with only one power supply, ensure the reliable turn-off of the target switch tube, and effectively reduce the overall cost of the circuit compared with the prior art. BRIEF DESCRIPTION OF DRAWINGS

[0059] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are some embodiments of the application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0060] Figure 1 is a schematic diagram of a wide band gap switch in the prior art.

[0061] Figure 2 is a circuit topology diagram of a gate drive circuit provided by the present application.

[0062] Figure 3 is a circuit topology diagram of another gate drive circuit provided by the present application.

[0063] Figure 4 is a schematic diagram of a forward charging path of the gate drive circuit provided by the present application.

[0064] Figure 5 is a schematic diagram of the corresponding relationship between the first resistance value and the forward voltage of the gate-source capacitor in the energy storage adjusting sub-circuit.

[0065] Figure 6 is a schematic diagram of a reverse charging path of the gate drive circuit provided by the present application.

[0066] Figure 7 is a schematic diagram of the corresponding relationship between the first resistance value and the reverse voltage of the gate-source capacitor in the energy storage adjusting sub-circuit.

[0067] Figure 8 is a circuit topology diagram of still another gate drive circuit provided by the present application.

[0068] Figure 9 is a circuit topology diagram of yet another gate drive circuit provided by the present application.

[0069] Figure 10 is a schematic diagram of the phase relationship between the driving signal, the control signal of the first controllable switch and the control signal of the second controllable switch in the present application.

[0070] Figure 11 is a schematic diagram of the phase relationship between the voltage of the gate-source capacitor, the control signal of the first controllable switch and the control signal of the second controllable switch in the present application.

[0071] Figure 12 is a circuit topology diagram of a radio frequency power supply provided by the present application.

[0072] Figure 13 is a schematic diagram of an isolation circuit between the signal output module and the gate drive circuit in the radio frequency power supply provided by the present application.

[0073] Figure 14 is a schematic diagram of another isolation circuit between the signal output module and the gate drive circuit in the radio frequency power supply provided by the present application. DETAILED DESCRIPTION

[0074] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0075] With the continuous development of power electronics technology, the wide bandgap semiconductor devices represented by SiC (silicon carbide), GaN (gallium nitride) and other third-generation semiconductor materials have significant advantages in key parameters such as bandgap width, breakdown electric field, thermal conductivity and electron saturation rate, which can meet the application requirements of modern industry for high power, high voltage and high frequency, and are widely used in high-frequency power electronic converters in recent years.

[0076] As with other types of semiconductor devices, wide bandgap semiconductor devices are also affected by their own parasitic parameters. Taking the controllable switching tube SiC MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) as an example, as shown in FIG. 1, the parasitic parameters of the controllable switching tube mainly include: the parasitic capacitance Cgs (gate-source capacitance) between the source S and the gate G, the parasitic capacitance Cgd (gate-drain capacitance) between the drain D and the gate G, and the parasitic capacitance Cds between the drain D and the source S, and of course, there may be other parasitic parameters. In actual application, the actual situation of the semiconductor device is the standard, which will not be described in detail here.

[0077] It should be noted that these parasitic parameters that have little effect in low-frequency application scenarios will affect the voltage of the wide bandgap semiconductor device in the on state in high-frequency application scenarios, and may even damage the normal operation of the system due to the false turn-on of the device. Taking SiC MOSFET as an example, its threshold voltage and withstand voltage are very small, and are greatly affected by temperature. If the voltage spike is too large in actual application, it may cause SiC MOSFET to false turn-on, thereby damaging the switching tube and the circuit system to which the switching tube belongs.

[0078] In order to prevent the false turn-on of the wide bandgap semiconductor device, the prior art usually uses a driving circuit capable of providing negative voltage to control the reliable turn-off of the wide bandgap semiconductor device, so as to ensure that the aforementioned spike voltage does not cause the false turn-on of the semiconductor device. The inventors have found that, although this can improve the reliability of the driving process of the wide bandgap semiconductor device, the driving circuit of the prior art needs to be connected to a positive voltage source and a negative voltage source respectively to realize the control process of the turn-on and turn-off of the wide bandgap semiconductor device. Obviously, this will increase the overall cost of the driving circuit and the system to which the driving circuit belongs.

[0079] To solve the above problems, the application provides a gate drive circuit, which comprises a first switch circuit, a second switch circuit and a charging circuit, a first input end of the first switch circuit is connected with a power supply to receive a power supply signal, a first input end of the second switch circuit is grounded, the charging circuit is connected between the first switch circuit and the second switch circuit and a target switch tube, and a source of the target switch tube is grounded, the first switch circuit and the second switch circuit are alternately turned on, and the charging circuit is configured to: when the first switch circuit is turned on, the gate-source capacitor is forward charged to drive the target switch tube to be turned on, and when the second switch circuit is turned on, the gate-source capacitor is reverse charged to drive the target switch tube to be turned off, the gate drive circuit provided by the application can control the on-off state of the target switch tube only by using one power supply, ensures that the target switch tube can be reliably turned off, and compared with the prior art, can effectively reduce the overall cost of the drive circuit and a system to which the drive circuit belongs.

[0080] Based on the above content, referring to FIG. 2, the gate drive circuit provided by the application comprises a first switch circuit 10, a second switch circuit 20 and a charging circuit 30.

[0081] First of all, it should be pointed out that the gate drive circuit provided by the application is applied to drive the on-off of a wide bandgap semiconductor switch tube as shown in FIG. 1, and for the convenience of description, the switch tube will be defined as a target switch tube in the following content. As shown in FIG. 2, there is a gate-source capacitor Cgs between the gate G and the source S of the target switch tube Q0, of course, the target switch tube Q0 also has other parasitic capacitors, which will not be repeated here, and the specific content can be referred to the foregoing related content.

[0082] In combination with FIG. 2, a first input end of the first switch circuit 10 is connected with a power supply module V1, and a first input end of the second switch circuit 20 is grounded. In this embodiment, the connection point of the power supply module V1 and the first input end of the first switch circuit 10 is also connected with one end of a capacitor Cx, and the other end of the capacitor Cx is grounded. The capacitor Cx is used as a filter capacitor of the power supply module V1, and is mainly used for filtering harmonic components and other interference sources in the power supply module V1. It should be pointed out that the capacitor Cx in FIG. 2 is only schematic, and in actual application, one or more capacitors can be configured according to the specific parameters of the power supply module V1 and the electromagnetic environment of the gate drive circuit, for example, one large-capacitance capacitor and one small-capacitance capacitor can be configured, and the two are connected in parallel between the power supply module V1 and the first input end of the first switch circuit 10. Of course, there can be other combination modes, which will not be listed one by one here.

[0083] The input end of the charging circuit 30 is connected with the output end of the first switch circuit 10 and the second switch circuit 20 respectively, and the output end of the charging circuit 30 is connected with the gate of the target switch tube Q0, further, the source of the target switch tube Q0 is grounded, and it can be understood that the drain of the target switch tube Q0 needs to be connected with other later-stage circuit, since it has no actual connection with the present application, the specific connection of the drain of the target switch tube Q0 in the embodiment shown in FIG. 2 and the subsequent embodiments is not shown, and in actual application, it can be determined in combination with the application scene.

[0084] The second input end of the first switch circuit 10 and the second switch circuit 20 is used for receiving a driving signal, and the first switch circuit 10 and the second switch circuit 20 are alternately turned on in response to the driving signal, that is, at the same time, only one of the first switch circuit 10 and the second switch circuit 20 is in the on state.

[0085] Based on the above, when the first switch circuit 10 is turned on and the second switch circuit 20 is turned off, the closed charging path shown by the dashed line S1 in FIG. 2 can be obtained, that is, the power provided by the power supply module V1 passes through the capacitor Cx, the first switch circuit 10 and the charging circuit 30 in turn, and finally charges the gate-source capacitor Cgs, based on the basic principle of capacitor energy storage, the voltage across the gate-source capacitor Cgs will continuously rise, and when the voltage across the gate-source capacitor Cgs is greater than the turn-on voltage of the target switch tube Q0, the target switch tube Q0 is driven to turn on. It can be understood that at this time, the voltage drop direction of the gate-source capacitor Cgs is the same as the turn-on direction between the gate G and the source S of the target switch tube Q0.

[0086] Further, it can be understood that after the foregoing turn-on control process, the gate-source capacitor Cgs stores a certain amount of energy, based on this, when the first switch circuit 10 is turned off and the second switch circuit 20 is turned on, the closed charging path shown by the dotted line S2 in FIG. 2 can be obtained, that is, the energy stored in the gate-source capacitor Cgs is transmitted through the gate G of the target switch tube Q0, the charging circuit 30 and the second switch circuit 20, since the first input end of the second switch circuit 20 and the source S of the target switch tube Q0 are both grounded, a closed charging loop can be formed, and the charging circuit 30 uses the energy stored in the gate-source capacitor Cgs to reversely charge the gate-source capacitor Cgs, at this time, the voltage drop direction across the gate-source capacitor Cgs will be opposite to the turn-on direction between the gate G and the source S of the target switch tube Q0, realizing the application of reverse off voltage to the target switch tube Q0, and further ensuring the reliable turn-off of the target switch tube Q0.

[0087] In summary, the gate drive circuit provided by the application, the first switch circuit and the second switch circuit are alternately turned on in response to the driving signal. When the first switch circuit is turned on, the charging circuit charges the gate-source capacitor of the target switch tube in the forward direction, applies a forward voltage between the gate and the source of the target switch tube, and drives the target switch tube to turn on. Correspondingly, when the second switch circuit is turned on, since the source of the target switch tube and the first input end of the second switch circuit are both grounded, a closed charging loop can be formed, the charging circuit charges the gate-source capacitor of the target switch tube in the reverse direction, applies a reverse voltage between the gate and the source of the target switch tube, and drives the target switch tube to reliably turn off. The gate drive circuit provided by the application only needs one power supply to control the on-off state of the target switch tube, ensures that the target switch tube reliably turns off, and can effectively reduce the overall cost of the drive circuit and the system to which the drive circuit belongs compared with the prior art.

[0088] Further, based on the embodiment shown in FIG. 2, the application provides a gate drive circuit. In the gate drive circuit provided by the embodiment, the charging circuit comprises an energy storage adjusting sub-circuit, a first one-way conduction sub-circuit and a second one-way conduction sub-circuit.

[0089] The input end of the first one-way conduction sub-circuit is connected to the output end of the first switch circuit as the first input end of the charging circuit, and the output end of the second one-way conduction sub-circuit is connected to the output end of the second switch circuit as the second input end of the charging circuit. Further, the first end of the energy storage adjusting sub-circuit is connected to the output end of the first one-way conduction sub-circuit and the input end of the second one-way conduction sub-circuit, respectively, and the second end of the energy storage adjusting sub-circuit is connected to the control end of the target switch tube as the output end of the charging circuit.

[0090] Based on the above connection relationship, the conduction direction of the first one-way conduction sub-circuit is the same as the voltage drop direction of the forward charging of the gate-source capacitor of the target switch tube, and the conduction direction of the second one-way conduction sub-circuit is the same as the voltage drop direction of the reverse charging of the gate-source capacitor of the target switch tube. Through the first one-way conduction sub-circuit and the second one-way conduction sub-circuit, it can be ensured that the forward charging process and the reverse charging process do not interfere with each other, and the safety and reliability of the circuit are improved.

[0091] As shown in FIG. 3, the first one-way conduction sub-circuit comprises a first diode D1, the second one-way conduction sub-circuit comprises a second diode D2, and the energy storage adjusting sub-circuit 310 comprises a first resistor R1 and a first inductor L1.

[0092] Specifically, the anode of the first diode D1 is connected with the output end of the first switch circuit 10 as the input end of the first unidirectional conducting sub-circuit, and the cathode of the first diode D1 is connected with the first end of the energy storage adjusting sub-circuit 310 as the output end of the first unidirectional conducting sub-circuit; correspondingly, the cathode of the second diode D2 is connected with the output end of the second switch circuit 20 as the output end of the second unidirectional conducting sub-circuit, and the anode of the second diode D2 is connected with the first end of the energy storage adjusting sub-circuit 310 as the input end of the second unidirectional conducting sub-circuit.

[0093] Further, one end of the first resistor R1 is connected with the first end of the energy storage adjusting sub-circuit 310, and the other end is connected with one end of the first inductor L1, and the other end of the first inductor L1 is connected with the gate G of the target switch tube Q0 as the second end of the energy storage adjusting sub-circuit 310, i.e. as the output end of the charging circuit 30.

[0094] Based on the above connection relationship, in the case that the first switch circuit 10 is turned on and the second switch circuit 20 is turned off, a forward charging loop as shown in FIG. 4 can be obtained. As shown in FIG. 4, the power provided by the power supply module V1 charges the gate-source capacitor Cgs of the target switch tube Q0 through the first switch circuit 10, the first diode D1, the first resistor R1 and the first inductor L1. It can be understood that in this process, an RLC series resonant circuit as shown in FIG. 4 will be formed, the power supply module V1 charges the first inductor L1, the current on the first inductor L1 starts to increase, when the current on the first inductor L1 reaches the maximum value, the energy on the first inductor reaches the maximum value, the power supply module V1 continues to charge the gate-source capacitor Cgs, until the voltage of the power supply module V1 is reached, due to the existence of the first diode D1, the current direction of the first inductor L1 cannot be reversed, the current on the first inductor L1 starts to decrease, when the current of the first inductor L1 is zero, the energy on the first inductor L1 is completely transferred to the gate-source capacitor Cgs, and the energy and voltage stored in the gate-source capacitor Cgs reaches the maximum value. In this process, the voltage across the gate-source capacitor Cgs will continuously increase, when the voltage across the gate-source capacitor Cgs is greater than the turn-on voltage of the target switch tube Q0, the target switch tube Q0 is turned on. At this time, the voltage drop direction across the gate-source capacitor Cgs can be seen from FIG. 4.

[0095] Ideally, the resistance of the first resistor R1 is 0 Ω, the internal resistance of the first inductor L1 is 0 Ω, the internal resistance of the gate-source capacitor Cgs is infinite, the on-state voltage drop of the first diode D1 and the first switch circuit 10 is 0 V, and the voltage provided by the power supply module V1 is Vcc. At this time, an LC charging circuit is obtained. According to the formula Vgs = 2Vcc(1-Π / 4Q), where Q is the quality factor of the first inductor L1, the quality factor of the ideal inductor is infinite, and therefore the voltage remaining on the gate-source capacitor Cgs will eventually stabilize at 2Vcc. However, in actual applications, the internal resistance of the gate-source capacitor Cgs and the quality factor of the first inductor L1 cannot be infinite, and they are also affected by the on-state resistance of the switch. Therefore, the voltage across the gate-source capacitor Cgs is actually less than 2Vcc.

[0096] In combination with FIG. 5, under the conditions of Vcc = 10 V, the capacitance of the gate-source capacitor Cgs is 50 nF, and the first inductor L1 is 10 nH, the resistance of the first resistor R1 is adjusted to 0 Ω, 0.2 Ω, 0.5 Ω, and 1 Ω, respectively, and the voltage drop across the gate-source capacitor Cgs under different resistances of the first resistor R1 is tested. The results show that the voltage Vgs across the gate-source capacitor Cgs decreases with the increase of the resistance of the first resistor R1, and eventually equals Vcc. Based on this, under the given conditions of the first inductor L1 and the gate-source capacitor Cgs, the resistance of the first resistor R1 is reasonably selected, so that the maximum voltage on the gate-source capacitor Cgs can be controlled.

[0097] Further, when the first switch circuit 10 is off and the second switch circuit 20 is on, a reverse charging loop as shown in FIG. 6 is obtained. In combination with FIG. 6, the gate-source capacitor Cgs, the first inductor L1, the first resistor R1, the second diode D2, and the second switch circuit 20 can form a closed loop, which discharges the gate-source capacitor Cgs while charging it in reverse. It can be understood that after the target switch Q0 is turned on, the voltage across the gate-source capacitor Cgs eventually stabilizes at the on-state voltage Vgs between the gate G and the source S of the target switch Q0. Referring to the foregoing process, the gate drive circuit forms an RLC series resonant circuit, and the electrical energy stored in the gate-source capacitor Cgs is first transferred to the first inductor L1, i.e., the gate-source capacitor Cgs charges the first inductor L1. When the voltage of the gate-source capacitor Cgs is zero, the current on the first inductor L1 rises from zero to a maximum value. Due to the presence of the second diode D2, the electrical energy of the first inductor L1 cannot be charged back to the gate-source capacitor Cgs via the gate F. The current on the first inductor L1 gradually releases through the aforementioned path and charges the gate-source capacitor Cgs in reverse through the ground. When the current on the first inductor L1 is zero, the electrical energy is stored in the gate-source capacitor Cgs, and the voltage across the gate-source capacitor Cgs is the lowest, i.e., -Vgs. The corresponding voltage drop direction is shown in FIG. 6.

[0098] Ideally, the resistance of the first resistor R1 is 0 Ω, the internal resistance of the first inductor L1 is 0 Ω, the internal resistance of the gate-source capacitor Cgs is infinite, the on-voltage drop of the second diode D2 and the second switch circuit 20 is 0 V, and the voltage across the gate-source capacitor Cgs will finally stabilize at -Vgs. It can be understood that, due to the internal resistance of the first inductor L1 and other parameters, the voltage across the gate-source capacitor Cgs cannot reach -Vgs.

[0099] Taking the SiC MOSFET switch tube as an example, the drive-on voltage is usually between 10 V and 20 V, and the drive-off voltage is usually between -5 V and 0 V. In actual application, the first resistor R1 in the energy storage adjustment sub-circuit 310 needs to be adjusted in combination with the ideal case to consume the energy in the LC resonance process, so as to adjust the residual voltage on the gate-source capacitor Cgs during turn-off. Referring to FIG. 7, the voltage Vgs across the gate-source capacitor Cgs starts to decrease from the moment when the second switch circuit turns on. Taking the gate-source capacitor Cgs with a capacitance of 50 nF and the first inductor L1 with a value of 10 nH as examples, the gate drive circuit with the first resistor R1 with a resistance of 0 Ω, 0.2 Ω, 0.5 Ω and 1 Ω is tested respectively, and the results are as follows: as the resistance of the first resistor R1 increases, the residual voltage on the gate-source capacitor Cgs will increase (i.e., change from a negative value to 0 V), until it equals 0 V.

[0100] Based on the above, under the given first inductor L1 and gate-source capacitor Cgs, by reasonably selecting the size of the first resistor R1, the minimum value of the reverse voltage across the gate-source capacitor Cgs can be controlled to ensure that sufficient reverse voltage is applied between the gate G and the source S of the target switch tube Q0, thereby reliably turning off the target switch tube Q0.

[0101] In summary, the gate drive circuit provided in the embodiment utilizes the characteristics that the inductor current cannot be transient and the diode can only conduct in one direction, to realize forward charging of the gate-source capacitor of the switch tube to turn on the switch tube, and reverse charging of the gate-source capacitor of the switch tube to turn off the switch tube, while storing reverse voltage in the gate-source capacitor to avoid false turn-on of the switch tube due to voltage fluctuation, thereby improving the reliability of the switch tube turn-off.

[0102] Further, in practical applications, the driving voltage allowed by different types of switching tubes is different. In the prior art, in order to meet the application requirements, the corresponding positive power supply and negative power supply must be replaced when driving different types of switching tubes, that is, the to-be-driven switching tube cannot be directly replaced, and if other types of switching tubes are to be driven, the corresponding power supply must be replaced. Obviously, the cost of the prior art is very high. Compared with the prior art, the gate drive circuit provided in the embodiment can control the two ends of the gate-source capacitance of the switching tube to present different voltages by matching appropriate resistors and inductors, that is, it can be applied to different types of switching tubes without replacing the power supply connected to the first switching circuit. Therefore, it can be seen that the gate drive circuit provided in the application is more flexible, has a wider range of application, and has a lower cost when meeting the driving requirements of different types of switching tubes.

[0103] It should be noted that in the gate drive circuit provided in the embodiment shown in FIG. 3, the first resistor R1 and the first inductor L1 jointly control the voltage at the two ends of the gate-source capacitance Cgs of the target switching tube Q0. The gate drive circuit is suitable for application scenarios in which the power supply voltage is used as the driving on-voltage, and the driving off-voltage needs to be adjusted. For application scenarios in which the driving on-voltage and the driving off-voltage need to be adjusted at the same time, it is difficult to meet the driving requirements.

[0104] To solve this problem, the application provides a gate drive circuit shown in FIG. 8. Unlike the embodiment shown in FIG. 3, in the gate drive circuit provided in the embodiment, the energy storage adjustment sub-circuit includes a second resistor R2, a third resistor R3, and a second inductor L2.

[0105] As shown in FIG. 8, one end of the second resistor R2 is connected to the output end of the first unidirectional conduction sub-circuit, that is, the cathode of the first diode D1, and one end of the third resistor R3 is connected to the input end of the second unidirectional conduction sub-circuit, that is, the anode of the second diode D2. One end of the second inductor L2 is connected to the other end of the second resistor R2 and the third resistor R3, respectively, and the other end of the second inductor L2 is connected to the gate G of the target switching tube Q0 as the second end of the energy storage adjustment sub-circuit 310. The connection relationship between the other constituent parts in the embodiment is the same as the foregoing content, which will not be repeated here.

[0106] Further, in the gate drive circuit provided in the embodiment, the power supply module V1, the first switching circuit 10, the first diode D1, the second resistor R2, and the second inductor L2 constitute a forward charging circuit of the gate-source capacitance Cgs of the target switching tube Q0; correspondingly, the second inductor L2, the third resistor R3, the second diode D2, and the second switching circuit 20 constitute a reverse charging circuit of the gate-source capacitance Cgs of the target switching tube Q0. The forward charging and reverse charging processes of the gate-source capacitance Cgs can be referred to the related content of the foregoing embodiments, which will not be repeated here.

[0107] It is emphasized that the gate drive circuit provided by the embodiment can adjust the drive-on voltage of the target switch tube by adjusting the resistance value of the second resistor R2. Specifically, when the drive-on voltage needs to be higher than the power supply voltage, the resistance value of the second resistor R2 should satisfy: When the drive-on voltage needs to be equal to the power supply voltage, the resistance value of the second resistor R2 should satisfy: Further, when the drive-off voltage is adjusted by adjusting the resistance value of the third resistor R3, the resistance value of the third resistor R3 should satisfy: In actual application, the drive-on voltage and the drive-off voltage can be respectively driven according to the above content, so as to quickly adjust to the required drive voltage.

[0108] Further, the application also provides another gate drive circuit. As shown in FIG. 9, on the basis of the embodiment shown in FIG. 3, the gate drive circuit provided by the embodiment further includes a compensation circuit 40, a discharge circuit 50 and a protection circuit 60. Meanwhile, some implementation manners of the first switch circuit 10 and the second switch circuit 20 are given. Of course, the newly added circuits in the gate drive circuit provided by the embodiment can also be combined with the gate drive circuits provided by the other embodiments, which will not be elaborated one by one here, and the obtained technical solutions also belong to the protection scope of the application without exceeding the core idea of the application.

[0109] Referring to FIG. 9, the first switch circuit 10 provided by the embodiment includes a first controllable switch Q1 and a first drive sub-circuit 110, wherein the first drive sub-circuit 110 includes a first buffer B1, a second buffer B2 and a first delay circuit, and the first delay circuit specifically includes a third diode D3, a first capacitor C1 and a fourth resistor R4.

[0110] Specifically, the first end of the first controllable switch Q1 is connected with the power supply module V1 as the first input end of the first switch circuit 10, and the second end of the first controllable switch Q1 is connected with the anode of the first diode D1 of the subsequent charging circuit 30 as the output end of the first switch circuit 10.

[0111] Further, the input end of the first buffer B1 in the first drive sub-circuit 110 receives the aforementioned drive signal as the input end of the first drive sub-circuit 110. The output end of the first buffer B1 is connected with the cathode of the third diode D3, the anode of the third diode D3 is connected with the input end of the second buffer B2. Meanwhile, the fourth resistor R4 is connected with the third diode D3 in parallel. One end of the first capacitor C1 is connected with the anode of the third diode D3, the other end of the first capacitor C1 is grounded, and the output end of the second buffer B2 is connected with the control end of the first controllable switch Q1 as the output end of the first drive sub-circuit 110.

[0112] The first drive sub-circuit 110 is mainly used for configuring the turn-on delay and turn-off delay of the first controllable switch Q1 in the gate drive circuit provided by the embodiment. The specific working process of the first drive sub-circuit 110 will be described in subsequent content, which is not described here.

[0113] The second switch circuit 20 is similar to the first switch circuit 10. Referring to FIG. 9, the second switch circuit includes a second controllable switch Q2 and a second drive sub-circuit 210. The second drive sub-circuit 210 includes an inverter B4, a third buffer B3, and a second delay circuit. The second delay circuit specifically includes a fourth diode D4, a second capacitor C2, and a fifth resistor R5.

[0114] Specifically, the first end of the second controllable switch Q2 is directly grounded as the first input end of the second switch circuit 20. The second end of the second controllable switch Q2 is connected to the output end of the second switch circuit 20 and is connected to the cathode of the second diode D2 in the subsequent charging circuit 30.

[0115] Further, the input end of the inverter B4 in the second drive sub-circuit 210 is connected to the input end of the second drive sub-circuit 210 and receives the drive signal. The output end of the inverter B4 is connected to the cathode of the fourth diode D4. The anode of the fourth diode D4 is connected to the input end of the third buffer B3. Meanwhile, the fifth resistor R5 is connected in parallel with the fourth diode D4. One end of the second capacitor C2 is connected to the anode of the fourth diode D4, and the other end of the second capacitor C2 is grounded. The output end of the third buffer B3 is connected to the output end of the second drive sub-circuit 210 and is connected to the control end of the second switch Q2.

[0116] The second drive sub-circuit 210 is mainly used for configuring the turn-on delay and turn-off delay of the second controllable switch Q2 in the gate drive circuit provided by the embodiment. The specific working process of the second drive sub-circuit 210 will be described in subsequent content, which is not described here.

[0117] It should be noted that, compared with the target switch Q0 using a wide-bandgap semiconductor device, the specific selection of the first controllable switch Q1 and the second controllable switch Q2 is not limited in the present application. Any switch that can be turned on or turned off in response to the drive signal of the drive sub-circuit is optional.

[0118] It should be further noted that, in the example shown in FIG. 9 of the embodiment, the first controllable switch Q1 and the second controllable switch Q2 are both shown as N-type switches. In actual applications, P-type switches can also be selected for implementation. The target switch Q0 is shown as a P-type switch, which is also applicable to N-type switches.

[0119] As mentioned above, in order to ensure the reliable driving of the target switch tube Q0, the gate driving circuit provided by the present application requires that the first switch circuit and the second switch circuit are alternately turned on. The following will introduce the process of the first switch circuit and the second switch circuit being alternately turned on in response to the same driving signal in combination with the above description and the circuit topology shown in FIG. 9.

[0120] In combination with FIG. 9, the driving signal is a PWM pulse signal with high and low levels alternately appearing.

[0121] In the case of inputting a high-level signal, the response processes of the first switch circuit 10 and the second switch circuit 20 are as follows:

[0122] The first buffer B1 in the first switch circuit 10 outputs a high level. In some embodiments, the first capacitor C1 is selected, the fourth resistor R4 is increased in resistance value, the charging current of the first capacitor C1 becomes small, the time for the voltage on the first capacitor C1 to reach the turn-on voltage of the second buffer B2 is lengthened, and thus the output of the second buffer B2 can be delayed to increase the turn-on delay of the first switch tube Q1. Conversely, the fourth resistor R4 is reduced in resistance value, the charging current of the first capacitor C1 will become large, the time for the voltage on the first capacitor C1 to reach the turn-on voltage of the second buffer B2 is shortened, and thus the output of the second buffer B2 can be accelerated to reduce the turn-on delay of the first switch tube Q1.

[0123] In another embodiment, the fourth resistor R4 is selected. If the capacitance of the first capacitor C1 is increased, the voltage rise on the first capacitor C1 is slowed down, the time for the voltage on the first capacitor C1 to reach the turn-on voltage of the second buffer B2 is lengthened, and thus the output of the second buffer B2 can be delayed to increase the turn-on delay of the first controllable switch Q1. Conversely, the capacitance of the first capacitor C1 is reduced, the voltage rise on the first capacitor C1 is accelerated, the time for the voltage on the first capacitor C1 to reach the turn-on voltage of the second buffer B2 is shortened, and thus the output of the second buffer B2 can be accelerated to reduce the turn-on delay of the first controllable switch Q1.

[0124] The inverter B4 in the second switch circuit 20 inputs a high level, and thus its output is a low level. If the second capacitor C2 has stored energy at this time (i.e., it has been a period of storing energy), the residual voltage on the second capacitor C2 makes the fourth diode D4 conduct, the electric quantity on the second capacitor C2 is quickly released through the fourth diode D4, the voltage on the second capacitor C2 is quickly reduced, the third buffer B3 quickly obtains a low-level input, and thus outputs a low level, so as to shorten the turn-off delay of the second switch tube Q2 as much as possible. It can be understood that for the first high level, since the second capacitor C2 has not stored energy, there is no process of releasing energy, and accordingly, the second switch tube Q2 is already in the off state.

[0125] In the case of input low level signal, the response process of the first switch circuit 10 and the second switch circuit 20 is as follows:

[0126] The first buffer B1 in the first switch circuit 10 outputs low level, the residual voltage on the first capacitor C1 makes the third diode D3 conduct, the electric energy on the first capacitor C1 is rapidly released through the third diode D3, the voltage on the first capacitor C1 rapidly decreases, the second buffer B2 quickly obtains low level input and outputs low level to the control end of the first controllable switch Q1, thereby shortening the off delay time of the first controllable switch Q1.

[0127] The inverter B4 in the second switch circuit 20 outputs high level to the rear stage circuit in the case of input low level. Based on this, in some embodiments, the second capacitor C2 is selected and the resistance value of the fifth resistor R5 is increased, the charging current of the second capacitor C2 becomes small, the time for the voltage on the second capacitor C2 to reach the turn-on voltage of the third buffer B3 is lengthened, the output of high level of the third buffer B3 is delayed, thereby increasing the turn-on delay time of the second controllable switch Q2; on the contrary, the resistance value of the fifth resistor R5 is reduced, the charging current of the second capacitor C2 becomes large, the time for the voltage on the second capacitor C2 to reach the turn-on voltage of the third buffer B3 is shortened, the output of high level of the third buffer B3 can be accelerated, thereby reducing the turn-on delay time of the second controllable switch Q2.

[0128] In another embodiment, the fifth resistor R5 is selected and the capacitance value of the second capacitor C2 is increased, the voltage rise on the second capacitor C2 is slowed down, the time for the voltage on the second capacitor C2 to reach the turn-on voltage of the third buffer B3 is lengthened, the output of high level of the third buffer B3 is delayed, thereby increasing the turn-on delay time of the second controllable switch Q2; on the contrary, the capacitance value of the second capacitor C2 is reduced, the voltage rise on the second capacitor C2 is accelerated, the time for the voltage on the second capacitor C2 to reach the turn-on voltage of the third buffer B3 is shortened, the output of high level of the third buffer B3 can be accelerated, thereby reducing the turn-on delay time of the second controllable switch Q2.

[0129] Based on the above process, it can be seen that through the specific selection of the elements in the first delay circuit and the second delay circuit, it can be ensured that the driving signals of the first controllable switch Q1 and the second controllable switch Q2 are not high at the same time, that is, it is ensured that the two are alternately turned on, and that the first controllable switch Q1, the second controllable switch Q2, the first diode D1 and the second diode D2 do not form a path, thereby avoiding overcurrent damage to the device. The phase relationship of the driving signal, the control signal of the first controllable switch Q1 and the control signal of the second controllable switch Q2 can be seen from FIG. 10. It can be understood that the length of the low level interval between the high levels of the control signal of the first controllable switch Q1 and the control signal of the second controllable switch Q2 is the dead time that ensures that the first controllable switch Q1 and the second controllable switch Q2 are not turned on at the same time.

[0130] In practical applications, to ensure the consistency of the delay circuit, the fourth resistor R4 and the fifth resistor R5 are preferably high-precision resistors, and the first capacitor C1 and the second capacitor C2 are preferably high-precision capacitors. The first buffer B1, the second buffer B2, the third buffer B3, and the inverter B4 can be implemented according to related technologies, and the present application does not make specific limitations thereto.

[0131] As for the specific process of the charging circuit 30 performing forward charging and reverse charging on the gate-source capacitance Cgs of the target switch tube Q0 when the first switch circuit 10 and the second switch circuit 20 are alternately turned on, it can be referred to the related content of the embodiment shown in FIG. 3, which will not be repeated here.

[0132] Further, as can be known from the foregoing, after the charging circuit 30 selects the parameters of the first resistor R1 and the first inductor L1, the range of the driving voltage that the gate drive circuit can provide to the target switch tube Q0 is determined. Therefore, if the parameters of the gate-source capacitance in the target switch tube Q0 do not meet the overall design of the gate drive circuit, or in other words, the gate drive circuit and the target switch tube Q0 are not matched, the compensation circuit 40 can be used to adjust the voltage actually acting between the gate and the source of the target switch tube.

[0133] As shown in FIG. 9, the compensation circuit 40 includes a third capacitor C3. One end of the third capacitor C3 is connected to the output end of the charging circuit 30 as one end of the compensation circuit 40, and the other end of the third capacitor C3 is grounded as the other end of the compensation circuit 40. It can be understood that the compensation circuit 40 is equivalent to connecting the third capacitor C3 in parallel across the gate-source capacitance Cgs. The third capacitor C3 can be used to adjust the capacitance value between the source G and the gate S of the target switch tube Q0. Thus, the Vgs voltage meeting the requirements of practical applications is obtained. Of course, in the case where only the first resistor R1 is given, the inductance of the first inductor L1 can also be adjusted to adjust the voltage across the gate-source capacitance Cgs. For details, please refer to the foregoing content, which will not be repeated here.

[0134] The bleeder circuit 50 comprises a sixth resistor R6, as shown in FIG. 9, one end of the sixth resistor R6 is connected to the output end of the charging circuit 30 as one end of the bleeder circuit 50, and the other end of the sixth resistor R6 is grounded as the other end of the bleeder circuit 50. It can be understood that if the gate drive circuit is powered off accidentally, the gate-source capacitor Cgs of the target switch tube Q0 may store electrical energy, in order to ensure the safety of the use and avoid the voltage across the gate-source capacitor Cgs causing the target switch tube Q0 to be mistakenly turned on, the electrical energy of the gate-source capacitor Cgs can be released by setting the bleeder circuit 50. It should be noted that the sixth resistor R6 will also affect the voltage value across the gate-source capacitor Cgs during the process of driving the target switch tube Q0, and discharge the gate-source capacitor Cgs during the working process, thereby causing the Vgs voltage to drop, in order to reduce the influence of the sixth resistor R6 on the driving process of the target switch tube Q0, the value of the sixth resistor R6 should be as large as possible.

[0135] The protection circuit 60 comprises a first zener D5 and a second zener D6, as shown in FIG. 9, the cathode of the first zener D5 is connected to the output end of the charging circuit 30, the anode of the first zener D5 is connected to the anode of the second zener D6, and the cathode of the second zener D6 is grounded.

[0136] Based on the above connection relationship, in an ideal case, the conduction voltage drop of the first zener D5 and the second zener D6 is 0V, based on this, it is assumed that the zener value of the first zener D5 is V D5 , the zener value of the second zener D6 is V D6 , when the drive-on voltage is greater than V D6 , the second zener D6 will be turned on, and the drive-on voltage will be clamped to V D6 ; correspondingly, when the drive-off voltage is less than-V D5 , the first zener D5 is turned on, and the drive-off voltage is clamped to-V D5 , so as to ensure that the target switch tube Q0 will not be damaged due to overvoltage driving under any working condition.

[0137] Based on the embodiment shown in FIG. 9, under the condition that the first resistor R1=0.5Ω, the first inductor L1=10nH, the gate-source capacitor Cgs=50nF, the sixth resistor R6=200kΩ, the conduction voltage of the second zener D6 is 23V, and the conduction voltage of the first zener D5 is 3V, the running process of the gate drive circuit provided by the embodiment shown in FIG. 9 is simulated and tested, and the test result shown in FIG. 11 can be obtained. As shown in FIG. 11, the first controllable switch Q1 and the second controllable switch Q2 are turned on alternately, and the change of the voltage Vgs across the gate-source capacitor Cgs matches the same. Compared with the gate drive circuit in the prior art, the gate drive circuit provided by the present application can achieve the same control effect, and obviously, the cost of the gate drive circuit provided by the present application is lower.

[0138] The application further provides an electronic device. In combination with FIG. 12, the electronic device provided by the embodiment includes a power module V1, a signal output module 70, a target switch tube Q0, and the gate drive circuit (for example, the gate drive circuit shown in FIG. 9) provided by any one of the preceding embodiments.

[0139] In combination with FIG. 12, the power module V1 is connected with the first input end of the first switch circuit 10 in the gate drive circuit, and is configured to provide a power signal to the first switch circuit 10; the signal output module 70 is connected with the second input end of the first switch circuit 10 and the second switch circuit 20 in the gate drive circuit respectively, and is configured to output a drive signal to the first switch circuit 10 and the second switch circuit 20; and the gate drive circuit is connected with the gate of the target switch tube Q0, and is configured to drive the target switch tube Q0 to be turned on or turned off in response to the drive signal.

[0140] In actual application, if the grounding point of the signal output module and the grounding point of the source of the target switch tube Q0 are at different levels, isolation driving design is needed between the signal output module and the gate drive circuit. In a possible implementation, the isolation can be realized by the transformer shown in FIG. 13, and in another possible implementation, the isolation can also be realized by the optical coupling isolator shown in FIG. 14. As for the specific implementation of the above two isolation modes, reference can be made to the related technology, which will not be described here in detail.

[0141] Those skilled in the art can understand that the disclosure disclosed herein can have various modifications and improvements. For example, the various devices or components described above can be realized by hardware, or by software, firmware, or a combination of some or all of the three.

[0142] In addition, although the disclosure makes various references to certain units in the system according to the embodiments of the disclosure, however, any number of different units can be used and run on the client and / or server. The units are only illustrative, and different aspects of the system and method can use different units.

[0143] Flowcharts are used in the disclosure to illustrate the steps of the method according to the embodiments of the disclosure. It should be understood that the preceding or subsequent steps do not necessarily proceed in sequence. On the contrary, various steps can be processed in reverse order or simultaneously. Meanwhile, other operations can also be added to these processes.

[0144] Those skilled in the art can understand that all or part of the steps of the above method can be instructed by a computer program to complete the relevant hardware, and the program can be stored in a computer readable storage medium, such as a read-only memory. Alternatively, all or part of the steps of the above embodiments can also be implemented using one or more integrated circuits. Accordingly, each module / unit in the above embodiments can be implemented in the form of hardware or in the form of a software function module. The present disclosure is not limited to any specific form of combination of hardware and software.

[0145] Unless otherwise defined, all terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0146] The above is a description of the present disclosure and should not be considered as a limitation. Although several exemplary embodiments of the present disclosure are described, those skilled in the art will readily understand that many modifications can be made to the exemplary embodiments without departing from the novel teachings and advantages of the present disclosure. Therefore, all such modifications are intended to be included within the scope of the present disclosure defined by the claims. It should be understood that the above is a description of the present disclosure and should not be considered as a limitation. It is not intended to be limited to the specific embodiments disclosed, and modifications to the disclosed embodiments and other embodiments are intended to be included within the scope of the claims. The present disclosure is defined by the claims and their equivalents.

Claims

1. A gate drive circuit characterized by comprising: The gate drive circuit for driving the target switch tube to turn on or turn off comprises a first switch circuit, a second switch circuit and a charging circuit, wherein, a first input end of the first switch circuit is used for receiving a power supply signal, a second input end of the first switch circuit is used for receiving a drive signal, and an output end of the first switch circuit is connected with an input end of the charging circuit; a first input end of the second switch circuit is used for grounding, a second input end of the second switch circuit is used for receiving the drive signal, and an output end of the second switch circuit is connected with the input end of the charging circuit; an output end of the charging circuit is used for being connected with a gate of the target switch tube, and a source of the target switch tube is grounded; the first switch circuit and the second switch circuit are used for being turned on alternately in response to the drive signal; the charging circuit is configured to forward charge a gate-source capacitance of the target switch tube when the first switch circuit is turned on, so as to drive the target switch tube to turn on, and to reverse charge the gate-source capacitance of the target switch tube when the second switch circuit is turned on, so as to drive the target switch tube to turn off.

2. The gate drive circuit according to claim 1, characterized by The charging circuit comprises an energy storage adjusting sub-circuit, a first one-way conduction sub-circuit and a second one-way conduction sub-circuit, wherein, an input end of the first one-way conduction sub-circuit is connected with an output end of the first switch circuit; an output end of the second one-way conduction sub-circuit is connected with an output end of the second switch circuit; a first end of the energy storage adjusting sub-circuit is connected with an output end of the first one-way conduction sub-circuit and an input end of the second one-way conduction sub-circuit respectively; a second end of the energy storage adjusting sub-circuit is used as an output end of the charging circuit; a conduction direction of the first one-way conduction sub-circuit is the same as a pressure drop direction of the forward charging, and a conduction direction of the second one-way conduction sub-circuit is the same as a pressure drop direction of the reverse charging.

3. The gate drive circuit according to claim 2, characterized by The energy storage adjusting sub-circuit comprises a first resistance and a first inductance, wherein, one end of the first resistance is used as the first end of the energy storage adjusting sub-circuit, and the other end of the first resistance is connected with one end of the first inductance; the other end of the first inductance is used as the second end of the energy storage adjusting sub-circuit.

4. The gate drive circuit according to claim 2, characterized by The energy storage adjusting sub-circuit comprises a second resistance, a third resistance and a second inductance, wherein, one end of the second resistance is connected with the output end of the first one-way conduction sub-circuit; one end of the third resistance is connected with the input end of the second one-way conduction sub-circuit; one end of the second inductance is connected with the other end of the second resistance and the other end of the third resistance respectively, and the other end of the second inductance is used as the second end of the energy storage adjusting sub-circuit.

5. The gate drive circuit according to claim 2, characterized by The first one-way conduction sub-circuit comprises a first diode, and the second one-way conduction sub-circuit comprises a second diode.

6. The gate drive circuit according to claim 1, characterized by Further comprising: a bleeding circuit, wherein, one end of the bleeding circuit is connected with the output end of the charging circuit, and the other end of the bleeding circuit is grounded; the bleeding circuit is used for releasing electric energy of the gate-source capacitance in the case that the gate drive circuit is powered off.

7. The gate drive circuit according to claim 1, characterized by Further comprising: a compensation circuit, wherein, One end of the compensation circuit is connected with the output end of the charging circuit, and the other end of the compensation circuit is grounded. The compensation circuit is used for adjusting the capacitance value between the source and the gate of the target switch tube.

8. The gate drive circuit according to claim 1, characterized by Further comprising: The protection circuit comprises a first voltage stabilizing tube and a second voltage stabilizing tube, wherein, The cathode of the first voltage stabilizing tube is connected with the output end of the charging circuit, and the anode of the first voltage stabilizing tube is connected with the anode of the second voltage stabilizing tube; The cathode of the second voltage stabilizing tube is grounded.

9. The gate drive circuit according to any one of claims 1 to 8, characterized by The first switch circuit comprises a first controllable switch and a first driving sub-circuit, wherein, The first end of the first controllable switch serves as the first input end of the first switch circuit, and the second end of the first controllable switch serves as the output end of the first switch circuit; The output end of the first driving sub-circuit is connected with the control end of the first controllable switch, and the input end of the first driving sub-circuit is used for receiving the driving signal; The first driving sub-circuit is used for configuring the turn-on delay and the turn-off delay of the first controllable switch.

10. The gate drive circuit according to claim 9, characterized by The first driving sub-circuit comprises a first buffer, a second buffer, and a first delay circuit, and the first delay circuit comprises a third diode, a first capacitor, and a fourth resistor, wherein, The input end of the first buffer serves as the input end of the first driving sub-circuit; The cathode of the third diode is connected with the output end of the first buffer, and the anode of the third diode is connected with the input end of the second buffer; The fourth resistor is connected with the third diode in parallel; One end of the first capacitor is connected with the anode of the third diode, and the other end of the first capacitor is grounded; The output end of the second buffer serves as the output end of the first driving sub-circuit.

11. The gate drive circuit according to any one of claims 1 to 8, characterized by The second switch circuit comprises a second controllable switch and a second driving sub-circuit, wherein, The first end of the second controllable switch serves as the first input end of the second switch circuit, and the second end of the second controllable switch serves as the output end of the second switch circuit; The output end of the second driving sub-circuit is connected with the control end of the second controllable switch, and the input end of the second driving sub-circuit is used for receiving the driving signal; The second driving sub-circuit is used for configuring the turn-on delay and the turn-off delay of the second controllable switch.

12. The gate drive circuit according to claim 11, characterized by The second driving sub-circuit comprises an inverter, a third buffer, and a second delay circuit, and the second delay circuit comprises a fourth diode, a second capacitor, and a fifth resistor, wherein, The input end of the inverter serves as the input end of the second driving sub-circuit; The cathode of the fourth diode is connected with the output end of the inverter, and the anode of the fourth diode is connected with the input end of the third buffer; The fifth resistor is connected with the fourth diode in parallel; One end of the second capacitor is connected with the anode of the fourth diode, and the other end of the second capacitor is grounded; The output end of the third buffer serves as the output end of the second driving sub-circuit.

13. An electronic device, comprising: Further comprising: The power supply module, the signal output module, the target switch tube, and the gate driving circuit according to any one of claims 1 to 12, wherein, The power module is connected with a first input end of a first switch circuit in the gate drive circuit, and is used for providing a power signal to the first switch circuit; The signal output module is connected with a second input end of a first switch circuit and a second switch circuit in the gate drive circuit respectively, and is used for outputting a driving signal to the first switch circuit and the second switch circuit; The gate drive circuit is connected with a gate of the target switch tube, and is used for driving the target switch tube to be turned on or turned off in response to the driving signal.

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