Semiconductor device manufacturing system, server, and foreign object generation factor specifying method

Abstract

The present invention provides technology capable of coping with foreign objects caused by an etching process without requiring coating of a member in a processing container.　One semiconductor device manufacturing system according to the present invention comprises a platform on which an application for specifying a factor in generation of foreign objects adhering to a sample to be processed by a semiconductor manufacturing device is implemented, and is characterized in that: the application executes a step for creating a graph in which a process history is set as nodes, and in which set as each edge is the difference between the number of foreign objects in one connected node and the number of foreign objects in the other connected node, a step for inputting an acquired number of foreign objects and a process history and estimating the edges by a neural network using a graph, and a step for using the estimated edges to specify a process history that is a factor in generation of the foreign objects; and the process history includes a manufacturing condition of the semiconductor manufacturing device.

Description

Semiconductor device manufacturing system, server, and method for identifying foreign matter generation cause

[0001] The present invention relates to a semiconductor device manufacturing system, a server, and a method for identifying the cause of foreign matter generation.

[0002] Among semiconductor device manufacturing equipment, a substrate processing apparatus such as a plasma processing apparatus includes a vacuum processing chamber, a gas supply apparatus, an electrode on which a wafer (hereinafter also referred to as a "sample") is placed, a plasma generating apparatus, etc. In the substrate processing apparatus, plasma processing of the wafer, for example, etching processing, is performed by generating a plasma gas.

[0003] In recent years, semiconductor device chips have become smaller and the spacing between wiring lines has become narrower, increasing the impact of foreign particles on the manufacturing process. In particular, concerns have arisen about the adverse effects of foreign particles, such as an increased incidence of short circuits caused by the adhesion of particles relatively larger than the wiring width, and the disruption of normal processing in the manufacturing process due to foreign particles. Furthermore, when foreign particles are found, semiconductor manufacturing equipment must be stopped for inspection, during which time semiconductor device manufacturing is halted. Therefore, shortening the time from the occurrence of foreign particles to recovery has become an important issue.

[0004] One effective measure for shortening recovery time is to identify the cause of foreign matter generation as soon as it occurs. For example, as disclosed in Patent Document 1, a technology is known in which components inside a processing vessel are coated with different materials to identify which component caused the foreign matter based on the elements of the generated foreign matter. Also, Patent Document 2 discloses a method in which machine learning is used to identify the component that caused the foreign matter generation based on the correlation between the components inside the processing vessel and the foreign matter elements, and cleaning conditions for that component are considered and cleaning is performed until the number of foreign matters is reduced to a threshold or less.

[0005] Specifically, Patent Document 1 addresses the issue of identifying components in a processing vessel of a plasma processing apparatus whose surface coating has deteriorated or whose corrosion has occurred, and discloses the following as an invention of a plasma processing apparatus and a method for determining whether to replace components of the plasma processing apparatus: "A coating C1 on the surface of a support member 34 that supports a microwave transmitting plate 31 constituting the top plate of the processing vessel, which is exposed to plasma within the processing vessel of the plasma processing apparatus, and a coating C2 on the surface of the side wall 2c continuing from the support member 34, are both formed by coating with different materials. If, as a result of analyzing particles on the dummy wafer DW, the components are found to be derived from the coating C1, the support member 34 is replaced, and if the components are derived from the coating C2, it is determined that the side wall 2c is corroded or deteriorated, and the relevant components are replaced." Furthermore, Patent Document 2 discloses the following as an invention of a semiconductor device manufacturing system and a semiconductor device manufacturing method: "We provide a semiconductor manufacturing equipment system and a semiconductor device manufacturing method for reducing foreign matter that adversely affects the manufacturing process of semiconductor devices. The foreign matter reduction process in a semiconductor device manufacturing system including a semiconductor manufacturing equipment and a platform connected to the semiconductor manufacturing equipment via a network and on which a foreign matter reduction process is executed includes the steps of: acquiring foreign matter characteristic values ​​using a sample processed by the semiconductor manufacturing equipment; identifying, by machine learning, a part of the semiconductor manufacturing equipment that is causing foreign matter generation based on the acquired foreign matter characteristic values ​​and correlation data; defining cleaning conditions for cleaning the semiconductor manufacturing equipment based on the identified parts; and cleaning the semiconductor manufacturing equipment using the defined cleaning conditions, wherein the correlation data is correlation data between the foreign matter characteristic values ​​and the parts that has been acquired in advance."

[0006] JP 2016-122772 A International Publication No. 2021 / 241242

[0007] In the technology of Patent Document 1, in order to identify foreign matter, it is necessary to coat components inside the processing vessel with different materials, and multiple coatings are often required for a single gas, which can make it difficult to apply the appropriate coating. Furthermore, if a highly abrasive material is included, there is a risk of affecting semiconductor devices. Furthermore, the technology of Patent Document 2 discloses a determination based on the correlation between components and elements, but does not disclose any determination regarding component wear. Therefore, even if a deteriorated component is present in the processing vessel, it may be difficult to determine that the deteriorated component is the cause of the foreign matter. Furthermore, all of the prior art technologies only address foreign matter originating from components, and do not address foreign matter originating from the etching process. The present invention has been made in consideration of these issues and aims to provide a technology that can address foreign matter originating from the etching process without requiring coating of components inside the processing vessel.

[0008] In order to solve the above-mentioned problems, one representative semiconductor device manufacturing system of the present invention is a semiconductor device manufacturing system having a platform on which an application for identifying the causes of foreign matter adhering to samples processed by semiconductor manufacturing equipment is implemented, wherein the application executes the following steps: creating a graph in which process history is a node and the difference between the number of foreign matter at one connected node and the number of foreign matter at the other connected node is an edge; inputting the acquired number of foreign matter and the process history and estimating the edges by a neural network using the graph; and identifying the process history that is the cause of the foreign matter occurrence using the estimated edges, wherein the process history includes manufacturing conditions of the semiconductor manufacturing equipment.

[0009] According to the present invention, it is possible to provide a technology that can deal with foreign matter resulting from the etching process without requiring coating of components inside the processing vessel. Problems, configurations, and effects other than those described above will become apparent from the following description of the preferred embodiment of the invention.

[0010] FIG. 1 is a diagram illustrating an example of a hardware configuration according to an embodiment of the present invention. FIG. 2 is a diagram illustrating an example of a configuration of a foreign matter cause analysis application device. FIG. 3 is a diagram illustrating an example of a functional block according to an embodiment of the present invention. FIG. 4 is a diagram illustrating an example of a flowchart according to an embodiment of the present invention. FIG. 5 is a diagram illustrating an example of a sequence diagram according to an embodiment of the present invention. FIG. 6 is a diagram illustrating an example of a foreign matter occurrence graph according to an embodiment of the present invention. FIG. 7 is a diagram illustrating an example of a data set input to a neural network. FIG. 8 is a diagram illustrating an example of a graphical user interface (GUI) of the foreign matter occurrence cause analysis application device.

[0011] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Note that the present invention is not limited to this embodiment. In addition, in the description of the drawings, the same parts are designated by the same reference numerals.

[0012] As will be described later, the semiconductor device manufacturing system 1 according to the embodiment of the present invention includes a network that can access a semiconductor manufacturing apparatus 111, a foreign matter characteristic value acquisition apparatus 112, and various databases (an apparatus database 115, an application database 116), and executes a processing flowchart for identifying the cause of foreign matter generation and reducing foreign matter. Here, the term "network" refers to an information and communication network that is configured, for example, by the Internet, a wide area network (WAN) and a local area network (LAN), a dedicated line, or a combination of these.

[0013] The semiconductor device manufacturing system 1 according to the embodiment of the present invention includes a semiconductor manufacturing apparatus 111 and a platform PF that performs analysis via a network, from identifying the causes of particle generation to reducing particle generation. Here, the "platform" includes a server equipped with an application and a database.

[0014] In this disclosure, "PC" does not necessarily refer to a personal computer, but also includes a server as a so-called computer (processing device). "Application" refers to a program executed on a PC. "Cloud" refers to computer resources such as application servers, database servers, and shared disks obtained via a network.

[0015] (Hardware Configuration) Hereinafter, an embodiment of the present invention will be described with reference to Figures 1 to 8. Figure 1 is a diagram showing an example of a hardware configuration according to an embodiment of the present invention. A semiconductor device manufacturing system 1 includes a semiconductor manufacturing apparatus 111, a foreign matter characteristic value acquisition apparatus 112, a PC 113, a PC 114, an apparatus database 115, an application database 116, a monitor 117, a cloud 118, a foreign matter cause analysis application apparatus 119, a cleaning implementation apparatus 120, a part replacement apparatus 121, and a process recipe review apparatus 122. A platform PF includes the apparatus database 115, the application database 116, the monitor 117, the cloud 118, and the foreign matter cause analysis application apparatus 119.

[0016] The semiconductor manufacturing equipment 111, PC 113, foreign substance characteristic value acquisition device 112, PC 114, cleaning execution device 120, part replacement device 121, and process recipe review device 122 constitute a closed network CN. The semiconductor manufacturing equipment 111 is connected to PC 113 in the closed network CN. PC 113 is connected to an equipment database 115 via a local network. Similarly, the foreign substance characteristic value acquisition device 112 is connected to PC 114 in the closed network CN, and PC 114 is connected to an application database 116 via the local network.

[0017] The cloud 118 references the device database 115 and the application database 116 and transfers the referenced information to the foreign matter factor analysis application device 119. At this time, for safety reasons, it is preferable that the cloud 118 has only read access to the device database 115 and the application database 116.

[0018] The foreign matter factor analysis application device 119 is, for example, a server on which a foreign matter factor analysis application is executed. The foreign matter factor analysis application device 119 analyzes the cause of foreign matter occurrence (hereinafter also referred to as "foreign matter occurrence cause") from information acquired by the cloud 118 and displays the analysis results on the monitor 117 via the cloud 118. As will be described in detail later, the foreign matter factor analysis application device 119 may have a display device, and the analysis results may be displayed using a graphical user interface (GUI) (e.g., a display device) of the foreign matter factor analysis application device 119. For example, the foreign matter factor analysis application device 119 may recommend to a user via the GUI to modify a process recipe based on the identified cause of foreign matter occurrence.

[0019] The cleaning implementation device 120 cleans the semiconductor manufacturing equipment 111. The part replacement device 121 determines the conditions for part replacement in the semiconductor manufacturing equipment 111 and performs the part replacement. The process recipe review device 122 reviews changes to the process recipe implemented by the semiconductor manufacturing equipment 111. As will be described in detail later, these devices 120 to 122 may also be equipped with a GUI, which can accept user operations and reflect the user's instructions in cleaning, part replacement, and process recipe review. The cleaning implementation device 120, part replacement device 121, and process recipe review device 122 are connected to the PC 113, so they can also send information to the equipment database 115. The cleaning implementation device 120, part replacement device 121, and process recipe review device 122 can also send information to the foreign matter cause analysis application device 119 and display the information on the monitor 117.

[0020] Although the foreign particle characteristic value acquisition device 112 is shown as a single device, it may be configured with multiple devices to acquire information such as foreign particle elements, the number of foreign particles, and the distribution of foreign particles on the sample. The configuration of the semiconductor device manufacturing system 1 is not limited to the above. The semiconductor device manufacturing system 1 may include at least the semiconductor manufacturing equipment 111, the foreign particle characteristic value acquisition device 112, PCs 113 and 114, and a platform PF. The configuration of the platform PF is not limited to the above. For example, the cloud 118 is not limited to computer resources provided via a network, but may also be configured with hardware resources. The platform PF can be configured as appropriate as long as it is equipped with an application for identifying the cause of foreign particles adhering to samples processed by the semiconductor manufacturing equipment. For example, as described below with reference to Figures 4 to 6, a case will be described in which the platform PF functions as the foreign particle factor analysis unit 215. However, the platform PF may be configured to execute the implemented application.

[0021] (Configuration of Foreign Object Factor Analysis Application Device) FIG. 2 is a diagram showing an example of the configuration of the foreign object factor analysis application device 119. The foreign object factor analysis application device 119 includes a bus 1190, a processor 1191, a memory 1192, a storage device 1193, an input / output device 1194, and a communication interface 1195. The processor 1191, the memory 1192, the storage device 1193, the input / output device 1194, and the communication interface 1195, which are connected to the bus 1190, communicate information via the bus 1190. The processor 1191 processes acquired information. The memory 1192 stores instructions (applications) to be executed by the processor 1191. The memory 1192 may include a random access memory (RAM) or other dynamic storage device, a read-only memory (ROM) or other static storage device, and the like, which may also be used to store temporary variables or other intermediate information during execution of instructions executed by the processor 1191. The processor 1191 can function as a foreign matter factor analysis unit 215, which will be described later, by executing instructions stored in the memory.

[0022] The storage device 1193 is used to store information and instructions and is configured, for example, by a magnetic disk or an optical disk. The storage device 1193 may also be a database that stores instructions. The input / output device 1194 includes a display device that displays information to a user and an input device that transmits information and command selections made by the user to the processor 1191. For example, the display device is a display, and the input device is a mouse and keyboard. The communication interface 1195 enables two-way communication via a network. Through the communication interface 1195, the foreign matter factor analysis application device 119 can communicate information with the cloud 118, the cleaning execution device 120, the part replacement device 121, and the process recipe review device 122.

[0023] Although the configuration of the foreign substance factor analysis application device 119 has been described, the present disclosure is not limited to this configuration. The foreign substance factor analysis application device 119 may be configured with other hardware circuits, or may be configured with a combination of hardware circuits and software. Furthermore, the PCs 113 and 114 may have the same configuration as the foreign substance factor analysis application device 119. Furthermore, the cleaning execution device 120, the part replacement device 121, and the process recipe review device 122 may have a configuration similar to that of the foreign substance factor analysis application device 119, as well as devices corresponding to their respective functions.

[0024] (Configuration of Functional Blocks) FIG. 3 is a diagram showing an example of functional blocks according to an embodiment of the present invention. In FIG. 3, solid lines mainly indicate the flow of information, and dashed lines mainly indicate the flow of objects. FIG. 3 shows the hardware configuration of FIG. 1 expressed as functional blocks. The semiconductor manufacturing unit 211 in FIG. 3 corresponds to the semiconductor manufacturing equipment 111 in FIG. 1. The foreign matter characteristic value acquisition unit 212 in FIG. 3 corresponds to the foreign matter characteristic value acquisition device 112 in FIG. 1. The equipment database 213 in FIG. 3 corresponds to the equipment database 115 in FIG. 1. The application database 214 in FIG. 3 corresponds to the application database 116 in FIG. 1. The foreign matter factor analysis unit 215 in FIG. 3 corresponds to the foreign matter factor analysis application device 119 in FIG. 1. The process recipe review unit 216 in FIG. 3 corresponds to the process recipe review device 122 in FIG. 1. The cleaning implementation unit 217 in FIG. 3 corresponds to the cleaning implementation device 120 in FIG. 1. The part replacement unit 218 in FIG. 3 corresponds to the part replacement device 121 in FIG. 1. The semiconductor manufacturing unit 211, foreign matter characteristic value acquisition unit 212, process recipe review unit 216, cleaning implementation unit 217, and part replacement unit 218 are included in the closed network CN, and the equipment database 213, application database 214, and foreign matter factor analysis unit 215 are included in the platform PF.

[0025] The semiconductor device manufacturing system 1 includes a semiconductor manufacturing apparatus that processes a sample based on a process recipe, a foreign matter characteristic value acquisition unit, and a foreign matter cause analysis unit, and identifies the cause of foreign matter that has occurred on the sample. Here, the functional blocks will be described using an example in which semiconductor manufacturing is performed. The case in which the semiconductor manufacturing unit 211 performs etching (i.e., the semiconductor manufacturing apparatus 111 is an etching apparatus) will be described.

[0026] The sample Sa processed in the semiconductor manufacturing unit 211 is transported (transported) to the foreign matter characteristic value acquisition unit 212. The transport method can be either manual or automatic. The process recipe Re and information on equipment errors (hereinafter also referred to as "equipment error history Eh") occurring during processing in the semiconductor manufacturing unit 211 are stored (saved) in the equipment database 213. The process recipe Re describes parameters for controlling the operating parts of the etching equipment, the type and flow rate of the process gas, and the temperature and heat value of the heater of the stage on which the sample is placed. The parameters may also include sensor values ​​installed in the equipment. Information such as the purpose of the process recipe, the execution time, and the target sample are also simultaneously stored in the equipment database 213. The purpose of the process recipe Re is, for example, the shape of a semiconductor device when manufactured according to the process recipe Re. This information related to the process recipe Re also indicates the usage history of multiple process recipes used to process the sample Sa, and is stored in the equipment database 213 as process history Rh. The process history Rh also includes, for example, the manufacturing conditions in the semiconductor manufacturing department 211. The equipment error history Eh includes information indicating the content of the error, such as whether it is a voltage system error or whether the emergency stop button was pressed.

[0027] The foreign matter characteristic value acquisition unit 212 acquires foreign matter characteristic values, including the number of foreign matters, using the sample processed by the semiconductor manufacturing unit 211. Information acquired by the foreign matter characteristic value acquisition unit 212, including the foreign matter elements, the number of foreign matters, a map of foreign matters on the sample, and the like (hereinafter also referred to as "foreign matter characteristic values ​​Ci"), is stored in the application database 214. Furthermore, if the foreign matter characteristic value acquisition unit 212 can simultaneously detect defects, it is preferable to store information about the defects as foreign matter characteristic values ​​Ci in the application database 214. At this time, it is preferable to assign a unique ID (Identification) to the process recipe Re, process history Rh, equipment error history Eh, and foreign matter characteristic values ​​Ci so as to maintain compatibility between the equipment database 213 and the application database 214, such as which process and which sample caused the defect.

[0028] The foreign matter factor analysis unit 215 creates a foreign matter occurrence graph Gr in which the process history Rh is represented as nodes and an increase or decrease in the number of foreign matters is represented as edges, and estimates the edges using a machine learning model with the acquired number of foreign matters and the process history Rh as input. Specifically, the foreign matter factor analysis unit 215 creates the foreign matter occurrence graph Gr from information stored in the equipment database 213 and the application database 214. The foreign matter occurrence graph Gr is a directed acyclic graph in which the causes of foreign matter occurrence are represented as nodes and the increase or decrease in the number of foreign matters are represented as edges.

[0029] The particle factor analysis unit 215 also identifies edges among the estimated edges that are the cause of particle generation. The identification will be described later; the machine learning model used is, for example, a neural network. The particle factor analysis unit 215 determines whether to correct the identified particle generation cause by modifying the process recipe Re, performing cleaning in the semiconductor manufacturing unit 211, or replacing parts in the semiconductor manufacturing unit 211. The means for performing the correction can be set according to the configuration of the semiconductor device manufacturing system 1. For example, the particle factor analysis unit 215 sends the particle generation graph Gr to at least one of the process recipe review unit 216, the cleaning implementation unit 217, and the part replacement unit 218, and causes them to perform processing to correct the particle generation cause indicated in the particle generation graph Gr. For example, the process recipe review unit 216 improves the part of the recipe where the number of particles is increasing based on the acquired particle generation graph Gr, and transfers the corrected process recipe Rem to the semiconductor manufacturing unit 211. The cleaning implementation unit 217 and part replacement unit 218 consider part replacement and cleaning conditions from the acquired foreign matter occurrence graph Gr, and store the details of the implementation, the implementation time, information on the replaced parts, and the like in the equipment database 213. Specifically, the cleaning implementation unit 217 stores a cleaning implementation history Ch, which is information indicating the implementation history of cleaning implemented in the semiconductor manufacturing unit 211, in the equipment database 213. In addition, the part replacement unit 218 stores a part replacement history Ph, which is information indicating the replacement history of parts included in the semiconductor manufacturing unit 211, in the equipment database 213.

[0030] 4 is a diagram showing an example of a flowchart according to an embodiment of the present invention. In step S1, the sample Sa processed in the semiconductor manufacturing unit 211 is transported to the foreign matter characteristic value acquisition unit 212. Subsequently, in step S2, the process recipe Re of the semiconductor manufacturing unit 211 is stored in the equipment database 213. Subsequently, in step S3, the foreign matter characteristic value acquisition unit 212 acquires the number of foreign matters, foreign matter elements, etc., and stores the acquired information in the application database 214.

[0031] Next, the foreign matter factor analysis unit 215 performs the following steps: creating a graph in which process histories are nodes and edges are the differences between the number of foreign matters at one connected node and the number of foreign matters at the other connected node; inputting the acquired number of foreign matters and the process histories and estimating the edges by a neural network using the graph; and identifying the process histories that are the cause of the foreign matter generation using the estimated edges. Furthermore, in the edge estimation step, a part replacement history that is information indicating the replacement history of parts of the semiconductor manufacturing equipment and a cleaning implementation history that is information indicating the implementation history of cleaning performed by the semiconductor manufacturing equipment are further input, and the edge is estimated. Furthermore, the application recommends modification of the manufacturing conditions based on the identified foreign matter generation causes.

[0032] More specifically, in step S4, the foreign matter factor analysis unit 215 represents, as nodes, the process recipe Re and the process recipe history (process history Rh) stored in the equipment database 213. Note that, up until step S4, the cleaning implementation unit 217 stores the cleaning implementation history Ch in the equipment database 213. In addition, the part replacement unit 218 stores the part replacement history Ph in the equipment database 213.

[0033] In S5, the particle factor analysis unit 215 represents an increase or decrease in the particle count as an edge, and estimates the edge using a machine learning model (e.g., a neural network) with the particle count and process history as input. When estimating the edge using a neural network, the maximum likelihood method is used. The maximum likelihood method is a technique for estimating the most likely value from known observation data, and in the present embodiment, it is used to estimate the edges of the particle occurrence graph Gr, i.e., the increase or decrease in the particle count, from the relationship between input information such as past process recipes Re and the particle count. Equation (1) represents the objective function of maximum likelihood estimation.

[0034] Here, the parameter Θ in Equation (1) represents the input information, i.e., the node and the number of foreign particles, and x (x1, x2, ... xn (n is a positive integer). When referring to a general matter without specifying n, the subscript n is omitted and it is represented as x) represents the edge. Learning is performed by imitating a neural network so as to maximize the likelihood of edge x. Furthermore, if the learning accuracy is low, it is preferable to change the basis function used in the maximum likelihood method. At this time, it is preferable to create a foreign particle occurrence graph for each foreign particle element. In other words, it is possible to improve the accuracy of learning by estimating the increase or decrease in the number of foreign particles for each foreign particle element, such as predicting a large increase in foreign particles of foreign particle element A at edge A.

[0035] Next, in step S6, the foreign matter factor analysis unit 215 determines whether the number of foreign matters obtained in step S3 is equal to or less than a threshold value. If the number of foreign matters that have occurred is greater than the threshold value (NO in step S6), the process proceeds to step S7. If the number of foreign matters is less than the threshold value (YES in step S6), the process of the flowchart ends.

[0036] Next, in step S7, the foreign matter factor analysis unit 215 identifies the node that is the foreign matter generation factor from the inferred edge. Step S7 is a step for identifying the node that is the foreign matter generation factor from the edge inferred in step S5, the foreign matter element, the part replacement history Ph, etc. In step S7, since multiple types of foreign matter generation factors are inferred, each foreign matter generation factor is displayed with a probability indicating the likelihood of the inference. For example, it is desirable to display the probability as 45% for the gas blow-out gas pipe, 35% for insufficient cleaning time in the process recipe, and 20% for other factors.

[0037] Next, in step S8, the foreign matter cause analysis unit 215 determines the cause of foreign matter generation. Step S8 is a step in which the condition branches depending on whether the foreign matter generation cause identified in S7 is due to insufficient cleaning, the process recipe, or component damage. Depending on the condition branch, the foreign matter cause analysis unit 215 considers component replacement in step S9, considers cleaning conditions in step S10, and considers the process recipe in step S11.

[0038] After any one of steps S9 to S11 is performed, in step S12, based on the results of the review, a countermeasure is implemented in at least one of the process recipe review unit 216, the cleaning execution unit 217, and the part replacement unit 218. After the countermeasure in step S12 is implemented, step S1 is executed again, and in step S6, it is verified whether the number of foreign particles is equal to or less than the threshold value.

[0039] Fig. 5 is a diagram showing an example of a sequence diagram according to an embodiment of the present invention. Steps S1 to S12 in Fig. 5 correspond to steps S1 to S12 in Fig. 4, respectively. Fig. 5 shows events common to Fig. 4 and also includes more detailed information than Fig. 4. In the following description, descriptions common to Figs. 1 to 4 may be simplified or omitted.

[0040] In step S1, a sample processed in the semiconductor manufacturing unit 211 (processed sample) is transported to the foreign matter characteristic value acquisition unit 212. Note that, prior to step S1, a control experiment may be conducted in which a sample (pre-processed sample) that has not been processed in the semiconductor manufacturing unit 211 is used, and the processes from step S2 to step S12 are performed on the pre-processed sample. The pre-processed sample may be a sample that has not undergone all of the processes in the process recipe, or a sample that has undergone the processes in the process recipe scheduled for the sample in stages. This allows the foreign matter characteristic value acquisition unit 212, described below, to acquire the foreign matter characteristic value Ci each time the process recipe is executed, making it possible to acquire information regarding an increase or decrease in the number of foreign matters corresponding to an edge.

[0041] Next, in step S2, the process recipe Re of the semiconductor manufacturing unit 211 is stored in the equipment database 213. Note that the information stored in the equipment database 213 is not limited to the process recipe Re. For example, information on an equipment error history Eh, which is information indicating the history of equipment errors that occurred in the semiconductor manufacturing unit 211 when the process recipe Re was executed, may also be stored in the equipment database 213.

[0042] Subsequently, in step S3, the foreign matter characteristic value acquisition unit 212 acquires the foreign matter characteristic value Ci for the processed sample (sample Sa) and stores it in the application database 214. Note that, as a control experiment, the foreign matter characteristic value Ci is also acquired for the unprocessed sample and stored in the application database 214.

[0043] Next, in step S4, the foreign matter factor analysis unit 215 represents, as nodes, the process recipe Re and the history of the process recipe Re (process history Rh) stored in the equipment database 213. Note that the equipment database 213 also contains, in addition to the process recipe Re and the equipment error history Eh, a part replacement history Ph and a cleaning execution history Ch. The foreign matter factor analysis unit 215 can also represent nodes based on this information.

[0044] Next, in S5, the foreign matter factor analysis unit 215 expresses an increase or decrease in the number of foreign matters as an edge, and estimates the edge using a machine learning model with the number of foreign matters and the process history as input. Note that in addition to the case where the number of foreign matters and the process history Rh are used, the input to the machine learning model can also include the part replacement history Ph and the cleaning implementation history Ch.

[0045] Subsequently, in steps S6 to S11, the foreign matter factor analysis unit 215 determines whether the number of foreign matters acquired in step S3 is equal to or less than a threshold value. If the number of foreign matters is greater than the threshold value, the foreign matter factor analysis unit 215 identifies an edge that is a cause of foreign matter generation from the estimated edges, and considers, for example, part replacement, cleaning conditions, or a process recipe.

[0046] Subsequently, in step S12, countermeasures are implemented. For example, if countermeasures are to be implemented for the cleaning conditions, the foreign matter cause analysis unit 215 instructs the cleaning implementation unit 217 to change the cleaning conditions. Here, in addition to changing and implementing the cleaning conditions, the cleaning implementation unit 217 determines whether or not a part in the semiconductor manufacturing unit 211 needs to be replaced. If an equipment part needs to be replaced, the cleaning implementation unit 217 instructs the part replacement unit 218 to replace the equipment part. Note that when cleaning is implemented, the cleaning implementation history Ch is updated, and when an equipment part is replaced, the part replacement history Ph is updated.

[0047] Furthermore, when the process recipe is to be modified, the foreign matter factor analysis unit 215 instructs the process recipe review unit 216 to modify the process recipe. The process recipe review unit 216 sends the modified process recipe Rem to the semiconductor manufacturing unit 211. The semiconductor manufacturing unit 211 performs the process based on the modified process recipe Rem.

[0048] (Particle Occurrence Graph) FIG. 6 is a diagram showing an example of a particle occurrence graph Gr according to an embodiment of the present invention. Eight nodes are shown in FIG. 6 , and the eight nodes are connected by edges with directions (arrows). Furthermore, the connected paths do not form closed circuits, and the particle occurrence graph Gr is formed as a directed acyclic graph. In the particle occurrence graph Gr, each node contains information that may cause particle occurrence. Examples of such information include information indicating the type and flow rate of gases described in the process recipe Re, and information indicating the amount of plasma exposure since the replacement of a part in a processing vessel, as shown in the part replacement history Ph. All nodes containing such information are connected, and edges are estimated to determine the final particle count. The edges are estimated using a maximum likelihood method, which predicts the population distribution of the past particle occurrence graph Gr and performs learning so that the graph edges have the most likely values. As a simple example, if a graph with node A, node B, node C, and the number of foreign particles X at the end of node C was previously represented, and the number of foreign particles Y when node A, node B, and node D are represented, the increase or decrease in the number of foreign particles from X to Y can be considered to be due to the change from node C to node D. Because this example is very simple, there is no need to use a neural network, but in reality, the number of foreign particle occurrence graphs Gr will exist equal to the number of times etching and foreign particle characteristic values ​​have been obtained, and the number of nodes and foreign particles to be learned will be enormous. Therefore, in the present disclosure, a method is adopted in which a neural network using the same method as Bayesian inference is used to estimate the distribution of each edge and represent the increase or decrease in the edges, i.e., the number of foreign particles, relative to the input.

[0049] FIG. 7 is a diagram showing an example of a data set input to a neural network. In the data set of FIG. 7, the item "Elapsed Time Since Part Replacement" indicates the elapsed time of continuous use since the part replacement. The item "Process Recipe" indicates the type of gas and its flow rate specified in the process recipe Re. The item "Discharge Time" indicates the time during which discharge occurred, and "Apparatus Error" indicates the number of apparatus errors that occurred. The data set of FIG. 7 shows, for example, three processes, data No. 1 to data No. 3, performed on one sample. In FIG. 7, the process recipe used for each data No. is shown, and the process recipes included in data No. 1 to data No. 3 correspond to process history Rh. Similarly, the information in the item "Elapsed Time Since Part Replacement" included in data No. 1 to data No. 3 corresponds to part replacement history Ph. The information in the "Apparatus Error" included in data No. 1 to data No. 3 corresponds to apparatus error history Eh.

[0050] 7 indicates information to be placed in the nodes, but in addition to such data, when creating the foreign matter occurrence graph Gr, it is necessary to define a matrix indicating the relationships between the nodes. The matrix indicating the relationships between the nodes can be controlled by a determinant.

[0051] Fig. 8 is a diagram showing an example of a graphical user interface (GUI) of the foreign matter cause analysis application device 119. The GUI in Fig. 8 is, for example, a display screen displayed on a display device of the foreign matter cause analysis application device 119. The GUI includes a display divided into four sections: an upper left section ul of the screen, an upper right section ur of the screen, a lower left section ll of the screen, and a lower right section lr of the screen.

[0052] A foreign matter occurrence graph Gr is displayed in the upper left corner of the screen. In addition to displaying the entire foreign matter occurrence graph Gr, details of each node in the foreign matter occurrence graph Gr may be displayed when the mouse is hovered over the node, and details of the edge may be displayed when the mouse is hovered over the edge. It is also possible to edit the details of the node on the screen, and to display predicted changes in the edge as a result of the editing.

[0053] The upper right corner ur of the screen displays the edges identified as the cause of the foreign matter generation in step S7 of Fig. 3. Specific component names, gas names, gas flow rates, etc. are displayed as the causes of the foreign matter generation.

[0054] A proposed modification of the process recipe Re is displayed in the lower left part of the screen 11. The proposed modification is displayed by referring to the parameters of the process recipe Re with the lowest particle count from the past particle occurrence graph Gr. Here, if a semiconductor device is actually manufactured using parameters changed with a focus on the particle count, the shape may not be suitable. Therefore, it is preferable to refer to a past particle occurrence graph Gr that is closest to the target shape. The target shape can be determined based on the purpose of the process recipe Re stored in the equipment database 115.

[0055] The bottom right corner lr of the screen displays cleaning conditions and recommended replacement parts. When dry cleaning such as metal cleaning is performed, there is a risk that the coating inside the processing vessel may peel off during cleaning. To prevent this, a minimum required cleaning recipe is displayed. Furthermore, since the semiconductor manufacturing equipment must be stopped during part replacement, it is preferable to display the minimum required part replacement and notify the user.

[0056] Although the screen of the display device of the foreign matter cause analysis application device 119 has been described as being divided into four sections, the present disclosure is not limited to this. The screen may be divided into four or more sections, or the screen may not be divided into sections and only specific information may be enlarged and displayed. Furthermore, in addition to information such as the foreign matter occurrence graph Gr, information contained in the device database 213 and the application database 214 may be displayed.

[0057] (Actions and Effects) As described above, the present disclosure provides a technology that can deal with foreign matter caused by the etching process without requiring coating of components inside a processing vessel. When foreign matter occurs in a semiconductor device manufacturing apparatus, it is easy to identify the event that caused the foreign matter, regardless of whether it was caused by a component, and therefore it is possible to deal with the foreign matter in a shorter time than conventional methods and without incurring unnecessary costs.

[0058] Furthermore, according to the present disclosure, by representing all information that may be the cause of foreign matter occurrence as nodes, it is possible to take into account the edges between those nodes, i.e., the interrelationships between the causes of foreign matter occurrence. For example, information such as the time since an equipment part was replaced and the extent to which plasma processing has been performed since the part was replaced can also be represented as nodes, and the relationship between the nodes and the etching recipe in which the foreign matter was detected can be represented as a graph, making it possible to predict the relationship between each edge with high accuracy.

[0059] Furthermore, according to the present disclosure, it is possible to recommend optimization of information that caused the generation of foreign particles in the etching process, etc. For example, it is possible to predict which process in an etching recipe will generate a large amount of foreign particles, and to recommend improvements to the predicted process. Furthermore, if corrosion of a part is the cause of the generation of foreign particles, it is possible to recommend replacement or cleaning of the part.

[0060] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the gist of the present invention.

[0061] The following are some possible aspects of the present invention, but the present invention is not limited to these. (Aspect 1) A semiconductor device manufacturing system including a platform on which an application for identifying causes of foreign matter adhering to samples processed by semiconductor manufacturing equipment is implemented, wherein the application executes the following steps: creating a graph in which process histories are nodes and edges are the differences between the number of foreign matter at one connected node and the number of foreign matter at the other connected node; inputting the acquired number of foreign matter and the process histories and estimating the edges by a neural network using the graph; and identifying the process history that causes the foreign matter to be adhering to the samples by using the estimated edges, wherein the process history includes manufacturing conditions of the semiconductor manufacturing equipment. (Aspect 2) The semiconductor device manufacturing system according to Aspect 1, wherein the graph is a directed acyclic graph. (Aspect 3) In the semiconductor device manufacturing system according to Aspect 1 or Aspect 2, the step of estimating the edge further inputs a part replacement history that is information indicating a part replacement history of the semiconductor manufacturing equipment and a cleaning implementation history that is information indicating a history of cleaning implemented by the semiconductor manufacturing equipment, thereby estimating the edge. (Aspect 4) In the semiconductor device manufacturing system according to any one of Aspects 1 to Aspect 3, the application recommends a modification of the manufacturing conditions based on the identified cause of the foreign matter generation.(Aspect 5) A server that performs processing to identify the cause of foreign matter adhering to a sample processed by semiconductor manufacturing equipment, executes the following steps: creating a graph in which process history is a node and the difference between the number of foreign matter at one connected node and the number of foreign matter at the other connected node is an edge; inputting the acquired number of foreign matter and the process history and estimating the edge by a neural network using the graph; and identifying the process history that is the cause of the foreign matter using the estimated edge; wherein the process history includes manufacturing conditions of the semiconductor manufacturing equipment. (Aspect 6) A method for identifying factors that cause foreign matter to adhere to a sample processed by semiconductor manufacturing equipment, comprising the steps of: creating a graph in which process histories are nodes and edges are the differences between the number of foreign matter at one connected node and the number of foreign matter at the other connected node; inputting the acquired number of foreign matter and the process histories and estimating the edges by a neural network using the graph; and identifying the process histories that cause the foreign matter to be generated using the estimated edges, wherein the process histories include manufacturing conditions of the semiconductor manufacturing equipment.

[0062] 1 Semiconductor device manufacturing system, 111 Semiconductor manufacturing equipment, 112 Foreign matter characteristic value acquisition device, 113 Personal computer for connecting to semiconductor manufacturing equipment, 114 Personal computer for connecting to foreign matter characteristic value acquisition device, 115 Equipment database, 116 Application database, 117 Monitor, 118 Cloud, 119 Foreign matter factor analysis application device, 120 Cleaning implementation device, 121 Part replacement device, 122 Process recipe review device, 211 Semiconductor manufacturing department, 212 Foreign matter characteristic value acquisition unit, 213 Equipment database, 214 Application database, 215 Foreign matter factor analysis unit, 216 Process recipe review unit, 217 Cleaning implementation unit, 218 Part replacement unit, 1190 Bus, 1191 Processor, 1192 Memory, 1193 Storage device, 1194 Input / output device, 1195 Communication interface 1195

Claims

1. A semiconductor device manufacturing system having a platform on which an application for identifying the causes of foreign matter adhering to samples processed by semiconductor manufacturing equipment is implemented, wherein the application executes the following steps: creating a graph in which process history is a node and the difference between the number of foreign matter at one connected node and the number of foreign matter at the other connected node is an edge; inputting the acquired number of foreign matter and the process history and estimating the edges by a neural network using the graph; and identifying the process history that is the cause of the foreign matter using the estimated edges, wherein the process history includes manufacturing conditions of the semiconductor manufacturing equipment.

2. A semiconductor device manufacturing system according to claim 1, wherein the graph is a directed acyclic graph.

3. A semiconductor device manufacturing system according to claim 1, wherein the step of estimating the edge further inputs a part replacement history, which is information indicating the replacement history of parts of the semiconductor manufacturing equipment, and a cleaning implementation history, which is information indicating the history of cleaning performed by the semiconductor manufacturing equipment, to estimate the edge.

4. A semiconductor device manufacturing system according to claim 1, wherein said application recommends modification of said manufacturing conditions based on the identified cause of the foreign matter generation.

5. A server that performs processing to identify the causes of foreign matter adhering to samples processed by semiconductor manufacturing equipment, the server executing the following steps: creating a graph in which process history is a node and the difference between the number of foreign matter at one connected node and the number of foreign matter at the other connected node is an edge; inputting the acquired number of foreign matter and the process history and estimating the edges by a neural network using the graph; and identifying the process history that is the cause of the foreign matter using the estimated edges, wherein the process history includes manufacturing conditions of the semiconductor manufacturing equipment.

6. A method for identifying factors that cause foreign matter to adhere to a sample processed by semiconductor manufacturing equipment, comprising the steps of: creating a graph in which process history is a node and the difference between the number of foreign matter at one connected node and the number of foreign matter at the other connected node is an edge; inputting the acquired number of foreign matter and the process history and estimating the edges by a neural network using the graph; and identifying the process history that is a cause of the foreign matter using the estimated edges, wherein the process history includes manufacturing conditions of the semiconductor manufacturing equipment.

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