Heterogeneous integrated filter and manufacturing method therefor
By performing chemical mechanical polishing on the surface of the acoustic structure, the problems of capacitor quality and yield caused by surface defects of the cover plate were solved, and high-accuracy measurement of capacitor structure and high yield of filter were achieved.
Patent Information
- Application Number
- PCT/CN2025/097920
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-10
- Filing Date
- 2025-05-29
- Publication Date
- 2026-01-15
AI Technical Summary
In the prior art, the thinning process of the acoustic structure WLP leads to surface defects in the cover plate, affecting the quality of the capacitor, the yield of the heterogeneous integrated filter, and the accuracy of capacitor value measurement.
By performing chemical mechanical polishing on the surface of the first acoustic structure to achieve a surface roughness of less than 50 nm, and then fabricating the capacitor structure, including the bottom electrode, dielectric layer, and top electrode, the surface is made smooth and the thickness is uniform.
This improved the accuracy of capacitance measurement and the yield of heterogeneous integrated filters, and reduced the impact of surface defects on capacitor quality.
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Figure CN2025097920_15012026_PF_FP_ABST
Abstract
Description
Heterogeneous Integrated Filters and Their Fabrication Methods
[0001] This application claims priority to Chinese Patent Application No. 202410919480.5, filed on July 10, 2024, the entire contents of which are incorporated herein by reference. Technical Field
[0002] This application relates to the field of filter technology, and for example to a heterogeneous integrated filter and its fabrication method. Background Technology
[0003] Heterogeneous integrated filters, implemented using acoustic and inductor-capacitor (LC) structures, can simultaneously achieve high frequency, large bandwidth, and high suppression, and have become one of the key components in 5G high-frequency bands, especially in applications such as WiFi 6E and WiFi 7.
[0004] There are many ways to integrate acoustic structures with LC structures. One way is to add capacitors after the acoustic structure has been packaged at the wafer level (WLP), thus integrating acoustics and capacitors. This ensures that the acoustic functional structure is not affected by the capacitor process after being packaged, and also enables the integration of different structures in three dimensions, thereby reducing the area of the device.
[0005] However, the thinning process of the cover plate in conventional acoustic structure WLP (Wastewater Plug-in) filters introduces many defects on the cover plate surface. These defects affect the quality of the capacitors fabricated on its surface, and failed capacitors can cause the entire filter to fail, thus affecting the yield of heterogeneous integrated filters. On the other hand, defects on the cover plate surface can also interfere with capacitor measurement data, causing capacitance value deviations. Summary of the Invention
[0006] This application provides a heterogeneous integrated filter and its fabrication method, which improves both the accuracy of capacitance measurement in the capacitor structure of the heterogeneous integrated filter and the yield of the heterogeneous integrated filter.
[0007] This application provides a method for fabricating a heterogeneous integrated filter, the method comprising:
[0008] A first acoustic structure is fabricated, comprising a first redistribution layer and a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover plate structure layer stacked sequentially; a portion of the first redistribution layer is located on a first surface, and the first redistribution layer is electrically connected to the first electrode and the second electrode; the average roughness Ra of the first surface is less than 50 nm; the first surface is either the surface of the cover plate structure layer away from the substrate structure, or the first surface is the surface of the substrate structure away from the first electrode.
[0009] A capacitor structure is fabricated on the first surface of the first acoustic structure, wherein the capacitor structure includes a bottom electrode, a dielectric layer and a top electrode stacked sequentially.
[0010] This application provides a method for fabricating a heterogeneous integrated filter, the method comprising:
[0011] A first acoustic structure is fabricated, comprising a first rewiring layer and a transition layer, a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover layer stacked sequentially; a portion of the first rewiring layer is located on a first surface, and the first rewiring layer is electrically connected to the first electrode and the second electrode; the average roughness Ra of the first surface is less than 50 nm; the first surface is the surface of the transition layer away from the first electrode.
[0012] A capacitor structure is fabricated on the first surface of the first acoustic structure, wherein the capacitor structure includes a bottom electrode, a dielectric layer and a top electrode stacked sequentially.
[0013] This application provides a heterogeneous integrated filter, which includes a first acoustic structure and a capacitor structure.
[0014] The first acoustic structure includes a first redistribution layer and a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover plate structure layer stacked sequentially. A portion of the first redistribution layer is located on a first surface, and the first redistribution layer is electrically connected to the first electrode and the second electrode. The average roughness Ra of the first surface is less than 50 nm. The first surface is either the surface of the cover plate structure layer away from the substrate structure, or the surface of the substrate structure away from the first electrode. Alternatively, the first acoustic structure includes a first redistribution layer and a transition layer, a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover plate layer stacked sequentially. A portion of the first redistribution layer is located on the first surface, and the first redistribution layer is electrically connected to the first electrode and the second electrode. The average roughness Ra of the first surface is less than 50 nm. The first surface is the surface of the transition layer away from the first electrode.
[0015] The capacitor structure is located on the first surface of the first acoustic structure, wherein the capacitor structure includes a bottom electrode, a dielectric layer and a top electrode stacked in sequence. Attached Figure Description
[0016] Figure 1 is a flowchart illustrating a method for fabricating a heterogeneous integrated filter according to an embodiment of this application;
[0017] Figure 2 is a schematic diagram of a first acoustic structure provided according to an embodiment of this application;
[0018] Figure 3 is a structural schematic diagram of another first acoustic structure provided according to an embodiment of this application;
[0019] Figure 4 is a schematic diagram of a heterogeneous integrated filter according to an embodiment of this application;
[0020] Figure 5 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of this application;
[0021] Figure 6 is a schematic diagram of a second acoustic structure provided according to an embodiment of this application;
[0022] Figure 7 is a schematic diagram of a third acoustic structure provided according to an embodiment of this application;
[0023] Figure 8 is a schematic diagram of another third acoustic structure provided according to an embodiment of this application;
[0024] Figure 9 is a schematic diagram of a fourth acoustic structure provided according to an embodiment of this application;
[0025] Figure 10 is a schematic diagram of another first acoustic structure provided according to an embodiment of this application;
[0026] Figure 11 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of this application;
[0027] Figure 12 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of this application;
[0028] Figure 13 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of this application;
[0029] Figure 14 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of this application;
[0030] Figure 15 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of this application;
[0031] Figure 16 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of this application;
[0032] Figure 17 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of this application;
[0033] Figure 18 is a schematic diagram of the structure of another heterogeneous integrated filter provided according to an embodiment of this application. Detailed Implementation
[0034] The technical solutions of the embodiments of this application will now be described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort should fall within the scope of protection of this application.
[0035] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0036] Figure 1 is a flowchart illustrating a method for fabricating a heterogeneous integrated filter according to an embodiment of this application. Referring to Figure 1, the fabrication method provided in this embodiment includes the following steps:
[0037] S110, Construct the first acoustic structure.
[0038] Figure 2 is a schematic diagram of a first acoustic structure according to an embodiment of this application, and Figure 3 is a schematic diagram of another first acoustic structure according to an embodiment of this application. Referring to Figures 2 and 3, the first acoustic structure 100 fabricated in this embodiment includes a first redistribution layer 110 and a substrate structure 120, a first electrode 130, a piezoelectric layer 140, a second electrode 150, and a cover plate structure layer 160 stacked sequentially. A portion of the first redistribution layer 110 is located on the first surface S1, and the first redistribution layer 110 is electrically connected to the first electrode 130 and the second electrode 150. The average roughness Ra of the first surface S1 is less than 50 nm. The first surface S1 is the surface of the cover plate structure layer 160 away from the substrate structure 120 (refer to Figure 2), or the first surface S1 is the surface of the substrate structure 120 away from the first electrode 130 (refer to Figure 3). The roughness of any region of the first surface S1 may not be greater than 50 nm, and optionally, the average roughness Ra of the first surface S1 may be less than 5 nm.
[0039] The first acoustic structure 100 provided in this embodiment can be a bulk acoustic wave resonator, a surface acoustic wave resonator, a Lamb wave resonator, or various derivative devices (such as X-SAW, Y-SAW, CS-SAW, etc.). The first acoustic structure 100 can also be composed of two or more resonators. The first surface S1 can be formed by chemical mechanical polishing (CMP). The first redistribution layer 110 can transmit electrical signals to the first electrode 130 and the second electrode 150. The material of the first redistribution layer 110 can include at least one of gold, silver, copper, aluminum, aluminum-copper, aluminum-silicon-copper, molybdenum, tungsten, titanium, and titanium-copper.
[0040] S120. A capacitor structure is fabricated on the first surface of the first acoustic structure.
[0041] Figure 4 is a schematic diagram of a heterogeneous integrated filter according to an embodiment of this application, and Figure 5 is a schematic diagram of another heterogeneous integrated filter according to an embodiment of this application. Referring to Figures 4 and 5, the capacitor structure 200 includes a bottom electrode 210, a dielectric layer 220, and a top electrode 230 stacked sequentially. The heterogeneous integrated filter shown in Figure 4 is formed by adding the capacitor structure 200 based on Figure 2, and the heterogeneous integrated filter shown in Figure 5 is formed by adding the capacitor structure 200 based on Figure 3.
[0042] The average roughness Ra of the first surface S1 is less than 50 nm, indicating that the first surface S1 is relatively smooth and free of obvious scratches, pits, and other defects. Fabricating the capacitor structure 200 on the first surface S1 ensures that the bottom electrode 210, the dielectric layer 220, and the top electrode 230 are all flat and uniform in thickness. This improves the accuracy of capacitance measurement and the quality of the capacitor structure 200 fabricated on the first surface S1, thereby increasing the yield of the heterogeneous integrated filter. The materials of the bottom electrode 210 and the top electrode 230 can include at least one of gold, silver, copper, aluminum, aluminum-copper, aluminum-silicon-copper, molybdenum, tungsten, titanium, and titanium-copper. The material of the bottom electrode 210 can be the same as the material of the first redistribution layer 110, allowing for simultaneous fabrication of both the bottom electrode 210 and the first redistribution layer 110 located on the first surface S1. Alternatively, the materials of the bottom electrode 210 and the first redistribution layer 110 can be different. The material of the bottom electrode 210 can be the same as or different from that of the top electrode 230.
[0043] This embodiment provides a method for fabricating a heterogeneous integrated filter. The method includes: firstly fabricating a first acoustic structure, and then fabricating a capacitor structure on a first surface of the first acoustic structure to form a heterogeneous integrated filter. The first acoustic structure in this embodiment includes a first redistribution layer and a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover plate structure layer stacked sequentially. It also includes a first surface, which is either the surface of the cover plate structure layer away from the substrate structure, or the surface of the substrate structure away from the first electrode. The average roughness Ra of the first surface is less than 50 nm, indicating that the first surface is relatively smooth and free of scratches, pits, or other defects. Fabricating the capacitor structure on the first surface improves the accuracy of capacitance measurement and enhances the quality of the capacitor structure. In summary, the method for fabricating a heterogeneous integrated filter provided in this embodiment improves both the accuracy of capacitance measurement and the yield of the heterogeneous integrated filter.
[0044] Optionally, the construction of the first acoustic structure includes the following steps:
[0045] S1111 provides a second acoustic structure.
[0046] Figure 6 is a schematic diagram of a second acoustic structure provided according to an embodiment of the present application. Referring to Figure 6, the second acoustic structure 101 includes a substrate structure 120, a first electrode 130, a piezoelectric layer 140, a second electrode 150, and a cover plate layer 161 stacked sequentially.
[0047] The surfaces of the cover layer 161 and the substrate structure 120 in the second acoustic structure 101 are relatively rough and have many surface defects. The material of the cover layer 161 can be silicon or glass.
[0048] The second acoustic structure 101 provided in this embodiment can be a bulk acoustic resonator, a surface acoustic resonator, a Lamb wave resonator, or a variety of derivative devices (such as X-SAW, Y-SAW, CS-SAW, etc.). The second acoustic structure 101 can also be composed of two or more resonators.
[0049] S1112. The second surface of the second acoustic structure is CMP polished to form the first surface. The second surface S2 is the surface of the cover layer 161 away from the substrate structure 120, or the second surface S2 is the surface of the substrate structure 120 away from the first electrode 130.
[0050] The average roughness Ra of the first surface formed by CMP polishing can be less than 50 nm. When the second surface S2 is the surface of the cover layer 161 that is far away from the substrate structure 120, the cover layer after CMP polishing is the cover structure layer in step S110. When the second surface S2 is the surface of the substrate structure 120 that is far away from the first electrode 130, the cover layer in step S1111 is the cover structure layer in step S110.
[0051] S1113. A first redistribution layer is formed on the first surface, and the first redistribution layer is electrically connected to the first electrode and the second electrode to form a first acoustic structure.
[0052] Before fabricating the first interconnect layer, through-silicon vias (TSVs) are formed. TSVs can be formed by thinning or by etching the entire surface. When the second surface is the surface of the capping layer away from the substrate structure, the first acoustic structure formed in step S1113 can be seen in Figure 2. When the second surface is the surface of the substrate structure away from the first electrode, the first acoustic structure formed in step S1113 can be seen in Figure 3.
[0053] The following will introduce another method for constructing a primary acoustic structure:
[0054] Optionally, the construction of the first acoustic structure includes the following steps:
[0055] S1121, Provide a third acoustic structure.
[0056] Figure 7 is a schematic diagram of a third acoustic structure according to an embodiment of this application. Referring to Figure 7, the third acoustic structure 102 includes a second redistribution layer 111 and a substrate structure 120, a first electrode 130, a piezoelectric layer 140, a second electrode 150, and a cover layer 161 stacked sequentially. A portion of the second redistribution layer 111 is located on a third surface S3. The second redistribution layer 111 is electrically connected to the first electrode 130 and the second electrode 150. The third surface S3 is the surface of the cover layer 161 away from the substrate structure 120, or the third surface S3 is the surface of the substrate structure 120 away from the first electrode 130.
[0057] The surfaces of the cover layer 161 and the substrate structure 120 in the third acoustic structure 102 are relatively rough and have many surface defects.
[0058] The third acoustic structure 102 provided in this embodiment can be a bulk acoustic resonator, a surface acoustic resonator, a Lamb wave resonator, or a variety of derivative devices (such as X-SAW, Y-SAW, CS-SAW, etc.). The third acoustic structure 102 can also be composed of two or more resonators.
[0059] S1122. Remove the second wiring layer on the third surface of the third acoustic structure and perform CMP polishing on the third surface to form the first surface.
[0060] Figure 8 is a schematic diagram of another third acoustic structure provided according to an embodiment of this application. Referring to Figure 8, the structure shown in Figure 8 is the structure formed after removing the second overlay layer on the third surface of the third acoustic structure and performing CMP polishing on the third surface.
[0061] The average roughness Ra of the first surface S1 formed by CMP polishing of the third surface S3 can be less than 50 nm. When the third surface S3 is the surface of the cover layer 161 that is far away from the substrate structure 120, the cover layer 161 after CMP polishing is the cover structure layer in step S110. When the third surface S3 is the surface of the substrate structure 120 that is far away from the first electrode 130, the cover layer 161 in step S1121 is the cover structure layer in step S110.
[0062] Removing the second wiring layer 111 on the third surface S3 makes it easier to perform CMP polishing on the third surface S3, thereby reducing the average roughness Ra of the formed first surface S1.
[0063] S1123. A conductive layer electrically connected to the first electrode and the second electrode is formed on the first surface to form a first acoustic structure.
[0064] The conductive layer can be formed by first sputtering a seed layer and then electroplating copper. The conductive layer and the second wiring layer 111 in the TSV can constitute the first wiring layer in the first acoustic structure. A schematic diagram of the structure after fabricating the conductive layer based on the structure shown in Figure 8 can be found in Figure 2.
[0065] When the third surface is the surface of the cover layer that is far from the substrate structure, the first acoustic structure formed in step S1123 can be referred to Figure 2. When the third surface is the surface of the substrate structure that is far from the first electrode, the first acoustic structure formed in step S1123 can be referred to Figure 3.
[0066] While fabricating a conductive layer on the first surface S1, the bottom electrode of the capacitor structure can also be fabricated.
[0067] This embodiment also provides another method for fabricating the first acoustic structure, as follows:
[0068] Optionally, the construction of the first acoustic structure includes the following steps:
[0069] S1131. A fourth acoustic structure is provided. The fourth acoustic structure includes a second wiring layer and a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover layer stacked sequentially; a portion of the second wiring layer is located on the fourth surface; the second wiring layer is electrically connected to the first electrode and the second electrode; the fourth surface is the surface of the cover layer away from the substrate structure.
[0070] The fourth surface is relatively rough and has many surface defects.
[0071] When the third surface in the third acoustic structure is the surface of the cover layer that is far from the substrate structure, the fourth acoustic structure is the same as the third acoustic structure.
[0072] S1132. A transition layer is made on one side of the fourth surface, and the surface of the transition layer away from the substrate structure is treated to form the first surface.
[0073] Figure 9 is a schematic diagram of a fourth acoustic structure according to an embodiment of this application. Referring to Figure 9, the fourth acoustic structure 103 further includes a processed transition layer 170. The material of the transition layer 170 can be an organic material or an inorganic material. For example, the organic material can be polyimide (PI) or benzocyclobutene (BCB), and the inorganic material can be undoped silicon glass (USG). When the material of the transition layer 170 is an organic material, the surface of the transition layer 170 away from the substrate structure 120 can be treated by leveling to form the first surface S1. When the material of the transition layer 170 is an inorganic material, the surface of the transition layer 170 away from the substrate structure 120 can be treated by CMP polishing to form the first surface S1.
[0074] S1133. A third wiring layer is fabricated on the first surface, and the third wiring layer is electrically connected to the first electrode and the second electrode to form a first acoustic structure.
[0075] Before fabricating the third wiring layer, the processed transition layer is photolithographically opened to reveal the re-distribution layer (RDL) region. Figure 10 is a schematic diagram of another first acoustic structure according to an embodiment of this application. Referring to Figure 10, the third wiring layer 112 is electrically connected to the second wiring layer 111, and the third wiring layer 112 and the second wiring layer 111 can constitute the first wiring layer in the first acoustic structure 100. The cover layer 161 and the processed transition layer 170 constitute the cover structure layer in the first acoustic structure 100. By providing the transition layer 170 on the side of the cover layer 161 away from the substrate structure 120, the fabricated capacitor structure can be unaffected by surface defects of the cover layer 161, thereby improving the quality of the capacitor structure.
[0076] The following will introduce a method for fabricating a capacitor structure on the first surface of the first acoustic structure:
[0077] Optionally, fabricating the capacitor structure on the first surface of the first acoustic structure includes the following steps:
[0078] S2111, deposit metal on the first surface to form a bottom electrode.
[0079] Figure 11 is a schematic diagram of another heterogeneous integrated filter according to an embodiment of this application, and Figure 12 is a schematic diagram of another heterogeneous integrated filter according to an embodiment of this application. Referring to Figures 11 and 12, aluminum can be deposited on the first surface and photolithographically and etched to form a bottom electrode 210. After forming the bottom electrode 210, a barrier layer can also be formed on the side of the bottom electrode 210 away from the first surface.
[0080] S2112. A dielectric layer is fabricated on the side of the bottom electrode away from the first surface.
[0081] Referring again to Figures 11 and 12, the material of the dielectric layer 220 can be silicon nitride. After depositing silicon nitride on the side of the bottom electrode 210 away from the first surface, it can be trimmed to form the dielectric layer 220. Trimming the deposited silicon nitride can make the thickness of silicon nitride within and between wafers closer to the target value, thereby making the measured capacitance value of the capacitor structure 200 more accurate and the product consistency better.
[0082] S2113. Deposit metal on the side of the dielectric layer away from the bottom electrode to form the top electrode.
[0083] Referring again to Figures 11 and 12, aluminum can be deposited on the side of the dielectric layer 220 away from the bottom electrode 210, and photolithography and etching can be used to form the top electrode 230.
[0084] Next, we will introduce another method for fabricating a capacitor structure:
[0085] Optionally, fabricating a capacitor structure on the first surface of the first acoustic structure includes:
[0086] S2121, a seed layer is sputtered onto the first surface and copper is electroplated to form a bottom electrode.
[0087] Figure 13 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of the present application, and Figure 14 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of the present application. Referring to Figures 13 and 14, step S2121 can be performed simultaneously with step S1123, that is, a seed layer can be sputtered on the first surface and copper can be electroplated to form a bottom electrode 210 and a conductive layer.
[0088] S2122. A dielectric layer is fabricated on the side of the bottom electrode away from the first surface.
[0089] Referring again to Figures 13 and 14, the material of the dielectric layer 220 can be silicon nitride. The dielectric layer 220 can be formed by trimming after depositing silicon nitride on the side of the bottom electrode 210 away from the first surface. Trimming the deposited silicon nitride can make the thickness of silicon nitride within and between wafers closer to the target value, thereby making the measured capacitance value of the capacitor structure 200 more accurate and the product consistency better.
[0090] S2123. Deposit metal on the side of the dielectric layer away from the bottom electrode to form the top electrode.
[0091] Referring again to Figures 13 and 14, aluminum can be deposited on the side of the dielectric layer 220 away from the bottom electrode 210, and photolithography and etching can be used to form the top electrode 230.
[0092] Next, we will introduce another method for fabricating a capacitor structure:
[0093] Optionally, fabricating the capacitor structure on the first surface of the first acoustic structure includes the following steps:
[0094] S2131, a seed layer is sputtered onto the first surface and copper is electroplated to form a bottom electrode.
[0095] Figure 15 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of the present application. Figure 16 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of the present application. Figure 17 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of the present application. Referring to Figures 15-17, step S2131 can be performed simultaneously with step S1123, that is, a seed layer can be sputtered on the first surface and copper can be electroplated to form a bottom electrode 210 and a conductive layer at the same time.
[0096] S2132. A dielectric layer is fabricated on the side of the bottom electrode away from the first surface.
[0097] S2133. A seed layer is sputtered on the side of the dielectric layer away from the bottom electrode and copper is electroplated to form the top electrode.
[0098] Referring to Figures 15-17, copper is sputtered onto the side of the dielectric layer 220 away from the bottom electrode 210 and then photolithographically etched to form the top electrode 230.
[0099] Optionally, after fabricating the capacitor structure on the first surface of the first acoustic structure, the method further includes: fabricating an organic layer on the side of the capacitor structure away from the first acoustic structure; and fabricating a fourth wiring layer on the side of the organic layer away from the capacitor structure.
[0100] Referring to any of Figures 11-17, the organic layer 180 can be made of PI. The fourth rewiring layer 190 is electrically connected to the bottom electrode 210 and top electrode 230 of the capacitor structure 200, as well as the first electrode 230 and second electrode 250 of the first acoustic structure 100. The fourth rewiring layer 190 can be electrically connected to external devices, thereby enabling the heterogeneous integrated filter to transmit electrical signals to and from external devices.
[0101] This embodiment also provides a method for fabricating a heterogeneous integrated filter, the method comprising the following steps:
[0102] S410, Construct the first acoustic structure.
[0103] Figure 18 is a schematic diagram of another heterogeneous integrated filter provided according to an embodiment of this application. Referring to Figure 18, the first acoustic structure 100 includes a first redistribution layer 110 and a transition layer 170, a substrate structure 120, a first electrode 130, a piezoelectric layer 140, a second electrode 150, and a cover layer 160 stacked sequentially. A portion of the first redistribution layer 110 is located on a first surface, and the first redistribution layer 110 is electrically connected to the first electrode 130 and the second electrode 150. The average roughness Ra of the first surface is less than 50 nm. The first surface is the surface of the transition layer 170 away from the first electrode 130.
[0104] S420, a capacitor structure is fabricated on the first surface of the first acoustic structure.
[0105] Referring again to Figure 18, the capacitor structure 200 includes a bottom electrode 210, a dielectric layer 220, and a top electrode 230 stacked sequentially. After step S420, an organic layer 180 is fabricated on the side of the capacitor structure 200 away from the first acoustic structure 100; and a fourth redistribution layer 190 is fabricated on the side of the organic layer 180 away from the capacitor structure 200.
[0106] The first acoustic structure 100 provided in this embodiment can be a bulk acoustic wave resonator, a surface acoustic wave resonator, a Lamb wave resonator, or various derivative devices (such as X-SAW, Y-SAW, CS-SAW, etc.). The first acoustic structure 100 can also be composed of two or more resonators. The first surface can be formed by chemical mechanical polishing (CMP). The first redistribution layer 110 can transmit electrical signals to the first electrode 130 and the second electrode 150. The average roughness Ra of the first surface S1 is less than 50 nm, which indicates that the first surface S1 is relatively smooth and free from obvious scratches, pits, and other defects. Fabricating the capacitor structure 200 on the first surface S1 makes the bottom electrode 210 of the capacitor structure 200 flat and uniform in thickness, the dielectric layer 220 of the capacitor structure 200 flat and uniform in thickness, and also makes the top electrode 230 of the capacitor structure 200 flat and uniform in thickness. This improves the accuracy of capacitance measurement of the capacitor structure 200, improves the quality of the capacitor structure 200 fabricated on the first surface S1, and thus improves the yield of heterogeneous integrated filters.
[0107] The following section will introduce another method for fabricating heterogeneous integrated filters. Refer to Figure 11. The steps of the fabrication method are as follows:
[0108] S510 provides a WLP acoustic structure.
[0109] The WLP acoustic structure includes a substrate structure 120, a first electrode 130, a piezoelectric layer 140, a second electrode 150, and a cover plate layer 160, which are stacked sequentially.
[0110] The surface of the cover plate layer 160 is relatively rough and has many surface defects.
[0111] S520. Perform CMP polishing on the side of the cover plate layer away from the substrate structure, and etch the entire surface to expose the TSV holes.
[0112] S530: Deposit aluminum and a barrier layer on the surface of the cover plate layer away from the substrate structure after CMP polishing, and perform photolithography and etching.
[0113] Step S530 can form the bottom electrode 210 of the capacitor structure 200.
[0114] S540, deposit SiN and trim.
[0115] Step S540 can form the dielectric layer 220 of the capacitor structure 200.
[0116] S550, deposit barrier layer and top electrode aluminum, and perform photolithography and etching.
[0117] Step S550 can form the top electrode 230 of the capacitor structure 200.
[0118] S560, apply PI resist, and open the corresponding area through photolithography.
[0119] Step S560 can form an organic layer 180.
[0120] S570, wet etching of SiN to open vias.
[0121] S580, sputtering seed layer.
[0122] S590, photolithography and Cu plating, remove the plating adhesive.
[0123] S600, etching the seed layer for electroplating.
[0124] After S610 undergoes radio frequency (RF) electrical performance testing and appearance inspection, it is sent for packaging and testing.
[0125] Figures 2-18 illustrate the exemplary base structure 120, including the base and the groove, and are not intended to limit the scope of this application.
[0126] This embodiment also provides a heterogeneous integrated filter. Referring again to Figures 11 and 18, the heterogeneous integrated filter includes a first acoustic structure 100 and a capacitor structure 200. Referring to Figure 11, the first acoustic structure 100 includes a first redistribution layer 110 and a substrate structure 120, a first electrode 130, a piezoelectric layer 140, a second electrode 150, and a cover plate structure layer 160 stacked sequentially. A portion of the first redistribution layer 110 is located on a first surface, and the first redistribution layer 110 is electrically connected to the first electrode 130 and the second electrode 150. The average roughness Ra of the first surface is less than 50 nm. The first surface is the surface of the cover plate structure layer 160 away from the substrate structure 120, or the first surface is the surface of the substrate structure 120 away from the first electrode 130. Alternatively, referring to Figure 18, the first acoustic structure 100 includes a first redistribution layer 110, a first electrode 130, a piezoelectric layer 140, a second electrode 150, and a capacitive structure 200. The system comprises a first rewiring layer 110 and a transition layer 170, a substrate structure 120, a first electrode 130, a piezoelectric layer 140, a second electrode 150, and a cover layer 160 stacked sequentially. A portion of the first rewiring layer 110 is located on a first surface, and the first rewiring layer 110 is electrically connected to the first electrode 130 and the second electrode 150. The average roughness Ra of the first surface is less than 50 nm. The first surface is the surface of the transition layer 170 away from the first electrode 130. A capacitor structure 200 is located on the first surface of the first acoustic structure 100, wherein the capacitor structure 200 includes a bottom electrode 210, a dielectric layer 220, and a top electrode 230 stacked sequentially.
[0127] The heterogeneous integrated filter provided in this application embodiment can achieve the same technical effect as the heterogeneous integrated filter manufacturing method provided in the above application embodiment, and will not be described again here.
[0128] It should be understood that the various processes shown above can be used to rearrange, add, or delete steps. For example, the multiple steps described in this application can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this application can be achieved, and this is not limited herein.
Claims
1. A method for fabricating a heterogeneous integrated filter, comprising: A first acoustic structure is fabricated, comprising a first redistribution layer and a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover plate structure layer stacked sequentially; a portion of the first redistribution layer is located on a first surface, and the first redistribution layer is electrically connected to the first electrode and the second electrode; the average roughness Ra of the first surface is less than 50 nm; the first surface is either the surface of the cover plate structure layer away from the substrate structure, or the first surface is the surface of the substrate structure away from the first electrode. A capacitor structure is fabricated on the first surface of the first acoustic structure, wherein the capacitor structure includes a bottom electrode, a dielectric layer and a top electrode stacked sequentially.
2. The manufacturing method according to claim 1, wherein, The fabrication of the first acoustic structure includes: A second acoustic structure is provided, wherein the second acoustic structure includes a second surface and the substrate structure, the first electrode, the piezoelectric layer, the second electrode and the cover plate layer are stacked sequentially; The second surface of the second acoustic structure is subjected to chemical mechanical polishing (CMP) to form the first surface, wherein the second surface is the surface of the cover layer away from the substrate structure, or the second surface is the surface of the substrate structure away from the first electrode; The first redistribution layer is fabricated on the first surface and electrically connected to the first electrode and the second electrode to form the first acoustic structure.
3. The manufacturing method according to claim 1, wherein, The fabrication of the first acoustic structure includes: A third acoustic structure is provided, wherein the third acoustic structure includes a second rewiring layer and a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover plate layer stacked sequentially; a portion of the second rewiring layer is located on a third surface; the second rewiring layer is electrically connected to the first electrode and the second electrode; the third surface is either the surface of the cover plate layer away from the substrate structure, or the third surface is the surface of the substrate structure away from the first electrode; The second overlay layer on the third surface of the third acoustic structure is removed and the third surface is CMP polished to form the first surface; A conductive layer electrically connected to the first electrode and the second electrode is formed on the first surface to form the first acoustic structure.
4. The manufacturing method according to claim 1, wherein, The fabrication of the first acoustic structure includes: A fourth acoustic structure is provided, wherein the fourth acoustic structure includes a second rewiring layer and a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover plate layer stacked sequentially; a portion of the second rewiring layer is located on a fourth surface; the second rewiring layer is electrically connected to the first electrode and the second electrode; the fourth surface is the surface of the cover plate layer away from the substrate structure; A transition layer is formed on one side of the fourth surface, and the surface of the transition layer away from the substrate structure is treated to form a first surface; A third wiring layer is fabricated on the first surface and electrically connected to the first electrode and the second electrode to form the first acoustic structure.
5. The manufacturing method according to any one of claims 1-4, wherein manufacturing the capacitor structure on the first surface of the first acoustic structure comprises: The bottom electrode is formed by depositing metal on the first surface; A dielectric layer is formed on the side of the bottom electrode away from the first surface; The top electrode is formed by depositing metal on the side of the dielectric layer away from the bottom electrode.
6. The manufacturing method according to any one of claims 1-4, wherein, The step of fabricating a capacitor structure on the first surface of the first acoustic structure includes: A seed layer is sputtered onto the first surface and copper is electroplated to form the bottom electrode; A dielectric layer is formed on the side of the bottom electrode away from the first surface; The top electrode is formed by depositing metal on the side of the dielectric layer away from the bottom electrode.
7. The manufacturing method according to any one of claims 1-4, wherein, The step of fabricating a capacitor structure on the first surface of the first acoustic structure includes: A seed layer is sputtered onto the first surface and copper is electroplated to form the bottom electrode; A dielectric layer is formed on the side of the bottom electrode away from the first surface; A seed layer is sputtered on the side of the dielectric layer away from the bottom electrode, and copper is electroplated to form the top electrode.
8. The manufacturing method according to any one of claims 1-4, further comprising, after fabricating the capacitor structure on the first surface of the first acoustic structure: An organic layer is formed on the side of the capacitor structure away from the first acoustic structure; A fourth wiring layer is fabricated on the side of the organic layer away from the capacitor structure.
9. A method for fabricating a heterogeneous integrated filter, comprising: A first acoustic structure is fabricated, comprising a first rewiring layer and a transition layer, a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover layer stacked sequentially; a portion of the first rewiring layer is located on a first surface, and the first rewiring layer is electrically connected to the first electrode and the second electrode; the average roughness Ra of the first surface is less than 50 nm; the first surface is the surface of the transition layer away from the first electrode. A capacitor structure is fabricated on the first surface of the first acoustic structure, wherein the capacitor structure includes a bottom electrode, a dielectric layer and a top electrode stacked sequentially.
10. A heterogeneous integrated filter, comprising: First acoustic structure and capacitor structure; The first acoustic structure includes a first redistribution layer and a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover plate structure layer stacked sequentially. A portion of the first redistribution layer is located on a first surface, and the first redistribution layer is electrically connected to the first electrode and the second electrode; the average roughness Ra of the first surface is less than 50 nm; the first surface is the surface of the cover plate structure layer away from the substrate structure, or the first surface is the surface of the substrate structure away from the first electrode; or, the first acoustic structure includes a first redistribution layer and a transition layer, a substrate structure, a first electrode, a piezoelectric layer, a second electrode, and a cover plate layer stacked sequentially; a portion of the first redistribution layer is located on the first surface, and the first redistribution layer is electrically connected to the first electrode and the second electrode; the average roughness Ra of the first surface is less than 50 nm; the first surface is the surface of the transition layer away from the first electrode. The capacitor structure is located on the first surface of the first acoustic structure, wherein the capacitor structure includes a bottom electrode, a dielectric layer and a top electrode stacked in sequence.
Citation Information
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