A lead frame package for an RF application and a method of manufacturing a lead frame package

Abstract

A lead frame package for an RF application and method of manufacturing thereof is provided. The lead frame package comprises a lead frame. It also comprises at least one first active IC component attached electrically conductive to a main pad of the lead frame. It further comprises at least one laminate sub-module attached electrically conductive to the main pad. The at least one laminate sub-module comprises at least one conductive laminate layer arranged to provide at least one passive electrical component, and at least one dielectric laminate layer arranged in between the at least one conductive laminate layer and the main pad.

Description

[0001] A LEAD FRAME PACKAGE FOR AN RF APPLICATION AND A METHOD OF

[0002] MANUFACTURING A LEAD FRAME PACKAGE

[0003] TECHNICAL FIELD

[0004] Embodiments herein relate to lead frame packages. In particular, embodiments herein relate to a lead frame package for a Radio Frequency, RF, application. Further, embodiments herein relate to a method of manufacturing at least one lead frame package.

[0005] BACKGROUND

[0006] The number of antenna branches in massive Multiple Input Multiple Output, MIMO, radio equipments today may, for example, be up to about 64. However, as this number of antenna branches increases, the number of analogue chains, and corresponding analogue electronics chains, will also increase dramatically. If the cost of these analogue electronics components scales linearly with the number of analogue chains needed for the increased number of antenna branches, the manufacturing costs of radio equipments will significantly increase. To combat this, it is important to seek opportunities to reduce cost through integration, efficient design, and low cost packaging, as well as careful system architecture selection.

[0007] One type of typical low cost packages of analogue electronics components for RF applications is so-called Quad Flat No leads, QFN, or Dual Flat No leads, DFN, packages. QFN packaging uses stamped or laser cut low cost sheet copper substrates to mount analogue electronics components. Fig. 1 shows an example of a Printed Circuit Board PCB, substrate 130 comprising copper substrates 100 forming a main pad 110, or paddle, and contact leads 120 of a lead frame package. Typically, the analogue electronics components for RF applications comprised in QFN packaging are semiconductor components, which may be single or multiple semiconductor dies.

[0008] Fig. 2 shows a cross-sectional view of an example of a lead frame package 200. Here, a semiconductor component 210 is attached on its bottom side to the main pad 110 of the lead frame package 200. This may be performed via an electrically conductive medium 211 , typically via a solder, a silver epoxy, a eutectic solder or similar. The semiconductor component 210 is also attached from its top side to the contact leads 120, normally galvanically isolated package leads. This may be performed via so-called bond wire interconnects or bonding wires 240. The bond wire interconnects 240 is attach to the contact leads 120. This may be performed via cold welding 230. The lead frame package 200 is then completely covered with plastic mold compound 290. After being cut or diced into individual lead frame packages, e.g. normally from a large lead frame package array comprising multiple lead frame packages, the lead frame package 200 may subsequently be soldered onto the PCB substrate 130 via solder 250.

[0009] However, the trace / space etching tolerances on the PCB substrate are usually limited to approximately 150|im in standard PCB technologies. This limits the pin separation, e.g. space between the contact leads 120, and fundamentally the minimum size of electrical circuits. One typical approach to address this issue is to monolithically integrate more functionality into the semiconductor chip in order to achieve electric circuit size reductions. Unfortunately, this limits the product development cycle time, and its flexibility, to the manufacturing cycle time of the semiconductor. Conventionally, the product development cycle time of the semiconductor is significantly longer than the product development cycle time of the PCB, typically several months compared to days.

[0010] Hence, there is a need to improve the design of lead frame packages in order to lower cost and the cycle time when manufacturing lead frame packages.

[0011] SUMMARY

[0012] It is an object of the present disclosure to mitigate, alleviate or eliminate one or more of the above-identified deficiencies and disadvantages and improve the design of lead frame packages.

[0013] According to a first aspect of embodiments herein, the object is achieved by a lead frame package for a Radio Frequency, RF, application. The lead frame package comprises a lead frame, a first active Integrated Circuit, IC, component attached electrically conductive to a main pad of the lead frame. The lead frame package also comprises at least one laminate sub-module attached electrically conductive to the main pad of the lead frame, wherein the at least one laminate sub-module comprise at least one conductive laminate layer arranged to provide at least one passive electrical component, and at least one dielectric laminate layer arranged in between the first conductive laminate layer and the main pad of the lead frame.

[0014] In some embodiments, the at least one conductive laminate layer further comprise one or more intermediate conductive laminate layers and the at least one dielectric laminate layer comprise one or more intermediate dielectric laminate layers, wherein the one or more intermediate conductive laminate layers are separated by the one or more intermediate dielectric laminate layers between the at least one conductive laminate layer and the main pad of the lead frame. In this case, according to some embodiments, the at least one conductive laminate layer and / or the one or more intermediate conductive laminate layers may be arranged to form at least one first passive electrical component. Here, in some embodiments, the at least one first passive electrical component may comprise a passive electrical routing structure.

[0015] In some embodiments, the at least one conductive laminate layer may be electrically connected to at least one second passive electrical component. In this case, according to some embodiments, the at least one second passive electrical component may be a surface mounted component. Here, in some embodiments, the at least one second passive electrical component may comprise one or more of: a capacitor, an inductor, and a resistor.

[0016] In some embodiments, the at least one conductive laminate layer may be electrically connected to at least one second active IC component. In this case, according to some embodiments, the at least one second active IC component is a surface mounted component or an embedded die component. Here, in some embodiments, the at least one first active IC component may be a semi-conductor chip, and the at least one second active IC component may be a semi-conductor die or a flip-chip semiconductor die.

[0017] In some embodiments, the least one first active IC component may be soldered, or affixed via an electrically conductive epoxy, onto the main pad of the lead frame. In some embodiments, one of the one or more intermediate conductive laminate layers of the at least one laminate sub-module may also be soldered, or affixed via an electrically conductive epoxy, onto the main pad of the lead frame. In some embodiments, the at least one conductive laminate layer may be electrically connected to one or more contact leads of the lead frame and / or to the at least one active IC component via bond wire interconnects. Here, in some embodiments, the lead frame, the at least one first active IC component, the at least one laminate submodule and any bond wire interconnects may be covered in a plastic mold compound to form the lead frame package.

[0018] According to a second aspect of embodiments herein, the object is achieved by a method of manufacturing at least one lead frame package. The method comprises attaching at least one first active IC component electrically conductive to a main pad of at least one lead frame. The method also comprises attaching at least one laminate submodule electrically conductive to the main pad of the at least one lead frame, wherein the at least one laminate sub-module comprise a first conductive laminate layer arranged to provide at least one passive electrical component, and a dielectric laminate layer arranged in between the first conductive laminate layer and the main pad of the lead frame. Further, the method comprises providing bond wire interconnects electrically connecting the at least one first active IC component to one or more contact leads of the at least one lead frame. Furthermore, the method comprises providing bond wire interconnects electrically connecting the first conductive laminate layer to one or more contact leads of the at least one lead frame and / or to the at least one active IC component. Yet further, the method comprises covering the at least one lead frame in a plastic mold compound to form the at least one lead frame package.

[0019] In some embodiments, the method may further comprise manufacturing a multiple laminate sub-module array comprising at least one laminate sub-module, wherein each of the at least one laminate sub-module comprises at least one conductive laminate layer arranged to provide at least one passive electrical component, and a dielectric laminate layer arranged in between the at least one conductive laminate layer and the main pad of the lead frame. In this case, according to some embodiments, the method may further comprise dicing the at least one laminate sub-module from the multiple laminate submodule array.

[0020] In some embodiments, the method may further comprise manufacturing a multiple lead frame array comprising the at least one lead frame. In this case, according to some embodiments, the method may further comprise dicing the at least one lead frame package from a multiple lead frame package assembly.

[0021] In some embodiments, the method may further comprise soldering the at least one lead frame package onto a Printed Circuit Board, PCB.

[0022] By combining at least one first active IC component with at least one laminate submodule in a lead frame package design, a simple, flexible and low cost lead frame package that is smaller compared to discrete lead frame packages with similar components is achieved. The at least one laminate sub-module also allows for complex routing within the lead frame package, while its manufacturing allows for lowered cycle times, e.g. to exchange frequency-variant RF components within in the lead frame packages during the product development process. Hence, the size of lead frame packages is reduced, while also achieving lowered costs and decreased the cycle time when manufacturing the lead frame packages. Thus, the design of lead frame packages is improved.

[0023] BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Features and advantages of the embodiments will become readily apparent to those skilled in the art by the following detailed description of exemplary embodiments thereof with reference to the accompanying drawings, wherein:

[0025] Fig. 1 is a schematic illustration of an example of a Printed Circuit Board, PCB, for a lead frame package,

[0026] Fig. 2 is a cross-sectional view of an example of a lead frame package,

[0027] Fig. 3 is a cross-sectional view of embodiments of a lead frame package,

[0028] Fig. 4 is a top view of embodiments of a lead frame package,

[0029] Figs. 5-7 are further cross-sectional views of embodiments of a lead frame package, Fig. 8 is a flowchart depicting embodiments of a method for manufacturing at least one lead frame package.

[0030] DETAILED DESCRIPTION

[0031] The figures are schematic and simplified for clarity, and they merely show details which are essential to the understanding of the embodiments presented herein, while other details have been left out. Throughout, the same reference numerals are used for identical or corresponding parts or steps.

[0032] As part of the developing of the embodiments described herein, it has been realized that streamlining the manufacturing and integration of RF system components for RF applications is complex. For example, in analogue front-end RF equipments, the TX component packaging normally have more demanding requirements that the RX component packaging. In this case, it is often not financially viable to have the RX packaging with lower requirements also comprise expensive, high-performing components that only necessary in the TX component packaging, just for the purpose of integration and to ease or streamline a simultaneous manufacturing process. Also, even if the overall packaging size is reduced, this may have the opposite effect to nevertheless increase the overall system cost.

[0033] Another issue with most advanced packaging solutions is the high cost of development. Typically, the lead times for advanced packaging is longer than standard PCB assembly, i.e. simply soldering packaged components to a PCB. This due to the face that the advanced packaging processes require many sequential steps. This is difficult for low volume RF equipments, where quickly the cost and effort of utilizing these packaging technologies may outweigh their benefit. Additionally, lead frame package designs customized for certain RF frequencies may place additional requirements on the lead frame package, and make first-time-right design almost impossible, necessitating costly and lengthy re-spins.

[0034] These issues are addressed by the embodiments described herein by combining at least one first active IC component with at least one laminate sub-module in a lead frame package design. This makes it is possible to, for example, utilize standard QFN / DFN packaging technology together with Surface Mounted Device, SMD, populated laminates, i.e. thin PCB’s which are electrical routing substrates, as low cost integrated passive devices. In other words, the lead frame package design may comprise an OFN multi-die module comprising several different active and / or passive IC components, as well as, several different laminate sub-modules. The different active and / or passive IC components may belong to any available IC technology, such as, e.g. Silicon, SOI, SiGe, GaAs and GaN, etc., while the different laminate sub-modules, or PCB chiplet modules, are used to hold SMD components, such as, e.g. capacitors, inductors, resistors. This provides a cost-effective way to add enhanced routing capabilities to low cost QFN packages, and combines the advantages of low cost QFN packages with all of the flexibility of using laminates / PCB routing and low cost SMD components.

[0035] Additionally, it should be noted that the several different active and / or passive IC components, as well as, several different laminate sub-modules may be manufactured in parallel, e.g. silicon transistors may be manufactured at the same time as its corresponding laminate sub-modules. These may then, for example, be assembled quickly in a standard plastic lead frame assembly line. Additionally, developing the laminate sub-modules has a much shorter cycle time and requires less engineering to design than the IC components. This enables a much faster and cost-efficient way to create RF equipment variants. It should further be noted that his also provides the ability to re-use silicon sub-components between different laminates sub-modules to source higher volumes on individual components. This is particularly beneficial when using the lower cost and faster cycle time laminate sub-modules for RF matching.

[0036] It should also be noted that since laminates are typically considered their own packaging substrates, a typical packaging engineer would not stack multiple packaging substrate on top of one other since it would be considered wasting material and cost. Hence, in this sense, the embodiments provided herein is somewhat counter-intuitive.

[0037] Fig. 3 shows a cross-sectional view of embodiments of a lead frame package 300. The lead frame package 300 is suitable for Radio Frequency, RF, application.

[0038] The lead frame package 300 comprise a lead frame 110, 120. The lead frame 110, 120 comprise a main pad 110 and contact leads 120. The contact leads 120 are normally galvanically isolated lead frame package leads. Onto the main pad 110, at least one first active Integrated Circuit, IC, component 310 is attached electrically conductive. The at least one first active Integrated Circuit, IC, component 310 may be a semi-conductor component or chip. The at least one first active Integrated Circuit, IC, component 310 may be attached on its bottom side to the main pad 110. The least one first active IC component 310 may be soldered, or affixed via an electrically conductive epoxy, onto the main pad 110. This may be performed via an electrically conductive medium 311 , typically via a solder, a silver epoxy, a eutectic solder or similar. The at least one first active Integrated Circuit, IC, component 310 may be connected to one or more of the contact leads 120 of the lead frame 110, 120. This may be performed via bond wire interconnects or bonding wires 340. The bond wire interconnects 340 may be attached to the top sides of at least one first active Integrated Circuit, IC, component 310 and the contact leads 120. The bond wire interconnects 340 may attach to the contact leads 120 e.g. via a silver plating 330.

[0039] According to some embodiments, at least one laminate sub-module 320 is also attached electrically conductive to the main pad 110 of the lead frame 110, 120. The at least one laminate sub-module 320 comprises at least one conductive laminate layer 350 and at least one dielectric laminate layer 360. The at least one conductive laminate layer 350 may, for example, be made of thin laminates or substrates made of copper or other suitable conductive materials, while the at least one dielectric laminate layer 360 may be an thin electrically insulating laminate or substrate made of an insulator material, such as, e.g. epoxy resin fiberglass composite, ceramic (e.g. AI2O3), quartz, silicon, or GaAs, etc.

[0040] The at least one dielectric laminate layer 360 is arranged in between the at least one conductive laminate layer 350 and the main pad 110. This means, for example, that the at least one dielectric laminate layer 360 is effectively electrically separating the at least one conductive laminate layer 350 from the main pad 110, thus allowing an electrically conductive layer that is capable of providing at least one passive electrical component 410 (as shown more illustrative in Fig. 4). Thus, the at least one conductive laminate layer 350 arranged is to provide at least one passive electrical component 410 to the lead package frame 300. For example, in some embodiments, the at least one conductive laminate layer 350 may comprise a passive electrical routing structure. In this case, the at least one conductive laminate layer 350 may, for example, form the passive electrical routing structure by itself. More examples of how the at least one conductive laminate layer 350 may be arranged to provide at least one passive electrical component 410 to the lead package frame 300 is given below with reference to the embodiments shown in Figs. 5-7.

[0041] It should also be noted that the at least one laminate sub-module 320 may be made in a similar manner as a PCB is made, but the at least one laminate sub-module 320 may be made with a trace and space that is lower than 50 / 50 |im. Additionally, it should be noted that the at least one laminate sub-module 320 will have shorter production cycle times, e.g. single digit weeks, compared to longer production cycle times, e.g. several months, for the at least one first active Integrated Circuit, IC, component 310, i.e. semiconductors or chips. Further, the at least one laminate sub-module 320 will also have significantly larger productions panels sizes, which allows more product variants and designs to be produced in a single manufacturing run. The at least one laminate submodule 320 may be made as passive routing structures that are functional at DC and also RF frequencies.

[0042] In some embodiments, the at least one conductive laminate layer 350 may further comprises one or more intermediate conductive laminate layers 351 , 352, 380. In this case, the at least one dielectric laminate layer 360 may also comprise one or more intermediate dielectric laminate layers 361 , 362. The one or more intermediate conductive laminate layers 351 , 352, 380 are separated by the one or more intermediate dielectric laminate layers 360 between the at least one conductive laminate layer 350 and the main pad 110. As shown in the example of Fig. 3, one intermediate conductive laminate layer 380 may be arranged at the bottom of the at least one laminate sub-module 320 and be arranged to be attached electrically conductive to the main pad 110. This means, for example, that one of the one or more intermediate conductive laminate layers 351 , 352, 380 of the at least one laminate sub-module 320 attached to the main pad 110 via an electrically conductive medium 371 , typically via a solder, a silver epoxy, a eutectic solder or similar. In other words, one of the one or more intermediate conductive laminate layers 351 , 352, 380 of the at least one laminate sub-module 320 may be soldered, or affixed via an electrically conductive epoxy, onto the main pad 110.

[0043] The remaining intermediate one or more intermediate conductive laminate layers 351 , 352 may be sandwiched between the at least one dielectric laminate layer 360 and the one or more intermediate dielectric laminate layers 361 , 362. This means, for example, that more advanced and intricate passive electrical routing structures may be achieved. Hence, in some embodiments, the at least one conductive laminate layer 350 and / or the one or more intermediate conductive laminate layers 351, 352, 380 are arranged to form at least one first passive electrical component 410. This is further illustrated in the top view of the lead frame package 300 in Fig. 4.

[0044] It should also be noted that the at least one conductive laminate layer 350 and the one or more intermediate conductive laminate layers 351, 352, 380 may be electrically interconnected, for example, through vias 364 in the at least one dielectric laminate layer 360 and the one or more intermediate dielectric laminate layers 361, 362.

[0045] The at least one conductive laminate layer 350 may be connected to one or more of the contact leads 120 of the lead frame 110, 120. This may be performed via bond wire interconnects or bonding wires 342. The bond wire interconnects 342 may be attached to the top sides of at least one conductive laminate layer 350 and the contact leads 120. The bond wire interconnects 342 may attach to the contact leads 120 e.g. via a silver plating 330. Furthermore, the at least one conductive laminate layer 350 of the at least one laminate sub-module 320 may be connected to the at least one first active Integrated Circuit, IC, component 310. This may be performed via bond wire interconnects or bonding wires 341. The bond wire interconnects 341 may be attached to the top sides of at least one conductive laminate layer 350 of the at least one laminate sub-module 320 and the at least one first active Integrated Circuit, IC, component 310.

[0046] Further, the lead frame 110,120, the at least one first active IC component 310, the at least one laminate sub-module 320 and bond wire interconnects 340-342 may be covered in a plastic mold compound 390 to form the lead frame package 300.

[0047] Fig. 5 shows another cross-sectional view of embodiments of a lead frame package 300. The embodiments of the lead frame package 300 shown in Fig. 5 may be identical to the embodiments of the lead frame package 300 shown in Figs. 3-4, except that the at least one conductive laminate layer 350 is also electrically connected to at least one second passive electrical component 510. In some embodiments, the at least one second passive electrical component 510 may be a surface mounted component or Surface Mounted Device, SMD. In some embodiment, the at least one second passive electrical component 510 may be one or more of a capacitor, an inductor, and a resistor, i.e. one or more RLC components. It should also be noted that the at least one conductive laminate layer 350 and / or the one or more intermediate conductive laminate layers 351, 352, 380 may be modified compared to the embodiments shown in Figs. 3-4 in order to connect to, and provide for suitable electrical routes for, the at least one second passive electrical component 510.

[0048] Fig. 6 shows another cross-sectional view of embodiments of a lead frame package 300. The embodiments of the lead frame package 300 shown in Fig. 6 may be identical to the embodiments of the lead frame package 300 shown in Figs. 3-4 or the embodiments of the lead frame package 300 shown in Fig. 5, except that the at least one conductive laminate layer 350 is further electrically connected to at least one second active IC component 610. In some embodiments, and as shown in this example, the at least one second active IC component 610 may be a surface mounted component or Surface Mounted Device, SMD. According to some embodiments, the at least one second active IC component 610 may be a semi-conductor die or a flip-chip semiconductor die. Here, it should also be noted that the at least one second active IC component 610 may be electrically connected via solder balls 620 on its bottom side as exemplified in the example in Fig. 6. According to another example, the at least one second active IC component 610 may be electrically connected by suing with conventional copper pillar technology.

[0049] Fig. 7 shows another cross-sectional view of embodiments of a lead frame package 300. The embodiments of the lead frame package 300 shown in Fig. 6 may be identical to the embodiments of the lead frame package 300 shown in Figs. 3-4, the embodiments of the lead frame package 300 shown in Fig. 5, or the embodiments of the lead frame package 300 shown in Fig. 6, except that the at least one conductive laminate layer 350 is further electrically connected to at least one second active IC component 710. In some embodiments, and as shown in this example, the at least one second active IC component 160 may be an embedded die component 710. This means, for example, that the at least one second active IC component 160 may be embedded in between the at least one conductive laminate layer 350 and / or the one or more intermediate conductive laminate layers 351, 352, 380, as well as, the at least one dielectric laminate layer 360 and the one or more intermediate dielectric laminate layers 361, 362. According to some embodiments, the at least one second active IC component 710 may be a semi-conductor die or a flip-chip semiconductor die. It should also be noted that, in this case, by embedding the die component 710 in the at least one laminate sub-module 320 will further enhance the 3D nature of the lead frame package 300 and allow for a higher package density.

[0050] Examples of embodiments of manufacturing at least one lead frame package 300, will now be described with reference to the flowchart depicted in Fig. 8. Fig. 8 is an illustrated example of actions or operations which may be taken during manufacturing of a lead frame package 300 according to the embodiments described above with reference to Figs. 3-7. The method may comprise the following actions.

[0051] Action 801-801 b

[0052] As the first steps in the manufacturing process, a multiple lead frame array comprising the at least one lead frame 110, 120, as well as, a multiple laminate submodule array comprising at least one laminate sub-module 320 may be manufactured. Here, each of the at least one laminate sub-module 320 comprises at least one conductive laminate layer 350 arranged to provide at least one passive electrical component 410, 510, 610, 710, and a dielectric laminate layer 360 arranged in between the at least one conductive laminate layer 350 and the main pad 110 of the lead frame 100, 110, 120. Then, the manufacture multiple laminate sub-module array may be diced into each of the at least one laminate sub-module 320.

[0053] Action 802

[0054] After the manufacturing in Actions 801-801 b, at least one first active Integrated Circuit, IC, component 310 is attached electrically conductive to a main pad 110 of at least one lead frame 110, 120.

[0055] Action 803

[0056] Prior, simultaneously or after attaching the at least one first active Integrated Circuit, IC, component 310, at least one laminate sub-module 320 is attached electrically conductive to the main pad 110 of the at least one lead frame 110, 120. The at least one laminate sub-module 320 may here be one of the laminate sub-modules manufactured and diced in Actions 801a-801b. Hence, the at least one laminate sub-module 320 comprises at least one conductive laminate layer 350 is arranged to provide at least one passive electrical component 410, 510, 610, 710, and a dielectric laminate layer 360 arranged in between the at least one conductive laminate layer 350 and the main pad 110 of the lead frame 110,120.

[0057] Action 804

[0058] After the attachment of at least one first active Integrated Circuit, IC, component 310 and the at least one laminate sub-module 320 in Action 802-803, bond wire interconnects 340-342 is provided that electrically connects the at least one first active IC component 310 to one or more contact leads 120 of the at least one lead frame 110, 120 and / or to the at least one laminate sub-module 320. Similarly, bond wire interconnects 340-342 is provided that electrically connects the at least one conductive laminate layer 350 of the at least one laminate sub-module 320 to one or more contact leads 120 of the at least one lead frame 110, 120 and / or to the at least one first active IC component 310.

[0059] Action 805

[0060] After providing the bond wire interconnects 340-342 in Action 804, the at least one lead frame 110, 120 is covered in a plastic mold compound 390 to form the at least one lead frame package 300.

[0061] Action 806

[0062] After forming the lead frame package 300 in Action 805, the multiple lead frame package assembly may be diced into the at least one lead frame package 300.

[0063] Action 807

[0064] After dicing the multiple lead frame package assembly in Action 806, the at least one lead frame package 300 may be soldered onto a Printed Circuit Board, PCB 130.

[0065] The description of the example embodiments provided herein have been presented for purposes of illustration. The description is not intended to be exhaustive or to limit example embodiments to the precise form disclosed, and modifications and variations are possible in light of the above teachings or may be acquired from practice of various alternatives to the provided embodiments. The examples discussed herein were chosen and described in order to explain the principles and the nature of various example embodiments and its practical application to enable one skilled in the art to utilize the example embodiments in various manners and with various modifications as are suited to the particular use contemplated. The features of the embodiments described herein may be combined in all possible combinations of methods, apparatus, modules, systems, and computer program products. It should be appreciated that the example embodiments presented herein may be practiced in any combination with each other.

[0066] It should be noted that the word “comprising” does not necessarily exclude the presence of other elements or steps than those listed and the words “a” or “an” preceding an element do not exclude the presence of a plurality of such elements. It should further be noted that any reference signs do not limit the scope of the claims, that the example embodiments may be implemented at least in part by means of both hardware and software, and that several “means”, “units” or “devices” may be represented by the same item of hardware.

[0067] It should also be noted that the various example embodiments described herein are described in the general context of method steps or processes, which may be implemented in one aspect by a computer program product, embodied in a computer- readable medium, including computer-executable instructions, such as program code, executed by computers in networked environments. A computer-readable medium may include removable and non-removable storage devices including, but not limited to, Read Only Memory (ROM), Random Access Memory (RAM), compact discs (CDs), digital versatile discs (DVD), etc. Generally, program modules may include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. Computer-executable instructions, associated data structures, and program modules represent examples of program code for executing steps of the methods disclosed herein. The particular sequence of such executable instructions or associated data structures represents examples of corresponding acts for implementing the functions described in such steps or processes.

[0068] The embodiments herein are not limited to the above described preferred embodiments. Various alternatives, modifications and equivalents may be used. Therefore, the above embodiments should not be construed as limiting. ABBREVIATIONS

Claims

CLAIMS1. A lead frame package (300) for a Radio Frequency, RF, application, comprising a lead frame (100; 110; 120), at least one first active Integrated Circuit, IC, component (310) attached electrically conductive to a main pad (110) of the lead frame (100; 110; 120), and at least one laminate sub-module (320) attached electrically conductive to the main pad (110) of the lead frame (100; 110; 120), wherein the at least one laminate sub-module (320) comprises at least one conductive laminate layer (350) arranged to provide at least one passive electrical component (410; 510, 610, 710), and at least one dielectric laminate layer (360) arranged in between the at least one conductive laminate layer (350) and the main pad (110) of the lead frame (100; 110; 120).

2. The lead frame package (300) according to claim 1, wherein the at least one conductive laminate layer (350) further comprises one or more intermediate conductive laminate layers (351-352, 380) and the at least one dielectric laminate layer (360) comprises one or more intermediate dielectric laminate layers (360), wherein the one or more intermediate conductive laminate layers (351-352, 380) are separated by the one or more intermediate dielectric laminate layers (360) between the at least one conductive laminate layer (350) and the main pad (110) of the lead frame (100; 110; 120)3. The lead frame package (300) according to claim 2, wherein the at least one conductive laminate layer (350) and / or the one or more intermediate conductive laminate layers (351-352; 380) are arranged to form at least one first passive electrical component (410).

4. The lead frame package (300) according to claim 1-3, wherein the at least one first passive electrical component (410) comprises a passive electrical routing structure.

5. The lead frame package (300) according to any of claims 1-4, wherein the at least one conductive laminate layer (350) is electrically connected to at least one second passive electrical component (510).

6. The lead frame package (300) according to claim 5, wherein the at least one second passive electrical component is a surface mounted component (510).

7. The lead frame package (300) according to claim 5 or 6, wherein the at least one second passive electrical component (510) comprises one or more of: a capacitor, an inductor, and a resistor.

8. The lead frame package (300) according to any of claims 1-7, wherein the at least one conductive laminate layer (350) is electrically connected to at least one second active IC component (610, 710).

9. The lead frame package (300) according to claim 8, wherein the at least one second active IC component is a surface mounted component (610) or an embedded die component (710).

10. The lead frame package (300) according to claim 8 or 9, wherein the at least one first active IC component (310) is a semi-conductor chip, and the at least one second active IC component (610, 710) is a semi-conductor die or a flip-chip semiconductor die.

11. The lead frame package (300) according to any of claims 1-10, wherein the least one first active IC component (310) is soldered, or affixed via an electrically conductive epoxy, onto the main pad (110) of the lead frame (100; 110; 120).

12. The lead frame package (300) according to claim 2, or any one of claims 3-11 when dependent on claim 2, wherein one of the one or more intermediate conductive laminate layers (380) of the at least one laminate sub-module (320) is soldered, or affixed via an electrically conductive epoxy, onto the main pad (110) of the lead frame (100; 110; 120).

13. The lead frame package (300) according to any of claims 1-12, wherein the at least one conductive laminate layer (350) is electrically connected to one or more contact leads (120) of the lead frame (100; 110; 120) and / or to the at least one active IC component (310) via bond wire interconnects (340-342).

14. The lead frame package (300) according to claim 13, wherein the lead frame (100; 110; 120), the at least one first active IC component (310), the at least one laminate sub-module (320) and any bond wire interconnects (340-342) are covered in a plastic mold compound (390) to form the lead frame package (300).

15. A method of manufacturing at least one lead frame package (300), comprising attaching (802) at least one first active Integrated Circuit, IC, component (310) electrically conductive to a main pad (110) of at least one lead frame (100; 110; 120); attaching (803) at least one laminate sub-module (320) electrically conductive to the main pad (110) of the at least one lead frame (100; 110; 120), wherein the at least one laminate sub-module (320) comprises at least one conductive laminate layer (350) arranged to provide at least one passive electrical component (410; 510, 610, 710), and a dielectric laminate layer (360) arranged in between the at least one conductive laminate layer (350) and the main pad (110) of the lead frame (100; 110; 120); providing (804) bond wire interconnects (340) electrically connecting the at least one first active IC component (310) to one or more contact leads (120) of the at least one lead frame (100; 110; 120), and bond wire interconnects (341-342) electrically connecting the at least one conductive laminate layer (350) to one or more contact leads (120) of the at least one lead frame (100; 110; 120) and / or to the at least one active IC component (310); and covering (805) the at least one lead frame (100; 110; 120) in a plastic mold compound (390) to form the at least one lead frame package (300).

16. The method according to claim 15, comprising: manufacturing (801a) a multiple laminate sub-module array comprising at least one laminate sub-module (320), wherein each of the at least one laminate sub-module (320) comprises at least one conductive laminate layer (350) arranged to provide at least one passive electrical component (410; 510, 610, 710), and a dielectric laminate layer (360) arranged in between the at least one conductive laminate layer (350) and the main pad (110) of the lead frame (100; 110; 120); and dicing (801b) the at least one laminate sub-module (320) from the multiple laminate sub-module array.

17. The method according to claim 15 or 16, comprising: manufacturing (801) a multiple lead frame array comprising the at least one lead frame (100; 110; 120); and dicing (806) the at least one lead frame package (300) from a multiple lead frame package assembly.

18. The method according to claim 17, comprising: soldering (807) the at least one lead frame package (300) onto a Printed Circuit Board, PCB (130).

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