Package structure and preparation method therefor, and electronic device

Abstract

Provided in the present application are a package structure and a preparation method therefor, and an electronic device. The package structure comprises a glass substrate, a chip and an electrically conductive layer. The glass substrate has a first surface and a second surface opposite each other, and a first side face connected between the first surface and the second surface, the first side face being a convex face. The chip is connected to the first surface of the glass substrate; the chip comprises a second side face; the second side face of the chip and the first side face of the glass substrate are arranged on the same side, and the second side face is recessed relative to the first side face. The electrically conductive layer is connected to the second surface of the glass substrate; the electrically conductive layer comprises a third side face; the third side face and the first side face are arranged on the same side, and the third side face is recessed relative to the first side face. The embodiments of the present application can prevent delamination between the electrically conductive layer and the glass substrate, thereby improving the processing reliability of the package structure.

Description

Package structure and its fabrication method, electronic devices

[0001] This application claims priority to Chinese Patent Application No. 202410955029.9, filed on July 16, 2024, with the Chinese National Intellectual Property Administration, entitled “Packaging Structure and Preparation Method Thereof, Electronic Device”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of package structure, specifically to a package structure and its preparation method, and electronic devices. Background Technology

[0003] During the fabrication process, package structures typically require cutting a single board into multiple individual boards for assembly into electronic devices. Currently, during the cutting process, interface delamination easily occurs between the conductive layer and the substrate of the package structure, which may damage the circuit structure of the conductive layer and lead to circuit board failure. Summary of the Invention

[0004] The embodiments of this application provide a package structure and its preparation method, as well as an electronic device, which can reduce the number of cracks in the substrate of the package structure and improve the structural stability of the package structure.

[0005] In a first aspect, this application provides a package structure including a glass substrate, a chip, and a conductive layer. The glass substrate has opposing first and second surfaces, and a first side surface connected between the first and second surfaces, the first side surface being convex. The chip is connected to the first surface of the glass substrate, and the chip includes a second side surface, which is disposed on the same side as the first side surface of the glass substrate, and the second side surface is recessed relative to the first side surface. The conductive layer is connected to the second surface of the glass substrate, and the conductive layer includes a third side surface, which is disposed on the same side as the first side surface, and the third side surface is recessed relative to the first side surface.

[0006] In this embodiment, in the horizontal direction, there is a certain distance between the second side of the chip and the first side of the glass substrate. Therefore, the heat generated during the glass substrate cutting process is basically not transferred to the chip, avoiding interface separation between the chip and the glass substrate. In the horizontal direction, there is a certain distance between the third side of the conductive layer and the second side of the glass substrate. Therefore, the heat generated during the glass substrate cutting process is basically not transferred to the conductive layer, avoiding interface separation between the conductive layer and the glass substrate, improving the production yield of the package structure, increasing the production efficiency of the package structure, reducing material waste in the production process of the package structure, thereby saving production costs of raw materials, processing energy, and labor.

[0007] In one possible implementation, the first side surface includes a first chamfered surface and a second chamfered surface, the first chamfered surface and the second chamfered surface are arranged sequentially along the thickness direction of the glass substrate, and both the first chamfered surface and the second chamfered surface are curved surfaces;

[0008] The first chamfered surface is smoothly connected to the second chamfered surface, the side of the first chamfered surface away from the second chamfered surface is smoothly connected to the first surface, and the side of the second chamfered surface away from the first chamfered surface is smoothly connected to the second surface.

[0009] In this embodiment, the sharp edges of the glass substrate can be removed by the chamfered surface, thereby avoiding stress concentration at the sharp edges of the glass substrate. This prevents the glass substrate from cracking, breaking, or deforming due to the inability to evenly distribute stress at the sharp edges when subjected to external force.

[0010] Secondly, this application also provides a method for preparing a package structure, comprising:

[0011] An initial package structure is provided, the initial package structure includes an initial glass substrate, an initial chip layer and an initial conductive layer, the initial glass substrate has a first surface and a second surface opposite to each other along the thickness direction, the initial chip layer is connected to the first surface and the initial conductive layer is connected to the second surface;

[0012] The initial chip layer is cut to form a chip, and the cut surface of the chip is the second side surface;

[0013] The initial conductive layer is cut to form a conductive layer, and the cut surface of the conductive layer is the third side surface.

[0014] The initial glass substrate is cut to form a glass substrate. The cut surface of the glass substrate is the first side surface, which is connected between the first surface and the second surface. The first side surface is convex. The first side surface of the glass substrate is disposed on the same side as the second side surface of the chip and the third side surface of the conductive layer. The second side surface of the chip is recessed relative to the first side surface of the glass substrate, and the third side surface of the conductive layer is recessed relative to the first side surface of the glass substrate.

[0015] In this embodiment, the initial package structure can be understood as a single-board structure. A larger initial package structure may include multiple smaller package structure regions. During the manufacturing process, the initial package structure needs to be cut into multiple package structures for assembly into electronic devices.

[0016] During the initial package structure cutting process, a significant amount of heat accumulates at the cutting location between the cutting equipment and the initial package structure. Due to the different coefficients of thermal expansion between the initial chip layer, the initial conductive layer, and the initial glass substrate, the initial chip layer and the initial conductive layer may melt at high temperatures. After structural changes occur in the initial chip layer and the initial conductive layer, they are prone to delamination at the interface with the initial glass substrate. This results in unstable circuit structure in the cut package structure, affecting the accuracy and speed of signal transmission.

[0017] In the method for fabricating the package structure provided in this application embodiment, the initial chip layer and the initial conductive layer can be cut before cutting the initial glass substrate, and the initial chip layer is divided into multiple chips. The initial conductive layer is divided into multiple conductive layers. The separation positions can expose part of the surface of the initial glass substrate. During the cutting of the initial glass substrate, the surface of the initial glass substrate exposed by the separation grooves can be cut directly, so that the chips and conductive layers do not contact the cut positions of the initial glass substrate, avoiding heat transfer from the cut positions of the initial glass substrate to the chips and conductive layers. This also avoids interface separation between the chips and conductive layers and the glass substrate.

[0018] Improving the production yield of packaging structures, increasing the production efficiency of packaging structures, and reducing the waste of raw materials in the production process of packaging structures can save production costs of raw materials, processing energy, and labor.

[0019] In one possible implementation, dicing the initial chip layer to form a chip includes:

[0020] The initial chip layer is cut to form a first separation groove. The first separation groove penetrates the initial chip layer to expose a portion of the first surface of the initial glass substrate. The first separation groove separates the initial chip layer to form a chip.

[0021] Cutting the initial conductive layer to form the conductive layer includes:

[0022] The initial conductive layer is cut to form a second partition groove. The second partition groove penetrates the initial conductive layer to expose a portion of the second surface of the initial glass substrate. The second partition groove separates the initial conductive layer to form a conductive layer.

[0023] Cutting an initial glass substrate to form a glass substrate includes:

[0024] A third partition groove is formed by cutting the first surface exposed by the first partition groove, the depth of the third partition groove being less than the thickness of the initial glass substrate; and

[0025] A fourth partition groove is formed by cutting the second surface exposed by the second partition groove. The fourth partition groove is connected to the third partition groove. The third and fourth partition grooves separate the initial package structure to form the package structure.

[0026] In this embodiment, the glass substrate is cut once on each side. The depth of each cut partition groove (the third partition groove and the fourth partition groove) is less than the initial thickness of the glass substrate. For example, the depth of each cut partition groove (the third partition groove and the fourth partition groove) is greater than half the thickness of the initial glass substrate. Therefore, the cutting speed is relatively fast, and the opening position of the partition groove is subjected to force by the cutting equipment for a shorter time, so cracks are less likely to occur at the opening edge of the partition groove.

[0027] In one possible implementation, the preparation method further includes:

[0028] The wall of the third dividing groove is ground to form the first chamfered surface; and

[0029] The walls of the fourth dividing groove are polished to form a second chamfered surface.

[0030] In this embodiment, the walls of the first and third partition grooves are polished to form chamfers, so that the groove walls can be smoothly connected to the two surfaces in the thickness direction of the glass substrate. Polishing can eliminate the initial micro-cracks at the cut edge of the glass substrate. The smooth chamfer structure can reduce stress concentration problems and reduce the risk of glass cracking and crack propagation.

[0031] In one possible implementation, the opening width of the third dividing groove on the initial glass substrate surface is smaller than the minimum width of the first dividing groove.

[0032] In this embodiment, the walls of the first and third partition grooves are at a certain distance to provide operating space for the cutting equipment, avoid the cutting equipment from contacting the chip, and prevent the chip from being affected by the pressure of the cutting equipment, thus affecting its structural integrity.

[0033] In one possible implementation, the width of the third separator gradually decreases in the direction from the initial chip layer toward the initial glass substrate.

[0034] In this embodiment, the opposite walls of the third partition groove are also the first side surfaces of the two package structures. The gradually decreasing width of the third partition groove ensures that the first side surface can be convex, thereby maximizing the angle between the first side surface and the first surface and avoiding excessively sharp edges on the glass substrate.

[0035] In one possible implementation, grinding the wall of the third partition groove to form a first chamfered surface includes:

[0036] The wall of the third partition groove is polished using methods such as grinding wheels, sandpaper, or wet etching to form a first chamfered surface. In one possible implementation, forming the third partition groove by recessing the first surface exposed by the first partition groove includes:

[0037] The third partition groove is formed by recessing the first surface exposed by the first partition groove through methods such as knife cutting, laser cutting, or etching.

[0038] In one possible implementation, the depths of both the third and fourth partition grooves are greater than half the thickness of the initial glass substrate.

[0039] Thirdly, this application also provides an electronic device, including a circuit board and a package structure as described above, wherein the circuit board and the package structure are electrically connected. Attached Figure Description

[0040] To more clearly illustrate the technical solution of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0041] Figure 1 is a schematic diagram of the structure of the electronic device provided in an embodiment of this application;

[0042] Figure 2 is a cross-sectional schematic diagram of the package structure shown in Figure 1;

[0043] Figure 3 is a schematic diagram of the structure of the glass substrate shown in Figure 2;

[0044] Figure 4 is a flowchart illustrating the first method for preparing the package structure provided in this application embodiment;

[0045] Figure 5 is a cross-sectional view of the structure formed after S100 in the preparation method of the package structure.

[0046] Figure 6 is a cross-sectional view of the encapsulation structure after S300 in the preparation method of the encapsulation structure;

[0047] Figure 7 is a cross-sectional schematic diagram formed during the S400 process in the preparation method of the package structure;

[0048] Figure 8 is a cross-sectional view of the structure formed after S400 in the preparation method of the package structure;

[0049] Figure 9 is a flowchart illustrating the second method for preparing the package structure provided in the embodiments of this application;

[0050] Figure 10 is a cross-sectional schematic diagram of the package structure after step S500. Detailed Implementation

[0051] The specific embodiments of this application will now be described in more detail with reference to the accompanying drawings. Although exemplary embodiments of this application are shown in the drawings, it should be understood that this application may be implemented in other ways different from those described herein, and therefore, this application is not limited to these embodiments.

[0052] For ease of understanding, the terminology used in the embodiments of this application will be explained first.

[0053] Multiple: refers to two or more.

[0054] Connection: should be interpreted broadly. For example, the connection between A and B can be a direct connection between A and B, or an indirect connection between A and B through an intermediary.

[0055] The specific embodiments of this application will now be clearly described in conjunction with the accompanying drawings.

[0056] Please refer to Figure 1, which is a schematic diagram of the structure of an electronic device 100 provided in an embodiment of this application. The electronic device 100 includes a circuit board 10 and a package structure 20 (Printed Circuit Board, PCB). The circuit board 10 and the package structure 20 are electrically connected.

[0057] The electronic device 100 can be an electronic product such as a computer, network equipment, communication equipment, consumer electronic devices, medical devices, industrial control and automation equipment, automotive electronic products, aerospace equipment, or household appliances. This application does not limit the application scenarios of the electronic device.

[0058] The circuit board 10 provides electrical connections for the electronic components of the electronic device 100 to realize the circuit functions of the electronic device 100. The main function of the package structure 20 is to house, fix, seal, and protect the chip, as well as ensure the circuit stability of the chip.

[0059] In the conventional production process of package structures, several or dozens of individual package structure areas are typically pre-designed on a single board. The board is then cut to create multiple package structures, each of which can be used for assembly in electronic devices. However, during the cutting process, interface delamination can easily occur between the conductive layer of the package structure and the glass substrate. This can damage the circuit structure of the conductive layer, leading to package structure failure.

[0060] Based on this, please refer to Figure 2, which is a cross-sectional schematic diagram of the package structure 20 shown in Figure 1. The package structure 20 provided in this application can avoid interface delamination between the conductive layer and the glass substrate.

[0061] The package structure 20 may include a glass substrate 21, a chip 22, and a conductive layer 23. The chip 22 and the conductive layer 23 are respectively connected to opposite sides of the glass substrate 21 in the thickness direction.

[0062] It should be noted that Figure 2 is intended only to schematically illustrate the connection relationship between the glass substrate 21, the chip 22, and the conductive layer 23, and is not intended to specifically limit the connection positions, specific structures, or quantities of each device. Furthermore, the structures illustrated in the embodiments of this application do not constitute a specific limitation on the package structure 20. In other embodiments of this application, the package structure 20 may include more or fewer components than illustrated, or combine certain components, or split certain components, or have different component arrangements.

[0063] In this embodiment, the glass substrate 21 serves as the base structure of the package structure 20, primarily providing support. The glass substrate 21 provides a stable mounting position for the chip 22 within the package structure 20. The glass substrate 21 generally possesses excellent thermal stability and high mechanical strength, maintaining stability under high temperature and high humidity environments, thus reducing the failure rate of electronic components. Simultaneously, the glass substrate 21 can also reduce mutual interference between electronic components, lowering noise and electromagnetic radiation from these components.

[0064] Please refer to Figures 2 and 3. Figure 3 is a schematic diagram of the structure of the glass substrate 21 shown in Figure 2. The glass substrate 21 includes a first surface 211, a second surface 212, and a first side surface 213. The first surface 211 and the second surface 212 are opposite each other in the thickness direction of the glass substrate 21. The first side surface 213 connects the edge of the first surface 211 and the edge of the second surface 212. The first side surface 213 is convex. Specifically, the first side surface 213 is the cut side surface of the glass substrate 21 of each package structure 20 after the whole plate is cut into multiple package structures 20. The glass substrate 21 can be approximately rectangular, and two of the four sides of the glass substrate 21 can be cut surfaces. Each cut surface can be convex. The structure of each cut surface can be described in the following description of the structure of the first side surface 213. Alternatively, three of the four sides of the glass substrate 21 can be cut surfaces. Or, all sides of the glass substrate 21 can be cut surfaces. Or, one side of the glass substrate 21 can be a cut surface. The position and number of the cut surfaces of the glass substrate 21 can be set according to the cutting method required in the actual production process. This application does not impose specific restrictions on the position and number of the cut surfaces of the glass substrate 21.

[0065] The first side surface 213 of the glass substrate 21 includes a first chamfered surface 2131 and a second chamfered surface 2132. The first chamfered surface 2131 and the second chamfered surface 2132 are sequentially arranged along the thickness direction of the glass substrate 21, with the first chamfered surface 2131 inclined relative to the second chamfered surface 2132. The included angle between the first chamfered surface 2131 and the second chamfered surface 2132 can be an obtuse angle. The side of the first chamfered surface 2131 away from the second chamfered surface 2132 is connected to the edge of the first surface 211. The included angle between the first chamfered surface 2131 and the first surface 211 can be an obtuse angle. The side of the second chamfered surface 2132 away from the first chamfered surface 2131 is connected to the edge of the second surface 212. The included angle between the second chamfered surface 2132 and the second surface 212 can be an obtuse angle.

[0066] In this embodiment, the glass substrate 21 can remove the sharp edges of the glass substrate 21 by using a chamfered surface, thereby avoiding stress concentration at the sharp edge of the glass substrate 21 and preventing the glass substrate 21 from cracking, breaking or deforming due to the inability to evenly distribute stress at the sharp edge when subjected to external force.

[0067] In some possible embodiments, the first chamfered surface 2131 and the second chamfered surface 2132 can be curved surfaces. The first chamfered surface 2131 and the second chamfered surface 2132 can be smoothly connected. The first chamfered surface 2131 can be smoothly connected to the first surface 211. The second chamfered surface 2132 can be smoothly connected to the second surface 212.

[0068] The first chamfered surface 2131 and the second chamfered surface 2132 can be formed by grinding. During the grinding process of the first side surface 213 of the glass substrate 21, cracks generated at the edge of the glass substrate 21 during the cutting process can be removed, preventing crack propagation in the package structure 20 during further high-temperature processing or use, which would affect the structural strength of the package structure 20. At the same time, removing the sharp edges of the glass substrate 21 can also avoid stress concentration at the edge of the glass substrate 21, further improving the structural stability of the glass substrate 21.

[0069] Referring again to Figure 2, chip 22 is connected to the first surface 211 of glass substrate 21. Chip 22 includes a second side surface 221. The second side surface 221 is the cut side surface of chip 22 after the whole board is cut into multiple package structures 20. The second side surface 221 of chip 22 is located on the same side of package structure 20 as the first side surface 213, and the second side surface 221 is recessed relative to the first side surface 213. The second side surface 221 is spaced apart from the first chamfered surface 2131. Wherein, the second side surface 221 of chip 22 is recessed relative to the first side surface 213 of glass substrate 21, which means that glass substrate 21 extends further than chip 22 in the horizontal direction. Chip 22 is connected to the middle region of glass substrate 21, and the edge of chip 22 and glass substrate 21 are a certain distance apart in the horizontal direction.

[0070] Currently, during the glass substrate cutting process, the cutting tool acts on the cutting location of the glass substrate, and the cutting process generally generates heat. The accumulation of heat at the cutting location of the glass substrate leads to localized overheating of the glass substrate. Because the thermal expansion coefficients of the glass substrate and the chip are different, the chip is prone to melting after being heated, resulting in interface delamination with the glass substrate. This causes instability in the circuit structure of the package structure, affecting the accuracy and speed of signal transmission.

[0071] In this embodiment, there is a certain distance between the second side 221 of the chip 22 and the first side 213 of the glass substrate 21 in the horizontal direction. Therefore, the heat generated during the cutting process of the glass substrate 21 is basically not transferred to the chip 22, avoiding interface separation between the chip 22 and the glass substrate 21, improving the production yield of the package structure 20, increasing the production efficiency of the package structure 20, reducing the waste of raw materials in the production process of the package structure 20, thereby saving production costs of raw materials, processing energy and labor.

[0072] The conductive layer 23 is a metal layer in the package structure 20 used for circuit connection and signal transmission. The conductive layer 23 is connected to the second surface 212 of the glass substrate 21. Exemplarily, the conductive layer 23 can be a redistribution layer (RDL) or an electroplated metal layer. The RDL can redistribute the circuitry on the chip 22 to match external connection points. The RDL can achieve complex circuit redistribution to adapt to different packaging requirements. The electroplated metal layer provides reliable electrical connection between the chip 22 and external circuitry. It should be noted that the number and type of conductive layers 23 in this embodiment are merely illustrative. In all other embodiments, the number of conductive layers 23 can be multiple, and the type of conductive layer 23 can be any conductive film structure in the package structure 20.

[0073] The conductive layer 23 includes a third side surface 231. The third side surface 231 is the cut side surface of the conductive layer 23 after the whole board is cut into multiple package structures 20. The third side surface 231 and the second side surface 221 are located on the same side of the package structure 20, and the third side surface 231 is recessed relative to the second side surface 221. The third side surface 231 and the second chamfered surface 2132 are spaced apart.

[0074] In this embodiment, there is a certain distance between the third side 231 of the conductive layer 23 and the second side 221 of the glass substrate 21 in the horizontal direction. Therefore, the heat generated during the cutting process of the glass substrate 21 is basically not transferred to the conductive layer 23, avoiding interface separation between the conductive layer 23 and the glass substrate 21, improving the production yield of the package structure 20, increasing the production efficiency of the package structure 20, reducing the waste of raw materials in the production process of the package structure 20, thereby saving production costs of raw materials, processing energy and labor.

[0075] Please refer to Figure 4, which is a flowchart illustrating the first method for fabricating the package structure 20 provided in this application embodiment. This application also provides a method for fabricating the package structure 20. This method is used to fabricate the package structure 20 described above. The fabrication method provided in this application embodiment can reduce the occurrence of interface delamination in the package structure 20. The fabrication method includes, but is not limited to, steps S100, S200, S300, S400, and S500. A detailed description of steps S100, S200, S300, S400, and S500 is as follows. Step S100 will be described below with reference to Figure 5, which is a cross-sectional view formed after step S100 in the method for fabricating the package structure 20.

[0076] S100: Provide an initial package structure 200, the initial package structure 200 includes an initial glass substrate 210, an initial chip layer 220 and an initial conductive layer 230, the initial glass substrate 210 has a first surface 211 and a second surface 212 opposite to each other along the thickness direction, the initial chip layer 220 is connected to the first surface 211 and the initial conductive layer 230 is connected to the second surface 212.

[0077] Steps S200 and S300 will be described below with reference to Figure 6, which is a cross-sectional view of the package structure 20 after step S300.

[0078] S200: Cut the initial chip layer 220 to form chip 22, the cut surface of chip 22 is the second side surface 221.

[0079] Specifically, cutting the initial chip layer 220 to form the chip 22 includes: cutting the initial chip layer 220 to form a first partition groove 2200, the first partition groove 2200 penetrating the initial chip layer 220 to expose a portion of the first surface 211 of the initial glass substrate 210, and the first partition groove 2200 separating the initial chip layer 220 to form the chip 22.

[0080] The first separation groove 2200 can be formed on the initial chip layer 220 by means of knife cutting, laser cutting, dry etching or wet etching.

[0081] S300: Cut the initial conductive layer 230 to form a conductive layer 23, the cut surface of the conductive layer 23 being the third side surface 231.

[0082] The step of cutting the initial conductive layer 230 to form the conductive layer 23 includes:

[0083] The initial conductive layer 230 is cut to form a second partition groove 2300. The second partition groove 2300 penetrates the initial conductive layer 230 to expose a portion of the second surface 212 of the initial glass substrate 210. The second partition groove 2300 separates the initial conductive layer 230 to form a conductive layer 23.

[0084] The second partition groove 2300 can be formed on the initial conductive layer 230 by means of knife cutting, laser cutting, dry etching or wet etching.

[0085] Step S400 will be described below with reference to Figures 7 and 8. Figure 7 is a cross-sectional view formed during step S400 in the method for fabricating the package structure 20. Figure 8 is a cross-sectional view formed after step S400 in the method for fabricating the package structure 20.

[0086] S400: Cut the initial glass substrate 210 to form a glass substrate 21. The cut surface of the glass substrate 21 is the first side surface 213. The first side surface 213 is connected between the first surface 211 and the second surface 212. The first side surface 213 is a convex surface. The first side surface 213 of the glass substrate 21 is disposed on the same side as the second side surface 221 of the chip 22 and the third side surface 231 of the conductive layer 23. The second side surface 221 of the chip 22 is recessed relative to the first side surface 213 of the glass substrate 21, and the third side surface 231 of the conductive layer 23 is recessed relative to the first side surface 213 of the glass substrate 21.

[0087] The step of cutting the initial glass substrate 210 to form the glass substrate 21 includes:

[0088] A third partition groove 2101 is formed by cutting the first surface 211 exposed by the first partition groove 2200, the depth of the third partition groove 2101 being less than the thickness of the initial glass substrate 210; and

[0089] A fourth partition groove 2102 is formed by cutting the second surface 212 exposed by the second partition groove 2300. The fourth partition groove 2102 communicates with the third partition groove 2101. The third partition groove 2101 and the fourth partition groove 2102 separate the initial package structure 200 to form the package structure 20.

[0090] The depth of the third dividing groove 2101 is less than the thickness of the initial glass substrate 210.

[0091] In this embodiment, the initial package structure 200 can be understood as a single-board structure. The larger initial package structure 200 may include multiple smaller package structure 20 regions. During the manufacturing process, the initial package structure 200 needs to be cut into multiple package structures 20 for assembly and use by the electronic device 100.

[0092] During the initial package structure cutting process, a significant amount of heat accumulates at the cutting location between the cutting equipment and the initial package structure. Due to the different coefficients of thermal expansion between the initial chip layer, the initial conductive layer, and the initial glass substrate, the initial chip layer and the initial conductive layer may melt at high temperatures. After structural changes occur in the initial chip layer and the initial conductive layer, they are prone to delamination at the interface with the initial glass substrate. This results in unstable circuit structure in the cut package structure, affecting the accuracy and speed of signal transmission.

[0093] In the method for fabricating the package structure 20 provided in this application embodiment, the initial chip layer 220 and the initial conductive layer 230 can be cut before cutting the initial glass substrate 210. The cut initial chip layer 220 forms a first partition groove 2200, which divides the initial chip layer 220 into multiple chips 22. The initial conductive layer 230 is divided into multiple conductive layers 23 by a second partition groove 2300. The first partition groove 2200 and the second partition groove 2300 can expose a portion of the surface of the initial glass substrate 210. During the cutting of the initial glass substrate 210, the surface of the initial glass substrate 210 exposed by the partition groove can be cut directly, so that the chips 22 and the conductive layer 23 do not contact the cut position of the initial glass substrate 210, thus avoiding heat transfer from the cut position of the initial glass substrate 210 to the chips 22 and the conductive layer 23. This also prevents interface separation between the chips 22 and the conductive layer 23 and the glass substrate 21.

[0094] Improve the production yield of the package structure 20, increase the production efficiency of the package structure 20, and reduce the waste of raw materials in the production process of the package structure 20, thereby saving production costs of raw materials, processing energy and labor.

[0095] In this embodiment, the glass substrate 21 is cut once on each side. The depth of the dividing grooves (third dividing groove 2101 and fourth dividing groove 2102) cut in each step is less than the thickness of the initial glass substrate 210. For example, the depth of the dividing grooves (third dividing groove 2101 and fourth dividing groove 2102) cut in each step is greater than half the thickness of the initial glass substrate 210. Therefore, the cutting speed is relatively fast, and the opening position of the dividing groove is subjected to force by the cutting equipment for a shorter time, so cracks are less likely to occur at the opening edge of the dividing groove.

[0096] The following will describe each step in more detail.

[0097] S400: Cut the initial glass substrate 210 to form a glass substrate 21. The cut surface of the glass substrate 21 is the first side surface 213. The first side surface 213 is connected between the first surface 211 and the second surface 212. The first side surface 213 is a convex surface. The first side surface 213 of the glass substrate 21 is disposed on the same side as the second side surface 221 of the chip 22 and the third side surface 231 of the conductive layer 23. The second side surface 221 of the chip 22 is recessed relative to the first side surface 213 of the glass substrate 21, and the third side surface 231 of the conductive layer 23 is recessed relative to the first side surface 213 of the glass substrate 21.

[0098] The step of cutting the initial glass substrate 210 to form the glass substrate 21 includes:

[0099] A third partition groove 2101 is formed by cutting the first surface 211 exposed by the first partition groove 2200, the depth of the third partition groove 2101 being less than the thickness of the initial glass substrate 210; and

[0100] A fourth partition groove 2102 is formed by cutting the second surface 212 exposed by the second partition groove 2300. The fourth partition groove 2102 communicates with the third partition groove 2101. The third partition groove 2101 and the fourth partition groove 2102 separate the initial package structure 200 to form the package structure 20. Specifically, the opening width of the third partition groove 2101 on the surface of the initial glass substrate 210 is smaller than the minimum width of the first partition groove 2200. The width of the third partition groove 2101 gradually decreases in the direction from the initial chip layer 220 toward the initial glass substrate 210. The third partition groove 2101 can be formed on the initial glass substrate 210 by methods such as knife cutting, laser cutting, dry etching, or wet etching.

[0101] In this embodiment, during the cutting of the initial glass substrate 210, the cutting position of the initial glass substrate 210 is at a certain distance from the chip 22, thereby further preventing the heat of the initial glass substrate 210 from being transferred to the chip 22 during the cutting process, and preventing the chip 22 from melting and separating from the glass substrate 210 at the interface.

[0102] The gradually decreasing width of the third dividing groove 2101 can make the angle between the groove wall of the third dividing groove 2101 and the surface of the glass substrate 21 larger, thus avoiding sharp corners on the glass substrate 21. This prevents stress concentration at the sharp edges of the glass substrate 21 and avoids the glass substrate 21 from cracking, breaking, or plastic deformation due to the inability to evenly distribute stress at the sharp edges when subjected to external force.

[0103] The fourth partition groove 2102 can be formed on the initial glass substrate 210 by methods such as knife cutting, laser cutting, dry etching, or wet etching. The depth of the fourth partition groove 2102 is less than the thickness of the initial glass substrate 210. For example, the depth of the fourth partition groove 2102 can be greater than half the thickness of the initial glass substrate 210.

[0104] The opening width of the fourth partition groove 2102 on the surface of the initial glass substrate 210 is smaller than the minimum width of the second partition groove 2300. The width of the fourth partition groove 2102 gradually decreases in the direction from the initial chip layer 220 toward the initial glass substrate 210.

[0105] Please refer to Figure 9, which is a schematic flowchart of the second preparation method of the package structure 20 provided in the embodiment of this application. The contents that are the same as those in the first preparation method will not be repeated. The difference between the first preparation method and the first preparation method is that, in addition to S100, S200, S300 and S400, the preparation method of the package structure 20 may also include at least S500, which is described in detail below.

[0106] Step S500 will be described below with reference to Figure 10, which is a cross-sectional view of the preparation method of the package structure 20 after step S500.

[0107] S500: Grind the wall of the third partition groove 2101 to form a first chamfered surface 2131, and grind the wall of the fourth partition groove 2102 to form a second chamfered surface 2132.

[0108] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A package structure, characterized by, The glass substrate has opposite first and second surfaces and a first side surface connecting between the first and second surfaces, the first side surface being convex; The chip is connected to the first surface of the glass substrate, the chip including a second side surface, the second side surface of the chip being disposed on the same side as the first side surface of the glass substrate, the second side surface being recessed relative to the first side surface; The conductive layer is connected to the second surface of the glass substrate, the conductive layer including a third side surface, the third side surface of the conductive layer being disposed on the same side as the first side surface of the glass substrate, the third side surface being recessed relative to the first side surface. The first side surface includes a first chamfered surface and a second chamfered surface, the first chamfered surface and the second chamfered surface being sequentially disposed along a thickness direction of the glass substrate, the first chamfered surface and the second chamfered surface each being arc-shaped; 2. The package structure of claim 1, wherein, The first chamfered surface and the second chamfered surface are smoothly connected, one side of the first chamfered surface away from the second chamfered surface being smoothly connected to the first surface, one side of the second chamfered surface away from the first chamfered surface being smoothly connected to the second surface. The glass substrate has opposite first and second surfaces and a first side surface connecting between the first and second surfaces, the first side surface being convex; 3. A method for preparing a package structure, characterized in that, The chip is connected to the first surface of the glass substrate, the chip including a second side surface, the second side surface of the chip being disposed on the same side as the first side surface of the glass substrate, the second side surface being recessed relative to the first side surface; The conductive layer is connected to the second surface of the glass substrate, the conductive layer including a third side surface, the third side surface of the conductive layer being disposed on the same side as the first side surface of the glass substrate, the third side surface being recessed relative to the first side surface. The first side surface includes a first chamfered surface and a second chamfered surface, the first chamfered surface and the second chamfered surface being sequentially disposed along a thickness direction of the glass substrate, the first chamfered surface and the second chamfered surface each being arc-shaped; The first chamfered surface and the second chamfered surface are smoothly connected, one side of the first chamfered surface away from the second chamfered surface being smoothly connected to the first surface, one side of the second chamfered surface away from the first chamfered surface being smoothly connected to the second surface. The glass substrate has opposite first and second surfaces and a first side surface connecting between the first and second surfaces, the first side surface being convex; 4. The method of claim 3, wherein The chip is connected to the first surface of the glass substrate, the chip including a second side surface, the second side surface of the chip being disposed on the same side as the first side surface of the glass substrate, the second side surface being recessed relative to the first side surface; The conductive layer is connected to the second surface of the glass substrate, the conductive layer including a third side surface, the third side surface of the conductive layer being disposed on the same side as the first side surface of the glass substrate, the third side surface being recessed relative to the first side surface. The first side surface includes a first chamfered surface and a second chamfered surface, the first chamfered surface and the second chamfered surface being sequentially disposed along a thickness direction of the glass substrate, the first chamfered surface and the second chamfered surface each being arc-shaped; The first chamfered surface and the second chamfered surface are smoothly connected, one side of the first chamfered surface away from the second chamfered surface being smoothly connected to the first surface, one side of the second chamfered surface away from the first chamfered surface being smoothly connected to the second surface. ​ ​ A fourth separation groove is formed by cutting the second surface exposed by the second separation groove, the fourth separation groove being in communication with the third separation groove, the third separation groove and the fourth separation groove separating the initial package structure to form the package structure.

5. The method of claim 4, wherein The preparation method further comprises: polishing the groove wall of the third separation groove to form a first chamfered surface; and polishing the groove wall of the fourth separation groove to form a second chamfered surface.

6. The production method according to claim 4 or 5, characterized by, The opening width of the third separation groove at the initial glass substrate surface is less than the minimum width of the first separation groove.

7. The production method according to claim 6, characterized by, The width of the third separation groove gradually decreases in the direction of the initial chip layer towards the initial glass substrate.

8. The production method according to claim 7, characterized by, The forming of the third separation groove by cutting the first surface exposed by the first separation groove comprises: The forming of the third separation groove by cutting the first surface exposed by the first separation groove comprises:

9. The production method according to claim 3 or 4, characterized by, The third separation groove and the fourth separation groove each have a depth greater than half the thickness of the initial glass substrate.

10. An electronic device, comprising: A circuit board and the package structure as claimed in any one of claims 1 or 2 are electrically connected.

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