Memory access method and system for virtual machine, and pass-through device

Abstract

Provided in the embodiments of the present disclosure are a memory access method and system for a virtual machine, and a pass-through device. The memory access method for a virtual machine is applied to a pass-through device for the virtual machine, wherein a device memory management unit is configured on the pass-through device, and a system memory management unit is configured on a host of the virtual machine. The method comprises: receiving a memory access command, which carries a guest virtual address to be accessed; driving a device memory management unit to access a system memory management unit, so as to perform address translation on said guest virtual address to determine a host physical address to be accessed; and a pass-through device accessing a memory of a virtual machine on the basis of said host physical address. By means of dual memory management units, the translation from a guest virtual address to a host physical address is realized, thereby reducing the complexity of address translation.

Description

Virtual machine memory access methods, systems, and passthrough devices

[0001] This disclosure claims priority to Chinese Patent Application No. 202410976859.X, filed on July 19, 2024, entitled “Memory Access Method, System and Passthrough Device for Virtual Machines”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to the field of computer technology, and in particular to a method, system, and pass-through device for accessing memory in a virtual machine. Background Technology

[0003] The host computer connects PCI devices to the host CPU (Central Processing Unit) via the Peripheral Component Interconnect (PCI) standard. In general-purpose computing, when the host CPU and PCI devices interact with each other, the PCI devices are usually addressed using physical addresses (PA). However, virtual machines are a type of heterogeneous computing that uses virtual addresses (VA) to allow the host CPU and PCI devices to interact directly with each other using virtual addresses within the same address space. The PCI device initiates memory access using virtual addresses.

[0004] In existing technologies, the IOMMU (input / output memory management unit) in a virtual machine (VM) is used to simulate a PCI device. The GPA (Guest Physical Address) address of the virtual machine is written into the first-level page table of the IOMMU in the host machine (Server). The first-level and second-level page tables of the host machine's IOMMU are used to realize the conversion from GVA (Guest Virtual Address) to HPA (Host Physical Address).

[0005] However, the above method requires the use of the IOMMU in the virtual machine to simulate PCI devices from different manufacturers and models, which is highly complex. This results in a high complexity in translating the virtual machine virtual address (GVA) into the host physical address (HPA), and it is not compatible with different manufacturers and models. Summary of the Invention

[0006] In view of the above, this disclosure provides a method for accessing virtual machine memory. One or more embodiments of this disclosure also relate to a virtual machine memory access system, another virtual machine memory access method, a pass-through device, a computer-readable storage medium, and a computer program product, to address the technical deficiencies existing in the prior art.

[0007] According to a first aspect of the present disclosure, a memory access method for a virtual machine is provided, applied to a passthrough device of the virtual machine, wherein a device memory management unit is configured on the passthrough device, and a system memory management unit is configured on the host machine of the virtual machine; the method includes:

[0008] Receive a memory access command, wherein the memory access command carries the virtual address of the virtual machine to be accessed;

[0009] The device memory management unit is driven to access the system memory management unit to perform address translation on the virtual address of the virtual machine to be accessed and determine the physical address of the host to be accessed.

[0010] Access the virtual machine's memory based on the physical address of the host to be accessed.

[0011] According to a second aspect of the present disclosure, a method for accessing the memory of a virtual machine is provided, applied to a host machine of the virtual machine, wherein a system memory management unit is configured on the host machine of the virtual machine, and a device memory management unit is configured on the passthrough device of the virtual machine; the method includes:

[0012] Send a memory access command to the pass-through device;

[0013] The memory access command carries the virtual address of the virtual machine to be accessed. The memory access command is used to instruct the passthrough device to drive the device memory management unit to access the system memory management unit in order to perform address translation on the virtual address of the virtual machine to be accessed and determine the physical address of the host to be accessed. The physical address of the host to be accessed is used by the passthrough device to access the memory of the virtual machine.

[0014] According to a third aspect of the present disclosure, a virtual machine memory access system is provided, including a host machine, a virtual machine running on the host machine, and a passthrough device for the virtual machine; the host machine is configured with a system memory management unit, and the passthrough device is configured with a device memory management unit;

[0015] The virtual machine is configured to send a memory access command to the pass-through device, wherein the memory access command carries the virtual address of the virtual machine to be accessed;

[0016] The pass-through device is configured to drive the device memory management unit to access the system memory management unit to perform address translation on the virtual address of the virtual machine to be accessed, determine the physical address of the host to be accessed, and access the memory of the virtual machine according to the physical address of the host to be accessed.

[0017] According to a fourth aspect of the present disclosure, a pass-through device is provided, including: a device memory management unit and a processor;

[0018] The processor is used to receive memory access commands and drive the device memory management unit, wherein the memory access command carries the virtual address of the virtual machine to be accessed;

[0019] The device memory management unit is used to access the system memory management unit to perform address translation on the virtual address of the virtual machine to be accessed and determine the physical address of the host to be accessed. The system memory management unit is the memory management unit configured on the host machine of the virtual machine.

[0020] The processor is also configured to access the virtual machine's memory based on the physical address of the host to be accessed.

[0021] According to a fifth aspect of the present disclosure, a computer-readable storage medium is provided that stores a computer program / instructions that, when executed by a processor, implement the steps of the memory access method of the virtual machine described above.

[0022] According to a sixth aspect of the present disclosure, a computer program product is provided, including a computer program / instructions that, when executed by a processor, implement the steps of the memory access method of the virtual machine described above.

[0023] One embodiment of this disclosure provides a method for accessing virtual machine memory. A system memory management unit (MMU) is configured on the virtual machine's host machine, and a device memory management unit (DMU) is configured on the passthrough device. Using the DMU and MMU, the virtual machine virtual address in the memory access command is translated into the host physical address to be accessed. By using dual memory management units in the virtual machine's host machine and the passthrough device, the translation from virtual machine virtual address to host physical address in device passthrough mode is achieved. This eliminates the need to use the virtual machine's memory management unit to simulate the device, reducing the complexity of the virtual machine virtual address to host physical address translation. It is compatible with various manufacturers and machine models, and since most host machines can perform virtual machine physical address to host physical address translation, no cumbersome modifications to the host machine are required, ensuring compatibility with older machine models. Attached Figure Description

[0024] Figure 1 is a schematic diagram of the processing procedure of a memory access method provided in an embodiment of this disclosure;

[0025] Figure 2 is a flowchart of a virtual machine memory access method provided in an embodiment of this disclosure;

[0026] Figure 3 illustrates a nested multi-level page table lookup process according to an embodiment of this disclosure.

[0027] Figure 4 is a schematic diagram of the processing procedure of a virtual machine memory access method provided in an embodiment of this disclosure;

[0028] Figure 5 is a flowchart of another virtual machine memory access method provided in an embodiment of this disclosure;

[0029] Figure 6 is a schematic diagram of the structure of a virtual machine memory access system provided in an embodiment of this disclosure;

[0030] Figure 7 is a structural block diagram of a through-pass device provided in an embodiment of this disclosure. Detailed Implementation

[0031] Numerous specific details are set forth in the following description to provide a full understanding of this disclosure. However, this disclosure can be implemented in many other ways than those described herein, and those skilled in the art can make similar extensions without departing from the spirit of this disclosure. Therefore, this disclosure is not limited to the specific implementations disclosed below.

[0032] The terminology used in one or more embodiments of this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the one or more embodiments of this disclosure. The singular forms “a” and “the” as used in one or more embodiments of this disclosure and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in one or more embodiments of this disclosure refers to and includes any or all possible combinations of one or more associated listed items.

[0033] It should be understood that although the terms first, second, etc., may be used to describe various information in one or more embodiments of this disclosure, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, first may also be referred to as second without departing from the scope of one or more embodiments of this disclosure, and similarly, second may also be referred to as first. Depending on the context, the word “if” as used herein may be interpreted as “when”, “in response to a determination”, or “when…”.

[0034] Furthermore, it should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in one or more embodiments of this disclosure are all information and data authorized by the user or fully authorized by all parties. Moreover, the collection, use and processing of related data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation entry points are provided for users to choose to authorize or refuse.

[0035] First, the terms and concepts involved in one or more embodiments of this disclosure will be explained.

[0036] The Input / Output Memory Management Unit (IOMMU), also known as the Input / Output Memory Management Unit, manages device access to system memory. Located between peripheral devices and the host, it translates addresses requested by devices into system memory addresses and checks the appropriate permissions for each access. It allows system devices to address in virtual memory, mapping virtual memory addresses to physical memory addresses, enabling physical devices to operate in a virtual memory environment. This helps the system expand its memory capacity and improve performance.

[0037] Hypervisor: A hypervisor is an intermediate software layer that runs between a physical server and an operating system, allowing multiple operating systems and applications to share hardware. It is also called a Virtual Machine Monitor (VMM). The hypervisor is the core of all virtualization technologies, and its basic function is to support non-disruptive migration of multiple workloads.

[0038] Peripheral Component Interconnect (PCI): Also known as peripheral device interconnect, PCI is a local parallel bus standard. It is the most widely used interface in personal computers, and almost all motherboards have this slot. Structurally, PCI is a bus inserted between the CPU supplier and the original system bus. A bridge circuit manages this layer and provides the interface between the upper and lower layers to coordinate data transmission. From its inception to the present day, the PCI bus has become a standard bus in computers, a new standard for local buses, and is widely used in current high-end microcomputers, workstations, and portable microcomputers.

[0039] PCIe DMA (Peripheral Component Interconnect Express Direct Memory Access) refers to the process under the PCI Express bus architecture where external devices (such as graphics cards, network cards, hard drive controllers, etc.) can directly transfer data with system memory without CPU intervention to handle each data transfer operation. This is a high-speed, efficient data transfer method, especially suitable for scenarios involving the transfer of large amounts of continuous data. PCIe is a high-speed interface standard used to connect various external devices on the computer motherboard. Compared to earlier PCI and PCI-X buses, PCIe offers higher bandwidth, lower latency, and more flexible expansion capabilities, and is widely used in modern computer systems. DMA is a technology that allows peripherals to directly transfer data between the system memory and the device, bypassing the CPU as an intermediary, thus significantly improving data transfer speed and reducing the CPU's workload. During DMA operations, the CPU can perform other tasks without participating in data transfer, only performing necessary control at the start and end of the DMA transfer.

[0040] Virtual Machine (VM): Virtual machine technology is a type of virtualization technology. Virtualization technology transforms things from one form to another. The most common virtualization technology is memory virtualization in operating systems. In actual operation, the memory space required by users may be far greater than the physical machine's memory size. Using memory virtualization technology, users can virtualize a portion of the hard drive as memory, and this is transparent to the user. That is, a complete computer system with full hardware system functions, running in a completely isolated environment, is simulated through software. Any work that can be done on a physical computer can also be done in a virtual machine. When creating a virtual machine, a portion of the physical machine's hard drive and memory capacity needs to be used as the virtual machine's hard drive and memory capacity.

[0041] Memory virtualization technology is designed to provide virtual machines with a contiguous physical memory space, effectively isolating, scheduling, and sharing memory resources between virtual machines. Memory virtualization technology primarily involves the translation from the virtual machine's virtual address (Guest Virtual Address, GVA) to the virtual machine's physical address (Guest Physical Address, GPA) to the host's physical address (HPA).

[0042] Guest Virtual Address (GVA): This is the memory space seen by processes inside a virtual machine. The virtual machine's operating system provides the GVA to processes or applications running on the virtual machine's operating system.

[0043] Host Virtual Address (HVA): The memory space seen by processes on the host machine. The host operating system provides the HVA to processes or software on the operating system for use.

[0044] Guest Physical Address (GPA): This is the hardware address seen by processes inside the virtual machine; they perceive it as physical memory.

[0045] Host Physical Address (HPA): This is the memory and hard disk address seen by the operating system on the host machine.

[0046] Shared virtual memory (SVM): In a multi-machine system, a storage system that maps virtual addresses to physical addresses in the main memory of each node through a virtual-to-physical address mapping mechanism. SVM technology allows different GPU devices to share memory space, thereby enabling efficient cross-device data transfer and collaborative computing.

[0047] Unified Virtual Memory (UVM) is a concept introduced in computer operating systems that combines different memory management methods, such as paging and segmentation, to improve memory utilization efficiency and security. In this concept, all programs treat their memory as a contiguous address space. This means a program can access more addresses than its physical memory because it can use swap space on the disk. When physical memory is insufficient, the operating system moves some temporarily unused memory data to swap space to provide more memory for programs that currently need it.

[0048] Remote Direct Memory Access (RDMA) is a direct memory access technology that transfers data directly from the memory of one computer to another without the intervention of the operating systems of both. This allows for high-throughput, low-latency network communication, making it particularly suitable for use in large-scale parallel computer clusters. RDMA supports zero-copy network transfers by enabling the network adapter to transfer data directly between application memory, eliminating the need to copy data between application memory and operating system buffers. This transfer does not require the involvement of the central processing unit, CPU cache, or context switching, and the transfer can run in parallel with other system operations. When an application executes an RDMA read or write request, the application data is transferred directly to the network, reducing latency and enabling fast message transmission.

[0049] Translation Lookaside Buffer (TLB): Used for the interaction between virtual addresses and the actual physical addresses accessed. It provides a cache for finding the physical address, effectively reducing the time spent searching for the physical address. A cache used to improve the speed of virtual-to-physical address translation, the TLB is a small, virtual addressing cache where each line stores a block consisting of a single PTE (Page Table Entry). Without a TLB, each data retrieval requires multiple memory accesses—that is, looking up the page table to obtain the physical address and retrieving the data. This page table access requires N times, where N is the number of levels in the page table, typically 4 levels (times).

[0050] Nested Page Table Walk (NPTW) is a method for handling the translation of virtual machine virtual addresses (GVA) to host physical addresses (HPA) in virtualized environments, especially in systems using Second Level Address Translation (SLAT) technology. It is primarily used in virtual machine (VM) environments and involves multi-level page table lookups to support efficient virtual address translation.

[0051] It's important to note that in general-purpose computing, when the host CPU interacts with PCI devices, the PCI devices are typically addressed using Physical Address (PA). In host mode, this PA is the HPA; in VM mode, it's the GPA. Virtual machines, a form of heterogeneous computing, use Virtual Address (VA) to allow the host CPU and PCI devices to interact directly using virtual addresses within the same address space. In this technology, PCI devices, like the CPU, initiate memory accesses using VA. In host mode, this VA is the HVA of a process; in VM mode, it's the GVA of the guest process.

[0052] SVM / UVM has a wide range of applications in heterogeneous computing using GPUs (graphics processing units) and AI (artificial intelligence), as well as in distributed computing based on RDMA network infrastructure. Currently, the most common SVM applications are still in the Host (the host machine of the virtual machine), while SVM applications in the Guest (the client machine of the virtual machine) are very rare. This is because the complexity of translating the virtual machine virtual address (GVA) into the host physical address (HPA) under the VM is relatively high.

[0053] Because the CPU and memory are tightly coupled, the initialization process of memory virtualization is completed together with the initialization of CPU virtualization. The memory mapping from GVA to GPA to HPA is a rather complicated matter for virtual machines.

[0054] In one implementation, address translation can be achieved in hardware using Page Table (PT) technology. The host machine's IOMMU can provide two-level page table translation capabilities based on PASID (Process Address Space ID), supporting Guest SVM. The host machine's operating system can utilize the IOMMU's two-level page table translation capabilities. The first-level page table can point to the GuestPT page table of the process in the virtual machine, realizing the translation from GVA to GPA. The second-level page table is the traditional Virtual Machine Address Mapping Table (IOPT), realizing the translation from GPA to HPA.

[0055] Figure 1 is a schematic diagram of the processing procedure of a memory access method provided in an embodiment of the present disclosure. As shown in Figure 1, the device driver in the virtual machine running on the host machine sends a memory access instruction to the input / output processing unit in the pass-through device. The memory access instruction carries GVA and PASID. The input / output processing unit in the pass-through device uses the IOMMU (Memory Management Unit) in the host machine to convert GVA to HPA and writes the address mapping from GVA to HPA into TLB (Translation Detection Buffer). The input / output processing unit uses the HPA to perform memory access.

[0056] In a two-level page table model, the virtual machine's passthrough device must support PASID capability. Second-level page table binding is implemented by VFIO (Virtual Function I / O, driver framework) / Hypervisor, which queries the virtual machine's Address Translation Table (IOPT). First-level page table binding is driven by the virtual machine's internal vIOMMU (Virtual Machine Memory Management Unit), which allocates a GuestPASID. Then, the virtual machine's vIOMMU simulates the virtual machine's passthrough device, writing the GPA address of a process's virtual machine page table (GuestPT) into a page table section of the host IOMMU. Simultaneously, the GuestPASID is written into the virtual machine's passthrough device register. At this point, the passthrough device knows its own PASID and uses it during address translation. The IOMMU can also directly complete the address translation from GVA to HPA based on the BDF (Bus Device Function, unique identifier of the device) and PASID.

[0057] Before the input / output processing unit of the virtual machine's pass-through device receives an I / O (input / output) request, it looks up the HPA mapping in the device's TLB based on its own PASID. If it does not find it, the address translation instruction converts GVA+BDF+PASID into HPA through the second-level page table of the host machine's IOMMU, and then uses HPA for memory access.

[0058] However, the above methods suffer from several drawbacks. First, the virtual machine's pass-through device is simulated based on the virtual machine's vIOMMU, requiring different vIOMMUs to be simulated depending on the vendor, resulting in strong platform dependency. Second, since most host machines can only translate virtual machine physical addresses to host physical addresses, implementing GVA to HPA translation on the host machine requires modification, which does not support older models. Third, the virtual machine's operating system is highly intrusive, requiring an IOMMU driver with SVM capabilities to support the virtual machine's operating system, leading to strong dependency and poor online coverage and slow image upgrade times. Fourth, simulating pass-through devices using the virtual machine's vIOMMU incurs high interpretation / adaptation costs for customers. To avoid performance impact from vIOMMU, all device drivers must actively work in PT (pass-through) mode, requiring user adaptation, and simulating pass-through devices using vIOMMU is highly complex.

[0059] Therefore, one embodiment of this disclosure provides a method for accessing virtual machine memory. A system memory management unit is configured on the virtual machine's host machine, and a device memory management unit is configured on the passthrough device. The device memory management unit is used to convert the virtual machine virtual address in the memory access command into a virtual machine physical address, and the system memory management unit is used to convert the virtual machine physical address into the host physical address to be accessed. By using dual memory management units in the virtual machine's host machine and the passthrough device, the conversion from virtual machine virtual address to host physical address in device passthrough mode is achieved. This eliminates the need to use the memory management unit in the virtual machine to simulate the device, avoiding various problems associated with simulating the device, reducing the complexity of the virtual machine virtual address to host physical address conversion, and ensuring compatibility with various manufacturers and machine models. Furthermore, since most host machines can perform the conversion from virtual machine physical address to host physical address, no cumbersome modifications to the host machine are required, ensuring compatibility with older machine models.

[0060] To address the aforementioned technical problems, this disclosure provides a method for accessing virtual machine memory. One or more embodiments of this disclosure also relate to a virtual machine memory access system, another virtual machine memory access method, a pass-through device, a computer-readable storage medium, and a computer program product, which will be described in detail in the following embodiments.

[0061] Referring to Figure 2, which shows a flowchart of a virtual machine memory access method according to an embodiment of the present disclosure, the method is applied to a virtual machine passthrough device, the passthrough device is configured with a device memory management unit (device IOMMU), and the virtual machine host is configured with a system memory management unit (system IOMMU). The method specifically includes the following steps 202-206.

[0062] Step 202: Receive a memory access command, wherein the memory access command carries the virtual address of the virtual machine to be accessed.

[0063] In actual implementation, the passthrough device can receive memory access commands sent by the virtual machine. The memory access command carries the virtual address of the virtual machine to be accessed. The virtual address of the virtual machine to be accessed refers to the GVA to be accessed. The passthrough device refers to the PCI device through which the virtual machine passes. The passthrough device can be a memory device, an RDMA device, or a network disk device.

[0064] It should be noted that in heterogeneous computing, processes inside a virtual machine (VM) send memory access commands to the passthrough device through their own device drivers. These memory access commands carry the GVA address to be accessed. In other words, the VM controls the passthrough device to access the memory at the GVA address of a certain process within the VM. This memory access can be either a memory read or a memory write.

[0065] In an optional implementation of this embodiment, after receiving the memory access command, the method further includes:

[0066] Queries the virtual address of the virtual machine to be accessed in the conversion detection buffer;

[0067] If the virtual address of the virtual machine to be accessed is not found, the driver device memory management unit accesses the system memory management unit to perform address translation on the virtual address of the virtual machine to be accessed, and determines the physical address of the host to be accessed.

[0068] It's important to note that to address the inefficiency of page table lookups, a Translation Detection Buffer (TLB) is introduced. This small, fast cache stores a subset of recently used virtual address-to-physical address mappings. In virtualized environments, such as when using virtual machines (VMs), an additional layer of address translation is introduced. This includes not only the translation from VM Virtual Address (GVA) to VM Physical Address (GPA) managed by the VM's operating system (Guest OS), but also the translation from VM Physical Address (GPA) to the actual host physical address (HPA) handled by the virtualization layer on the host machine. Therefore, in a virtualized environment, the Translation Detection Buffer (TLB) stores recently accessed VM virtual address-to-host physical address mappings. The Translation Detection Buffer (TLB) plays a crucial role in virtualization technology, accelerating address translation and improving memory access efficiency, and is essential for maintaining system performance in virtualized environments.

[0069] In actual implementation, when a passthrough device receives a memory access command, it first queries the Translation Lookahead (TLB) for the virtual machine address (GVA) to be accessed carried by the command. If the GVA is found (a TLB hit), the host physical address (HPA) corresponding to the GVA can be directly obtained from that entry, thus performing memory access and skipping the cumbersome page table translation process, greatly improving the speed of address translation. If the GVA is not found (a TLB miss), address translation using the page table is required. In this case, the passthrough device needs to drive the device memory management unit (IOMMU) to access the system memory management unit (IOMMU). The IOMMU and IOMMU then combine their functions to perform address translation on the GVA and determine the host physical address (HPA).

[0070] In this embodiment of the disclosure, when the pass-through device receives a memory access command, it first queries the Translation Detection Buffer (TLB). If the virtual machine address to be accessed is found in the Translation Detection Buffer, the corresponding host physical address can be directly obtained for memory access without the need for cumbersome address translation. The Translation Detection Buffer (TLB) is used to accelerate the address translation from the virtual machine address (GVA) to the host physical address (HPA) to be accessed, which avoids the high latency of address translation to a certain extent.

[0071] Step 204: The driver device memory management unit accesses the system memory management unit to perform address translation on the virtual address of the virtual machine to be accessed, and determines the physical address of the host to be accessed.

[0072] It should be noted that by using dual memory management units (dual IOMMUs) in the virtual machine's host machine and the passthrough device, the translation of the virtual machine's virtual address (GVA) to the host's physical address (HPA) in device passthrough mode is achieved. This eliminates the need to use the virtual machine's memory management unit to simulate the passthrough device, reducing the complexity of the translation from virtual machine virtual address (GVA) to host physical address (HPA) and ensuring compatibility with various manufacturers and machine models.

[0073] In one optional implementation of this embodiment, the step of driving the device memory management unit to access the system memory management unit to perform address translation on the virtual address of the virtual machine to be accessed and determine the physical address of the host to be accessed includes:

[0074] The device memory management unit is driven to determine the page table entry address of the page table where the process to be accessed is located based on the virtual address of the virtual machine to be accessed, and the device memory management unit is driven to access the system memory management unit to perform address translation on the page table entry address to determine the physical address of the host to be accessed, wherein the page table entry address is the physical address of the virtual machine.

[0075] In actual implementation, the memory access command sent by the virtual machine to the passthrough device carries the virtual address of the virtual machine to be accessed. Based on this virtual address, the actual physical memory cannot be accessed. Therefore, the passthrough device can drive the device memory management unit to determine the page table entry address of the page table where the process to be accessed is located, based on the virtual address of the virtual machine to be accessed. The page table entry address of the page table where the process to be accessed is located is the virtual machine physical address of the process to be accessed. Based on the virtual machine physical address, the actual physical memory cannot be accessed either. Therefore, the passthrough device can drive the device memory management unit to access the system memory management unit, so that the system memory management unit can perform address translation on the page table entry address (i.e., the virtual machine physical address) to determine the host physical address to be accessed.

[0076] It should be noted that the passthrough device provides a device memory management unit (device IOMMU) as the link in the address translation from virtual machine virtual address (GVA) to virtual machine physical address (GPA), and uses the system memory management unit (system IOMMU) as the link in the address translation from virtual machine physical address (GPA) to host physical address (HPA). Thus, memory access in the virtual environment is realized based on dual memory management units (i.e. dual IOMMUs), which reduces the complexity of the virtual machine virtual address (GVA) to host physical address (HPA) translation and can be compatible with various manufacturers and models.

[0077] In one optional implementation of this embodiment, the memory access command carries the process identifier of the process to be accessed; the driver device memory management unit determines the page table entry address of the page table where the process to be accessed resides based on the virtual address of the virtual machine to be accessed, including:

[0078] The driver device memory management unit determines the page table entry address of the page table where the process to be accessed is located based on the process identifier.

[0079] The process identifier is used to uniquely identify a process in the virtual machine, such as the process ID (Identifier).

[0080] It's important to note that every process within a virtual machine has a process identifier. The host CPU can write the page table entry address (GPA) of each virtual machine process into the registers of the virtual machine's passthrough device. When the virtual machine sends a memory access command to the passthrough device, it can include the process identifier in the command. The passthrough device then uses the process identifier to look up the process entry address (i.e., the page table entry address) belonging to that process identifier in its device memory management unit (IOMMU). This page table entry address is a virtual machine physical address (GPA).

[0081] In this embodiment of the disclosure, the memory access command sent by the virtual machine to the passthrough device carries the virtual machine virtual address (GVA) to be accessed. However, the passthrough device cannot access the actual physical memory based on the GVA. The memory access command also carries the process identifier of the process to be accessed. The process to be accessed is the process that the virtual machine virtual address to be accessed is to access. The passthrough device driver's memory management unit finds the page table entry address of the page table where the process to be accessed is located based on the process identifier. The page table entry address is the virtual machine physical address (GPA). At this time, the device memory management unit can determine the virtual machine physical address (GPA) to be accessed. That is, the device memory management unit realizes the conversion between virtual machine virtual address (GVA) and virtual machine physical address (GPA) based on the process identifier of the process to be accessed.

[0082] In actual implementation, when a process in the virtual machine needs to enable SVM mode for a passthrough device, the process identifier of that process can be transmitted to the passthrough device via the hardware interface through the virtual machine's device driver. The passthrough device then queries the page table entry address (GPA) of that process in its device memory management unit (IOMMU). The passthrough device binds to the page table (PT) of that process through its built-in IOMMU, that is, it creates a mapping from the first-level page table (L1 PTR) in the IOMMU to the virtual machine page table (Guest PT). Through this mapping, the page table entry address (GPA) of the page table of the process to be accessed can be obtained. Since the IOMMU needs to access the host's virtual machine page table (Guest PT) via PCIe DMA, the latency may be relatively high.

[0083] In this embodiment of the disclosure, the virtual machine can send a process identifier to the passthrough device, enabling the passthrough device to bind to the page table of the corresponding process in the device memory management unit (device IOMMU) based on the process identifier, and obtain the page table entry address (GPA). By configuring the device memory management unit (device IOMMU) in the passthrough device, the virtual machine virtual address (GVA) to virtual machine physical address (GPA) step in the address translation is implemented without modifying the host machine's system IOMMU structure, which can be adapted to most older host machine models.

[0084] In one optional implementation of this embodiment, the page table where the process to be accessed is located is a multi-level page table, and the page table entry address is used to indicate the page table entry of the first-level page table in the multi-level page table;

[0085] The device memory management unit is driven to access the system memory management unit to perform address translation on the page table entry address to determine the host physical address to be accessed, including:

[0086] The driver device memory management unit sends an address translation command to the system memory management unit and receives the target host physical address returned by the system memory management unit. The address translation command carries the target virtual machine physical address, which is initially the page table entry address. The target host physical address is determined by the system memory management unit based on the target virtual machine physical address and the virtual machine's address translation table.

[0087] The physical address of the host to be accessed is determined based on the target host physical address obtained from the device's memory management unit.

[0088] The host machine can maintain an address translation table for virtual machines, which stores the mapping between each virtual machine physical address (GPA) and the host physical address (HPA).

[0089] It should be noted that the page table entry address is a virtual machine physical address (GPA). Pass-through devices cannot directly access memory to obtain data based on the virtual machine physical address (GPA). Therefore, it is necessary to further translate the virtual machine physical address (GPA) to the host physical address (HPA) before accessing memory and reading the corresponding data based on the host physical address (HPA).

[0090] Since the page table containing the process to be accessed is often a multi-level page table, the page table entry address indicates the entry point of the first-level page table within the multi-level page table. This entry point is a Virtual Machine Physical Address (GPA). Based on this entry point, the page table content of the first-level page table can be obtained. This content includes the entry points of the next-level page table, which are also GPAs. These next-level entry points need to be translated to the actual host physical address to retrieve the page table content. This process continues until the last level of the page table is reached. The entry point of the last level is then translated to the actual host physical address to obtain the host physical address to be accessed. The translation from GPA to HPA is a nested page table walk, meaning that the entry point of each level of the multi-level page table containing the process to be accessed is a GPA, and all must be translated to an HPA.

[0091] In actual implementation, the passthrough device can drive the device memory management unit (device IOMMU) to send an address translation command to the system memory management unit (system IOMMU). This address translation command carries the target virtual machine physical address, which is the page table entry address of the current level. Initially, the target virtual machine physical address is the page table entry address, that is, the page table entry address of the first-level page table in a multi-level page table. Then, the system memory management unit (system IOMMU) determines the target host physical address (HPA) corresponding to the target virtual machine physical address (GPA) through the virtual machine's address translation table and returns it to the device memory management unit (device IOMMU). At this point, the passthrough device can determine the host physical address to be accessed based on the target host physical address obtained from the device memory management unit.

[0092] In this embodiment, the device memory management unit (device IOMMU) and the system memory management unit (system IOMMU) jointly implement nested multi-level page table lookups, converting the entry addresses of each level of page tables corresponding to the process to be accessed into host physical addresses (HPAs), thereby obtaining the host physical address to be accessed and realizing memory access. By utilizing cross-device nested multi-level page table lookups, platform dependencies are decoupled, eliminating the need to use a memory management unit in a virtual machine to simulate a device. Complete SVM+ODP (on-demand paging, a capability for delayed physical memory allocation implemented through page fault technology) is achieved through device drivers in the virtual machine, without requiring modification to the virtual machine's operating system, thus reducing the complexity of address translation.

[0093] In one optional implementation of this embodiment, determining the physical address of the host to be accessed based on the target host physical address obtained by the device memory management unit includes:

[0094] The pass-through device determines whether the currently obtained target host physical address is the host physical address of the last level page table;

[0095] If so, then the target host physical address will be determined as the physical address of the host to be accessed;

[0096] If not, the virtual machine is accessed based on the target host physical address to obtain the corresponding target page table content. The virtual machine physical address of the next-level page table is obtained from the target page table content. The virtual machine physical address of the next-level page table is used as the target virtual machine physical address, and the operation steps of sending the address translation command from the driver device memory management unit to the system memory management unit are returned.

[0097] In practical applications, if the target host physical address obtained by the device memory management unit (device IOMMU) is the host physical address of the last-level page table, there is no need to continue nested traversal. The host physical address obtained by translating the last-level page table is the host physical address to be accessed. If the target host physical address obtained by the device memory management unit (device IOMMU) is not the host physical address of the last-level page table, it is necessary to continue nested traversal of the next level page table and combine it with the system memory management unit (system IOMMU) to determine the host physical address to be accessed.

[0098] As an example, Figure 3 illustrates a nested multi-level page table lookup process provided in an embodiment of this disclosure. As shown in Figure 3, the pass-through device receives an access command carrying the GVA to be accessed. The page table containing the process to be accessed is a level 4 page table. The pass-through device's IOMMU determines that the page table entry of the first-level page table is GPA1. The device IOMMU sends an address translation command to the system IOMMU, carrying the target virtual machine physical address as GPA1. Based on the virtual machine's address translation table, the system IOMMU determines that GPA1 corresponds to HPA1 and returns HPA1 to the device IOMMU. The pass-through device determines that HPA1 is not the host physical address of the last-level page table, accesses memory based on HPA1 to obtain the target page table content of the first-level page table, and reads the page table entry of the second-level page table from the target page table content of the first-level page table as GPA2. The device IOMMU sends an address translation command to the system IOMMU, carrying the target virtual machine physical address GPA2. The system IOMMU, based on the virtual machine's address translation table, determines that GPA2 corresponds to HPA2 and returns HPA2 to the device IOMMU. The pass-through device determines that HPA2 is not the host physical address of the last-level page table. Based on HPA2, it accesses memory to obtain the target page table content of the second-level page table. From the target page table content of the second-level page table, it reads the page table entry of the third-level page table, which is GPA3. The device IOMMU then sends an address translation command to the system IOMMU, carrying the target virtual machine physical address GPA3. The system IOMMU, based on the virtual machine's address translation table, determines that GPA3 corresponds to HPA3 and returns HPA3 to the device IOMMU. The pass-through device determines that HPA3 is not the host physical address of the last-level page table. Based on HPA3, it accesses memory to obtain the target page table content of the third-level page table. From the target page table content of the third-level page table, it reads the page table entry of the fourth-level page table, which is GPA4.The device IOMMU sends an address translation command to the system IOMMU, carrying the target virtual machine physical address as GPA4. The system IOMMU, based on the virtual machine's address translation table, determines that GPA4 corresponds to HPA4 and returns HPA4 to the device IOMMU. The pass-through device then determines that HPA4 is the host physical address of the last-level page table, confirming that the host physical address to be accessed is HPA4. Subsequently, it can access memory based on HPA4 to retrieve or write data to that memory. In other words, the pass-through device can access the memory indicated by HPA4 to obtain the required data. For example, passthrough devices can access the corresponding memory based on HPA4 to obtain audio data, graphics rendering data, account information, etc. stored in that memory. In other words, passthrough devices can directly read graphics instructions and data (such as vertices, textures, etc.) in the virtual machine's memory, perform complex graphics rendering tasks, and write the rendering results back to the virtual machine's memory, thereby improving graphics processing performance. Alternatively, passthrough devices such as sound cards can also directly access the virtual machine's memory to process audio streams, such as reading audio samples to be played from the virtual machine's memory, or directly writing sound data captured by recording devices into the virtual machine's memory for software processing, etc.

[0099] In this embodiment, the page table containing the process to be accessed is a multi-level page table, and each page table address pointing to a lower level is a virtual machine physical address (GPA). Therefore, after obtaining the GPA address of the lower-level page table through the first-level page table translation in the device memory management unit (device IOMMU), the system memory management unit (system IOMMU) must be used to translate the GPA to the host physical address (HPA) before the page table content can be read from the lower-level page table. The mapping from virtual machine physical address (GPA) to host physical address (HPA) is still completed by the system memory management unit (system IOMMU). The system memory management unit (system IOMMU) and the device memory management unit (device IOMMU) jointly complete the address translation from virtual machine virtual address (GVA) to host physical address (HPA). By using two IOMMUs, the platform dependency is eliminated, and memory access from both the host machine (Host) and the virtual machine client (Guest) can be supported simultaneously.

[0100] In one optional implementation of this embodiment, after the driver device memory management unit accesses the system memory management unit to perform address translation on the virtual address of the virtual machine to be accessed and determines the physical address of the host to be accessed, the method further includes:

[0101] Update the translation detection buffer in the passthrough device based on the virtual address of the virtual machine to be accessed and the physical address of the host to be accessed.

[0102] It should be noted that since the page table of the process to be accessed is a multi-level page table, the page table entry address determined by the device memory management unit (device IOMMU) of the pass-through device driver is the entry address of the first-level page table. It is necessary to traverse each level of page table and obtain the physical address of the host to be accessed with the help of the system memory management unit (system IOMMU). Therefore, the virtual machine physical addresses obtained in the process are not corresponding to the virtual address of the virtual machine to be accessed, nor do they correspond to the actual physical address of the host to be accessed. That is, there is no correspondence between GVA and GPA of each level of page table, and there is no correspondence between GPA of each level of page table and HPA of the actual host to be accessed. In other words, what can be obtained in the address translation process is the correspondence between the virtual address GVA to be accessed and the physical address HPA of the host to be accessed.

[0103] In actual implementation, after obtaining the physical address (HPA) of the host to be accessed, the device memory management unit (IOMMU) can write the mapping relationship between the virtual address (GVA) to be accessed and the physical address (HPA) of the host to be accessed into the translation check buffer (TLB). The next time the virtual address (GVA) needs to be accessed, the corresponding physical address (HPA) of the host to be accessed can be obtained directly by querying the translation check buffer (TLB), which saves the nested multi-page page table traversal process in the address translation process, greatly improves the access speed, reduces the number of address translations, and alleviates the high latency of address translation.

[0104] In an optional implementation of this embodiment, the method further includes:

[0105] Based on the obtained target page table content, determine whether to allocate memory for the current level target page table; if not, send a page fault message to the virtual machine.

[0106] The page fault message is used to instruct the virtual machine to allocate memory for the target page table.

[0107] It should be noted that after the passthrough device obtains the host physical address (HPA) of each level of page table from the driver's memory management unit (device IOMMU), it can access memory based on the HPA to obtain the corresponding target page table content. This target page table content can include not only the page table entry of the next level page table but also an indication of the memory allocation status. Based on this memory allocation status, it can be determined whether memory has been allocated to the current level target page table. If no memory has been allocated, it indicates that there is a page fault in the page table of the process being accessed. In this case, the passthrough device can directly send a page fault message to the virtual machine, causing the virtual machine to respond to the page fault message and allocate memory for the target page table.

[0108] In this embodiment of the disclosure, when there is a page fault in the page table where the process to be accessed resides, a passthrough command can be sent directly to the virtual machine based on the passthrough device, thereby quickly allocating memory for the target page table without the assistance of the host machine, thus completing the sending of the page fault message and improving response efficiency.

[0109] Step 206: Access the virtual machine's memory based on the physical address of the host to be accessed.

[0110] In actual implementation, the pass-through device can access the virtual machine's memory based on the host physical address (HPA) to be accessed obtained from the device memory management unit (device IOMMU). Accessing the virtual machine's memory can include reading data from the memory indicated by the host physical address (HPA) to be accessed and / or writing data to the memory indicated by the host physical address (HPA) to be accessed.

[0111] It should be noted that the device memory management unit (device IOMMU) is used to implement the translation of the virtual machine address (GVA) to the virtual machine physical address (GPA) to be accessed. The system memory management unit (system IOMMU) only needs to implement the translation of the virtual machine physical address (GPA) to the host physical address (HPA). Since most host machine models can implement the translation of the virtual machine physical address (GPA) to the host physical address (HPA), no complicated modifications to the host machine are required in this embodiment, and it can be compatible with most older models.

[0112] Furthermore, if address translation is implemented using a single IOMMU within the host operating system, that IOMMU needs to have second-level page table translation capabilities. This necessitates modifications to the host operating system to implement the driver, resulting in significant and cumbersome changes. Implementing address translation using dual IOMMUs eliminates the need to use a vIOMMU in a virtual machine to simulate pass-through devices. This reduces the difficulty of cross-platform secondary development, lowers the complexity of address translation, and avoids the problems associated with simulating devices, such as strong platform dependency, lack of support for older models, high interpretation / adaptation costs for customers, and high simulation complexity.

[0113] In an optional implementation of this embodiment, the method further includes:

[0114] The system receives an update instruction sent by the device driver of the virtual machine. The update instruction carries a change type and an address mapping to be changed. The update instruction is sent by the host machine to the device driver of the virtual machine when the page table address mapping of the virtual machine changes. The device driver of the virtual machine sends the update instruction to the device memory management unit of the pass-through device.

[0115] The conversion detection buffer in the pass-through device is updated using the device memory management unit based on the change type and the address mapping to be changed.

[0116] The change type can include deleting address mappings, i.e., reclaiming physical memory.

[0117] It should be noted that since the device memory management unit (IOMMU) has a built-in translation check buffer (TLB) to accelerate address translation, there may be a consistency error between a certain mapping relationship in the translation check buffer (TLB) and the host machine's memory reclamation, which may lead to data errors. Therefore, it is necessary to ensure page table consistency.

[0118] In practical applications, device drivers in virtual machines can register a memory notification mechanism (MMU notifier) ​​with the host machine to synchronously detect changes in the host machine's memory mapping of processes. Specifically, when the host machine detects a change in the virtual machine's page table address mapping, it can notify the virtual machine's device driver of the change type and the address mapping to be changed. Then, the virtual machine's device driver sends an update instruction to the device memory management unit, notifying the device memory management unit of the passthrough device of the change type and the address mapping to be changed. The device memory management unit can then update the translation detection buffer (TLB) in the passthrough device based on the change type and the address mapping to be changed.

[0119] For example, before the virtual machine operating system unmaps a page physically, it first notifies the virtual machine's device driver through a memory notification mechanism. The device driver then notifies the device IOMMU through a hardware interface to update the relevant address mapping in the TLB, and only then can the virtual machine operating system reclaim physical memory.

[0120] In this embodiment of the disclosure, when the page table address mapping changes, the device memory management unit can be notified to update the translation detection buffer (TLB) before changing the physical memory, thus ensuring a consistent view of the page table between the passthrough device and the host machine.

[0121] In an optional implementation of this embodiment, the method further includes:

[0122] During the process of receiving update instructions from the virtual machine's device driver, or during the process of updating the translation detection buffer in the passthrough device according to the address mapping to be changed through the device memory management unit, if a change memory access command is received, the obtained page table content indicates a memory shortage and a page table error message is returned. The page table error message is used to indicate that access to the process indicated by the address mapping to be changed is prohibited.

[0123] It should be noted that if memory access occurs during the process of the virtual machine's device driver sending an update instruction to the device memory management unit, or during the process of the device memory management unit updating the translation detection buffer in the passthrough device according to the address mapping to be changed, the page table will be accessed through PTW (multi-level page table lookup). When the passthrough device accesses the page table, it can detect the memory shortage and then directly send a page table error message on the device side to prevent the process indicated by the address mapping to be changed from accessing it, thus ensuring that the passthrough device cannot access the corresponding memory page during the process of memory mapping change.

[0124] Figure 4 illustrates a schematic diagram of the processing flow of a virtual machine memory access method provided in an embodiment of this disclosure. As shown in Figure 4, a system IOMMU (System Memory Management Unit) is configured on the host machine, and a device driver (eRDMA) is configured in the virtual machine running on the host machine to drive the virtual machine's passthrough device to access the processes in the virtual machine. The passthrough device is configured with a device IOMMU (Device Memory Management Unit) and an input / output processing unit (IO Processing).

[0125] As shown in Figure 4, the device driver sends a memory access command to the input / output processing unit (I / O unit), carrying the GVA to be accessed. The I / O unit drives the device IOMMU to determine the GPA of the process to be accessed and sends an address translation instruction (AT) to the system IOMMU, carrying the GPA. The system IOMMU queries the virtual machine's address translation table (IOPT) to determine the HPA corresponding to the GPA and returns the HPA to the device IOMMU. The I / O unit then sends an access request to the device driver based on the HPA to obtain the page table content corresponding to the HPA. It reads the GPA of the next-level page table from this page table content and continues to drive the device IOMMU to send address translation instructions to the system IOMMU, using the system IOMMU to obtain the corresponding HPA for access, thus obtaining the corresponding page table content, until the last level of the page table, obtaining the actual HPA to be accessed. The device IOMMU writes the mapping relationship between the GVA to be accessed and the actual HPA to be accessed into the TLB. The I / O unit then accesses the corresponding process of the virtual machine based on this HPA.

[0126] In this embodiment, the device memory management unit implements the GVA to GPA conversion process, and the system memory management unit implements the GPA to HPA conversion process, which can be compatible with most older models. Furthermore, address translation is achieved through dual memory management units in the virtual machine's host machine and the passthrough device, eliminating the need to use the memory management unit in the virtual machine to simulate the device, thus reducing the complexity of address translation and ensuring compatibility with various manufacturers and models.

[0127] Referring to Figure 5, Figure 5 shows a flowchart of another virtual machine memory access method according to an embodiment of the present disclosure, applied to a virtual machine host machine. The virtual machine host machine is configured with a system memory management unit, and the virtual machine passthrough device is configured with a device memory management unit; as shown in Figure 5, the method includes the following step 502:

[0128] Step 502: Send a memory access command to the passthrough device; wherein, the memory access command carries the virtual address of the virtual machine to be accessed, and the memory access command is used to instruct the passthrough device to drive the device memory management unit to access the system memory management unit in order to perform address translation on the virtual address of the virtual machine to be accessed and determine the physical address of the host to be accessed, and the physical address of the host to be accessed is used by the passthrough device to access the memory of the virtual machine.

[0129] In this embodiment, a device memory management unit is configured on the pass-through device. This device memory management unit is used to translate the virtual machine virtual address in the memory access command into a virtual machine physical address. Then, the system memory management unit is used to translate the virtual machine physical address into the host physical address to be accessed. Thus, address translation is achieved through dual memory management units, eliminating the need to use the memory management unit in the virtual machine to simulate the device. This reduces the complexity of address translation, ensures compatibility with various manufacturers and models, and eliminates the need for cumbersome modifications to the host machine, making it compatible with older models.

[0130] The above is an illustrative scheme for memory access of a virtual machine on a virtual machine host machine according to this embodiment. It should be noted that the technical solution of the memory access method of the virtual machine on a virtual machine host machine is based on the same concept as the memory access method of the virtual machine shown in Figure 2 above. For details not described in detail in the technical solution of the memory access method of the virtual machine on a virtual machine host machine, please refer to the description of the memory access method of the virtual machine shown in Figure 2 above.

[0131] Corresponding to the above method embodiments, this disclosure also provides an embodiment of a virtual machine memory access system. Figure 6 shows a schematic diagram of the structure of a virtual machine memory access system provided in one embodiment of this disclosure. As shown in Figure 6, the system includes a host machine 602, a virtual machine 604 running on the host machine 602, a passthrough device 606 for the virtual machine 604, a system memory management unit 6022 configured on the host machine 602, and a device memory management unit 6062 configured on the passthrough device 606.

[0132] Virtual machine 604 is configured to send a memory access command to the pass-through device 606, wherein the memory access command carries the virtual address of the virtual machine to be accessed;

[0133] The passthrough device 606 is configured to drive the device memory management unit 6062 to access the system memory management unit 6022 to perform address translation on the virtual address of the virtual machine to be accessed, determine the physical address of the host to be accessed, and access the memory of the virtual machine 604 according to the physical address of the host to be accessed.

[0134] In one optional embodiment of this example, as shown in FIG6, the virtual machine 604 is further configured with a device driver 6042, and the pass-through device 606 is further configured with an input / output processing unit 6064.

[0135] Device driver 6042 is configured to send a memory access command to input / output processing unit 6064, wherein the memory access command carries the virtual address of the virtual machine to be accessed;

[0136] The input / output processing unit 6064 is configured to drive the device memory management unit 6062 to access the system memory management unit 6022 to perform address translation on the virtual address of the virtual machine to be accessed, determine the physical address of the host to be accessed, and access the memory of the virtual machine 604 according to the physical address of the host to be accessed.

[0137] In this embodiment of the disclosure, a device memory management unit is configured on the passthrough device in the memory access system. Address translation is achieved by using the system memory management unit configured on the host machine, without the need to use the memory management unit in the virtual machine to simulate the device, which reduces the complexity of address translation. It can be compatible with various manufacturers and models. Furthermore, since most host machines can realize the translation from virtual machine physical address to host physical address, there is no need to make cumbersome modifications to the host machine, and it can be compatible with older models.

[0138] The above is an illustrative scheme of a virtual machine memory access system according to this embodiment. It should be noted that the technical solution of this virtual machine memory access system and the technical solution of the virtual machine memory access method described above belong to the same concept. For details not described in detail in the technical solution of the virtual machine memory access system, please refer to the description of the technical solution of the virtual machine memory access method described above.

[0139] Figure 7 shows a structural block diagram of a pass-through device according to one embodiment of the present disclosure. The components of the pass-through device 700 include, but are not limited to, a device memory management unit 710 and a processor 720. In one embodiment of the present disclosure, the aforementioned components of the pass-through device 700, as well as other components not shown in Figure 7, may be interconnected. It should be understood that the structural block diagram of the pass-through device 700 shown in Figure 7 is merely for illustrative purposes and is not intended to limit the scope of the present disclosure. Those skilled in the art can add or replace other components as needed.

[0140] The processor 720 is used to receive memory access commands and drive the device memory management unit 710, wherein the memory access command carries the virtual address of the virtual machine to be accessed.

[0141] The device memory management unit 710 is used to access the system memory management unit to determine the physical address of the host to be accessed based on the virtual address of the virtual machine to be accessed. The system memory management unit is the memory management unit configured on the host machine of the virtual machine.

[0142] The processor 720 is also used to access the virtual machine's memory based on the host physical address to be accessed.

[0143] The above is an illustrative scheme of a pass-through device according to this embodiment. It should be noted that the technical solution of this pass-through device and the technical solution of the virtual machine memory access method described above belong to the same concept. For details not described in detail in the technical solution of the pass-through device, please refer to the description of the technical solution of the virtual machine memory access method described above.

[0144] An embodiment of this disclosure also provides a computer-readable storage medium storing a computer program / instructions that, when executed by a processor, implement the steps of the memory access method of the virtual machine described above.

[0145] The above is an illustrative scheme of a computer-readable storage medium according to this embodiment. It should be noted that the technical solution of this storage medium belongs to the same concept as the technical solution of the virtual machine memory access method described above. For details not described in detail in the technical solution of the storage medium, please refer to the description of the technical solution of the virtual machine memory access method described above.

[0146] An embodiment of this disclosure also provides a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the memory access method of the virtual machine described above.

[0147] The above is an illustrative scheme of a computer program product according to this embodiment. It should be noted that the technical solution of this computer program product and the technical solution of the virtual machine memory access method described above belong to the same concept. For details not described in detail in the technical solution of the computer program product, please refer to the description of the technical solution of the virtual machine memory access method described above.

[0148] The foregoing has described specific embodiments of this disclosure. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired results. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0149] Computer programs / instructions include computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. Computer-readable media can include: any entity or device capable of carrying computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in computer-readable media can be appropriately added or removed according to the requirements of patent practice. For example, in some regions, according to patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0150] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that the embodiments of this disclosure are not limited to the described order of actions, because according to the embodiments of this disclosure, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to the embodiments of this disclosure.

[0151] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0152] The preferred embodiments disclosed above are merely illustrative of this disclosure. The optional embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the embodiments of this disclosure. These embodiments are selected and specifically described in this disclosure to better explain the principles and practical applications of the embodiments of this disclosure, thereby enabling those skilled in the art to better understand and utilize this disclosure. This disclosure is limited only by the claims and their full scope and equivalents.

Claims

1. A memory access method of a virtual machine, applied to a pass-through device of the virtual machine, wherein the pass-through device is configured with a device memory management unit, and a host of the virtual machine is configured with a system memory management unit; the method comprising: receiving a memory access command, wherein the memory access command carries a virtual machine virtual address to be accessed; driving the device memory management unit to access the system memory management unit to perform address translation on the virtual machine virtual address to be accessed, and determine a host physical address to be accessed; accessing the memory of the virtual machine according to the host physical address to be accessed. 2.The memory access method of the virtual machine according to claim 1, wherein the driving the device memory management unit to access the system memory management unit to perform address translation on the virtual machine virtual address to be accessed, and determine a host physical address to be accessed comprises: driving the device memory management unit to determine a page table entry address of a page table in which a process to be accessed is located according to the virtual machine virtual address to be accessed, and driving the device memory management unit to access the system memory management unit to perform address translation on the page table entry address to determine the host physical address to be accessed, wherein the page table entry address is a virtual machine physical address. 3.The memory access method of the virtual machine according to claim 2, wherein the page table in which the process to be accessed is located is a multi-level page table, and the page table entry address is used to indicate a page table entry of a first-level page table in the multi-level page table; and the driving the device memory management unit to access the system memory management unit to perform address translation on the page table entry address to determine the host physical address to be accessed comprises: driving the device memory management unit to send an address translation command to the system memory management unit, and receiving a target host physical address returned by the system memory management unit, wherein the address translation command carries a target virtual machine physical address, the target virtual machine physical address is initially the page table entry address, and the target host physical address is determined by the system memory management unit based on the target virtual machine physical address and an address translation table of the virtual machine; determining the host physical address to be accessed according to the target host physical address obtained by the device memory management unit. 4.The memory access method of the virtual machine according to claim 3, wherein the determining the host physical address to be accessed according to the target host physical address obtained by the device memory management unit comprises: determining whether a currently obtained target host physical address is a host physical address of a last-level page table; if yes, determining the target host physical address as the host physical address to be accessed; if no, accessing the virtual machine based on the target host physical address to obtain corresponding target page table content, obtaining a virtual machine physical address of a next-level page table from the target page table content, taking the virtual machine physical address of the next-level page table as the target virtual machine physical address, and returning to perform the operation step of driving the device memory management unit to send an address translation command to the system memory management unit. ​ 5. The method of claim 4, further comprising: determining whether the target page table of the current level is allocated memory based on the obtained target page table content; if not, sending a page fault message to the virtual machine; wherein the page fault message is used to instruct the virtual machine to allocate memory for the target page table.

6. The method of any one of claims 1-5, after the driving the device memory management unit to access the system memory management unit to perform address translation on the to-be-accessed virtual machine virtual address to determine a to-be-accessed host physical address, further comprising: updating a translation detection buffer in the pass-through device according to the to-be-accessed virtual machine virtual address and the to-be-accessed host physical address.

7. The method of any one of claims 1-6, after the receiving the memory access command, further comprising: querying the to-be-accessed virtual machine virtual address in the translation detection buffer; if the to-be-accessed virtual machine virtual address is not queried, driving the device memory management unit to access the system memory management unit to perform address translation on the to-be-accessed virtual machine virtual address to determine a to-be-accessed host physical address.

8. The method of any one of claims 1-5, further comprising: receiving an update instruction sent by a device driver of the virtual machine, wherein the update instruction carries a change type and an address mapping to be changed, the update instruction is used to notify the change type and the address mapping to be changed from the host to the device driver of the virtual machine in the case that the page table address mapping of the virtual machine is changed, and the update instruction is sent from the device driver of the virtual machine to a device memory management unit of the pass-through device; and updating, by the device memory management unit, a translation detection buffer in the pass-through device according to the change type and the address mapping to be changed.

9. The method of claim 8, wherein the change type is deletion of address mapping; the method further comprising: during the process of receiving the update instruction sent by the device driver of the virtual machine, or during the process of updating, by the device memory management unit, the translation detection buffer in the pass-through device according to the address mapping to be changed, if a change memory access command is received, the obtained page table content indicates memory missing, and a page table error message is returned, wherein the page table error message is used to instruct to prohibit access to a process indicated by the address mapping to be changed.

10. The method of any one of claims 2-9, wherein the memory access command carries a process identifier of a to-be-accessed process; and the driving the device memory management unit to determine a page table entry address of a page table in which the to-be-accessed process is located according to the to-be-accessed virtual machine virtual address comprises: driving the device memory management unit to determine the page table entry address of the page table in which the to-be-accessed process is located according to the process identifier. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ 11.A memory access method of a virtual machine, applied to a host of the virtual machine, wherein a system memory management unit is configured on the host of the virtual machine, and a device memory management unit is configured on a pass-through device of the virtual machine; the method comprising: sending a memory access command to the pass-through device; wherein the memory access command carries a virtual machine virtual address to be accessed, and the memory access command is used to instruct the pass-through device to drive the device memory management unit to access the system memory management unit, to perform address translation on the virtual machine virtual address to be accessed, to determine a host physical address to be accessed, and the host physical address to be accessed is used for the pass-through device to access the memory of the virtual machine. 12.A memory access system of a virtual machine, comprising a host, a virtual machine running on the host, and a pass-through device of the virtual machine, wherein a system memory management unit is configured on the host, and a device memory management unit is configured on the pass-through device; the virtual machine is configured to send a memory access command to the pass-through device, wherein the memory access command carries a virtual machine virtual address to be accessed; the pass-through device is configured to drive the device memory management unit to access the system memory management unit, to perform address translation on the virtual machine virtual address to be accessed, to determine a host physical address to be accessed, and to access the memory of the virtual machine according to the host physical address to be accessed.

13. A pass-through device, comprising: a device memory management unit and a processor; the processor is used to receive a memory access command, and drive the device memory management unit, wherein the memory access command carries a virtual machine virtual address to be accessed; the device memory management unit is used to access a system memory management unit, to perform address translation on the virtual machine virtual address to be accessed, to determine a host physical address to be accessed, wherein the system memory management unit is a memory management unit configured on the host of the virtual machine; the processor is further used to access the memory of the virtual machine according to the host physical address to be accessed. 14.A computer readable storage medium, storing a computer program / instruction, which, when executed by a processor, implements the steps of the memory access method of the virtual machine according to any one of claims 1-10 or claim 11. 15.A computer program product, comprising a computer program / instruction, which, when executed by a processor, implements the steps of the memory access method of the virtual machine according to any one of claims 1-10 or claim 11.

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