Semiconductor device

Abstract

A semiconductor device 1 includes a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and a sealing resin 70. The plurality of inner leads include: a first common inner lead 20 that has a section extending along a first direction D1 or that is arranged along the first direction D1; a plurality of individual inner leads 31, 32, 33; and a second common inner lead 40. The plurality of connectors include: first connectors 51, 52, 53 that connect the semiconductor chips (diodes 11, 12, 13) mounted on the first common inner lead 20 to the individual inner leads 31, 32, 33; and second connectors 61, 62, 63 that connect the semiconductor chips (diodes 14, 15, 16) mounted on the individual inner leads 31, 32, 33 and the second common inner lead 40. Consequently, as compared with a conventional semiconductor device, this semiconductor device 1 can suppress the inclination of the inner lead in the sealing resin.

Description

Semiconductor Devices Cross Reference

[0001] This application claims priority based on Japanese Patent Application No. 2024-114765, filed on July 18, 2024, the entire contents of which are incorporated herein by reference.

[0002] The present invention relates to a semiconductor device.

[0003] Conventionally, semiconductor devices have been known that include a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and a sealing resin (see, for example, Patent Document 1). In such semiconductor devices, the plurality of semiconductor chips are generally connected together to one connector.

[0004] The conventional semiconductor device 900 includes a plurality of semiconductor chips 911, 912, 913, 914, 915, and 916, a plurality of inner leads 921, 922, 923, 924, and 925, a plurality of connectors 951 and 952, and a sealing resin 970 (see FIG. 3). The conventional semiconductor device 900 can also be described as a three-phase bridge diode package.

[0005] In the semiconductor device 900, semiconductor chips 911, 912, and 913 are collectively connected to a connector 951. In the semiconductor device 900, semiconductor chips 914, 915, and 916 are collectively connected to a connector 952.

[0006] JP 2016-149512 A

[0007] In semiconductor devices such as the conventional semiconductor device 900, the inner leads are often shaped to extend in a specific direction (elongated) for electrical connection reasons. Therefore, in semiconductor devices such as the above, depending on the manufacturing method, the inner leads may be affected by the encapsulation resin poured during resin encapsulation and may tilt within the encapsulation resin (see FIG. 4, particularly FIGS. 4(b) and 4(c)). Tilting of the inner leads can result in non-uniform product characteristics, insufficient insulation performance, and the like.

[0008] The present invention has been made in view of the above-mentioned problems, and aims to provide a semiconductor device that can suppress tilt of inner leads in the sealing resin compared to conventional semiconductor devices.

[0009] The semiconductor device of the present invention is a semiconductor device comprising a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and a sealing resin, wherein the plurality of inner leads include a first common inner lead having a portion extending along a predetermined first direction, a plurality of individual inner leads arranged along the first direction, and a second common inner lead arranged between the first common inner lead and the plurality of individual inner leads and having a portion extending along the first direction, wherein at least two of the semiconductor chips are mounted on the first common inner lead in a state where they are arranged along the first direction, and at least one of the semiconductor chips is mounted on the individual inner lead, and the plurality of connectors include a first connector that connects the semiconductor chip mounted on the first common inner lead to the individual inner lead in a one-to-one relationship, and a second connector that connects the semiconductor chip mounted on the individual inner lead to the second common inner lead in a one-to-one relationship.

[0010] The semiconductor device of the present invention includes first and second connectors that individually connect the semiconductor chips to the inner leads. Therefore, the semiconductor device of the present invention can increase the number of connection points for components in the internal configuration of the semiconductor device compared to conventional semiconductor devices, thereby increasing the strength of the structure around the inner leads. When the strength of the structure around the inner leads is high, the influence of the encapsulating resin on the inner leads can be reduced. Therefore, the semiconductor device of the present invention is a semiconductor device that can suppress tilt of the inner leads in the encapsulating resin compared to conventional semiconductor devices.

[0011] 1A and 1B are diagrams showing the internal configuration of a semiconductor device 1 according to a first embodiment. FIG. 1A is a plan view, FIG. 1B is a cross-sectional view taken along A1-A1 in FIG. 1A, and FIG. 1C is a cross-sectional view taken along A2-A2 in FIG. 1A. In the drawings, a "diagram showing the internal configuration" refers to a diagram showing components sealed in sealing resin. For this reason, only the outline of the sealing resin 70 in FIG. 1 is shown by a dashed line. Also, in FIG. 1A, components hidden by the first connectors 51, 52, and 53 and the second connectors 61, 62, and 63 are shown by a dashed line. These diagrams are diagrams showing the internal configuration of a semiconductor device 2 according to a second embodiment. FIG. 2A is a plan view, FIG. 2B is a cross-sectional view taken along A3-A3 in FIG. 2A, and FIG. 2C is a cross-sectional view taken along A4-A4 in FIG. 2A. In FIG. 2, only the outline of the sealing resin 70 is shown by a dashed line. 2(a), components hidden by the first connectors 51, 52 and the second connectors 61, 62 are indicated by dashed lines. It is a plan view showing the internal configuration of a conventional semiconductor device 900. It is a cross-sectional view taken along the line A-A in FIG. 3. FIG. 4(a) is a cross-sectional view showing a state in which the inner lead 923 is not tilted, and FIGS. 4(b) and 4(c) are cross-sectional views showing a state in which the inner lead 923 is tilted. It should be noted that the tilt of the inner lead 923 is exaggerated in FIGS. 4(b) and 4(c).

[0012] The semiconductor device of the present invention will be described below based on the embodiments shown in the drawings. In the embodiments described below, components having the exact same or substantially the same functions will be designated by common reference numerals in the respective embodiments, even if their shapes are slightly different, and descriptions already given may be omitted. The embodiments described below do not limit the invention according to the claims. Furthermore, not all of the elements and combinations thereof described in the respective embodiments are necessarily essential to the solution of the present invention.

[0013] [Embodiment 1] 1. Configuration of Semiconductor Device 1 According to Embodiment 1 The semiconductor device 1 according to embodiment 1 includes a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and a sealing resin 70 (see FIG. 1). The semiconductor device 1 can also be expressed as a three-phase bridge diode package. Each component of the semiconductor device 1 will be described below.

[0014] The plurality of semiconductor chips include diodes, namely, six diodes 11, 12, 13, 14, 15, and 16. The diodes 11, 12, 13, 14, 15, and 16 each have an electrode (not shown) on a surface facing the inner lead and a surface facing the connector.

[0015] The inner leads include a first common inner lead 20, a plurality of individual inner leads, and a second common inner lead 40. The inner leads constituting the inner leads are made of a conductive metal plate (e.g., a copper plate). Each inner lead will be described below.

[0016] The first common inner lead 20 has a portion 20A extending along a predetermined first direction D1. The first direction D1 in the semiconductor device 1 is parallel to a long side LS (described later) of the sealing resin 70. At least two semiconductor chips are mounted on the first common inner lead 20 in a state where they are arranged along the first direction D1. Three diodes 11, 12, and 13 are mounted on the first common inner lead 20.

[0017] In this specification, "a semiconductor chip is mounted on an inner lead" means that the semiconductor chip is fixed to the inner lead with the inner lead and the electrodes of the semiconductor chip electrically connected. The semiconductor chip is preferably fixed to the inner lead with a conductive bonding material (so-called "solder (including lead-free solder)") (not shown).

[0018] The first common inner lead 20 is connected to a first outer lead 20B, one end of which is exposed to the outside of the sealing resin 70. The first outer lead 20B in the first embodiment extends in a direction substantially perpendicular to the first direction D1 in plan view. In the first embodiment, the first common inner lead 20 and the first outer lead 20B are integral with each other. Therefore, the first common inner lead 20 and the first outer lead 20B can also be expressed as constituting a substantially L-shaped lead as a whole.

[0019] The plurality of individual inner leads are arranged along the first direction D1. The plurality of individual inner leads include three individual inner leads 31, 32, and 33. At least one semiconductor chip is mounted on the individual inner leads 31, 32, and 33. One diode 14, 15, and 16 are mounted on the individual inner leads 31, 32, and 33, respectively. That is, in the first embodiment, the diode 14 is mounted on the individual inner lead 31, the diode 15 is mounted on the individual inner lead 32, and the diode 16 is mounted on the individual inner lead 33.

[0020] The individual inner leads 31, 32, and 33 are connected to individual outer leads 31B, 32B, and 33B, respectively, one end of which is exposed to the outside of the sealing resin 70. The individual outer leads 31B, 32B, and 33B in the first embodiment extend in a direction substantially perpendicular to the first direction D1 in plan view.

[0021] In the first embodiment, the individual inner leads 31, 32, and 33 are integrated with the individual outer leads 31B, 32B, and 33B corresponding to each of the individual inner leads. Therefore, it can also be said that the individual inner lead 31 and the individual outer lead 31B together constitute one lead. The individual inner lead 32 and the individual outer lead 32B, as well as the individual inner lead 33 and the individual outer lead 33B, are similar to the individual inner lead 31 and the individual outer lead 31B.

[0022] The second common inner lead 40 is disposed between the first common inner lead 20 and the individual inner leads 31, 32, and 33, and has a portion 40A extending along the first direction D1. One end of the second common inner lead 40 is connected to a second outer lead 40B exposed to the outside of the sealing resin 70.

[0023] The second outer lead 40B in the first embodiment extends in a direction substantially perpendicular to the first direction D1 in plan view. In the first embodiment, the second common inner lead 40 and the second outer lead 40B are integral with each other. Therefore, the second common inner lead 40 and the second outer lead 40B can be expressed as constituting a substantially L-shaped lead as a whole.

[0024] Each of the connectors constituting the plurality of connectors is made of a conductive metal plate (e.g., a copper plate). The plurality of connectors includes first connectors 51, 52, 53, the number of which (three) is equal to the number of semiconductor chips (diodes 11, 12, 13) mounted on the first common inner lead 20. The first connectors 51, 52, 53 preferably have the same shape. The plurality of connectors also includes second connectors 61, 62, 63, the number of which (three) is equal to the number of semiconductor chips (diodes 14, 15, 16) mounted on the plurality of individual inner leads (individual inner leads 31, 32, 33). The second connectors 61, 62, 63 preferably have the same shape.

[0025] The first connectors 51, 52, 53 connect the semiconductor chips (diodes 11, 12, 13) mounted on the first common inner lead 20 to the individual inner leads 31, 32, 33 in a one-to-one relationship. The first connectors 51, 52, 53 are arranged so as to straddle the second common inner lead 40, and are not connected to the second common inner lead 40. The first connectors 51, 52, 53 are preferably arranged at equal intervals along the first direction D1. The second connectors 61, 62, 63 connect the semiconductor chips (diodes 14, 15, 16) mounted on the individual inner leads 31, 32, 33 to the second common inner lead 40 in a one-to-one relationship. The second connectors 61, 62, 63 are preferably arranged at equal intervals along the first direction D1.

[0026] In this specification, "connect" refers to an electrical connection. Furthermore, "one-to-one connection" with respect to a connector means that the connector electrically connects two components and is not electrically connected to anything other than these. It is preferable to use a conductive bonding material (not shown) for connection by the connector.

[0027] When the semiconductor device 1 is viewed from above, the sealing resin 70 has a shape that defines two parallel long sides LS and two parallel short sides SS that are perpendicular to the long sides LS. The sealing resin 70 can also be described as having a substantially rectangular shape when viewed from above. Note that when considering the long sides and short sides, the presence of additional shapes (notches C in the first embodiment) is not taken into consideration.

[0028] When the semiconductor device 1 is viewed in a plane, the length in a direction perpendicular to the first direction D1 of each of the first common inner lead 20, the multiple individual inner leads (individual inner leads 31, 32, 33) and the second common inner lead 40 is less than half the length in a direction perpendicular to the first direction D1 of the sealing resin 70.

[0029] 2. Effects of the Semiconductor Device 1 of Embodiment 1 The semiconductor device 1 of embodiment 1 includes first connectors 51, 52, and 53 and second connectors 61, 62, and 63 that individually connect the semiconductor chips (diodes 11, 12, 13, 14, 15, and 16) to the inner leads. Therefore, the semiconductor device 1 can increase the number of connection points for components in the internal configuration of the semiconductor device 1 compared to conventional semiconductor devices, thereby increasing the strength of the structure around the inner leads. When the strength of the structure around the inner leads is high, the influence of the sealing resin 70 on the inner leads can be reduced. Therefore, the semiconductor device 1 is a semiconductor device that can suppress tilt of the inner leads in the sealing resin 70 compared to conventional semiconductor devices.

[0030] Furthermore, in the semiconductor device 1 according to the first embodiment, the multiple connectors include first connectors 51, 52, 53 in a number equal to the number of semiconductor chips mounted on the first common inner leads 20, and second connectors 61, 62, 63 in a number equal to the number of semiconductor chips mounted on the multiple individual inner leads. Therefore, according to the semiconductor device 1 according to the first embodiment, by using the first connectors 51, 52, 53 and second connectors 61, 62, 63 in a number equal to the number of semiconductor chips, it is possible to efficiently increase the number of connection points of the components in the internal configuration of the semiconductor device 1.

[0031] In the semiconductor device 1 according to the first embodiment, the plurality of semiconductor chips include diodes 11, 12, 13, 14, 15, and 16. Therefore, according to the semiconductor device 1 according to the first embodiment, the semiconductor device 1 can be made into a useful product using the diodes 11, 12, 13, 14, 15, and 16.

[0032] Furthermore, in the semiconductor device 1 according to the first embodiment, the plurality of semiconductor chips include six diodes 11, 12, 13, 14, 15, and 16, and three diodes 11, 12, and 13 are mounted on the first common inner lead 20. Furthermore, in the semiconductor device 1 according to the first embodiment, the plurality of individual inner leads include three individual inner leads 31, 32, and 33, and one diode 14, 15, or 16 is mounted on each of the individual inner leads 31, 32, and 33. Therefore, according to the semiconductor device 1 according to the first embodiment, the semiconductor device 1 can be made into a product useful as a so-called three-phase bridge diode package.

[0033] Furthermore, in the semiconductor device 1 according to the first embodiment, when the semiconductor device 1 is viewed in plan, the sealing resin 70 has a shape that defines two parallel long sides LS and two parallel short sides SS that are perpendicular to the long sides LS, and the first direction D1 is parallel to the long sides LS. According to the semiconductor device 1 according to the first embodiment, the first connectors 51, 52, 53 and the second connectors 61, 62, 63 can be arranged at appropriate intervals (e.g., equal intervals) and then easily connected to the first common inner lead 20 and the second common inner lead 40. Therefore, according to the semiconductor device 1 according to the first embodiment, it is possible to increase the number of connection points of the components while adopting an appropriate arrangement mode, thereby further increasing the strength of the structure around the inner leads.

[0034] Furthermore, in the semiconductor device 1 according to the first embodiment, when the semiconductor device 1 is viewed in plan, the length of each of the first common inner lead 20, the plurality of individual inner leads, and the second common inner lead 40 in a direction perpendicular to the first direction D1 is equal to or less than half the length of the sealing resin 70 in a direction perpendicular to the first direction D1. Therefore, according to the semiconductor device 1 according to the first embodiment, by suppressing the length of each inner lead in a direction perpendicular to the first direction D1, it is possible to further reduce the influence of the sealing resin 70 on each inner lead.

[0035] In the semiconductor device 1 according to the first embodiment, the first common inner lead 20 is connected to the first outer lead 20B, the individual inner leads 31, 32, and 33 are connected to the individual outer leads 31B, 32B, and 33B, and the second common inner lead 40 is connected to the second outer lead 40B. Therefore, according to the semiconductor device 1 according to the first embodiment, it is possible to appropriately connect the internal structure of the semiconductor device 1 to the outside.

[0036] [Embodiment 2] A semiconductor device 2 according to embodiment 2 basically has the same configuration as the semiconductor device 1 according to embodiment 1, but differs in the number of semiconductor chips (diodes), the number of individual inner leads, and the number of connectors. The configuration of the semiconductor device 2 will be described below, focusing on the differences from the semiconductor device 1.

[0037] The semiconductor device 2 according to the second embodiment is similar to the semiconductor device 1 in that it includes a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and a sealing resin 70 (see FIG. 2). The semiconductor device 2 can also be described as a single-phase bridge diode package. Each component of the semiconductor device 2 will be described below. In the following description, a description of the features of the components of the semiconductor device 2 that are substantially the same as the features of the corresponding components of the semiconductor device 1 may be omitted.

[0038] In the second embodiment, the plurality of semiconductor chips include four diodes 11, 12, 13, and 14. The difference in configuration between the semiconductor device 2 and the semiconductor device 1 is mainly due to the number of diodes.

[0039] In the second embodiment, two diodes 11 and 12 are mounted on the first common inner lead 20. In the second embodiment, the plurality of individual inner leads include two individual inner leads 31 and 32.

[0040] In the second embodiment, the multiple connectors include first connectors 51, 52 in a number (two) equal to the number of semiconductor chips (diodes 11, 12) mounted on the first common inner lead 20. The multiple connectors also include second connectors 61, 62 in a number (three) equal to the number of semiconductor chips (diodes 14, 15) mounted on the multiple individual inner leads (individual inner leads 31, 32).

[0041] The semiconductor device 2 according to the second embodiment differs from the semiconductor device 1 according to the first embodiment in the number of semiconductor chips (diodes), the number of individual inner leads, and the number of connectors. However, the semiconductor device 2 includes first connectors 51, 52 and second connectors 61, 62 that individually connect the semiconductor chips (diodes 11, 12, 13, 14) to the inner leads. Therefore, like the semiconductor device 1, the semiconductor device 2 is a semiconductor device that can suppress tilt of the inner leads in the sealing resin 70 compared to conventional semiconductor devices.

[0042] The semiconductor device 2 according to the second embodiment has basically the same configuration as the semiconductor device 1 according to the first embodiment, and therefore has the corresponding effects of the semiconductor device 1.

[0043] Although the present invention has been described based on the above-mentioned embodiments, the present invention is not limited to the above-mentioned embodiments. The present invention can be embodied in various forms without departing from the spirit of the present invention, and for example, the following modifications are also possible.

[0044] (1) The position, size, shape, etc. of each component element described in the above embodiments and shown in the drawings are merely examples and may be changed within the scope that does not impair the effects of the present invention.

[0045] (2) In the above embodiments, the plurality of connectors includes the first connectors 51, 52, and 53 and the second connectors 61, 62, and 63, but the present invention is not limited to this. The plurality of connectors may include connectors other than the first connector and the second connector.

[0046] (3) In the above embodiments, the plurality of semiconductor chips includes diodes 11, 12, 13, 14, 15, and 16. However, the present invention is not limited to this. The plurality of semiconductor chips may include semiconductor chips other than diodes (for example, MOSFETs and IGBTs).

[0047] (4) In the above embodiments, the sealing resin 70 has a generally rectangular shape when viewed from above, but the present invention is not limited to this. The sealing resin may have a shape other than a generally rectangular shape (for example, a square shape) when viewed from above.

[0048] (5) In the above embodiments, each inner lead is connected to an outer lead, but the present invention is not limited to this. For example, each inner lead may be connected to a terminal or the like that is separate from the inner lead.

[0049] 1, 2... semiconductor device, 11, 12, 13, 14, 15, 16... diode, 20... first common inner lead, 20B... first outer lead, 31, 32, 33... individual inner lead, 31B, 32B, 33B... individual outer lead, 40... second common inner lead, 40B... second outer lead, 51, 52, 53... first connector, 61, 62, 63... second connector, 70... sealing resin, D1... first direction, LS... long side, SS... short side

Claims

1. A semiconductor device comprising a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and sealing resin, wherein the plurality of inner leads include: a first common inner lead having a portion extending along a predetermined first direction; a plurality of individual inner leads arranged along the first direction; and a second common inner lead arranged between the first common inner lead and the plurality of individual inner leads and having a portion extending along the first direction, wherein at least two of the semiconductor chips are mounted on the first common inner lead in a state where they are arranged along the first direction, and at least one of the semiconductor chips is mounted on the individual inner lead, and the plurality of connectors include: a first connector that connects the semiconductor chip mounted on the first common inner lead to the individual inner lead in a one-to-one relationship, and a second connector that connects the semiconductor chip mounted on the individual inner lead to the second common inner lead in a one-to-one relationship.

2. The semiconductor device described in claim 1, characterized in that the plurality of connectors include a number of first connectors equal to the number of semiconductor chips mounted on the first common inner lead, and a number of second connectors equal to the number of semiconductor chips mounted on the plurality of individual inner leads.

3. The semiconductor device according to claim 1 or 2, wherein the plurality of semiconductor chips include diodes.

4. The semiconductor device according to claim 3, characterized in that the plurality of semiconductor chips include six diodes as the diodes, three of the diodes are mounted on the first common inner lead, the plurality of individual inner leads include three of the individual inner leads, and one of the diodes is mounted on the individual inner lead.

5. A semiconductor device according to any one of claims 1 to 4, characterized in that, when the semiconductor device is viewed in plan, the sealing resin has a shape that defines two long sides that are parallel to each other and two short sides that are perpendicular to the long sides and parallel to each other, and the first direction is parallel to the long sides.

6. The semiconductor device described in claim 5, characterized in that when the semiconductor device is viewed in a plane, the length of each of the first common inner lead, the plurality of individual inner leads, and the second common inner lead in a direction perpendicular to the first direction is less than half the length of the sealing resin in a direction perpendicular to the first direction.

7. A semiconductor device as described in claim 5 or 6, characterized in that the first common inner lead is connected to a first outer lead having one end exposed to the outside of the sealing resin, the individual inner lead is connected to an individual outer lead having one end exposed to the outside of the sealing resin, and the second common inner lead is connected to a second outer lead having one end exposed to the outside of the sealing resin.

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