Semiconductor device

By implementing one-to-one connector-chip connections, the semiconductor device addresses connection variations, enhancing electrical stability and heat management, leading to improved performance.

WO2026018578A1PCT designated stage Publication Date: 2026-01-22SHINDENGEN ELECTRIC MANUFACTURING CO LTD
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Patent Information

Application Number
PCT/JP2025/019672
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-07-18
Filing Date
2025-05-30
Publication Date
2026-01-22

AI Technical Summary

Technical Problem

Conventional semiconductor devices experience variations in connections between semiconductor chips and connectors due to manufacturing methods, affecting electrical characteristics and heat dissipation, primarily because the distance and inclination between one semiconductor chip and a connector influence other connections.

Method used

The semiconductor device features individual connectors that establish one-to-one connections between semiconductor chips and conductive members, minimizing the impact of variations in distance and inclination between chips and connectors.

Benefits of technology

This configuration suppresses variations in connections, enhances electrical stability, improves heat dissipation, and maintains structural integrity by reducing thermal expansion and heat concentration, thus improving the overall performance of the semiconductor device.

✦ Generated by Eureka AI based on patent content.

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Abstract

A semiconductor device 1 is provided with a plurality of semiconductor chips, and a plurality of electroconductive members including a plurality of inner leads and a plurality of connectors. The plurality of connectors include individual connectors 51, 52, 53, 61, 62, 63 for connecting, one to one, the semiconductor chips (diodes 11, 12, 13, 14, 15, 16) and the electroconductive members. In this semiconductor device 1, the distance between and incline of a given semiconductor chip and the individual connector will not have any major impact on the distance between and incline of another semiconductor chip and the individual connector. Therefore, this semiconductor device 1 makes it possible to suppress the occurrence of variation in the connections between the semiconductor chips and the connectors, as compared to a conventional semiconductor device.
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Description

Semiconductor Devices Cross Reference

[0001] This application claims priority based on Japanese Patent Application No. 2024-114766 filed on July 18, 2024, the entire contents of which are incorporated herein by reference.

[0002] The present invention relates to a semiconductor device.

[0003] Conventionally, semiconductor devices have been known that include multiple semiconductor chips, multiple inner leads, multiple connectors, and sealing resin (see, for example, Patent Document 1). In such semiconductor devices, the multiple semiconductor chips are generally connected together to one connector.

[0004] The conventional semiconductor device 900 includes a plurality of semiconductor chips 911, 912, 913, 914, 915, and 916, a plurality of inner leads 921, 922, 923, 924, and 925, a plurality of connectors 951 and 952, and a sealing resin 970 (see FIG. 3). The conventional semiconductor device 900 can also be described as a three-phase bridge diode package.

[0005] In the semiconductor device 900, semiconductor chips 911, 912, and 913 are collectively connected to a connector 951. In the semiconductor device 900, semiconductor chips 914, 915, and 916 are collectively connected to a connector 952.

[0006] JP 2016-149512 A

[0007] In a semiconductor device such as the conventional semiconductor device 900, the distance and inclination between a certain semiconductor chip and a connector significantly affect the distance and inclination between other semiconductor chips and connectors connected to the same connector (see FIG. 4, particularly FIGS. 4(b) and 4(d)). Although not shown, the semiconductor chip and connector are generally joined using solder (conductive bonding material). For this reason, in a semiconductor device that uses solder to join components, the above-mentioned "distance and inclination between the semiconductor chip and the connector" can also be expressed as "solder thickness and uniformity of the solder thickness between the semiconductor chip and the connector."

[0008] Therefore, in the semiconductor device described above, depending on the manufacturing method, the connection between one semiconductor chip and the connector may affect the connection between other semiconductor chips and the connector, resulting in variations that are difficult to correct in the connections between the semiconductor chips and the connectors. These variations may mainly affect the electrical characteristics and heat dissipation of the semiconductor device.

[0009] The present invention has been made in consideration of the above-mentioned problems, and aims to provide a semiconductor device that can suppress the occurrence of variations in the connection between a semiconductor chip and a connector, compared to conventional semiconductor devices.

[0010] The semiconductor device of the present invention is a semiconductor device comprising a plurality of semiconductor chips, a plurality of conductive members including a plurality of inner leads and a plurality of connectors, and is characterized in that the plurality of connectors include individual connectors that connect the semiconductor chips and the conductive members one-to-one.

[0011] In the semiconductor device of the present invention, the multiple connectors include component connectors that connect the semiconductor chips constituting the multiple semiconductor chips to the conductive members in a one-to-one relationship. Therefore, in the semiconductor device of the present invention, the distance and inclination between one semiconductor chip and the component connector do not significantly affect the distance and inclination between another semiconductor chip and the component connector. Therefore, the semiconductor device of the present invention is a semiconductor device that can suppress variations in the connections between the semiconductor chips and the connectors compared to conventional semiconductor devices.

[0012] 1A and 1B are diagrams showing the internal structure of a semiconductor device 1 according to a first embodiment. FIG. 1A is a plan view, FIG. 1B is a cross-sectional view taken along the line A1-A1 of FIG. 1A, and FIG. 1C is a cross-sectional view taken along the line A2-A2 of FIG. 1A. In the drawings, the term "diagram showing the internal structure" refers to a diagram showing components sealed in sealing resin. Therefore, only the outline of sealing resin 70 in FIG. 1 is shown by dashed lines. Also, in FIG. 1A, components hidden by piece connectors 51, 52, 53, 61, 62, and 63 are shown by dashed lines. Also, in FIGS. 1B and 1C, only the components facing the cross section are shown; components located behind the cross section and not facing the cross section (e.g., second outer lead 40B in FIG. 1B) are not shown. FIGS. 2B, 2C, and 4 use the same representational method as FIGS. 1B and 1C. These diagrams show the internal structure of a semiconductor device 2 according to a second embodiment. FIG. 2(a) is a plan view, FIG. 2(b) is a cross-sectional view taken along A3-A3 in FIG. 2(a), and FIG. 2(c) is a cross-sectional view taken along A4-A4 in FIG. 2(a). In FIG. 2, only the outline of the sealing resin 70 is shown by a dashed line. Also, in FIG. 2(a), components hidden by the individual connectors 51, 52, 61, and 62 are shown by a dashed line. This is a plan view showing the internal structure of a conventional semiconductor device 900. It is a cross-sectional view taken along A-A in FIG. 3. FIG. 4(a) is a cross-sectional view showing a state in which the connector 952 is not tilted, and FIGS. 4(b) and 4(c) are cross-sectional views showing a state in which the connector 952 is tilted. Note that in FIGS. 4(b) and 4(c), the tilt of the connector 952 is exaggerated. For this reason, in FIGS. 4(b) and 4(c), the connector 952 and the semiconductor chips 914, 915, and 916 may be depicted as being spaced apart. Normally, a conductive bonding material (not shown) is placed between the connector 952 and the semiconductor chips 914, 915, and 916, so even in the cases shown in Figures 4(b) and 4(c), the connection between the connector 952 and the semiconductor chips 914, 915, and 916 is not necessarily lost.

[0013] The semiconductor device of the present invention will be described below based on the embodiments shown in the drawings. In the embodiments described below, components having the exact same or substantially the same functions will be designated by common reference numerals in the respective embodiments, even if their shapes are slightly different, and descriptions already given may be omitted. The embodiments described below do not limit the invention according to the claims. Furthermore, not all of the elements and combinations thereof described in the respective embodiments are necessarily essential to the solution of the present invention.

[0014] [Embodiment 1] 1. Configuration of Semiconductor Device 1 According to Embodiment 1 The semiconductor device 1 according to embodiment 1 includes a plurality of semiconductor chips, a plurality of conductive members including a plurality of inner leads and a plurality of connectors, and a sealing resin 70 (see FIG. 1). The semiconductor device 1 can also be expressed as a three-phase bridge diode package. Each component of the semiconductor device 1 will be described below.

[0015] The plurality of semiconductor chips include diodes. The plurality of semiconductor chips include six diodes 11, 12, 13, 14, 15, and 16. The diodes 11, 12, 13, 14, 15, and 16 each have electrodes (not shown) on a surface facing the inner lead and a surface facing the connector. The semiconductor chips (diodes 11, 12, 13, 14, 15, and 16) are mounted on inner leads (described below) that constitute the plurality of inner leads.

[0016] In this specification, the term "conductive member" refers to a member through which current flows when the semiconductor device is in use. The conductive member includes not only inner leads and connectors, but also outer leads, pins, bolts, and the like.

[0017] The inner leads include a first common inner lead 20, a plurality of individual inner leads, and a second common inner lead 40. The inner leads constituting the inner leads are made of a conductive metal plate (e.g., a copper plate). Each inner lead will be described below.

[0018] The first common inner lead 20 has a portion 20A extending along a predetermined first direction D1. The first direction D1 in the semiconductor device 1 is parallel to a long side LS (described later) of the sealing resin 70. At least two semiconductor chips are mounted on the first common inner lead 20 in a state where they are arranged along the first direction D1. Three diodes 11, 12, and 13 are mounted on the first common inner lead 20.

[0019] In this specification, "a semiconductor chip is mounted on an inner lead" means that the semiconductor chip is fixed to the inner lead with the inner lead and the electrodes of the semiconductor chip electrically connected. The semiconductor chip is preferably fixed to the inner lead with a conductive bonding material (so-called "solder (including lead-free solder)") (not shown).

[0020] The first common inner lead 20 is connected to a first outer lead 20B, one end of which is exposed to the outside of the sealing resin 70. The first outer lead 20B in the first embodiment extends in a direction substantially perpendicular to the first direction D1 in plan view. In the first embodiment, the first common inner lead 20 and the first outer lead 20B are integral with each other. Therefore, the first common inner lead 20 and the first outer lead 20B can also be expressed as constituting a substantially L-shaped lead as a whole.

[0021] The plurality of individual inner leads are arranged along the first direction D1. The plurality of individual inner leads include three individual inner leads 31, 32, and 33. One diode 14, 15, and 16 is mounted on each of the individual inner leads 31, 32, and 33. That is, in the first embodiment, the diode 14 is mounted on the individual inner lead 31, the diode 15 is mounted on the individual inner lead 32, and the diode 16 is mounted on the individual inner lead 33.

[0022] The individual inner leads 31, 32, and 33 are connected to individual outer leads 31B, 32B, and 33B, respectively, one end of which is exposed to the outside of the sealing resin 70. The individual outer leads 31B, 32B, and 33B in the first embodiment extend in a direction substantially perpendicular to the first direction D1 in plan view.

[0023] In the first embodiment, the individual inner leads 31, 32, and 33 are integrated with the individual outer leads 31B, 32B, and 33B corresponding to each of the individual inner leads. Therefore, it can also be said that the individual inner lead 31 and the individual outer lead 31B together constitute one lead. The individual inner lead 32 and the individual outer lead 32B, as well as the individual inner lead 33 and the individual outer lead 33B, are similar to the individual inner lead 31 and the individual outer lead 31B.

[0024] The second common inner lead 40 is disposed between the first common inner lead 20 and the individual inner leads 31, 32, and 33, and has a portion 40A extending along the first direction D1. One end of the second common inner lead 40 is connected to a second outer lead 40B exposed to the outside of the sealing resin 70.

[0025] The second outer lead 40B in the first embodiment extends in a direction substantially perpendicular to the first direction D1 in plan view. In the first embodiment, the second common inner lead 40 and the second outer lead 40B are integral with each other. Therefore, the second common inner lead 40 and the second outer lead 40B can be expressed as constituting a substantially L-shaped lead as a whole.

[0026] Each connector constituting the plurality of connectors is made of a conductive metal plate (e.g., copper plate). The plurality of connectors includes piece connectors 51, 52, 53, 61, 62, and 63 that connect the semiconductor chip and the conductive member one-to-one. Note that, although the concept of "conductive member" in this specification includes piece connectors, a certain piece connector is naturally excluded from the conductive member to which the semiconductor chip is connected by the piece connector. As will be described later, the piece connectors 51, 52, 53, 61, 62, and 63 connect the semiconductor chip and the inner lead.

[0027] The plurality of connectors includes six individual connectors 51, 52, 53, 61, 62, and 63, the number of which is equal to the number of semiconductor chips (diodes 11, 12, 13, 14, 15, and 16). Note that in the first embodiment, the plurality of connectors can also be expressed as including six individual connectors 51, 52, 53, 61, 62, and 63 corresponding to the six diodes 11, 12, 13, 14, 15, and 16.

[0028] The component connectors 51, 52, 53, 61, 62, and 63 connect the semiconductor chips (diodes 11, 12, 13, 14, 15, and 16) to inner leads other than the inner leads on which the semiconductor chips are mounted. The component connectors 51, 52, and 53 connect the semiconductor chips (diodes 11, 12, and 13) mounted on the first common inner lead 20 to the component inner leads 31, 32, and 33 on a one-to-one basis. The component connectors 51, 52, and 53 are each arranged so as to straddle the second common inner lead 40, and are not connected to the second common inner lead 40. The component connectors 61, 62, and 63 connect the semiconductor chips (diodes 14, 15, and 16) mounted on the component inner leads 31, 32, and 33 to the second common inner lead 40 on a one-to-one basis.

[0029] In this specification, "connect" refers to an electrical connection. Furthermore, "one-to-one connection" with respect to a connector means that the connector electrically connects two components and is not electrically connected to anything other than these. It is preferable to use a conductive bonding material (not shown) for connection by the connector.

[0030] The individual connectors 51, 52, 53, 61, 62, 63 have first connection portions 51a, 52a, 53a, 61a, 62a, 63a that are arranged to cover the semiconductor chips (diodes 11, 12, 13, 14, 15, 16) when viewed in a plane, and second connection portions 51b, 52b, 53b, 61b, 62b, 63b that are narrower than the first connection portions 51a, 52a, 53a, 61a, 62a, 63a, protrude from the first connection portions 51a, 52a, 53a, 61a, 62a, 63a, and have their tips connected to conductive members.

[0031] When viewed in a plane, the semiconductor device 1 is configured so that the portion 40A of the second common inner lead 40 extending along the first direction D1 overlaps with the second connection portions 51b, 52b, 53b, 61b, 62b, 63b of all the individual connectors 51, 52, 53, 61, 62, 63.

[0032] Here, the individual connectors 51, 52, 53 that connect the semiconductor chips (diodes 11, 12, 13) mounted on the first common inner lead 20 to the individual inner leads 31, 32, 33 are referred to as first connectors. Also, the individual connectors 61, 62, 63 that connect the semiconductor chips (diodes 14, 15, 16) mounted on the individual inner leads 31, 32, 33 to the second common inner lead 40 are referred to as second connectors.

[0033] In this case, the second connection portions 51b, 52b, and 53b of the first connectors 51, 52, and 53 are adjacent to the second connection portions 61b, 62b, and 63b of the second connectors 61, 62, and 63. To explain in more detail, the second connection portion of a first connector is adjacent to the second connection portions of one or two second connectors, and the second connection portion of a second connector is also adjacent to the second connection portions of one or two first connectors.

[0034] In the semiconductor device 1, the second connection portion 51b is adjacent to the second connection portion 61b, the second connection portion 61b is adjacent to the second connection portions 51b and 52b, the second connection portion 52b is adjacent to the second connection portions 61b and 62b, the second connection portion 62b is adjacent to the second connection portions 52b and 53b, the second connection portion 53b is adjacent to the second connection portions 62b and 63b, and the second connection portion 63b is adjacent to the second connection portion 53b.

[0035] In the semiconductor device 1, when viewed in a plan view, it can also be said that the second connection portions 51b, 52b, and 53b of the first connectors 51, 52, and 53 and the second connection portions 61b, 62b, and 63b of the second connectors 61, 62, and 63 are arranged alternately. Note that when the semiconductor device 1 is viewed in a plan view, the second common inner leads 40 exist without interruption between adjacent second connection portions 51b, 52b, 53b, 61b, 62b, and 63b, and no other connectors exist.

[0036] There are three second connectors (piece connectors 61, 62, 63) in the semiconductor device 1. Connection points P between the second connectors (piece connectors 61, 62, 63) and the second common inner leads 40 are arranged at equal intervals.

[0037] The sealing resin 70 seals the semiconductor chips, the first common inner leads 20, the individual inner leads, the second common inner leads 40, and the individual connectors 51, 52, 53, 61, 62, and 63. When the semiconductor device 1 is viewed in plan, the sealing resin 70 has a shape that defines two parallel long sides LS and two parallel short sides SS that are perpendicular to the long sides LS. The sealing resin 70 can also be described as having a "substantially rectangular shape when viewed in plan." Note that when considering the long sides and short sides, the presence of additional shapes (notches C in the first embodiment) is not taken into account.

[0038] 2. Effects of the Semiconductor Device 1 According to the First Embodiment In the semiconductor device 1 according to the first embodiment, the multiple connectors include component connectors 51, 52, 53, 61, 62, and 63 that connect the semiconductor chips (diodes 11, 12, 13, and 14) constituting the multiple semiconductor chips to the conductive members in a one-to-one relationship. Therefore, in the semiconductor device 1, the distance and inclination between one semiconductor chip and the component connector do not significantly affect the distance and inclination between another semiconductor chip and the component connector. Therefore, the semiconductor device 1 is a semiconductor device that can suppress variations in the connections between the semiconductor chips and the connectors compared to conventional semiconductor devices.

[0039] Furthermore, in the semiconductor device 1 according to the first embodiment, the plurality of connectors include the same number of piece connectors 51, 52, 53, 61, 62, and 63 as the number of semiconductor chips. Therefore, according to the semiconductor device 1 according to the first embodiment, by connecting all the semiconductor chips with the piece connectors 51, 52, 53, 61, 62, and 63, it is possible to eliminate variations that are difficult to correct in the connections between the semiconductor chips and the connectors.

[0040] In the semiconductor device 1 according to the first embodiment, the plurality of semiconductor chips include diodes 11, 12, 13, 14, 15, and 16. Therefore, according to the semiconductor device 1 according to the first embodiment, the semiconductor device 1 can be made into a useful product using the diodes 11, 12, 13, 14, 15, and 16.

[0041] Furthermore, in the semiconductor device 1 according to the first embodiment, the plurality of semiconductor chips include six diodes 11, 12, 13, 14, 15, and 16 as diodes, and the plurality of connectors include six individual connectors 51, 52, 53, 61, 62, and 63 corresponding to the six diodes 11, 12, 13, 14, 15, and 16. Therefore, according to the semiconductor device 1 according to the first embodiment, the semiconductor device 1 can be made into a product useful as a so-called three-phase bridge diode.

[0042] In the semiconductor device 1 according to the first embodiment, the semiconductor chip is mounted on the inner leads, and the piece connectors 51, 52, 53, 61, 62, and 63 connect the semiconductor chip to inner leads other than the inner leads on which the semiconductor chip is mounted. Therefore, according to the semiconductor device 1 according to the first embodiment, by connecting the piece connectors 51, 52, 53, 61, 62, and 63 to stable connection destinations, it is possible to ensure the strength of the internal structure of the semiconductor device 1.

[0043] Furthermore, in the semiconductor device 1 according to the first embodiment, the multiple inner leads include a first common inner lead 20, multiple individual inner leads (individual inner leads 31, 32, 33), and a second common inner lead 40. Furthermore, in the semiconductor device 1 according to the first embodiment, at least two semiconductor chips are mounted on the first common inner lead 20 in a state where they are arranged along the first direction D1, and at least one semiconductor chip is mounted on the individual inner leads 31, 32, 33. Therefore, according to the semiconductor device 1 according to the first embodiment, it is possible to make the shape and arrangement of the inner leads suitable for connection by an individual connector.

[0044] The semiconductor device 1 according to the first embodiment also includes a sealing resin 70 that seals the semiconductor chips, the first common inner lead 20, the individual inner leads, the second common inner lead 40, and the individual connectors 51, 52, 53, 61, 62, 63. Therefore, according to the semiconductor device 1 according to the first embodiment, the semiconductor device 1 can be made into a useful product as a package sealed with a sealing resin.

[0045] In the semiconductor device 1 according to the first embodiment, the first common inner lead 20 is connected to the first outer lead 20B, the individual inner leads 31, 32, and 33 are connected to the individual outer leads 31B, 32B, and 33B, and the second common inner lead 40 is connected to the second outer lead 40B. Therefore, according to the semiconductor device 1 according to the first embodiment, it is possible to appropriately connect the internal structure of the semiconductor device 1 to the outside.

[0046] Furthermore, in the semiconductor device 1 according to the first embodiment, the individual connectors 51, 52, 53, 61, 62, 63 have first connection portions 51a, 52a, 53a, 61a, 62a, 63a that are arranged to cover the semiconductor chips (diodes 11, 12, 13, 14, 15, 16) when viewed in a plane, and second connection portions 51b, 52b, 53b, 61b, 62b, 63b that are narrower than the first connection portions 51a, 52a, 53a, 61a, 62a, 63a, protrude from the first connection portions 51a, 52a, 53a, 61a, 62a, 63a, and have their tips connected to conductive members. Therefore, according to the semiconductor device 1 of embodiment 1, it is possible to restrict the conduction of heat generated in the multiple semiconductor chips by the second connection portions 51b, 52b, 53b, 61b, 62b, and 63b, and as a result, it is possible to suppress thermal expansion due to heat generation in the multiple semiconductor chips and suppress local thermal deformation of the semiconductor device 1.

[0047] Furthermore, in the semiconductor device 1 according to the first embodiment, the multiple connectors include multiple piece connectors 51, 52, 53, 61, 62, and 63, and the semiconductor device 1 is configured, in a plan view, so that the portion 40A of the second common inner lead 40 extending along the first direction D1 overlaps with the second connection portions 51b, 52b, 53b, 61b, 62b, and 63b of all of the piece connectors 51, 52, 53, 61, 62, and 63. Therefore, in the semiconductor device 1 according to the first embodiment, the length by which the portion 40A of the second common inner lead 40 extending along the first direction D1 extends along the first direction D1 is equal to or greater than the arrangement distance of the second connection portions 51b, 52b, 53b, 61b, 62b, and 63b. Therefore, according to the semiconductor device 1 of embodiment 1, thermal expansion caused by heat generation from the semiconductor chips (diodes 11, 12, 13, 14, 15, 16) that are connected to the individual connectors 51, 52, 53, 61, 62, 63 having the second connection portions 51b, 52b, 53b, 61b, 62b, 63b and arranged in a dispersed manner can be suppressed by the second common inner lead 40 on which the semiconductor chips (diodes 11, 12, 13, 14, 15, 16) are not mounted, making it possible to suppress local thermal deformation of the semiconductor device 1 due to thermal expansion.

[0048] Furthermore, in the semiconductor device 1 according to the first embodiment, the second connection portions 51b, 52b, and 53b of the first connectors 51, 52, and 53 are adjacent to the second connection portions 61b, 62b, and 63b of the second connectors 61, 62, and 63 in a plan view. Therefore, according to the semiconductor device 1 according to the first embodiment, it is possible to reduce heat concentration by consolidating the bottlenecks of heat generated by the multiple semiconductor chips, and it is also possible to reduce the mounting area by arranging the second connection portions 51b, 52b, 53b, 61b, 62b, and 63b of the individual connectors 51, 52, 53, 61, 62, and 63 adjacent to each other.

[0049] Furthermore, in the semiconductor device 1 according to the first embodiment, there are three or more second connectors (single connectors 61, 62, 63) (three in the semiconductor device 1), and the connection points P between the second connectors (single connectors 61, 62, 63) and the second common inner leads 40 are arranged at equal intervals. Therefore, according to the semiconductor device 1 according to the first embodiment, it is possible to further reduce heat concentration.

[0050] [Embodiment 2] A semiconductor device 2 according to embodiment 2 basically has the same configuration as the semiconductor device 1 according to embodiment 1, but differs in the number of semiconductor chips (diodes), the number of individual inner leads, and the number of connectors. The configuration of the semiconductor device 2 will be described below, focusing on the differences from the semiconductor device 1.

[0051] The semiconductor device 2 according to the second embodiment is similar to the semiconductor device 1 in that it includes a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and a sealing resin 70 (see FIG. 2). The semiconductor device 2 can also be described as a single-phase bridge diode package. Each component of the semiconductor device 2 will be described below. In the following description, a description of the features of the components of the semiconductor device 2 that are substantially the same as the features of the corresponding components of the semiconductor device 1 may be omitted.

[0052] In the second embodiment, the plurality of semiconductor chips include four diodes 11, 12, 13, and 14. The difference in configuration between the semiconductor device 2 and the semiconductor device 1 is mainly due to the number of diodes.

[0053] In the second embodiment, two diodes 11 and 12 are mounted on the first common inner lead 20. In the second embodiment, the plurality of individual inner leads include two individual inner leads 31 and 32.

[0054] In the second embodiment, the plurality of connectors include four individual connectors 51, 52, 61, and 62, the number of which is equal to the number of semiconductor chips (diodes 11, 12, 13, and 14).

[0055] The semiconductor device 2 according to the second embodiment differs from the semiconductor device 1 according to the first embodiment in the number of semiconductor chips (diodes), the number of individual inner leads, and the number of connectors. However, in the semiconductor device 2, the multiple connectors include individual connectors 51, 52, 61, and 62 that connect the semiconductor chips (diodes 11, 12, 13, and 14) that make up the multiple semiconductor chips to the conductive members in a one-to-one relationship. Therefore, like the semiconductor device 1, the semiconductor device 2 is a semiconductor device that can suppress variations in the connections between the semiconductor chips and the connectors compared to conventional semiconductor devices.

[0056] The semiconductor device 2 according to the second embodiment has basically the same configuration as the semiconductor device 1 according to the first embodiment, and therefore has the corresponding effects of the semiconductor device 1.

[0057] Although the present invention has been described based on the above-mentioned embodiments, the present invention is not limited to the above-mentioned embodiments. The present invention can be embodied in various forms without departing from the spirit of the present invention, and for example, the following modifications are also possible.

[0058] (1) The position, size, shape, etc. of each component element described in the above embodiments and shown in the drawings are merely examples and may be changed within the scope that does not impair the effects of the present invention.

[0059] (2) In the above embodiments, the plurality of connectors includes the piece connectors 51, 52, 53, 61, 62, and 63, but the present invention is not limited to this. The plurality of connectors may include connectors other than the piece connectors.

[0060] (3) In the above embodiments, the plurality of semiconductor chips includes diodes 11, 12, 13, 14, 15, and 16. However, the present invention is not limited to this. The plurality of semiconductor chips may include semiconductor chips other than diodes (for example, MOSFETs and IGBTs).

[0061] (4) In the above embodiments, the sealing resin 70 has a generally rectangular shape when viewed from above, but the present invention is not limited to this. The sealing resin may have a shape other than a generally rectangular shape (for example, a square shape) when viewed from above.

[0062] (5) In the above embodiments, each inner lead is connected to an outer lead, but the present invention is not limited to this. For example, each inner lead may be connected to a terminal or the like that is separate from the inner lead.

[0063] (6) In the above embodiments, the component connectors 51, 52, 53, 61, 62, and 63 connect the semiconductor chip and the inner leads, but the present invention is not limited to this. The component connectors may connect the semiconductor chip and conductive members other than the inner leads (connectors, outer leads, terminals, etc.).

[0064] (7) In the above embodiments, the semiconductor devices 1 and 2 are provided with the sealing resin 70, but the present invention is not limited to this. The semiconductor device does not have to be provided with the sealing resin.

[0065] 1, 2... semiconductor device, 11, 12, 13, 14, 15, 16... diode, 20... first common inner lead, 20B... first outer lead, 31, 32, 33... individual inner lead, 31B, 32B, 33B... individual outer lead, 40... second common inner lead, 40B... second outer lead, 51, 52, 53, 61, 62, 63... individual connector, first connection portion... 51a, 52a, 53a, 61a, 62a, 63a, second connection portion... 51b, 52b, 53b, 61b, 62b, 63b, 70... sealing resin, D1... first direction

Claims

1. A semiconductor device comprising a plurality of semiconductor chips and a plurality of conductive members including a plurality of inner leads and a plurality of connectors, wherein the plurality of connectors include individual connectors that connect the semiconductor chips and the conductive members one-to-one.

2. The semiconductor device according to claim 1, wherein said plurality of connectors includes the same number of individual connectors as the number of said semiconductor chips.

3. The semiconductor device according to claim 1 or 2, wherein the plurality of semiconductor chips include diodes.

4. The semiconductor device according to claim 3, wherein the plurality of semiconductor chips include six diodes as the diodes, and the plurality of connectors include six of the individual connectors corresponding to the six diodes.

5. A semiconductor device according to any one of claims 1 to 4, characterized in that the semiconductor chip is mounted on the inner lead, and the individual connector connects the semiconductor chip to an inner lead other than the inner lead on which the semiconductor chip is mounted.

6. A semiconductor device according to any one of claims 1 to 5, characterized in that the inner leads include: a first common inner lead having a portion extending along a predetermined first direction; a plurality of individual inner leads arranged along the first direction; and a second common inner lead arranged between the first common inner lead and the plurality of individual inner leads and having a portion extending along the first direction; at least two of the semiconductor chips are mounted on the first common inner lead in a state where they are arranged along the first direction; and at least one of the semiconductor chips is mounted on the individual inner lead.

7. The semiconductor device according to claim 6, further comprising a sealing resin for sealing the plurality of semiconductor chips, the first common inner lead, the plurality of individual inner leads, the second common inner lead, and the individual connector.

8. The semiconductor device described in claim 7, characterized in that the first common inner lead is connected to a first outer lead having one end exposed to the outside of the sealing resin, the individual inner lead is connected to an individual outer lead having one end exposed to the outside of the sealing resin, and the second common inner lead is connected to a second outer lead having one end exposed to the outside of the sealing resin.

9. A semiconductor device according to any one of claims 6 to 8, characterized in that the individual connector has a first connection portion arranged to cover the semiconductor chip when viewed in a plane, and a second connection portion narrower than the first connection portion, protruding from the first connection portion and having a tip connected to the conductive member.

10. The semiconductor device according to claim 9, characterized in that the plurality of connectors include a plurality of the individual connectors, and the semiconductor device is configured such that, when viewed in a plane, the portion of the second common inner lead extending along the first direction overlaps with the second connection portions of all the individual connectors.

11. The semiconductor device described in claim 9 or 10, characterized in that when the individual connector that connects the semiconductor chip placed on the first common inner lead to the individual inner lead is defined as a first connector, and the individual connector that connects the semiconductor chip placed on the individual inner lead to the second common inner lead is defined as a second connector, the second connection portion of the first connector and the second connection portion of the second connector are adjacent when viewed in a plane.

12. The semiconductor device according to claim 11, wherein there are three or more second connectors, and the connection points between the second connectors and the second common inner leads are arranged at equal intervals.

Citation Information

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  • Bridge type semiconductor device

    JP1994082862U

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