Semiconductor device, semiconductor module, and method for producing semiconductor device

Abstract

This semiconductor device comprises a semiconductor element, first rewiring, and a first sealing resin that covers a portion of the semiconductor element. The semiconductor element has a first electrode, a second electrode, and a control electrode. The first rewiring is electrically connected to the control electrode. The first sealing resin has a first surface and a second surface that face opposite directions along a first direction. The first electrode is exposed from the first surface. The second electrode is exposed from the second surface. The first sealing resin has a first opening that opens from the first surface. The first rewiring is housed in the first opening. The first opening includes a first cavity defined by the first rewiring and exposed from the first surface.

Description

Semiconductor device, semiconductor module, and method for manufacturing the semiconductor device

[0001] The present disclosure relates to a semiconductor device, a manufacturing method thereof, and a semiconductor module on which the semiconductor device is mounted.

[0002] Conventionally, semiconductor devices equipped with semiconductor elements having a switching function have been widely known. Such semiconductor devices are mainly used for power conversion. Patent Document 1 discloses an example of such a semiconductor device.

[0003] The semiconductor device disclosed in Patent Document 1 includes a first semiconductor element, a heat transfer layer, rewiring, and a sealing resin. The heat transfer layer is conductively bonded to a first electrode of the first semiconductor element. The heat transfer layer functions as an electrode of the first semiconductor element. The rewiring is conductively bonded to a first gate electrode of the first semiconductor element. The heat transfer layer and the rewiring layer are each exposed from the sealing resin.

[0004] In the manufacturing process of the semiconductor device disclosed in Patent Document 1, the rewiring may be formed by electroless plating. In this case, abnormal deposition of a metal layer due to the electroless plating may occur in the portion of the heat transfer layer exposed from the sealing resin. In particular, if abnormal deposition of a metal layer with low conductivity such as copper oxide occurs, electrical continuity in the heat transfer layer may be impaired.

[0005] International Publication No. 2023 / 112662

[0006] [Summary] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor device that can prevent abnormal deposition of a metal layer in the electrode portion of a semiconductor element that is exposed through a sealing resin.

[0007] A first aspect of the present disclosure provides a semiconductor device comprising: a semiconductor element having a first electrode, a second electrode, and a control electrode; a first redistribution line electrically connected to the control electrode; and a first sealing resin covering a portion of the semiconductor element. The first sealing resin has a first surface and a second surface facing opposite each other in a first direction. The first electrode is exposed from the first surface. The second electrode is exposed from the second surface. The first sealing resin has a first opening opening from the first surface. The first redistribution line is accommodated in the first opening. The first opening is defined by the first redistribution line and includes a first cavity portion exposed from the first surface.

[0008] A semiconductor module according to a second aspect of the present disclosure includes the semiconductor device according to the first aspect of the present disclosure and a substrate including a conductive portion, the semiconductor device being mounted on the substrate, and either the terminal portion or the second electrode being conductively bonded to the conductive portion.

[0009] A third aspect of the present disclosure provides a method for manufacturing a semiconductor device, comprising: a first step of conductively joining a terminal portion to a pad portion of a semiconductor element having a pad portion and a control electrode located on one side in a first direction, and then forming a first sealing resin to cover a portion of the semiconductor element; a second step of forming a first opening that opens from the one side in the first direction of the first sealing resin; a third step of forming a first rewiring that is electrically connected to the control electrode and accommodated in the first opening; a fourth step of forming a second sealing resin that covers a portion of the first rewiring and is accommodated in the first opening; and a fifth step of exposing the terminal portion from the one side in the first direction of the first sealing resin. In the first step, the entire terminal portion is covered with the first sealing resin. In the third step, a first cavity portion is formed that is defined by the first rewiring and exposed from the one side in the first direction of the first sealing resin. In the fourth step, the second sealing resin is accommodated in the first cavity.

[0010] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0011] FIG. 1 is a plan view of a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view corresponding to FIG. 1 , showing a first sealing resin, an intermediate layer, and a coating layer through the plan view. FIG. 3 is a plan view corresponding to FIG. 2 , showing a terminal portion of a first electrode of a semiconductor element, a bonding layer of the semiconductor element, and a second sealing resin through the plan view. FIG. 4 is a bottom view of the semiconductor device shown in FIG. 1 . FIG. 5 is a cross-sectional view taken along line V-V in FIG. 2 . FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 2 . FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 2 . FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 2 . FIG. 9 is a partial enlarged view of FIG. 5 . FIG. 10 is a partial enlarged view of FIG. 6 . FIG. 11 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 12 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 13 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 14 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 15 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 16 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 17 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 18 is a cross-sectional view illustrating a manufacturing process of the semiconductor device shown in FIG. 1 . FIG. 19 is a cross-sectional view of a semiconductor module according to a first embodiment of the present disclosure. FIG. 20 is a plan view of a semiconductor device according to a second embodiment of the present disclosure. FIG. 21 is a plan view corresponding to FIG. 20 , showing a first sealing resin, an intermediate layer, and a covering layer. FIG. 22 is a bottom view of the semiconductor device shown in FIG. 20 . FIG. 23 is a cross-sectional view taken along line XXIII-XXIII in FIG. 21 . FIG. 24 is a cross-sectional view taken along line XXIV-XXIV in FIG. 21 . FIG. 25 is a cross-sectional view of a semiconductor module according to a second embodiment of the present disclosure. FIG. 26 is a plan view of a semiconductor device according to a third embodiment of the present disclosure. FIG. 27 is a plan view corresponding to FIG. 26 , showing a first sealing resin, an intermediate layer, and a covering layer. Fig. 28 is a cross-sectional view taken along line XXVIII-XXVIII in Fig. 27. Fig. 29 is a cross-sectional view taken along line XXIX-XXIX in Fig. 27. Fig. 30 is a plan view of a semiconductor device according to a fourth embodiment of the present disclosure. Fig. 31 is a bottom view of the semiconductor device shown in Fig. 30. Fig. 32 is a cross-sectional view taken along line XXXII-XXXII in Fig. 30.FIG. 33 is a cross-sectional view taken along line XXXIII-XXXIII in FIG.

[0012] DETAILED DESCRIPTION The present disclosure will be described in detail with reference to the accompanying drawings.

[0013] First Embodiment: A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 10 . The semiconductor device A10 includes a semiconductor element 10, first redistribution wiring 20, a first sealing resin 41, a second sealing resin 42, an intermediate layer 50, a protective layer 61, and a covering layer 62. For ease of understanding, FIG. 2 shows the first sealing resin 41, the intermediate layer 50, and the covering layer 62 in a perspective view. In FIG. 2 , the first sealing resin 41 is shown in an imaginary line (a two-dot chain line). For ease of understanding, FIG. 3 shows the terminal portion 112 (described in detail below) of the first electrode 11 of the semiconductor element 10, the bonding layer 19 (described in detail below) of the semiconductor element 10, and the second sealing resin 42 in a perspective view, in comparison with FIG. 2 . In FIG. 3 , the first sealing resin 41 and the terminal portion 112 are shown in an imaginary line.

[0014] In describing the semiconductor device A10, for convenience, the normal direction to the first surface 41A (details will be described later) of the first sealing resin 41 will be referred to as the "first direction z." A direction perpendicular to the first direction z will be referred to as the "second direction x." A direction perpendicular to both the first direction z and the second direction x will be referred to as the "third direction y." The semiconductor device A10 is rectangular when viewed in the first direction z.

[0015] 5 to 8, the first sealing resin 41 covers a portion of each of the semiconductor element 10 and the first rewiring 20. The first sealing resin 41 is an insulator. The first sealing resin 41 includes an additive containing a metal element.

[0016] As shown in FIGS. 1, 4, 5, and 7, the first sealing resin 41 has a first surface 41A, a second surface 41B, and a first opening 411. The first surface 41A faces one side in the first direction z. The second surface 41B faces the opposite side from the first surface 41A in the first direction z. The first opening 411 opens from the first surface 41A. The first opening 411 includes a section extending in the first direction z and a section extending in the second direction x. The first opening 411 reaches a fourth portion 132 (details of which will be described later) of the control electrode 13 of the semiconductor element 10.

[0017] The semiconductor element 10 is a switching element. The semiconductor element 10 is, for example, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). Alternatively, the semiconductor element 10 may be a field-effect transistor including a MISFET (Metal-Insulator-Semiconductor Field-Effect Transistor) or a bipolar transistor such as an IGBT (Insulated Gate Bipolar Transistor). In the description of the semiconductor device A10, the semiconductor element 10 is a vertical-structure MOSFET.

[0018] As shown in FIGS. 3, 5 and 7, the semiconductor element 10 has a first electrode 11, a second electrode 12, a control electrode 13, a main body 14, a protective film 15 and a bonding layer 19.

[0019] The body 14 forms the functional center of the semiconductor device 10. The body 14 includes a compound semiconductor substrate. The compound semiconductor substrate includes silicon carbide (SiC). As shown in Figures 5 to 7, the body 14 is located between the first electrode 11 and the second electrode 12 in the first direction z.

[0020] 5 to 7 , the first electrode 11 is located on the side of the main body 14 toward which the first surface 41A of the first sealing resin 41 faces in the first direction z. The first electrode 11 is electrically connected to the main body 14. A source current flows through the first electrode 11 when the semiconductor element 10 is driven. Therefore, the first electrode 11 corresponds to the source of the semiconductor element 10.

[0021] As shown in FIG. 2 and FIGS. 5 to 7 , the first electrode 11 has a pad portion 111 and a terminal portion 112. The pad portion 111 is in contact with the main body 14. The terminal portion 112 is located on the opposite side of the main body 14 from the pad portion 111 in the first direction z. The dimension of the terminal portion 112 in the first direction z is larger than the dimension of the pad portion 111 in the first direction z. When viewed in the first direction z, the terminal portion 112 protrudes outward beyond the main body 14. The terminal portion 112 contains copper (Cu).

[0022] 5 to 7, the terminal portion 112 is electrically connected to the pad portion 111 via a bonding layer 19. The bonding layer 19 is, for example, solder. Alternatively, the bonding layer 19 may be a sintered body of metal particles. In this case, the metal particles contain, for example, silver (Ag). Furthermore, the bonding layer 19 may be a metal layer formed by solid-state diffusion.

[0023] 2, 5, and 7, the terminal portion 112 has a first exposed surface 112A and an opening 112B. The first exposed surface 112A faces the same side as the first surface 41A of the first sealing resin 41 in the first direction z. The first exposed surface 112A is exposed from the first surface 41A and is flush with the first surface 41A. The first exposed surface 112A is exposed to the outside. The opening 112B penetrates in the first direction z and opens from one side in the second direction x. When viewed in the first direction z, the opening 112B is spaced apart from the pad portion 111.

[0024] 5 to 7 , the second electrode 12 is located on the opposite side of the body 14 from the first electrode 11. Therefore, the second electrode 12 is located on the opposite side of the body 14 from the first electrode 11 in the first direction z. The second electrode 12 is electrically connected to the body 14. A drain current flows through the second electrode 12 when the semiconductor element 10 is driven. Therefore, the second electrode 12 corresponds to the drain of the semiconductor element 10. The second electrode 12 is exposed from the second surface 41B of the first sealing resin 41.

[0025] 5 and 7 , the control electrode 13 is located on the same side as the first electrode 11 with respect to the main body 14. Therefore, the control electrode 13 is located on the same side as the first electrode 11 in the first direction z. A gate voltage for driving the semiconductor element 10 is applied to the control electrode 13. Therefore, the control electrode 13 corresponds to the gate of the semiconductor element 10. As shown in FIG. 2 , the control electrode 13 overlaps the opening 112B of the terminal portion 112 of the first electrode 11 when viewed in the first direction z.

[0026] As shown in FIGS. 5 to 7 , the protective film 15 is located on the opposite side of the main body 14 from the second electrode 12. The protective film 15 covers a portion of each of the first electrode 11, the control electrode 13, and the main body 14. The protective film 15 is an insulator. The protective film 15 includes, for example, polyimide or polybenzoxazole. The protective film 15 has a first opening 151 and a second opening 152 that each penetrate in the first direction z. The first opening 151 and the second opening 152 are spaced apart from each other in a direction perpendicular to the first direction z. The pad portion 111 of the first electrode 11 is exposed from the first opening 151. The control electrode 13 is exposed from the second opening 152.

[0027] As shown in FIG. 9 , the pad portion 111 of the first electrode 11 has a first portion 111A and a second portion 111B. The first portion 111A is in contact with the main body 14. The first portion 111A includes, for example, aluminum (Al). A protective film 15 covers a portion of the first portion 111A. The second portion 111B is located between the first portion 111A and the terminal portion 112 in the first direction z. The second portion 111B is electrically connected to the first portion 111A. The terminal portion 112 of the first electrode 11 is electrically connected to the second portion 111B via a bonding layer 19. The second portion 111B includes copper. Therefore, the terminal portion 112 and the second portion 111B include the same metal element. The second portion 111B is formed by electroless plating.

[0028] 9 , with respect to the pad portion 111 of the first electrode 11, the dimension t2 of the second portion 111B in the first direction z is larger than the dimension t1 of the first portion 111A in the first direction z. The second portion 111B is in contact with the protective film 15. A portion of the second portion 111B protrudes in the first direction z beyond the protective film 15. The remaining portion of the second portion 111B is accommodated in the first opening 151 of the protective film 15. As shown in FIG. 3 , the second portion 111B is located inward from the periphery of the first portion 111A when viewed in the first direction z.

[0029] As shown in FIG. 9 , the control electrode 13 has a third portion 131 and a fourth portion 132. The third portion 131 is in contact with the main body 14. The third portion 131 contains, for example, aluminum. The protective film 15 covers a portion of the third portion 131. The fourth portion 132 is located on the opposite side of the main body 14 from the third portion 131 in the first direction z. The fourth portion 132 is electrically connected to the third portion 131. The fourth portion 132 contains copper. Therefore, the fourth portion 132 and the second portion 111B of the pad portion 111 contain the same element. The fourth portion 132 is formed by electroless plating.

[0030] 9 , the fourth portion 132 is in contact with the protective film 15. A portion of the fourth portion 132 protrudes in the first direction z beyond the protective film 15. The remaining portion of the fourth portion 132 is housed in the second opening 152 of the protective film 15. As shown in FIG. 3 , the fourth portion 132 is located inward from the periphery of the third portion 131 when viewed in the first direction z.

[0031] 5 and 7 , the first rewiring 20 is electrically connected to the control electrode 13 of the semiconductor element 10. The first rewiring 20 is accommodated in the first opening 411 of the first sealing resin 41. When viewed in the first direction z, the first rewiring 20 overlaps with the opening 112B of the terminal portion 112 of the first electrode 11 of the semiconductor element 10 and the control electrode 13. When viewed in the second direction x, the first rewiring 20 overlaps with the terminal portion 112. The first rewiring 20 includes a metal element. The metal element is, for example, any one of copper, silver, and nickel-phosphorus (Ni—P).

[0032] 1 to 5 , the first rewiring 20 has a first connection portion 21 and a first intermediate portion 22. The first connection portion 21 is located on the opposite side of the pad portion 111 of the first electrode 11 with respect to the control electrode 13 in the second direction x. The first connection portion 21 is exposed from the first surface 41A of the first sealing resin 41. As viewed in the first direction z, the first connection portion 21 is spaced apart from the opening 112B of the terminal portion 112 of the first electrode 11. The first connection portion 21 is electrically connected to the first intermediate portion 22.

[0033] As shown in FIGS. 1 to 5 , the first intermediate portion 22 is located between the first connection portion 21 and the pad portion 111 of the first electrode 11 in the second direction x. As viewed in the first direction z, the first intermediate portion 22 overlaps with the opening 112B of the terminal portion 112 of the first electrode 11 and the control electrode 13. The dimension of the first intermediate portion 22 in the third direction y is smaller than the dimension of the opening 112B in the third direction y. As viewed in the second direction x, the first intermediate portion 22 overlaps with the terminal portion 112. The first intermediate portion 22 is electrically connected to the fourth portion 132 of the control electrode 13. The first intermediate portion 22 includes a section extending in the first direction z and a section extending in the second direction x.

[0034] 3 , 5 , 7 , and 10 , the first opening 411 of the first sealing resin 41 includes a first cavity 411A. The first cavity 411A is defined by the first intermediate portion 22 of the first rewiring 20. The first cavity 411A is exposed from the first surface 41A of the first sealing resin 41.

[0035] 2 , 5 , 6 , and 10 , the second sealing resin 42 is accommodated in the first cavity 411A of the first opening 411 of the first sealing resin 41. The second sealing resin 42 covers a part of the first intermediate portion 22 of the first rewiring 20. The remaining part of the first intermediate portion 22 is exposed from the first surface 41A of the first sealing resin 41. The first connection portion 21 of the first rewiring 20 is exposed from the second sealing resin 42. The second sealing resin 42 is an insulator.

[0036] 2, 5, and 10, the second sealing resin 42 has a second exposed surface 42A. The second exposed surface 42A faces the same side as the first surface 41A of the first sealing resin 41 in the first direction z. The second exposed surface 42A is exposed from the first surface 41A and is flush with the first surface 41A.

[0037] As shown in FIGS. 5 to 7 , the intermediate layer 50 is located on the opposite side of the protective film 15 of the semiconductor element 10 from the main body 14. The intermediate layer 50 covers the protective film 15. The intermediate layer 50 is an insulator. The intermediate layer 50 is made of a material containing, for example, a resin. The viscosity of the intermediate layer 50 in a fluid state is lower than the viscosity of the first sealing resin 41 in a fluid state. The intermediate layer 50 is covered by the first sealing resin 41. A portion of the intermediate layer 50 is accommodated in the opening 112B of the terminal portion 112 of the first electrode 11.

[0038] 9 , the intermediate layer 50 includes a portion sandwiched between the protective film 15 of the semiconductor element 10 and the terminal portion 112 of the first electrode 11 of the semiconductor element 10. The intermediate layer 50 is in contact with the second portion 111B of the pad portion 111 of the first electrode 11 and the bonding layer 19 of the semiconductor element 10.

[0039] 4 to 7, the protective layer 61 is exposed to the outside. The protective layer 61 covers the portion of the second electrode 12 that is exposed from the second surface 41B of the first sealing resin 41. The protective layer 61 is a conductor that contains a metal element. The metal element contained in the protective layer 61 is the same as the metal element contained in the first rewiring 20.

[0040] As shown in FIGS. 1 , 5 , 7 , and 10 , the covering layer 62 covers a portion of the first intermediate portion 22 of the first rewiring 20 exposed from the first surface 41A of the first sealing resin 41. Furthermore, the covering layer 62 may cover a portion of the first exposed surface 112A located around the opening 112B in the terminal portion 112 of the first electrode 11. In addition, the covering layer 62 may cover a portion of the first connection portion 21 of the first rewiring 20. The covering layer 62 is an insulator. The covering layer 62 is in contact with both the first surface 41A and the second exposed surface 42A of the second sealing resin 42. The covering layer 62 is, for example, a solder resist.

[0041] Next, an example of a method for manufacturing the semiconductor device A10 will be described with reference to Figures 11 to 18. Here, the cross-sectional positions in each of Figures 11 to 18 correspond to the cross-sectional positions in Figure 5.

[0042] The semiconductor device A10 is manufactured by the LDS (Laser Direct Structuring) method disclosed in, for example, US Patent Application Publication No. 2010 / 0019370.

[0043] First, the first step S1 is performed. The first step S1 includes the steps shown in FIG. 11, FIG. 12, and FIG.

[0044] First, as shown in FIG. 11, the terminal portion 112 of the first electrode 11 is conductively bonded to the second portion 111B of the pad portion 111 of the first electrode 11 of the semiconductor element 10 via the bonding layer 19.

[0045] 12 , an intermediate layer 50 is formed to cover the protective film 15 of the semiconductor element 10. When forming the intermediate layer 50, the intermediate layer 50 is made to be in contact with the second portion 111B of the pad portion 111 of the first electrode 11, the bonding layer 19, and the terminal portion 112 of the first electrode 11. At this time, a portion of the intermediate layer 50 is accommodated in the opening 112B of the terminal portion 112.

[0046] 13, a first sealing resin 41 is formed to cover a portion of the semiconductor element 10. In this step, the terminal portion 112 of the first electrode 11 of the semiconductor element 10 is entirely covered with the first sealing resin 41. Furthermore, in this step, the second electrode 12 of the semiconductor element 10 is exposed from the second surface 41B of the first sealing resin 41. This completes the first step S1.

[0047] Next, the second step S2 shown in FIG. 14 is performed. In the second step S2, a first opening 411 is formed, opening from the side of the first sealing resin 41 opposite to the side to which the second surface 41B faces in the first direction z. The first opening 411 is formed by laser irradiation. At this time, a metal layer (not shown) is uniformly formed on the surface of the first sealing resin 41 that defines the first opening 411. When forming the first opening 411, the first opening 411 is set so as to reach the fourth portion 132 of the control electrode 13 of the semiconductor element 10.

[0048] Next, a third step S3 shown in FIG. 15 is performed. In the third step S3, a first rewiring 20 is formed. The first rewiring 20 is electrically connected to the fourth portion 132 of the control electrode 13 of the semiconductor element 10 and is accommodated in the first opening 411 of the first sealing resin 41. The first rewiring 20 is formed by electroless plating using the metal layer formed in the second step S2 as a base. In conjunction with the formation of the first rewiring 20, a protective layer 61 is also formed by electroless plating to cover the portion of the second electrode 12 exposed from the second surface 41B of the first sealing resin 41. In this step, a first cavity 411A is formed. The first cavity 411A is defined by the first rewiring 20 and is exposed from the side of the first sealing resin 41 opposite to the side toward which the second surface 41B faces in the first direction z.

[0049] 16 is then performed. In the fourth step S4, a second sealing resin 42 is formed to cover a portion of the first rewiring 20 and to be accommodated in the first opening 411 of the first sealing resin 41. In this step, the second sealing resin 42 is accommodated in the first cavity 411A of the first opening 411.

[0050] Next, a fifth step S5 shown in FIG. 17 is performed. In the fifth step S5, the terminal portion 112 of the first electrode 11 is exposed from the side of the first sealing resin 41 opposite to the side to which the second surface 41B faces in the first direction z. To expose the terminal portion 112 from the first sealing resin 41, portions of the terminal portion 112, the first rewiring 20, the first sealing resin 41, and the second sealing resin 42 are each removed by grinding. This step exposes the first surface 41A in the first sealing resin 41. Additionally, the first exposed surface 112A and the second exposed surface 42A are exposed in the terminal portion 112 and the second sealing resin 42, respectively. Furthermore, the first connecting portion 21 and the first intermediate portion 22 are exposed in the first rewiring 20.

[0051] 18 , a covering layer 62 is formed to cover the first intermediate portions 22 of the first rewirings 20 exposed from the first surface 41A, and then the first sealing resin 41 is divided into individual pieces along cutting lines CL. The cutting lines CL are set in a grid pattern when viewed in the first direction z. By going through the above steps, the semiconductor device A10 is obtained.

[0052] Next, a semiconductor module B10 on which the semiconductor device A10 is mounted will be described with reference to Fig. 19. The cross-sectional position shown in Fig. 19 corresponds to the cross-sectional position shown in Fig. 5.

[0053] As shown in FIG. 19 , the semiconductor module B10 includes a semiconductor device A10, a substrate 70, a first conductive member 81, and a second conductive member 82. The semiconductor device A10 is mounted on the substrate 70. The substrate 70 includes an insulating substrate 71 and a conductive portion 72. The conductive portion 72 is located on one side of the insulating substrate 71 in the first direction z. The conductive portion 72 includes copper. The first conductive member 81 is, for example, a metal clip including copper. The second electrode 12 of the semiconductor element 10 of the semiconductor device A10 is conductively bonded to the conductive portion 72 via a bonding layer 79. The bonding layer 79 is, for example, solder. The first conductive member 81 is conductively bonded to the terminal portion 112 of the first electrode 11 of the semiconductor element 10 of the semiconductor device A10 via the bonding layer 79. The second conductive member 82 is, for example, a wire including aluminum (Al). The second conductive member 82 is conductively joined to the first connection portion 21 of the first rewiring 20 of the semiconductor device A10. In the semiconductor module B10, the drain of the semiconductor device A10 faces the substrate 70.

[0054] In the semiconductor module B10, the substrate 70 is a wiring board. Alternatively, the substrate 70 may be configured to include a metal lead including a conductive portion 72. Furthermore, the substrate 70 may be configured to include an external terminal located on the opposite side of the insulating substrate 71 from the conductive portion 72 in the first direction z.

[0055] Next, the effects of the semiconductor device A10 will be described.

[0056] The semiconductor device A10 includes a semiconductor element 10 having a first electrode 11, a second electrode 12, and a control electrode 13, a first rewiring 20 electrically connected to the control electrode 13, and a first sealing resin 41. The first electrode 11 is exposed from a first surface 41A of the first sealing resin 41. The second electrode 12 is exposed from a second surface 41B of the first sealing resin 41. The first sealing resin 41 has a first opening 411 that opens from the first surface 41A. The first rewiring 20 is accommodated in the first opening 411. The first opening 411 is defined by the first rewiring 20 and is exposed from the first surface 41A. Here, the first cavity 411A is formed in a third step S3 shown in FIG. 15 during the manufacturing process of the semiconductor device A10. When the first rewiring 20 is formed together with the first cavity 411A in the third step S3, the entire first electrode 11 is covered with the first sealing resin 41. This prevents a plating solution or the like used to form the first rewiring 20 from adhering to the first electrode 11, thereby preventing abnormal deposition of a metal layer on the surface of the first electrode 11. Therefore, with this configuration, in the semiconductor device A10, it is possible to prevent abnormal deposition of a metal layer in the portion of the first electrode 11 of the semiconductor element 10 exposed from the first sealing resin 41.

[0057] Furthermore, according to the manufacturing process of the semiconductor device A10, even if abnormal deposition of a metal layer occurs on the surface of the first sealing resin 41 in the third step S3, the metal layer can be reliably removed along with the surface of the first sealing resin 41 in the fifth step S5.

[0058] The first electrode 11 has a pad portion 111 and a terminal portion 112. When viewed in the second direction x, the first rewiring 20 overlaps the terminal portion 112. By adopting this configuration, even if the first electrode 11 and the second electrode 12 are each exposed from the first sealing resin 41, the semiconductor device A10 can ensure a storage space for the first rewiring 20 in the first direction z.

[0059] The semiconductor device A10 further includes a second sealing resin 42 that is housed in a first cavity 411A of the first sealing resin 41 and covers a portion of the first rewiring 20. The second sealing resin 42 is exposed from a first surface 41A of the first sealing resin 41. This configuration protects the first rewiring 20 from external factors. Furthermore, when a portion of the first rewiring 20 is removed by grinding together with the first sealing resin 41 in the fifth step S5 shown in FIG. 17 of the manufacturing process of the semiconductor device A10, concentration of shear stress caused by the grinding on the first rewiring 20 can be suppressed. This more effectively prevents the first rewiring 20 from being broken by grinding.

[0060] In the first electrode 11, the dimension of the terminal portion 112 in the first direction z is larger than the dimension of the pad portion 111 in the first direction z. By adopting this configuration, the degree of heat diffusion in the direction perpendicular to the first direction z is greater in the terminal portion 112 than in the pad portion 111. This allows the heat generated in the first electrode 11 to be effectively released to the outside. Furthermore, by adopting a configuration in which the terminal portion 112 protrudes outward beyond the body 14 of the semiconductor element 10 as viewed in the first direction z, the degree of heat diffusion in the terminal portion 112 is further increased. This allows the heat generated in the first electrode 11 to be more effectively released to the outside.

[0061] The pad portion 111 of the first electrode 11 has a first portion 111A and a second portion 111B. A dimension t2 of the second portion 111B in the first direction z is larger than a dimension t1 of the first portion 111A in the first direction z. The semiconductor element 10 has a protective film 15 that covers the main body 14 and a portion of the first electrode 11 and is an insulator. A portion of the second portion 111B protrudes beyond the protective film 15 in the first direction z. This configuration more reliably prevents the terminal portion 112 of the first electrode 11 from coming into contact with the main body 14 when electrically connecting the terminal portion 112 to the pad portion 111.

[0062] The semiconductor device A10 further includes an intermediate layer 50, which is an insulator. The intermediate layer 50 includes a portion sandwiched between the protective film 15 of the semiconductor element 10 and the terminal portion 112 of the first electrode 11. The intermediate layer 50 is in contact with the second portion 111B of the pad portion 111 of the first electrode 11. With this configuration, the gap between the protective film 15 and the terminal portion 112 is filled with the intermediate layer 50. This improves the dielectric strength of the semiconductor device A10.

[0063] The intermediate layer 50 is in contact with the bonding layer 19 of the semiconductor element 10. By adopting this configuration, it is possible to suppress the occurrence of leakage current from the first electrode 11 in the semiconductor device A10.

[0064] The terminal portion 112 of the first electrode 11 has an opening 112B penetrating in the first direction z. The opening 112B opens from one side in the second direction x. As viewed in the first direction z, the control electrode 13 and the first rewiring 20 each overlap the opening 112B. This configuration more reliably prevents short circuits between the control electrode 13 and the first rewiring 20 and the terminal portion 112.

[0065] A portion of the intermediate layer 50 is accommodated in the opening 112B of the terminal portion 112 of the first electrode 11. This configuration can prevent voids from forming in the opening 112B, thereby effectively improving the dielectric strength of the semiconductor device A10.

[0066] Second Embodiment: A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 20 to 24. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. For ease of understanding, Figure 21 shows the first sealing resin 41, intermediate layer 50, and coating layer 62 in a perspective view. In Figure 21, the first sealing resin 41 is shown by imaginary lines.

[0067] In the semiconductor device A20, the configuration of the first redistribution wiring 20 is different from that of the semiconductor device A10.

[0068] 21 to 24 , the first connection portion 21 of the first rewiring 20 is located on the same side as the second electrode 12 of the semiconductor element 10 in the first direction z. The first connection portion 21 is exposed from the second surface 41B of the first sealing resin 41. As viewed in the first direction z, the first connection portion 21 overlaps the opening 112B of the terminal portion 112 of the first electrode 11 of the semiconductor element 10. As viewed in the second direction x, the first intermediate portion 22 of the first rewiring 20 overlaps each of the terminal portion 112 and the body 14 of the semiconductor element 10. The first intermediate portion 22 includes two sections each extending in the first direction z and a section extending in the second direction x.

[0069] Next, a semiconductor module B20 on which a semiconductor device A20 is mounted will be described with reference to Fig. 25. In this figure, elements that are the same as or similar to those in the semiconductor module B10 described above are designated by the same reference numerals, and redundant description will be omitted. The cross-sectional position shown in Fig. 25 corresponds to the cross-sectional position shown in Fig. 23.

[0070] 25 , the semiconductor module B20 includes a semiconductor device A20, a substrate 70, a first conductive member 81, and a second conductive member 82. The terminal portion 112 of the first electrode 11 of the semiconductor element 10 of the semiconductor device A20 is conductively bonded to the conductive portion 72 via a bonding layer 79. The first conductive member 81 is conductively bonded to the second electrode 12 of the semiconductor element 10 of the semiconductor device A10 via the bonding layer 79. The second conductive member 82 is conductively bonded to the first connection portion 21 of the first rewiring 20 of the semiconductor device A10. In the semiconductor module B20, the source of the semiconductor device A20 faces the substrate 70.

[0071] Next, the effects of the semiconductor device A20 will be described.

[0072] The semiconductor device A20 includes a semiconductor element 10 having a first electrode 11, a second electrode 12, and a control electrode 13, a first rewiring 20 electrically connected to the control electrode 13, and a first sealing resin 41. The first electrode 11 is exposed from a first surface 41A of the first sealing resin 41. The second electrode 12 is exposed from a second surface 41B of the first sealing resin 41. The first sealing resin 41 has a first opening 411 that opens from the first surface 41A. The first rewiring 20 is accommodated in the first opening 411. The first opening 411 is defined by the first rewiring 20 and is exposed from the first surface 41A. Therefore, with this configuration, even in the semiconductor device A20, it is possible to prevent abnormal deposition of a metal layer in the portion of the first electrode 11 of the semiconductor element 10 that is exposed from the first sealing resin 41. Furthermore, the semiconductor device A20 has the same configuration as the semiconductor device A10, and thus exhibits the same effects as the semiconductor device A10.

[0073] In the semiconductor device A20, the first connection portion 21 of the first rewiring 20 is exposed from the second surface 41B of the first sealing resin 41. By adopting this configuration, in the semiconductor module B20 shown in FIG. 25 , even when the terminal portion 112 of the first electrode 11, which is the source of the semiconductor device A20, is conductively joined to the conductive portion 72 of the base material 70, the second conductive member 82 can be easily conductively joined to the first connection portion 21.

[0074] Third Embodiment: A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to Figures 26 to 29. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. For ease of understanding, Figure 27 shows the first sealing resin 41, intermediate layer 50, and coating layer 62 in a perspective view. In Figure 27, the first sealing resin 41 is shown by imaginary lines.

[0075] The semiconductor device A30 differs from the semiconductor device A10 in that it further includes second rewiring 30 and a third sealing resin 43, and in the configurations of the first sealing resin 41 and the covering layer 62.

[0076] 26 to 29 , the first sealing resin 41 has a second opening 412. The second opening 412 is located adjacent to the first opening 411 in the third direction y. The second opening 412 opens from the first surface 41A of the first sealing resin 41. The second opening 412 includes a section extending in the first direction z and a section extending in the second direction x. The second opening 412 reaches the second portion 111B of the pad portion 111 of the first electrode 11 of the semiconductor element 10.

[0077] 28 and 29 , the second rewiring 30 is electrically connected to the pad portion 111 of the first electrode 11 of the semiconductor element 10. The second rewiring 30 is housed in the second opening 412 of the first sealing resin 41. When viewed in the first direction z, the second rewiring 30 overlaps with the opening 112B of the terminal portion 112 of the first electrode 11 and the pad portion 111. When viewed in the second direction x, the second rewiring 30 overlaps with the terminal portion 112. The second rewiring 30 includes a metal element. The metal element included in the second rewiring 30 is the same as the metal element included in the first rewiring 20.

[0078] 26 to 29 , the second rewiring 30 has a second connection portion 31 and a second intermediate portion 32. The second connection portion 31 is located adjacent to the first connection portion 21 of the first rewiring 20 in the third direction y. The second connection portion 31 is exposed from the first surface 41A of the first sealing resin 41. When viewed in the first direction z, the second connection portion 31 is spaced apart from the opening 112B of the terminal portion 112 of the first electrode 11. The second connection portion 31 is electrically connected to the second intermediate portion 32.

[0079] 26 to 29 , the second intermediate portion 32 is located adjacent to the first intermediate portion 22 of the first rewiring 20 in the third direction y. As viewed in the first direction z, the pad portion 111 of the first electrode 11 and the second intermediate portion 32 each overlap the opening 112B of the terminal portion 112 of the first electrode 11. The dimension of the second intermediate portion 32 in the third direction y is smaller than the dimension of the opening 112B in the third direction y. As viewed in the second direction x, the second intermediate portion 32 overlaps the terminal portion 112. The second intermediate portion 32 is electrically connected to the second portion 111B of the pad portion 111. The second intermediate portion 32 includes a section extending in the first direction z and a section extending in the second direction x.

[0080] 27 to 29 , the second opening 412 of the first sealing resin 41 includes a second cavity 412A. The second cavity 412A is defined by the second intermediate portion 32 of the second rewiring 30. The second cavity 412A is exposed from the first surface 41A of the first sealing resin 41.

[0081] 27 to 29 , the third sealing resin 43 is accommodated in the second cavity 412A of the second opening 412 of the first sealing resin 41. The third sealing resin 43 covers a part of the second intermediate portion 32 of the second rewiring 30. The remaining part of the second intermediate portion 32 is exposed from the first surface 41A of the first sealing resin 41. The second connection portion 31 of the second rewiring 30 is exposed from the third sealing resin 43. The third sealing resin 43 is an insulator.

[0082] 27 to 29 , the third sealing resin 43 has a third exposed surface 43A. The third exposed surface 43A faces the same side as the first surface 41A of the first sealing resin 41 in the first direction z. The third exposed surface 43A is exposed from the first surface 41A and is flush with the first surface 41A.

[0083] 26 , 28 , and 29 , the covering layer 62 covers a portion of the first intermediate portion 22 of the first rewiring 20 exposed from the first surface 41A of the first sealing resin 41 and a portion of the second intermediate portion 32 of the second rewiring 30 exposed from the first surface 41A. Furthermore, in the terminal portion 112 of the first electrode 11, the covering layer 62 may cover a portion of the first exposed surface 112A located around the opening 112B. The covering layer 62 may also cover a portion of each of the first connection portion 21 of the first rewiring 20 and the second connection portion 31 of the second rewiring 30. The covering layer 62 is in contact with each of the first surface 41A, the second exposed surface 42A of the second sealing resin 42, and the third exposed surface 43A of the third sealing resin 43.

[0084] Next, the effects of the semiconductor device A30 will be described.

[0085] The semiconductor device A30 includes a semiconductor element 10 having a first electrode 11, a second electrode 12, and a control electrode 13, a first rewiring 20 electrically connected to the control electrode 13, and a first sealing resin 41. The first electrode 11 is exposed from a first surface 41A of the first sealing resin 41. The second electrode 12 is exposed from a second surface 41B of the first sealing resin 41. The first sealing resin 41 has a first opening 411 that opens from the first surface 41A. The first rewiring 20 is accommodated in the first opening 411. The first opening 411 is defined by the first rewiring 20 and is exposed from the first surface 41A. Therefore, with this configuration, even in the semiconductor device A30, it is possible to prevent abnormal deposition of a metal layer in the portion of the first electrode 11 of the semiconductor element 10 that is exposed from the first sealing resin 41. Furthermore, the semiconductor device A30 has the same configuration as the semiconductor device A10, and thus exhibits the same effects as the semiconductor device A10.

[0086] The semiconductor device A30 further includes a second redistribution line 30 electrically connected to the first electrode 11 of the semiconductor element 10. The first sealing resin 41 has a second opening 412 exposed from the first surface 41A. The second redistribution line 30 is housed in the second opening 412. The second opening 412 is defined by the second redistribution line 30 and includes a second cavity 412A exposed from the first surface 41A. This configuration allows a wire or the like to be conductively bonded to the second redistribution line 30. This makes it easier to detect the current flowing through the first electrode 11.

[0087] 30 to 33, a semiconductor device A40 according to a fourth embodiment of the present disclosure will be described. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted.

[0088] In the semiconductor device A40, the configurations of the first rewirings 20 and the second rewirings 30 are different from those of the semiconductor device A30 described above.

[0089] 31 to 33 , the first connection portion 21 of the first redistribution wiring 20 and the second connection portion 31 of the second redistribution wiring 30 are located on the same side as the second electrode 12 of the semiconductor element 10 in the first direction z. The first connection portion 21 and the second connection portion 31 are exposed from the second surface 41B of the first sealing resin 41. As viewed in the first direction z, the first connection portion 21 and the second connection portion 31 each overlap the opening 112B of the terminal portion 112 of the first electrode 11 of the semiconductor element 10. As viewed in the second direction x, the first intermediate portion 22 of the first redistribution wiring 20 and the second intermediate portion 32 of the second redistribution wiring 30 overlap the terminal portion 112 and the main body 14 of the semiconductor element 10, respectively. The first intermediate portion 22 includes two sections each extending in the first direction z and a section extending in the second direction x. In addition, the second intermediate portion 32 includes two sections each extending in the first direction z and a section extending in the second direction x.

[0090] Next, the effects of the semiconductor device A40 will be described.

[0091] The semiconductor device A40 includes a semiconductor element 10 having a first electrode 11, a second electrode 12, and a control electrode 13, a first rewiring 20 electrically connected to the control electrode 13, and a first sealing resin 41. The first electrode 11 is exposed from a first surface 41A of the first sealing resin 41. The second electrode 12 is exposed from a second surface 41B of the first sealing resin 41. The first sealing resin 41 has a first opening 411 that opens from the first surface 41A. The first rewiring 20 is accommodated in the first opening 411. The first opening 411 is defined by the first rewiring 20 and is exposed from the first surface 41A. Therefore, with this configuration, even in the semiconductor device A40, it is possible to prevent abnormal deposition of a metal layer in the portion of the first electrode 11 of the semiconductor element 10 that is exposed from the first sealing resin 41. Furthermore, the semiconductor device A40 has the same configuration as the semiconductor device A10, and thus exhibits the same effects as the semiconductor device A10.

[0092] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0093] The present disclosure includes embodiments described in the following supplementary notes. Supplementary note 1. A semiconductor device (A10) comprising: a semiconductor element (10) having a first electrode (11), a second electrode (12), and a control electrode (13); a first rewiring (20) electrically connected to the control electrode; and a first sealing resin (41) covering a portion of the semiconductor element, wherein the first sealing resin has a first surface (41A) and a second surface (41B) facing opposite each other in a first direction (z), the first electrode is exposed from the first surface, and the second electrode is exposed from the second surface, the first sealing resin has a first opening (411) opening from the first surface, the first rewiring is housed in the first opening, and the first opening is defined by the first rewiring and includes a first cavity (411A) exposed from the first surface. Supplementary note 2. The semiconductor device (A10) according to Appendix 1, wherein the first electrode (11) has a pad portion (111) and a terminal portion (112) located on one side of the pad portion in the first direction (z) and electrically connected to the pad portion, and the first rewiring (20) overlaps the terminal portion when viewed in a second direction (x) perpendicular to the first direction. Appendix 3. The semiconductor device (A10, A20) according to Appendix 2, further comprising a second sealing resin (42) housed in the first cavity (411A) and covering a portion of the first rewiring (20), the second sealing resin being exposed from the first surface (41A), and the first rewiring being exposed from at least one of the first surface and the second surface (41B). Appendix 4. The semiconductor device (A10) according to Appendix 3, wherein the second electrode (12) is located on the opposite side of the first electrode (11) in the first direction (z), and the control electrode (13) is located on the same side as the first electrode in the first direction. Appendix 5. The semiconductor device (A10) according to Appendix 4, wherein the dimension of the terminal portion (112) in the first direction (z) is larger than the dimension of the pad portion (111) in the first direction.Supplementary Note 6. The semiconductor device (A10) according to Supplementary Note 5, wherein the semiconductor element (10) has a main body (14) located between the first electrode (11) and the second electrode (12) in the first direction (z), the first electrode and the second electrode are electrically connected to the main body, and the terminal portion (112) protrudes outward from the main body as viewed in the first direction. Supplementary Note 7. The pad portion (111) has a first portion (111A) and a second portion (111B) located between the first portion and the terminal portion (112) and electrically connected to the first portion, the terminal portion is electrically connected to the second portion, and a dimension (t2) of the second portion in the first direction (z) is greater than a dimension (t1) of the first portion in the first direction. Supplementary Note 8. The semiconductor device (A10) according to Appendix 7, wherein the semiconductor element (10) is located on the opposite side of the main body (14) from the second electrode (12) and has a protective film (15) that is an insulator, the protective film covering a portion of each of the main body and the first electrode (11), and a portion of the second portion (111B) protruding in the first direction (z) beyond the protective film. Appendix 9. The semiconductor device (A10) according to Appendix 8, further comprising an intermediate layer (50) that is an insulator, the intermediate layer including a portion sandwiched between the protective film (15) and the terminal portion (112), and the intermediate layer being in contact with the second portion (111B). Appendix 10. The semiconductor device (A10) according to Appendix 9, wherein the intermediate layer (50) is covered with the first sealing resin (41). Appendix 11. The semiconductor device (A10) according to Appendix 10, wherein the terminal portion (112) has an opening (112B) penetrating in the first direction (z), and when viewed in the first direction, the control electrode (13) and the first rewiring (20) each overlap the opening. Appendix 12. The semiconductor device (A10) according to Appendix 11, wherein a portion of the intermediate layer (50) is accommodated in the opening (112B).Appendix 13. The semiconductor device (A10, A20) according to any one of Appendixes 6 to 12, wherein the first rewiring (20) has a first intermediate portion (22) electrically connected to the control electrode (13) and a first connection portion (21) electrically connected to the first intermediate portion, the first connection portion being located on the opposite side of the pad portion (111) with respect to the control electrode (13) in the second direction (x), the first connection portion being exposed from either the first surface (41A) or the second surface (41B), and at least a portion of the first intermediate portion being covered with the second sealing resin (42). Appendix 14. The semiconductor device (A10) according to Appendix 13, wherein the first connection portion (21) is exposed from the first surface (41A). Appendix 15. The semiconductor device (A20) according to Appendix 13, wherein the first connection portion (21) is exposed from the second surface (41B). Appendix 16. The semiconductor device (A20) according to Appendix 15, wherein the first intermediate portion (22) overlaps the main body (14) when viewed in the second direction (x). Appendix 17. The semiconductor device (A10) according to Appendix 13, wherein the terminal portion (112) faces the same side as the first surface (41A) in the first direction (z) and has a first exposed surface (112A) exposed from the first surface, the second sealing resin (42) faces the same side as the first surface in the first direction (z) and has a second exposed surface (42A) exposed from the first surface, and each of the first exposed surface and the second exposed surface is flush with the first surface. Appendix 18. The semiconductor device (A10) according to Appendix 17, further comprising a protective layer (61) containing a metal element and exposed to the outside, the protective layer covering the second electrode (12). Appendix 19. A semiconductor module (B10, B20) comprising: the semiconductor device (A10, A20) according to Supplementary Note 13; and a substrate (70) including a conductive portion (72), wherein the semiconductor device is mounted on the substrate; and either the terminal portion (112) or the second electrode (12) is conductively joined to the conductive portion.Supplementary Note 20. A semiconductor element (10) having a pad portion (111) and a control electrode (13) located on one side in a first direction (z), includes: a first step (S1) of conductively joining a terminal portion (112) to the pad portion, and then forming a first sealing resin (41) that covers a part of the semiconductor element; a second step (S2) of forming a first opening (411) that opens from the one side in the first direction of the first sealing resin; a third step (S3) of forming a first rewiring (20) that is electrically connected to the control electrode and is housed in the first opening; a fourth step (S4) of forming a second sealing resin (42) that covers a part of the first rewiring and is housed in the first opening; and a fifth step (S5) of exposing the terminal portion from the one side in the first direction of the first sealing resin, wherein in the first step, the entire terminal portion is covered with the first sealing resin, A method for manufacturing a semiconductor device (A10), wherein in the third step, a first cavity (411A) defined by the first rewiring and exposed from the one side of the first sealing resin in the first direction is formed, and in the fourth step, the second sealing resin is accommodated in the first cavity. Appendix 21. The semiconductor device (A10) according to Appendix 7, wherein the terminal portion (112) and the second portion (111B) each contain the same metal element. Appendix 22. The semiconductor device according to Appendix 21, wherein the metal element is copper. Appendix 23. The semiconductor device (A10) according to Appendix 8, wherein the second portion (111B) is located inward from the periphery of the first portion (111A) as viewed in the first direction (z). Appendix 24. The semiconductor device (A10) according to Appendix 9, wherein the viscosity of the intermediate layer (50) in a fluid state is lower than the viscosity of the first sealing resin (41) in a fluid state. Appendix 25. The semiconductor device (A10) according to Appendix 13, wherein a portion of the first intermediate portion (22) is exposed from the first surface (41A). Appendix 26. The semiconductor device (A10) according to Appendix 25, further comprising a covering layer (62) covering the portion of the first intermediate portion (22) exposed from the first surface (41A), the covering layer being an insulator, and the covering layer being in contact with each of the first surface (41A) and the second sealing resin (42).Appendix 27. The semiconductor device (A10) according to Appendix 17, wherein the first exposed surface (112A) is exposed to the outside. Appendix 28. The semiconductor device (A10) according to Appendix 18, wherein the protective layer (61) and the first rewiring (20) each contain the same metal element. Appendix 29. The semiconductor device (A30, A40) according to Appendix 3 further comprises: a second rewiring (30) electrically connected to the first electrode (11); and a third sealing resin (43) covering a portion of the second rewiring, wherein the first sealing resin (41) has a second opening (412) opening from the first surface (41A), the second rewiring is accommodated in the second opening, the second opening includes a second cavity (412A) defined by the second rewiring and exposed from the first surface, the third sealing resin is accommodated in the second cavity and exposed from the first surface, and the second rewiring is exposed from at least one of the first surface and the second surface (41B).

[0094] A10 to A40: semiconductor device B10, B20: semiconductor module 10: semiconductor element 11: first electrode 111: pad portion 111A, 111B: first portion, second portion 112: terminal portion 112A: first exposed surface 112B: opening 12: second electrode 13: control electrode 131, 132: third portion, fourth portion 14: main body 15: protective film 151, 152: first opening, second opening 19: bonding layer 20: first rewiring 21: first connecting portion 22: first intermediate portion 30: second rewiring 31: second connecting portion 32: second intermediate portion 41: first sealing resin 41A, 41B: first surface, second surface 411: first opening 411A: first cavity portion 412: second opening 412A: Second cavity portion 42: Second sealing resin 42A: Second exposed surface 43: Third sealing resin 43A: Third exposed surface 50: Intermediate layer 61: Protective layer 62: Covering layer 70: Base material 71: Insulating substrate 72: Conductive portion 79: Bonding layer 81, 82: First conductive member, second conductive member S1 to S5: First step to fifth step z, x, y: First direction, second direction, third direction

Claims

1. A semiconductor device comprising: a semiconductor element having a first electrode, a second electrode, and a control electrode; a first rewiring electrically connected to the control electrode; and a first sealing resin covering a portion of the semiconductor element, wherein the first sealing resin has a first surface and a second surface facing opposite each other in a first direction, the first electrode is exposed from the first surface, and the second electrode is exposed from the second surface, the first sealing resin has a first opening that opens from the first surface, the first rewiring is housed in the first opening, and the first opening is defined by the first rewiring and includes a first cavity portion exposed from the first surface.

2. The semiconductor device described in claim 1, wherein the first electrode has a pad portion and a terminal portion located on one side of the pad portion in the first direction and electrically connected to the pad portion, and when viewed in a second direction perpendicular to the first direction, the first rewiring overlaps the terminal portion.

3. The semiconductor device according to claim 2, further comprising a second sealing resin housed in the first cavity and covering a portion of the first rewiring, the second sealing resin being exposed from the first surface, and the first rewiring being exposed from at least one of the first surface and the second surface.

4. The semiconductor device according to claim 3, wherein the second electrode is located on the opposite side of the first electrode in the first direction, and the control electrode is located on the same side as the first electrode in the first direction.

5. The semiconductor device according to claim 4, wherein the dimension of said terminal portion in said first direction is larger than the dimension of said pad portion in said first direction.

6. The semiconductor device according to claim 5, wherein the semiconductor element has a body located between the first electrode and the second electrode in the first direction, the first electrode and the second electrode are electrically connected to the body, and the terminal portion protrudes outward beyond the body when viewed in the first direction.

7. The semiconductor device according to claim 6, wherein the pad portion has a first portion and a second portion located between the first portion and the terminal portion and electrically connected to the first portion, the terminal portion is electrically connected to the second portion, and the dimension of the second portion in the first direction is larger than the dimension of the first portion in the first direction.

8. The semiconductor device according to claim 7, wherein the semiconductor element is located on the opposite side of the main body from the second electrode and has a protective film that is an insulator, the protective film covering a portion of each of the main body and the first electrode, and a portion of the second portion protruding in the first direction beyond the protective film.

9. The semiconductor device according to claim 8, further comprising an intermediate layer made of an insulator, the intermediate layer including a portion sandwiched between the protective film and the terminal portion, and the intermediate layer contacting the second portion.

10. The semiconductor device according to claim 9, wherein the intermediate layer is covered with the first sealing resin.

11. The semiconductor device according to claim 10, wherein the terminal portion has an opening penetrating in the first direction, and when viewed in the first direction, the control electrode and the first rewiring each overlap the opening.

12. The semiconductor device according to claim 11, wherein a portion of the intermediate layer is accommodated in the opening.

13. A semiconductor device as described in any one of claims 6 to 12, wherein the first rewiring has a first intermediate portion electrically connected to the control electrode and a first connection portion electrically connected to the first intermediate portion, the first connection portion is located on the opposite side of the pad portion with respect to the control electrode in the second direction, the first connection portion is exposed from either the first surface or the second surface, and at least a portion of the first intermediate portion is covered with the second sealing resin.

14. The semiconductor device according to claim 13, wherein the first connection portion is exposed from the first surface.

15. The semiconductor device according to claim 13, wherein the first connection portion is exposed from the second surface.

16. The semiconductor device according to claim 15, wherein the first intermediate portion overlaps the main body when viewed in the second direction.

17. The semiconductor device described in claim 13, wherein the terminal portion has a first exposed surface facing the same side as the first surface in the first direction and exposed from the first surface, the second sealing resin has a second exposed surface facing the same side as the first surface in the first direction and exposed from the first surface, and each of the first exposed surface and the second exposed surface is flush with the first surface.

18. The semiconductor device according to claim 17, further comprising a protective layer that contains a metal element and is exposed to the outside, said protective layer covering said second electrode.

19. A semiconductor module comprising: a semiconductor device according to claim 13; and a substrate including a conductive portion, wherein the semiconductor device is mounted on the substrate; and either the terminal portion or the second electrode is conductively joined to the conductive portion.

20. A method for manufacturing a semiconductor device, comprising: a first step of conductively joining a terminal portion to a pad portion of a semiconductor element having a pad portion and a control electrode located on one side in a first direction, and then forming a first sealing resin to cover a portion of the semiconductor element; a second step of forming a first opening that opens from the one side in the first direction of the first sealing resin; a third step of forming a first rewiring that is electrically connected to the control electrode and is housed in the first opening; a fourth step of forming a second sealing resin that covers a portion of the first rewiring and is housed in the first opening; and a fifth step of exposing the terminal portion from the one side in the first direction of the first sealing resin, wherein in the first step, the entire terminal portion is covered with the first sealing resin; in the third step, a first cavity portion is formed that is defined by the first rewiring and is exposed from the one side in the first direction of the first sealing resin; and in the fourth step, the second sealing resin is housed in the first cavity.

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