Chip processing apparatus
The chip processing device automates chip classification and discharge using a rotating disk and inspection devices, addressing inefficiencies and errors in manual systems, ensuring fast and accurate chip processing.
Patent Information
- Application Number
- PCT/KR2025/010302
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-07-07
- Filing Date
- 2025-07-14
- Publication Date
- 2026-01-22
AI Technical Summary
Existing chip processing systems in casinos face inefficiencies due to manual processing, potential for human error in chip classification, and difficulties in integrating with automated systems, leading to slow processing speeds and disputes over chip authentication.
A chip processing device with a rotating disk and multiple inspection devices that automatically classify and discharge chips based on RFID and visual recognition, allowing for quick and accurate identification and spatial separation of chips.
Enables efficient, accurate, and visually confirmable chip processing, reducing disputes and facilitating mass processing without human intervention.
Smart Images

Figure KR2025010302_22012026_PF_FP_ABST
Abstract
Description
chip processing unit
[0001] The present disclosure relates to a chip processing device, and more particularly, to a device that can automatically classify chips input by a user and discharge the chips into different areas based on the classification results.
[0002] In entertainment industries like casinos, chips, exchanged for cash, serve as the primary means of transaction. These chips are not simply plastic plates; they are designed to prevent counterfeiting or duplication by embedding specific RFID (Radio Frequency Identification) tags or visual recognition information.
[0003] Traditionally, to authenticate and classify chips, operators would manually pass them through a reader, and then manually reject or escrow them based on the results. Previously, customers would go to the casino's cashier counter, wait in line, and when their turn came, exchange chips for cash (purchase / refund) face-to-face with the cashier.
[0004] However, not only is there a limit to the worker's work speed, but there is also a possibility that counterfeit chips may be classified as normal chips due to worker mistakes or errors in judgment. In addition, since chips must be processed one by one, the processing speed is slow, and fatigue due to repetitive work is high. In addition, it is difficult to link to an automated process, making it difficult to apply to mass processing or unmanned systems.
[0005] To solve this problem, some automated systems have been proposed, but there were problems such as unstable chip alignment or inaccurate sensor reading position alignment, which resulted in detection errors or frequent malfunctions.
[0006] Additionally, there are frequent instances of chips being damaged during the process of inserting them into the machine, and disputes often arise when gamers are dissatisfied with the results of automatically reading the chips.
[0007] The present disclosure is conceived in response to the aforementioned background technology, and provides a chip processing device that automatically identifies chips provided by a user and separates and discharges the chips based on the identification results.
[0008] According to the present disclosure, the process of identifying and classifying chips can be visually confirmed by the user, thereby reducing the possibility of disputes.
[0009] According to the present disclosure, a user can easily input a plurality of chips into a chip processing device, and the chip processing device can quickly identify and classify the chips.
[0010] The technical problems of the present disclosure are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the description below.
[0011] In one aspect, a chip processing device is disclosed.
[0012] The disclosed chip processing device comprises a chip input block having a stacked space for accommodating a plurality of chips formed therein; a base plate provided below the chip input block; a rotating disk rotatably installed on the base plate and having a plurality of chip receiving grooves formed on an edge thereof; a driving unit for rotating the rotating disk; at least one inspection device for inspecting a chip moving along with the rotation of the rotating disk in a predetermined area on the base plate; and a processor for determining a position from which a chip moving along with the rotation of the rotating disk is discharged from the base plate based on an inspection result of the at least one inspection device.
[0013] According to at least one embodiment, a user can easily insert a number of chips into a chip insertion block in a comfortable position.
[0014] According to at least one embodiment, the chip may be discharged into an appropriate discharge hole based on the classification or judgment result of the chip.
[0015] According to at least one embodiment, chips can be spatially separated and managed by chip classification.
[0016] According to at least one embodiment, disputes regarding chip processing can be prevented because the processing of the chip can be easily observed visually.
[0017] According to at least one embodiment, training data for training an artificial neural network model used for chip inspection can be easily obtained.
[0018] Various aspects are now described with reference to the drawings, wherein like reference numerals are used to refer to similar elements generally. In the following examples, for purposes of explanation, numerous specific details are set forth to provide a thorough understanding of one or more aspects. However, it will be apparent that such aspects may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form to facilitate the description of one or more aspects.
[0019] FIG. 1 and FIG. 2 are drawings showing a chip processing device according to an exemplary embodiment.
[0020] Fig. 3 is a drawing showing a modified example of the chip processing device shown in Figs. 1 and 2.
[0021] Figures 4 and 5 are photographs of the chip processing device shown in Figure 3.
[0022] Figure 6 is a block diagram showing a processor, inspection devices, and driving units.
[0023] In one aspect, a chip processing device is disclosed.
[0024] The disclosed chip processing device comprises a chip input block having a stacked space for accommodating a plurality of chips formed therein; a base plate provided below the chip input block; a rotating disk rotatably installed on the base plate and having a plurality of chip receiving grooves formed on an edge thereof; a driving unit for rotating the rotating disk; at least one inspection device for inspecting a chip moving along with the rotation of the rotating disk in a predetermined area on the base plate; and a processor for determining a position from which a chip moving along with the rotation of the rotating disk is discharged from the base plate based on an inspection result of the at least one inspection device.
[0025] The base plate is formed with a first hole and at least one second hole, and a chip determined to be abnormal by the processor can be discharged through the first hole, and a chip determined to be normal can be discharged through the at least one second hole.
[0026] The chip processing device may further include a reject gate that selectively opens the first hole when a chip determined to be abnormal passes over the first hole under the control of the processor.
[0027] A gate is provided in each of the at least one second hole, and the processor can control the gate provided in each of the at least one second hole to cause the chip to be discharged into a hole corresponding to the classification of the chip among the at least one second hole.
[0028] A chip that has fallen into the area where the chip receiving groove is located on the base plate in the chip injection block can pass over the first hole before over the second hole while rotating according to the rotation of the rotating disk.
[0029] The above plurality of chip receiving grooves may be formed in a semicircular shape at regular intervals along the edge of the rotating disk.
[0030] The at least one inspection device may include an optical sensor that detects whether a chip passes through a first area on the base plate by irradiating light into the first area.
[0031] The at least one inspection device may include a vision sensor that photographs a second area on the base plate.
[0032] The at least one inspection device may include a Radio Frequency (RF) reader that reads identification information of a wireless tag embedded in a chip passing through a second area on the base plate.
[0033] The chip insertion block may include a chip stacking unit having slots formed to stack a plurality of chips; and a door that opens and closes at least a portion of the front surface of the chip stacking unit.
[0034] The chip input block includes at least one inspection device for inspecting a chip stacked on the chip stacking portion, and the at least one inspection device may include at least one of a vision sensor for photographing a chip stacked on the chip stacking portion and an RF reader for reading wireless tag identification information of a chip stacked on the chip stacking portion.
[0035] The above chip stacking portion can be installed at an angle so that the front side faces upward and the rear side faces downward.
[0036] The chip stacking portion is installed on the base plate, and the chip stacking portion and the base plate can be installed at an angle so that the front side faces upward and the rear side faces downward.
[0037] At least a portion of the bottom surface of the chip stack is supported by the base plate, and the base plate may have a concave receiving groove formed on the bottom surface of the chip stack.
[0038] A concave receiving groove may be formed on the bottom surface of the above chip stack.
[0039] The width of the above-mentioned receiving groove may be smaller than the diameter of the chip.
[0040] It may include a first conveyor belt arranged at a position where chips discharged through the first hole fall, and a second conveyor belt arranged at a position where chips discharged through the second hole fall.
[0041] The first conveyor belt and the second conveyor belt may be installed at an angle so that the side that discharges the chips faces downward.
[0042] At least one discharge door is provided on the second conveyor belt, and the processor controls the driving direction of the second conveyor belt and the discharge door operation so that chips loaded on the second conveyor belt can be discharged in different directions depending on whether the user approves a transaction.
[0043] The present invention is susceptible to various modifications and embodiments. Specific embodiments are illustrated in the drawings and described in detail in the detailed description. However, this is not intended to limit the present invention to specific embodiments, but rather to encompass all modifications, equivalents, and alternatives falling within the spirit and technical scope of the present invention. Throughout the description of each drawing, similar reference numerals have been used to designate similar components.
[0044] Terms such as "first," "second," "A," and "B" may be used to describe various components, but the components should not be limited by these terms. These terms are used solely to distinguish one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as the "second component," and similarly, the second component may also be referred to as the "first component." The term "and / or" includes a combination of a plurality of related items described herein or any of a plurality of related items described herein.
[0045] When a component is referred to as being "connected" or "connected" to another component, it should be understood that it may be directly connected or connected to that other component, but that there may be other components intervening. Conversely, when a component is referred to as being "directly connected" or "connected" to another component, it should be understood that there are no other components intervening.
[0046] The terminology used in this application is only used to describe specific embodiments and is not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly indicates otherwise. In this application, it should be understood that the terms "comprise" or "have" indicate the presence of a feature, number, step, operation, component, part, or combination thereof described in the specification, but do not exclude in advance the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.
[0047] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and will not be interpreted in an idealized or overly formal sense unless explicitly defined herein.
[0048] FIG. 1 and FIG. 2 are drawings showing a chip processing device according to an exemplary embodiment.
[0049] Referring to FIGS. 1 and 2, a chip processing device may include a chip input block (110). The chip input block (110) may include a chip stacking unit (114) having slots formed therein in which a plurality of chips are stacked, and a door (116) that opens and closes at least a portion of the front surface of the chip stacking unit (114). When the door (116) is open, the front surface of the chip stacking unit (114) may be opened. The width of the opened front surface may be larger than the diameter of the chip. Accordingly, a user may stack chips on the chip stacking unit (114) through the opened front surface. The user may vertically arrange a plurality of chips and stack them all at once in the slots of the chip stacking unit (114). Through this, a user may quickly and easily input a plurality of chips into the chip input block (110).
[0050] At least a portion of the bottom surface of the chip input block (110) may be supported by a base plate (140). A first receiving groove (141) having a concave shape may be formed on the bottom surface of the chip input block (110). Accordingly, when a user inputs chips while holding a plurality of chips by hand, the user's finger may be inserted into the first receiving groove (141). The width of the first receiving groove (141) may be a size that allows the user's finger to be inserted. On the other hand, the width of the first receiving groove (141) may be smaller than the diameter of the chip. For example, the width of the first receiving groove (141) may be 2 cm to 5 cm, but this is merely an exemplary number and the embodiment is not limited thereto. The first receiving groove (141) allows the user to input chips into the chip input block (110) with a convenient motion.
[0051] By driving the first driving unit (112), the door (116) can open and close at least a portion of the front surface of the chip stacking unit (114). When the door (116) is closed, at least a portion of the front surface of the chip stacking unit (114) is blocked, so that the width of the open area of the front surface can be smaller than the diameter of the chip. The first driving unit (112) can be controlled by a processor (not shown). The processor can be composed of one or more cores, and can include a configuration for data analysis, such as a central processing unit (CPU), a general purpose graphics processing unit (GPGPU), and a tensor processing unit (TPU).
[0052] It can execute program commands stored in the processor memory. The memory can be composed of at least one of read-only memory (ROM) and random access memory (RAM).
[0053] Although not shown in the drawing, the chip input block (110) may include at least one device for inspecting chips stacked on the chip stacking unit (114). For example, the chip input block (110) may include a vision sensor or the like for photographing chips stacked on the chip stacking unit (114). Through this, the processor can verify the validity of chips stacked on the chip stacking unit (114) in advance or check the number of chips stacked on the chip stacking unit (114).
[0054] The chip insertion block (110) may include an RF reader (not shown) for inspecting chips stacked on the chip stacking unit (114). The RF reader may identify the RFID of the stacked chips.
[0055] Using at least one inspection device installed in the chip input block (110), the processor can derive information about whether the chips stacked in the chip stacking unit (114) are valid, identification information of the chips (e.g., price information), and the number of chips.
[0056] By providing information about the chips stacked on the chip stack (114), the processor allows the user and operator to proactively reach an agreement on the number of chips before the chip processing process begins in earnest. This reduces the potential for disputes arising during the chip processing process.
[0057]
[0058] A base plate (140) may be provided on the lower side of the chip input block (110). At least one hole may be formed in the base plate (140). A first hole (142) and a second hole (148) may be formed in the base plate (140). For example, a chip determined to be abnormal may be discharged through the first hole (142), and a chip determined to be normal may be discharged through the second hole (148). However, the embodiment is not limited thereto. The base plate (140) may have more than two holes formed. Chips determined to be normal may be discharged through different holes according to the classification result (e.g., the result of the classification of the value of the chip). That is, the second hole (148) through which chips determined to be normal are discharged may include a plurality of holes, and chips of different classifications may be discharged through each hole.
[0059] For example, the second hole may include a second-1 hole through which chips of a first category having a first value are discharged, and a second-2 hole through which chips of a second category having a second value are discharged. Each of the second-1 hole and the second-2 hole may be provided with a gate. Each gate may be opened when a chip suitable for the corresponding hole passes over the hole. For example, the second-1 gate may open the second-1 hole when a chip of the first category passes over or passes over the second-1 hole.
[0060] A rotating disk (130) may be rotatably installed on a base plate (140). A plurality of chip receiving grooves (132) may be formed on the edge of the rotating disk (130). Each of the plurality of chip receiving grooves may have a semicircular shape. The chip receiving grooves (132) may be arranged at regular intervals along the circumferential direction on the edge of the rotating disk (130).
[0061] The chip processing device may include a second driving unit (120). The second driving unit may rotate the rotating disk (130) under the control of the processor. Chips stacked on the chip stacking unit (114) of the chip input block (110) may sequentially fall and be settled in the receiving grooves (132) of the rotating disk. The chips placed in the receiving grooves (132) may move together as the rotating disk (130) rotates. One chip may be accommodated in each of the receiving grooves (132).
[0062] The second driving unit (120) can rotate the rotating disk (130) discontinuously. The second driving unit (120) can move the rotating disk (130) by a predetermined angle, then stop for a moment, and then rotate it again by the predetermined angle. For example, the second driving unit (120) can repeat the operation of rotating the rotating disk (130) by one pitch and then stopping.
[0063] As another example, the second driving unit (120) can rotate the rotating disk (130) at a constant speed. The processor can temporarily stop the operation of the second driving unit (120) as needed. For example, when discharging a chip determined to be defective from the first hole (142), the second driving unit (120) can temporarily stop the rotation of the rotating disk (130). This allows the chip to be stably discharged to an appropriate discharge hole based on the classification or judgment results of the chip.
[0064] The chip processing device may include at least one inspection device (152, 154, 156). The at least one inspection device (152, 154, 156) may inspect a chip moving along the rotation of the rotating disk (130) in a predetermined area on the base plate. The at least one inspection device (152, 154, 156) may inspect each of the chips passing through the predetermined area on the base plate.
[0065] At least one inspection device (152, 154, 156) may include a light sensor (152). The light sensor (152) may be installed below a first region above the base plate (140). The light sensor (152) may irradiate light to the first region above the base plate (140). The light sensor (152) may measure light transmittance or reflectance. The processor may determine whether a chip is present above the first region based on the measurement result of the light sensor (152).
[0066] The optical sensor (152) can be replaced with another device. For example, it can be replaced with a magnetic sensor or a micro switch. The magnetic sensor can detect the presence of a chip by detecting metal inside the chip. The micro switch can detect the presence of a chip by detecting the weight of the chip.
[0067] When a chip exists on the first area, the processor can control the second driving unit (120) to rotate the rotating disk (130) to cause the chip to rotate.
[0068] The processor can control the second drive unit (120) to stop the rotation of the rotating disk (130) immediately or after the rotating disk (130) has rotated a predetermined angle if there is no chip above the first area.
[0069] At least one inspection device (152, 154, 156) may include an RF reader (154) that reads identification information of a wireless tag embedded in a chip passing through a second area on a base plate (140). The surface below the second area of the base plate (140) may include a plastic material rather than a metal material. This may prevent radio waves transmitted and received by the RF reader (154) from being distorted. The RF reader (154) may be positioned below the plastic material surface and read identification information of a wireless tag embedded in a chip passing through the second area.
[0070] At least one inspection device (152, 154, 156) may include a vision sensor (156) that photographs a second area on the base plate (140). The vision sensor (156) may transmit the photographed image to a processor. The processor may analyze the photographed image of the vision sensor (156) using a pre-trained artificial neural network model or image processing model. The processor may determine whether the chip is normal or abnormal, the type of the chip, etc. from the photographed image.
[0071] The vision sensor (156) may be supported by a support (94). The support (94) may be installed on a support desk (92). The base plate (140) may be supported by support columns (93) provided on the support desk (92). A first conveyor belt (172) and a second conveyor belt (174) may be provided under the support desk (92).
[0072] As the inspection devices (152, 154, 156) inspect the chips, it is possible to easily and accurately derive information on whether the chip is normal or abnormal and classification information on the chip.
[0073] By using a chip processing device according to the present disclosure, learning data can be easily secured during the learning process of an artificial neural network model. The second driving unit (120) can rotate the rotating disk (130) while chips labeled with pre-reading results are placed in chip receiving grooves (132). While the rotating disk (130) rotates, the vision sensor (156) can repeatedly capture images of chips passing through the second region, thereby easily acquiring a large amount of learning data. According to the present disclosure, a large number of captured images can be acquired in a short period of time without the hassle of a person having to capture each chip individually. The processor can train an artificial neural network model using the acquired learning data.
[0074] In Fig. 1, the rotating disk (130) can rotate counterclockwise. Accordingly, chips dropped from the chip input block (110) can move along the rotation of the rotating disk (130) and first pass over the first hole (142) and then move over the second hole (148).
[0075] The processor can determine the position at which a chip moved by the rotation of the rotating disk (130) is ejected from the base plate (140) based on the inspection results of at least one inspection device (152, 154, 156).
[0076] Chips determined to be abnormal by the processor may be ejected through the first hole (142). Chips determined to be normal by the processor may not be ejected through the first hole (142) but may be moved to the second hole (148) and ejected through the second hole (148). Chips determined to be normal may also be ejected through different holes depending on the classification of the chips (e.g., classification by value of the chips).
[0077] The chip processing device may include a reject gate (143) that opens and closes the first hole (142). The reject gate (143) may open or close the first hole (142) by a third driving unit (145).
[0078] The processor can control the third driving unit (145) to selectively open the reject gate (143) when a chip determined to be abnormal passes over the first hole. The chip discharged through the first hole (142) can fall and fall downward along the first channel (164). The abnormal chip that falls through the first channel (164) can fall onto the first conveyor belt (172).
[0079] Chips that are judged normal can be discharged through the second hole (148). Chips that fall through the second hole (148) can fall downward along the second channel (166). Normal chips that fall through the second channel (166) can fall onto the second conveyor belt (174).
[0080] As described above, chips can be spatially separated according to the classification results by having the processor eject the chips into appropriate holes based on the results of the chip analysis.
[0081] The first conveyor belt (172) can discharge chips that have been judged as abnormal. The second conveyor belt (174) can discharge chips that have been judged as normal. The chips discharged from the first conveyor belt (172) can be stored in a predetermined first storage unit (not shown). The chips discharged from the second conveyor belt (174) can be stored in a second storage unit (not shown) that is different from the first storage unit.
[0082] The first conveyor belt (172) and the second conveyor belt (174) may be installed at an angle so that the chip discharge side faces downward. This can prevent chips that fall on the first conveyor belt (172) and the second conveyor belt (174) from being discharged and remaining there.
[0083]
[0084] Fig. 3 is a drawing showing a modified example of the chip processing device shown in Figs. 1 and 2. Figs. 4 and 5 are photographs of the chip processing device shown in Fig. 3.
[0085] In explaining the embodiments of FIGS. 3 to 5, any description overlapping with FIGS. 1 and 2 will be omitted.
[0086] Referring to Fig. 3, the front surface of the chip stacking portion (114) may be installed at an angle so that the front surface faces upward and the rear surface faces downward. Here, the front surface of the chip stacking portion (114) means an open surface through which chips can be inserted into the chip stacking portion (114).
[0087] The chip insertion block (110) can be installed on the base plate (140). Accordingly, in order for the front surface of the chip stacking portion (114) to face upward, the base plate (140) and the support desk (92) can also be installed at an angle so that the front surface faces upward and the rear surface faces downward.
[0088] The inclined structure illustrated in Fig. 3 can prevent chips inserted through the front side of the chip insertion stack (114) from being removed from the front side again. In addition, even if a user inserts a large number of chips, the chips can be naturally aligned in the slots of the chip insertion stack (114) by gravity.
[0089] Referring to Fig. 4, a concave second receiving groove (117) may be formed on the bottom surface of the chip stacking portion (114). When a user inserts a plurality of chips while holding them in his / her hand, the user's finger may be inserted into the second receiving groove (117). The width of the second receiving groove (117) may be a size that allows the user's finger to enter. On the other hand, the width of the second receiving groove (117) may be smaller than the diameter of the chip.
[0090] A chip that is inserted into the chip stacking unit (114) in the wrong direction can be guided to the second receiving groove (117). For example, when a user aligns and inserts a chip in a vertical or diagonal direction instead of a horizontal direction, the chip can be guided toward the second receiving groove (117) without being aligned in the wrong direction in the slot of the chip stacking unit (114). Since the bottom of the second receiving groove (117) is inclined low at the front, a chip that is inserted in the wrong direction can be guided to fall outside the chip stacking unit (114). This can prevent the chip from being misaligned in the chip stacking unit (114).
[0091] A third receiving groove (118) may be formed on the upper portion of the chip stacking portion (114). The width of the third receiving groove (118) may be smaller than the diameter of the chip. This allows the chips to be stacked only below the third receiving groove (118). By adjusting the height of the third receiving groove (118), the maximum number of chips stacked on the chip stacking portion (114) can be controlled.
[0092] In addition, the width of the third receiving groove (118) may be a size that allows the user's fingers to enter. The width of the third receiving groove (118) may be greater than the width of the second receiving groove (117). Therefore, two fingers may enter the third receiving groove (118). This allows the user to conveniently remove chips stacked on the chip stacking portion (114) by allowing the fingers to enter the third receiving groove (118).
[0093] The chip insertion block (110) may include a door (116). By driving the first driving unit (112), the door (116) may open and close at least a portion of the front surface of the chip stacking unit (114). For example, the door (116) may open and close at least a portion of the front surface of the chip stacking unit (114) in a sliding manner.
[0094] Chips discharged from the first conveyor belt (172) can be stored in the first receiving section (182). Chips discharged from the second conveyor belt (174) can be stored in the second receiving section (184).
[0095] The chip processing device may further include a discharge door (177). The discharge door (177) may be opened and closed by a fourth driving unit (179). The discharge door (177) may block discharge of chips moving on the second conveyor belt (174). After the chip inspection process is completed, the processor may open the discharge door (177) to discharge all chips on the second conveyor belt (174) to the second receiving unit (184) at once.
[0096] The processor can control the driving direction of the second conveyor belt (174) and the operation of the discharge door (177) so that the chips loaded on the second conveyor belt (174) are discharged in different directions depending on whether the user approves the transaction.
[0097] For example, discharge doors (177) may be provided at the front and rear sides of the second conveyor belt (174). For example, if a user cancels a transaction, the processor may open the front discharge door (177) and drive the second conveyor belt (174) to discharge the chips forward, thereby returning the chips to the user. In another example, if the user approves a transaction, the processor may open the rear discharge door (177) and drive the second conveyor belt (174) to discharge the chips backward, thereby transporting the chips to a storage bin.
[0098] Referring to FIG. 5, a chip (10) dropped from a chip input block (110) can move along with the rotation of a rotating disk (130). A vision sensor (156) can capture a chip passing through a predetermined area, and a processor can read / classify the chip from the captured image.
[0099] Figure 6 is a block diagram showing a processor (100), inspection devices (152, 154, 156), and driving units (112, 120, 145).
[0100] Referring to FIG. 6, the processor (100) can obtain the chip inspection results from the inspection devices (152, 154, 156). The processor (100) can output the chip classification information. For the chip inspection process, the processor (100) can control the first driving unit (112) to open and close the door (116), the second driving unit (120) to rotate the rotating disk (130), and the third driving unit (145) to open and close the reject gate (143).
[0101] The chip processing device according to exemplary embodiments has been described with reference to FIGS. 1 to 6.
[0102] According to at least one embodiment, a user can easily insert a number of chips into a chip insertion block in a comfortable position.
[0103] According to at least one embodiment, the chip may be discharged into an appropriate discharge hole based on the classification or judgment result of the chip.
[0104] According to at least one embodiment, chips can be spatially separated and managed by chip classification.
[0105] According to at least one embodiment, disputes regarding chip processing can be prevented because the processing of the chip can be easily observed visually.
[0106] According to at least one embodiment, training data for training an artificial neural network model used for chip inspection can be easily obtained.
[0107] The embodiments described above may be implemented using hardware components, software components, and / or a combination of hardware components and software components. For example, the devices, methods, and components described in the embodiments may be implemented using one or more general-purpose computers or special-purpose computers, such as, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a programmable logic unit (PLU), a microprocessor, or any other device capable of executing instructions and responding to them. The processing device may execute an operating system (OS) and one or more software applications running on the operating system. The processing device may also access, store, manipulate, process, and generate data in response to the execution of the software. For ease of understanding, the processing device is sometimes described as being used alone; however, one of ordinary skill in the art will recognize that the processing device may include multiple processing elements and / or multiple types of processing elements. For example, a processing unit may include multiple processors, or a processor and a controller. Other processing configurations, such as parallel processors, are also possible.
[0108] Software may include a computer program, code, instructions, or a combination of one or more of these, which may configure a processing device to perform a desired operation or may, independently or collectively, command the processing device. The software and / or data may be permanently or temporarily embodied in any type of machine, component, physical device, virtual equipment, computer storage medium or device, or transmitted signal wave, for interpretation by the processing device or for providing instructions or data to the processing device. The software may also be distributed over networked computer systems and stored or executed in a distributed manner. The software and data may be stored on one or more computer-readable recording media.
[0109] The method according to the embodiment may be implemented in the form of program commands that can be executed through various computer means and recorded on a computer-readable medium. The computer-readable medium may include program commands, data files, data structures, etc., alone or in combination. The program commands recorded on the computer-readable medium may be those specially designed and configured for the embodiment or may be those known and available to those skilled in the art of computer software. Examples of the computer-readable recording medium include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical media such as CD-ROMs and DVDs, magneto-optical media such as floptical disks, and hardware devices specially configured to store and execute program commands, such as ROMs, RAMs, and flash memories. Examples of the program commands include not only machine language codes generated by a compiler, but also high-level language codes that can be executed by a computer using an interpreter, etc. The above-mentioned hardware devices may be configured to operate as one or more software modules to perform the operations of the embodiment, and vice versa.
[0110] Although the embodiments described above have been described with limited drawings, those skilled in the art will appreciate that various technical modifications and variations can be applied based on the above. For example, appropriate results can still be achieved even if the described techniques are performed in a different order than described, and / or components of the described systems, structures, devices, circuits, etc. are combined or combined in a different manner than described, or are replaced or substituted with other components or equivalents.
Claims
1. In a chip processing device, A chip input block having a stacked space formed to accommodate multiple chips; A base plate provided on the lower side of the chip insertion block; A rotating disk rotatably installed on the above base plate and having a plurality of chip receiving grooves formed on the edge; A driving unit for rotating the above rotating disk; At least one inspection device for inspecting a chip moving along the rotation of the rotating disk in a predetermined area on the base plate; and A chip processing device including a processor that determines a position at which a chip moving along the rotation of the rotating disk is ejected from the base plate based on an inspection result of at least one inspection device.
2. In paragraph 1, The base plate is formed with a first hole and at least one second hole, A chip processing device in which a chip determined to be abnormal by the processor is discharged through a first hole, and a chip determined to be normal is discharged through at least one second hole.
3. In paragraph 2, A chip processing device further comprising a reject gate that selectively opens the first hole when a chip determined to be abnormal passes over the first hole under the control of the processor.
4. In paragraph 2, Each of the above at least one second hole is provided with a gate, A chip processing device in which the processor controls a gate provided in each of the at least one second hole so that the chip is discharged into a hole corresponding to the classification of the chip among the at least one second hole.
5. In paragraph 3, A chip processing device in which a chip that has fallen into an area where the chip receiving groove is located on the base plate in the chip input block passes over the first hole before over the second hole while rotating according to the rotation of the rotating disk.
6. In paragraph 1, A chip processing device in which the plurality of chip receiving grooves are formed in a semicircular shape at regular intervals along the edge of the rotating disk.
7. In paragraph 1, A chip processing device, wherein at least one inspection device includes an optical sensor that inspects whether a chip passes through a first area on the base plate by irradiating light into the first area.
8. In paragraph 7, A chip processing device comprising at least one inspection device that photographs a second area on the base plate.
9. In paragraph 7, A chip processing device, wherein at least one of the inspection devices comprises an RF (Radio Frequency) reader for reading identification information of a wireless tag embedded in a chip passing through a second area on the base plate.
10. In paragraph 1, The above chip insertion block comprises a chip stacking section in which slots are formed for stacking multiple chips; and A chip processing device comprising a door that opens and closes at least a portion of the front surface of the chip stack.
11. In paragraph 10, The chip insertion block includes at least one inspection device for inspecting chips stacked on the chip stacking portion, A chip processing device including at least one of a vision sensor for photographing a chip stacked on a chip stack and an RF reader for reading wireless tag identification information of a chip stacked on a chip stack.
12. In paragraph 10, A chip processing device in which the above chip stacking section is installed at an angle so that the front side faces upward and the rear side faces downward.
13. In paragraph 12, The above chip stack is installed on the base plate, A chip processing device in which the above chip stacking portion and the above base plate are installed at an angle so that the front side faces upward and the rear side faces downward.
14. In paragraph 10, At least a portion of the bottom surface of the chip stack is supported by the base plate, A chip processing device having a concave receiving groove formed on the bottom surface of the chip stacking portion on the above base plate.
15. In paragraph 10, A chip processing device having a concave receiving groove formed on the bottom surface of the above chip stack.
16. In paragraph 15, A chip processing device in which the width of the above-mentioned receiving groove is smaller than the diameter of the chip.
17. In paragraph 2, A chip processing device comprising a first conveyor belt arranged at a position where chips discharged through the first hole fall and a second conveyor belt arranged at a position where chips discharged through the second hole fall.
18. In paragraph 17, A chip processing device in which the first conveyor belt and the second conveyor belt are installed at an angle so that the side that discharges chips faces downward.
19. In paragraph 17, At least one discharge door is provided on the second conveyor belt, A chip processing device in which the processor controls the driving direction of the second conveyor belt and the operation of the discharge door so that chips loaded on the second conveyor belt are discharged in different directions depending on whether the user approves the transaction.
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