Solar cell, topcon cell, photovoltaic module, and tandem cell

Abstract

The present disclosure is applicable to the technical field of solar power generation, and provides a solar cell, a TOPCon cell, a photovoltaic module, and a tandem cell. The solar cell comprises a silicon substrate, wherein the silicon substrate has a front surface and a back surface opposite to each other, the front surface of the silicon substrate is provided with a first textured surface, a predefined range region of an edge of the front surface of the silicon substrate is provided with a second textured surface, the first textured surface features a pyramid structure, the second textured surface features a rounded-tip pyramid structure, and an apex of the rounded-tip pyramid structure has an arc-shaped surface. By means of the described configuration, a first textured surface featuring a pyramid structure is formed on the front surface of the silicon substrate, and a second textured surface featuring a rounded-tip pyramid structure is formed by secondary etching on the basis of the first textured surface. This reduces the doping concentration of the front surface of the silicon substrate, and reduces surface recombination in same, thereby increasing open-circuit voltage and current, and improving conversion efficiency.

Description

Solar cell, TOPCon cell, photovoltaic module and laminated cell

[0001] Cross-reference to Related Applications

[0002] The present disclosure claims priority to the Chinese patent application No. 202421740101.8, filed on July 22, 2024, and entitled “Solar cell, TOPCon cell, photovoltaic module and laminated cell”, the entire content of which is incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure belongs to the technical field of solar power generation, and particularly relates to a solar cell, a TOPCon cell, a photovoltaic module and a laminated cell. BACKGROUND

[0004] A solar cell is a kind of photoelectric semiconductor wafer that directly generates electricity by using sunlight, also known as “solar chip” or “photovoltaic cell”. It can output voltage and generate current in a loop as long as it is illuminated by light with a certain illuminance.

[0005] In the production of solar cells, the performance and photoelectric conversion rate of silicon wafer solar cells are closely related to the surface structure of the solar cell wafer. Therefore, in the manufacturing process, chemical etching texturing is an important process for the silicon wafer, which aims to reduce the surface reflectivity of the silicon wafer, increase the absorption of light, and increase the density of photo-generated carriers, thereby improving the photoelectric conversion rate of the solar cell. However, the front surface of the existing solar cell wafer has a high doping concentration, which causes high recombination on the front surface and affects the conversion efficiency of the solar cell.

[0006] SUMMARY

[0007] The present disclosure provides a solar cell wafer to solve the problem that the existing solar cell wafer has high recombination on the front surface, which affects the conversion efficiency of the solar cell.

[0008] The present disclosure is implemented in this way. A solar cell wafer includes a silicon substrate having opposite front and back surfaces, the front surface of the silicon substrate is provided with a first textured surface, and a second textured surface is provided in a preset range of the edge of the front surface of the silicon substrate. The first textured surface has a pyramid structure, and the second textured surface has a tower tip rounded pyramid structure. The tower tip of the tower tip rounded pyramid structure has an arc surface.

[0009] In some embodiments, the preset range is a region with a distance of less than or equal to 20 mm from the edge of the silicon substrate.

[0010] In some embodiments, the preset range is a region with a distance of less than or equal to 5 mm from the edge of the silicon substrate.

[0011] In some embodiments, the silicon substrate includes any one of a P-type silicon wafer and an N-type silicon wafer.

[0012] In a second aspect, the present disclosure further provides a TOPCon cell including the solar cell wafer as described above.

[0013] In some embodiments, the TOPCon cell includes an emitter layer, a silicon substrate, a diffusion doped layer, a silicon oxide layer, a doped polysilicon layer, a front electrode, and a back electrode, the emitter layer is disposed on a front surface of the silicon substrate, the front electrode is connected to the emitter layer, the diffusion doped layer, the silicon oxide layer, and the doped polysilicon layer are sequentially disposed on a back surface of the silicon substrate in a direction away from the silicon substrate, and the back electrode is connected to the doped polysilicon layer.

[0014] In some embodiments, the silicon oxide layer and the doped polysilicon layer are disposed in a partial region of the back surface of the silicon substrate.

[0015] In some embodiments, the emitter layer is provided with a front passivation film on a side away from the silicon substrate, and the doped polysilicon layer is provided with a back passivation film on a side away from the silicon substrate.

[0016] In some embodiments, the front passivation film and the back passivation film include at least one of silicon nitride, aluminum oxide, silicon oxynitride, and silicon oxide.

[0017] In a third aspect, the present disclosure further provides a photovoltaic module including the TOPCon cell as described above.

[0018] In a fourth aspect, the present disclosure further provides a stacked cell including a perovskite cell and the TOPCon cell as described above.

[0019] The present disclosure has the beneficial effect that the solar cell wafer includes a silicon substrate having opposite front and back surfaces, the front surface of the silicon substrate is provided with a first textured surface, a pre-set range of the front surface edge of the silicon substrate is provided with a second textured surface, the first textured surface has a pyramid structure, the second textured surface has a tower tip rounded pyramid structure, and the tower tip top of the tower tip rounded pyramid structure has an arc surface. Through the above arrangement, the first textured surface with the pyramid structure is formed on the front surface of the silicon substrate, and the tower tip top of the tower tip rounded pyramid structure has the arc surface by secondary etching based on the first textured surface, so that the second textured surface with the tower tip rounded pyramid structure is formed, the doping concentration of the front surface of the silicon substrate is reduced, the surface recombination of the front surface of the silicon substrate is reduced, and thus the open voltage and the current are improved, and the conversion efficiency is improved. BRIEF DESCRIPTION OF DRAWINGS

[0020] FIG. 1 is a structural schematic diagram of one embodiment of the solar cell wafer provided by the present disclosure;

[0021] FIG. 2 is a structural schematic diagram of a first textured surface of one embodiment of a solar cell provided by the present disclosure;

[0022] FIG. 3 is a structural schematic diagram of a second textured surface of one embodiment of a solar cell provided by the present disclosure;

[0023] FIG. 4 is a structural schematic diagram of one embodiment of a TOPCon cell provided by the present disclosure. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the present disclosure is further described in detail below in combination with the drawings and embodiments. The examples of the embodiments are shown in the drawings, in which the same or similar reference numerals represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and are only used to explain the present disclosure, and cannot be understood as a limitation on the present disclosure. In addition, it should be understood that the specific embodiments described herein are only used to explain the present disclosure and cannot be used to limit the present disclosure.

[0025] In the description of the present disclosure, it should be understood that the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom" and the like indicate the orientation or positional relationship shown in the drawings, and are only used to facilitate the description of the present disclosure and simplify the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0026] In addition, the terms "first" and "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined with "first" and "second" can explicitly or implicitly include one or more features. In the description of the present disclosure, the meaning of "a plurality of" is two or more, unless otherwise explicitly specified and limited.

[0027] In the description of the present disclosure, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium; it can be the internal connection of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present disclosure can be understood according to the specific circumstances.

[0028] In the present disclosure, unless explicitly specified and limited, a first feature is "on" or "under" a second feature can include that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, the first feature is "over", "above" and "on top of" the second feature includes that the first feature is directly above and obliquely above the second feature, or only indicates that the first feature is higher in horizontal height than the second feature. The first feature is "under", "below" and "underneath" the second feature includes that the first feature is directly below and obliquely below the second feature, or only indicates that the first feature is lower in horizontal height than the second feature.

[0029] The following disclosure provides many different embodiments or examples for implementing different structures of the present disclosure. For simplicity of the present disclosure, the components and settings of particular examples are described in the following. Of course, they are merely examples and the purpose is not to limit the present disclosure. In addition, the present disclosure can repeat at least one of the following in different examples: reference numerals and reference letters. Such repetition is for the purpose of simplification and clarity, and does not in itself indicate a relationship between the at least one of the following: various embodiments and settings. In addition, the present disclosure provides examples of various specific processes and materials, but those of ordinary skill in the art can realize the application of other processes and the use of other materials.

[0030] The solar cell of the present disclosure comprises a silicon substrate having opposite front and back surfaces, the front surface of the silicon substrate is provided with a first textured surface, and a pre-set range area of the front surface edge of the silicon substrate is provided with a second textured surface, the first textured surface has a pyramid structure (it can be understood that the tip of the pyramid structure is conical, and the top of the tip is sharp), and the second textured surface has a tip-rounded pyramid structure, and the top of the tip of the tip-rounded pyramid structure has an arc surface. Through the above arrangement, the first textured surface with a pyramid structure is formed on the front surface of the silicon substrate, and the second textured surface with a tip-rounded pyramid structure is formed by twice etching based on the first textured surface, so that the top of the tip of the tip-rounded pyramid structure has an arc surface, the doping concentration of the front surface of the silicon substrate is reduced, the surface recombination of the front surface of the silicon substrate is reduced, and the open voltage and the current are improved, thereby improving the conversion efficiency. It can be understood that the pyramid structure and the tip-rounded pyramid structure are both micro-pyramid structures.

[0031] Embodiment one

[0032] As shown in FIGS. 1-4, one embodiment of the present disclosure provides a solar cell, which includes a silicon substrate 100 having opposite front surface 110 and back surface 120, the front surface 110 of the silicon substrate 100 is provided with a first textured surface 200, and a pre-set range of the edge of the front surface 110 of the silicon substrate 100 is provided with a second textured surface 300, the first textured surface 200 has a pyramid structure 210, and the second textured surface 300 has a tower tip rounded pyramid structure 310, and the tower tip of the tower tip rounded pyramid structure 310 has an arc surface.

[0033] In implementation, the silicon substrate 100 is a silicon wafer, which can be a P-type silicon wafer or an N-type silicon wafer, and is not limited.

[0034] In implementation, the solar cell using a P-type silicon wafer or an N-type silicon wafer has no substantial difference in power generation principle, and both are based on PN junction for light-generated carrier separation.

[0035] Optionally, a donor impurity (such as phosphorus element or other pentavalent element) is doped in a semiconductor to obtain an N-type semiconductor material, and an acceptor impurity (such as boron element or other trivalent element) is doped in a semiconductor to obtain a P-type semiconductor material.

[0036] A P-type solar cell is formed by diffusing a pentavalent element such as phosphorus element on a P-type semiconductor material to form an n+ / p-type structure, and an N-type solar cell is formed by injecting a trivalent element such as boron element on an N-type semiconductor material to form a p+ / n-type structure.

[0037] The silicon substrate 100 is in a sheet or plate shape, and has opposite front surface 110 and back surface 120. In general, the front surface 110 of the silicon substrate 100 can be regarded as a light-receiving surface of the solar cell, and the back surface 120 of the silicon substrate 100 can be regarded as a back light surface of the solar cell.

[0038] The front surface 110 of the silicon substrate 100 has a first textured surface 200, which is obtained by chemical etching. The principle is to use the anisotropy or isotropy of silicon crystals to make silicon wafers (silicon substrates 100) with different crystal surfaces or directions have different etching speeds in chemical solutions, so as to form textured surface structures with different shapes and sizes on the surface of the silicon wafers, i.e. pyramid structures 210, as shown in FIG. 2.

[0039] In implementation, the textured surface structure can increase the roughness of the surface of the silicon wafer, reduce light reflection, increase light absorption, change the incidence angle and propagation path of light, form a light trap, and increase the density of light-generated carriers, thereby improving the photoelectric conversion rate of the cell.

[0040] Texturing silicon substrates can be performed through chemical etching or acid texturing. Alkaline texturing uses alkaline solutions, such as sodium hydroxide, potassium hydroxide, or tetramethylammonium hydroxide, to perform anisotropic etching on the silicon wafer, and is mainly suitable for monocrystalline silicon wafers. Acid texturing uses acidic solutions, such as acetic acid solutions or aqueous solutions of nitric acid and hydrofluoric acid, to perform isotropic etching on the silicon wafer, and is mainly suitable for polycrystalline silicon wafers.

[0041] In some possible embodiments, a first textured surface 200 may also be provided on the back side 120 of the silicon substrate 100, which can further improve the photoelectric conversion efficiency of the solar cell, without further details.

[0042] After the first textured surface 200 is prepared on the front side 110 of the silicon substrate 100, a second textured surface 300 can be further prepared in a predetermined range area at the edge of the front side 110 of the silicon substrate 100. That is, the first textured surface 200 located in the predetermined range area at the edge of the front side 110 of the silicon substrate 100 is etched a second time to form the second textured surface 300, thereby etching away the tip of the pyramid structure 210 in the predetermined range area at the edge of the front side 110, and obtaining a pyramid structure 310 with a rounded tip. The top of the pyramid structure 310 has an arc surface, as shown in Figure 3.

[0043] Optionally, the preset range area is a region less than or equal to 20 mm from the edge of the silicon substrate, such as 10 mm, 12 mm, 15 mm, or 18 mm, etc., without limitation. Further, the preset range area is a region less than or equal to 5 mm from the edge of the silicon substrate, such as 1 mm, 2 mm, 3 mm, or 4 mm, etc., without limitation.

[0044] In practice, the side of the silicon substrate 100 (located between the front side 110 and the back side 120 of the silicon substrate 100) can be immersed in the etching solution, thereby immersing the edge portion of the silicon substrate 100 into the etching solution (such as the alkaline solution or acidic solution mentioned above) to etch away the pyramid tip.

[0045] In some possible embodiments, if only the second textured surface 300 needs to be prepared on the front side 110 of the silicon substrate 100, a water film can be applied to the side side and back side 120 of the silicon substrate 100 before the secondary etching to protect the side side and back side 120 of the silicon substrate 100 and avoid the secondary etching from affecting the side side and back side 120 of the silicon substrate 100.

[0046] The solar cell disclosed herein includes a silicon substrate 100, which has a front side 110 and a back side 120. The front side 110 of the silicon substrate 100 has a first textured surface 200, and a second textured surface 300 is formed in a predetermined area at the edge of the front side 110. The first textured surface 200 has a pyramid structure 210, and the second textured surface 300 has a rounded pyramid structure 310 with an arc-shaped top. Through this configuration, the first textured surface 200 with the pyramid structure 210 is formed on the front side 110 of the silicon substrate 100. A second etching process is then performed on the first textured surface 200 to create the second textured surface 300 with the rounded pyramid structure 310, thereby reducing the doping concentration of the front side 110 of the silicon substrate 100, reducing surface recombination on the front side 110 of the silicon substrate 100, and thus improving the turn-on voltage and current, and enhancing the conversion efficiency.

[0047] Example 2

[0048] In some alternative embodiments, this disclosure also provides a TOPCon battery, including the solar cell as described above. TOPCon is an abbreviation for Tunnel Oxide Passivated Contact, i.e., an oxide passivated contact battery.

[0049] Optionally, the TOPCon cell provided in this disclosure refers to a single-sided TOPCon cell, that is, a passivation contact structure consisting of a layer of ultrathin silicon oxide (1nm~2nm) and a layer of doped polycrystalline silicon thin film is provided on the back side 120 of the cell.

[0050] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the structure and implementation principle of the TOPCon battery described above can be referred to the corresponding structure and implementation principle in the aforementioned Embodiment 1, and will not be repeated here.

[0051] The solar cell disclosed herein includes a silicon substrate 100, which has a front side 110 and a back side 120. The front side 110 of the silicon substrate 100 has a first textured surface 200, and a second textured surface 300 is formed in a predetermined area at the edge of the front side 110. The first textured surface 200 has a pyramid structure 210, and the second textured surface 300 has a rounded pyramid structure 310 with an arc-shaped top. Through this configuration, the first textured surface 200 with the pyramid structure 210 is formed on the front side 110 of the silicon substrate 100. A second etching process is then performed on the first textured surface 200 to create the second textured surface 300 with the rounded pyramid structure 310, thereby reducing the doping concentration of the front side 110 of the silicon substrate 100, reducing surface recombination on the front side 110 of the silicon substrate 100, and thus improving the turn-on voltage and current, and enhancing the conversion efficiency.

[0052] In some optional embodiments, the TOPCon cell provided in this disclosure includes an emitter layer 400, a silicon substrate 100, a diffusion-doped layer 500, a silicon oxide layer 600, a doped polycrystalline silicon layer 700, a front electrode 810, and a back electrode 820. The emitter layer 400 is disposed on the front side 110 of the silicon substrate 100, and the front electrode 810 is connected to the emitter layer 400. The diffusion-doped layer 500, the silicon oxide layer 600, and the doped polycrystalline silicon layer 700 are sequentially disposed on the back side 120 of the silicon substrate 100 in a direction away from the silicon substrate 100. The back electrode 820 is connected to the doped polycrystalline silicon layer 700.

[0053] In practice, the solar cell provided in the above embodiment 1 can be regarded as the silicon substrate of the TOPCon cell, wherein the front side 110 of the silicon substrate 100 corresponds to the front side of the TOPCon cell, and the back side 120 of the silicon substrate 100 corresponds to the back side of the TOPCon cell.

[0054] An emitter layer 400 is disposed on the front side 110 of the solar cell, and a diffusion-doped layer 500 is disposed on the back side 120 of the solar cell. The emitter layer 400 and the diffusion-doped layer 500 are doped layers formed by further doping on the silicon substrate 100. For example, taking an N-type silicon wafer as an example, the emitter layer 400 can be formed by doping boron on the front side 110 of the silicon substrate 100. In this case, the emitter layer 400 can be regarded as a p+ layer. The diffusion-doped layer 500 is obtained by doping phosphorus on the back side 120 of the silicon substrate. The diffusion-doped layer 500 can be formed by diffusion alone or by diffusion of the doped polycrystalline silicon layer 700 into the silicon substrate 100. No limitation is made here.

[0055] By setting a passivated contact structure on the back of the battery 120, minority carrier (hole) recombination can be blocked, thereby improving the battery's open-circuit voltage and short-circuit current. Specifically, the ultrathin silicon oxide layer 600 allows majority carriers (electrons) to tunnel into the doped polycrystalline silicon layer 700 while simultaneously blocking minority carrier (hole) recombination. The excellent passivation effect of the ultrathin silicon oxide layer 600 and the doped polycrystalline silicon layer 700 causes the energy bands on the silicon wafer surface to bend, thus forming a field passivation effect. This significantly increases the probability of electron tunneling, reduces contact resistance, and improves the battery's open-circuit voltage and short-circuit current, thereby enhancing the battery's conversion efficiency.

[0056] In some possible embodiments, the diffused doped layer 500 is disposed in a local area of ​​the back side 120 of the silicon substrate 100, that is, there is a local contact between the diffused doped layer 500 and the solar cell, reducing surface recombination in non-contact areas.

[0057] In some possible embodiments, the silicon oxide layer 600 and the doped polysilicon layer 700 are disposed in a local area on the back side of the silicon substrate 100, that is, there is a local contact between the silicon oxide layer 600 and the silicon substrate 100, which can effectively reduce contact recombination.

[0058] In some possible embodiments, a front passivation film 910 is provided on the side of the emitter layer 400 away from the silicon substrate 100, and a back passivation film 920 is provided on the side of the doped polysilicon layer 700 away from the silicon substrate 100.

[0059] Both the front passivation film 910 and the back passivation film 920 are passivation antireflection films. Passivation antireflection films are used to improve the photoelectric conversion efficiency and stability of solar cells, reduce surface damage and oxidation reactions of solar cells, and extend the service life of solar cells.

[0060] In practice, the front electrode 810 passes through the front passivation film 910 and is connected to the emitter layer 400, while the back electrode 820 passes through the back passivation film 920 and is connected to the doped polysilicon layer 700.

[0061] In some embodiments, the back electrode 820 is connected to the doped polysilicon layer 700 through surface contact. In other alternative embodiments, the back electrode 820 is formed by casting molten metal paste onto the doped polysilicon layer 700 and then cooling it, with some metal crystals of the metal paste penetrating into the doped polysilicon layer 700; that is, the metal electrode is in contact with the doped polysilicon layer 700 and some metal crystals are formed within the doped polysilicon layer 700. With this arrangement, the metal crystals facilitate the movement of charge carriers to the metal electrode, improving the efficiency of the solar cell.

[0062] Optionally, the front passivation film 910 and the back passivation film 920 include at least one of silicon nitride, aluminum oxide, silicon oxynitride, and silicon oxide, without limitation. Preferably, at least one of the front passivation film 910 and the back passivation film 920 may be aluminum oxide to ensure light absorption rate.

[0063] Example 3

[0064] In some alternative embodiments, this disclosure provides a photovoltaic module including the TOPCon cell as described above.

[0065] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the structure and implementation principle of the photovoltaic module described above can be referred to the corresponding structure and implementation principle in the aforementioned Embodiments 1 and 2, and will not be repeated here.

[0066] The solar cell disclosed herein includes a silicon substrate 100, which has a front side 110 and a back side 120. The front side 110 of the silicon substrate 100 has a first textured surface 200, and a second textured surface 300 is formed in a predetermined area at the edge of the front side 110. The first textured surface 200 has a pyramid structure 210, and the second textured surface 300 has a rounded pyramid structure 310 with an arc-shaped top. Through this configuration, the first textured surface 200 with the pyramid structure 210 is formed on the front side 110 of the silicon substrate 100. A second etching process is then performed on the first textured surface 200 to create the second textured surface 300 with the rounded pyramid structure 310, thereby reducing the doping concentration of the front side 110 of the silicon substrate 100, reducing surface recombination on the front side 110 of the silicon substrate 100, and thus improving the turn-on voltage and current, and enhancing the conversion efficiency.

[0067] Example 4

[0068] Fourthly, this disclosure also provides a tandem solar cell, including a perovskite solar cell and a TOPCon solar cell as described above.

[0069] In practice, perovskite solar cells are solar cells that utilize perovskite-type organometal halide semiconductors as light-absorbing materials. The tandem solar cell provided in this disclosure is a perovskite-silicon tandem solar cell. The perovskite-silicon tandem solar cell utilizes the wide bandgap structure of perovskite materials, placing the perovskite material above the silicon-based cell. This allows it to absorb high-energy photons in the short-wavelength band that are difficult for silicon-based cells to absorb, thereby maximizing the utilization of incident solar light and improving the photovoltaic cell conversion efficiency. It also possesses a higher theoretical efficiency limit, which will not be elaborated further.

[0070] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the structure and implementation principle of the stacked battery described above can be referred to the corresponding structure and implementation principle in the foregoing embodiments one to three, and will not be repeated here.

[0071] The solar cell disclosed herein includes a silicon substrate 100, which has a front side 110 and a back side 120. The front side 110 of the silicon substrate 100 has a first textured surface 200, and a second textured surface 300 is formed in a predetermined area at the edge of the front side 110. The first textured surface 200 has a pyramid structure 210, and the second textured surface 300 has a rounded pyramid structure 310 with an arc-shaped top. Through this configuration, the first textured surface 200 with the pyramid structure 210 is formed on the front side 110 of the silicon substrate 100. A second etching process is then performed on the first textured surface 200 to create the second textured surface 300 with the rounded pyramid structure 310, thereby reducing the doping concentration of the front side 110 of the silicon substrate 100, reducing surface recombination on the front side 110 of the silicon substrate 100, and thus improving the turn-on voltage and current, and enhancing the conversion efficiency.

[0072] The above are merely preferred embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A solar cell wafer, comprising a silicon substrate having opposite front and back surfaces, the front surface of the silicon substrate being provided with a first texturing, a preset range area of the edge of the front surface of the silicon substrate being provided with a second texturing, the first texturing having a pyramid structure, the second texturing having a tower tip rounded pyramid structure, a tower tip top of the tower tip rounded pyramid structure having a curved surface.

2. The solar cell as claimed in claim 1, wherein, The preset range area is an area less than or equal to 20 mm from the edge of the silicon substrate.

3. The solar cell as claimed in claim 2, wherein, The preset range area is an area less than or equal to 5 mm from the edge of the silicon substrate.

4. The solar cell of claim 1, wherein, The silicon substrate comprises any one of a P-type silicon wafer and an N-type silicon wafer. 5.A TOPCon cell, comprising the solar cell wafer according to any one of claims 1 to 4.

6. The TOPCon cell of claim 5, wherein, The TOPCon cell comprises an emitter layer, a silicon substrate, a diffusion doped layer, a silicon oxide layer, a doped polysilicon layer, a front electrode and a back electrode, the emitter layer being arranged on the front surface of the silicon substrate, the front electrode being connected with the emitter layer, the diffusion doped layer, the silicon oxide layer and the doped polysilicon layer being sequentially arranged on the back surface of the silicon substrate in a direction away from the silicon substrate, the back electrode being connected with the doped polysilicon layer.

7. The TOPCon cell of claim 6, wherein, The silicon oxide layer and the doped polysilicon layer are arranged on a local area of the back surface of the silicon substrate.

8. The TOPCon cell of claim 6, wherein, The emitter layer is provided with a front passivation film on a side away from the silicon substrate, and the doped polysilicon layer is provided with a back passivation film on a side away from the silicon substrate.

9. The TOPCon cell of claim 8, wherein, The front passivation film and the back passivation film comprise at least one of silicon nitride, aluminum oxide, silicon oxynitride and silicon oxide. 10.A photovoltaic module, comprising the TOPCon cell according to any one of claims 5 to 9. 11.A stacked cell, comprising a perovskite cell and the TOPCon cell according to any one of claims 5 to 9.

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