Display device and method for manufacturing same
By forming a cavity structure with transparent conductive layers of varying etching rates, the issue of short circuits between electrodes is mitigated, enhancing light extraction efficiency and yield in self-luminous display devices.
Patent Information
- Application Number
- PCT/JP2024/026144
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-22
- Publication Date
- 2026-01-29
AI Technical Summary
In self-luminous display devices, the optimization of transparent conductive film thickness for different colors can lead to short circuits between the first and second electrodes due to residues during etching, reducing manufacturing yield.
The formation of a cavity structure is achieved by stacking transparent conductive layers with varying etching rates, specifically using materials with lower etching rates for certain layers to prevent short circuits while optimizing optical path lengths for improved light extraction efficiency.
This approach effectively suppresses short circuits and enhances light extraction efficiency by setting optical path lengths for each color, thereby improving manufacturing yield and display performance.
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Figure JP2024026144_29012026_PF_FP_ABST
Abstract
Description
Display device and manufacturing method thereof
[0001] The present invention relates to a display device and a manufacturing method thereof.
[0002] In recent years, self-luminous display devices using light-emitting elements such as organic electroluminescence (EL) elements have been attracting attention as alternatives to liquid crystal display devices. These self-luminous display devices include, for example, a base substrate, a thin film transistor (TFT) layer provided on the base substrate, a light-emitting element layer provided on the TFT layer and including a plurality of light-emitting elements, and a sealing film provided on the light-emitting element layer. Here, the light-emitting element includes, for example, a first electrode provided on the TFT layer, a light-emitting functional layer provided on the first electrode, and a second electrode provided on the light-emitting functional layer.
[0003] For example, Patent Document 1 discloses a display device including a cathode provided for each subpixel (as the first electrode), an anode provided above the cathode and common to a plurality of subpixels (as the second electrode), a light-emitting layer provided between the cathode and the anode, a first wiring provided in the same layer as the cathode, and a second wiring provided above the first wiring so as to overlap with the first wiring.
[0004] International Publication No. 2018 / 225183
[0005] Meanwhile, in a self-luminous display device, for example, a cavity structure has been proposed in which the optical path length is set according to the wavelength of each of the three primary colors, red, green, and blue, to improve the light extraction efficiency by the optical resonance effect. However, if the thickness of the transparent conductive film constituting the first electrode is optimized for each color depending on the number of layers, a short circuit may occur between the first electrode and the second electrode due to, for example, residues generated when etching the transparent conductive film, which may reduce the manufacturing yield, and therefore there is room for improvement.
[0006] The present invention has been made in view of the above points, and an object of the present invention is to form a cavity structure by suppressing the occurrence of a short circuit between a first electrode and a second electrode.
[0007] In order to achieve the above object, a display device according to the present invention is a display device comprising: a base substrate; a thin film transistor layer provided on the base substrate; and a light emitting element layer provided on the thin film transistor layer, the light emitting element layer including a plurality of first electrodes, a plurality of light emitting functional layers, and a common second electrode laminated in this order corresponding to a plurality of sub-pixels constituting a display area, the plurality of sub-pixels including first sub-pixels, second sub-pixels, and third sub-pixels that display colors different from one another, and the first electrode corresponding to the first sub-pixel is a first metal layer and a first transparent conductive layer. the first electrode corresponding to the second sub-pixel is formed by stacking a second metal layer, a fourth transparent conductive layer, and a fifth transparent conductive layer in that order, the first electrode corresponding to the third sub-pixel is formed by stacking a third metal layer and a sixth transparent conductive layer in that order, and the first transparent conductive layer, the fourth transparent conductive layer, and the sixth transparent conductive layer are formed by using a material having a lower etching rate than the second transparent conductive layer, the third transparent conductive layer, and the fifth transparent conductive layer.
[0008] According to the present invention, it is possible to form a cavity structure while suppressing the occurrence of a short circuit between the first electrode and the second electrode.
[0009] FIG. 1 is a plan view showing a schematic configuration of an organic EL display device according to a first embodiment of the present invention. FIG. 2 is a plan view of a display region of the organic EL display device according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view of a display region of the organic EL display device according to the first embodiment of the present invention. FIG. 4 is a cross-sectional view showing a schematic configuration of a first electrode constituting the organic EL display device according to the first embodiment of the present invention. FIG. 5 is an equivalent circuit diagram of a TFT layer constituting the organic EL display device according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view of an organic EL layer constituting the organic EL display device according to the first embodiment of the present invention. FIG. 7 is a cross-sectional view showing the first half of a first step of a first electrode formation process in a manufacturing method for an organic EL display device according to the first embodiment of the present invention. FIG. 8 is a cross-sectional view showing the second half of the first step of a first electrode formation process in a manufacturing method for an organic EL display device according to the first embodiment of the present invention. FIG. 9 is a cross-sectional view showing the second half of a first electrode formation process in a manufacturing method for an organic EL display device according to the first embodiment of the present invention. FIG. 10 is a cross-sectional view showing the first half of a third step of a first electrode formation process in a manufacturing method for an organic EL display device according to the first embodiment of the present invention. FIG. 11 is a cross-sectional view showing the second half of the third step of a first electrode formation process in a manufacturing method for an organic EL display device according to the first embodiment of the present invention. FIG. 12 is a cross-sectional view showing the first half of a fourth step of the first electrode forming step in the manufacturing method of the organic EL display device according to the first embodiment of the present invention.
[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments.
[0011] 1 to 12 show a first embodiment of a display device and a manufacturing method thereof according to the present invention. In the following embodiments, an organic EL display device including an organic EL element layer is exemplified as a display device including a light-emitting element layer. FIG. 1 is a plan view showing a schematic configuration of an organic EL display device 100 according to this embodiment. FIGS. 2 and 3 are a plan view and a cross-sectional view of a display region D of the organic EL display device 100. FIG. 4 is a cross-sectional view showing a schematic configuration of a first electrode 40 constituting the organic EL display device 100. FIG. 5 is an equivalent circuit diagram of a TFT layer 30 constituting the organic EL display device 100. FIG. 6 is a cross-sectional view of an organic EL layer 42 constituting the organic EL display device 100.
[0012] 1 , the organic EL display device 100 includes, for example, a rectangular display area D for displaying an image, and a frame area F provided in a frame shape around the display area D. Note that, although the present embodiment illustrates a rectangular display area D, this rectangular shape also includes, for example, a substantially rectangular shape with arc-shaped sides, arc-shaped corners, or a shape with a notch in one of the sides.
[0013] 2, a plurality of sub-pixels P are arranged in a matrix in the display region D. Also, in the display region D, for example, a first sub-pixel Pr having a red light-emitting region Lr for displaying red, a second sub-pixel Pg having a green light-emitting region Lg for displaying green, and a third sub-pixel Pb having a blue light-emitting region Lb for displaying blue are provided adjacent to each other, as shown in FIG. 2. Note that in the display region D, one pixel is configured by three adjacent sub-pixels, the first sub-pixel Pr, the second sub-pixel Pg, and the third sub-pixel Pb, each having a red light-emitting region Lr, a green light-emitting region Lg, and a blue light-emitting region Lb, and displaying different colors.
[0014] A terminal portion T is provided to extend in one direction (Y direction in Fig. 1) at the end of the frame region F on the positive side in the X direction in Fig. 1. Furthermore, as shown in Fig. 1, between the display region D and the terminal portion T, that is, in the frame region F, on the display region D side of the terminal portion T, a folding portion B is provided to extend in one direction (Y direction in Fig. 1) that can be folded, for example, 180° (in a U-shape) with the Y direction in the drawing as the folding axis.
[0015] As shown in FIG. 3, the organic EL display device 100 includes a resin substrate 10 provided as a base substrate, a TFT layer 30 provided on the resin substrate 10, an organic EL element layer 50 provided as a light-emitting element layer on the TFT layer 30, and a sealing film 65 provided on the organic EL element layer 50.
[0016] The resin substrate 10 is made of, for example, polyimide resin.
[0017] As shown in FIG. 3 , the TFT layer 30 includes a base coat film 11 provided on a resin substrate 10, a plurality of first TFTs 9 a, a plurality of second TFTs 9 b, and a plurality of capacitors 9 c provided on the base coat film 11, and a protective insulating film 19 and a planarizing film 20 provided in that order on each of the first TFTs 9 a, each of the second TFTs 9 b, and each of the capacitors 9 c. As shown in FIG. 2 , the TFT layer 30 includes a plurality of gate lines 14 g extending parallel to one another in the X direction. As shown in FIG. 2 , the TFT layer 30 also includes a plurality of source lines 18 f extending parallel to one another in a direction intersecting (orthogonal to) the gate lines 14 g, i.e., in the Y direction. As shown in FIG. 2 , the TFT layer 30 also includes a plurality of power supply lines 18 g extending parallel to one another in the Y direction. As shown in FIG. 2 , each power supply line 18 g is adjacent to a corresponding source line 18 f. 5, the TFT layer 30 includes a first TFT 9a, a second TFT 9b, and a capacitor 9c in each subpixel P. In the TFT layer 30, as shown in Fig. 3, a base coat film 11, a semiconductor film that will become a semiconductor layer 12a (described later) and the like, a gate insulating film 13, a second metal film that will become a gate line 14g and the like, a first interlayer insulating film 15, a third metal film that will become an upper conductive layer 16c (described later) and the like, a second interlayer insulating film 17, a fourth metal film that will become a source line 18f, a power line 18g and the like, a protective insulating film 19, and a planarizing film 20 are stacked in this order on a resin substrate 10.
[0018] The base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, the second interlayer insulating film 17, and the protective insulating film 19 are each made of an inorganic insulating film, such as a single layer film or a multilayer film, of silicon nitride, silicon oxide, silicon oxynitride, etc. At least the semiconductor layer 12a (12b) side of the base coat film 11 and the semiconductor layer 12a (12b) side of the gate insulating film 13 are made of, for example, a silicon oxide film.
[0019] 5, the first TFT 9a is electrically connected to the corresponding gate line 14g, source line 18f, and second TFT 9b in each subpixel P. Here, as shown in Fig. 3, the first TFT 9a includes a semiconductor layer 12a provided on a base coat film 11, a gate electrode 14a provided on the semiconductor layer 12a via a gate insulating film 13, and a source electrode 18a and a drain electrode 18b provided on a second interlayer insulating film 17 so as to be spaced apart from each other.
[0020] The semiconductor layer 12a and the semiconductor layer 12b described later are formed of a semiconductor film made of an oxide semiconductor such as an In-Ga-Zn-O system, and include a source region and a drain region that are defined to be spaced apart from each other, and a channel region that is defined between the source region and the drain region.
[0021] The gate electrode 14a is provided so as to overlap the channel region of the semiconductor layer 12a and is configured to control conduction between the source region and the drain region of the semiconductor layer 12a. Here, the gate electrode 14a is formed of a second metal film, similar to the gate line 14g.
[0022] 3, the source electrode 18a and the drain electrode 18b are electrically connected to the source region and the drain region of the semiconductor layer 12a, respectively, through contact holes formed in the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17. Here, the source electrode 18a and the drain electrode 18b are formed of a fourth metal film, similar to the source line 18f and the power supply line 18g.
[0023] 5, the second TFT 9b is electrically connected to the corresponding first TFT 9a, a power supply line 18g, and an organic EL element 45 (described later) in each subpixel P. Here, the second TFT 9b includes a semiconductor layer 12b provided on the base coat film 11, a gate electrode 14b provided on the semiconductor layer 12b via a gate insulating film 13, and a source electrode 18c and a drain electrode 18d provided spaced apart from each other on the second interlayer insulating film 17, as shown in FIG.
[0024] The gate electrode 14b is provided so as to overlap the channel region of the semiconductor layer 12b and is configured to control conduction between the source region and the drain region of the semiconductor layer 12b. The gate electrode 14b is formed of a second metal film, similar to the gate line 14g.
[0025] 3, the source electrode 18c and the drain electrode 18d are electrically connected to the source region and the drain region of the semiconductor layer 12b, respectively, through contact holes formed in the stacked film of the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17. Here, the source electrode 18c and the drain electrode 18d are formed of a fourth metal film, similar to the source line 18f and the power supply line 18g.
[0026] In this embodiment, the semiconductor layers 12a and 12b are formed of a semiconductor film made of an oxide semiconductor, but the semiconductor layers 12a and 12b may be formed of a semiconductor film made of polysilicon such as LTPS (low temperature polysilicon). Furthermore, the TFT layer 30 may have a hybrid structure in which a TFT having a semiconductor layer made of polysilicon and a TFT having a semiconductor layer made of an oxide semiconductor are provided.
[0027] As shown in Fig. 5, the capacitor 9c is electrically connected to the corresponding first TFT 9a and power supply line 18g in each subpixel P. Here, as shown in Fig. 3, the capacitor 9c includes a lower conductive layer 14c formed of a second metal film, an upper conductive layer 16c formed of a third metal film, and a first interlayer insulating film 15 provided between the lower conductive layer 14c and the upper conductive layer 16c. Note that the upper conductive layer 16c is electrically connected to the power supply line 18g via a contact hole formed in the second interlayer insulating film 17, as shown in Fig. 3.
[0028] The planarization film 20 has a flat surface in the display region D and is made of an organic resin material such as polyimide resin.
[0029] 3, the organic EL element layer 50 includes a plurality of third electrodes 31, a common first edge cover 32, a plurality of first electrodes 40, a common second edge cover 41, a plurality of organic EL layers 42, and a common second electrode 43, which are stacked in this order corresponding to a plurality of subpixels P. Here, in each subpixel P, the third electrode 31, the first electrode 40, the organic EL layer 42, and the second electrode 43 constitute an organic EL element 45, as shown in FIG. 3, and in the organic EL element layer 50, the plurality of organic EL elements 45 provided corresponding to the plurality of subpixels P are arranged in a matrix.
[0030] 3, the third electrode 31 is electrically connected to the drain electrode 18d of the second TFT 9b of each subpixel P through a contact hole formed in the protective insulating film 19 and the planarizing film 20. Here, the third electrode 31 is formed of a transparent conductive film such as an indium tin oxide (hereinafter also referred to as "ITO") film or an indium zinc oxide (hereinafter also referred to as "IZO") film, and has optical transparency. Note that, as shown in FIG. 4, the third electrode 31 is composed of a third electrode 31r provided in the first subpixel Pr, a third electrode 31g provided in the second subpixel Pg, and a third electrode 31b provided in the third subpixel Pb.
[0031] The first edge cover 32 is provided in a grid pattern over the entire display area D, and is provided so as to cover the peripheral edges of the third electrodes 31 (31r, 31g, 31b) as shown in Fig. 3. Here, the first edge cover 32 is made of, for example, an organic resin material such as polyimide resin or acrylic resin, or a polysiloxane-based SOG (spin on glass) material.
[0032] The first electrode 40 has a function of injecting holes (positive holes) into the organic EL layer 42. It is more preferable that the first electrode 40 be formed of a material with a large work function in order to improve the efficiency of hole injection into the organic EL layer 42. Here, the first electrode 40 is formed of a laminated film in which, for example, a transparent conductive film such as an ITO film or an IZO film, a metal film such as a silver film or a silver alloy film, and a transparent conductive film such as an ITO film or an IZO film are laminated in this order, and has light reflectivity.
[0033] Specifically, as shown in FIG. 4, the first electrode 40 is composed of a first electrode 40r provided in the first sub-pixel Pr, a first electrode 40g provided in the second sub-pixel Pg, and a first electrode 40b provided in the third sub-pixel Pb.
[0034] 4, the first electrode 40r is provided on the third electrode 31r by sequentially stacking a seventh transparent conductive layer 33r, a first metal layer 34r, a first transparent conductive layer 35r, a second transparent conductive layer 36r, and a third transparent conductive layer 37r. Note that, as shown in FIG. 4, the first electrode 40r is provided on the third electrode 31r and is electrically connected to the third electrode 31r.
[0035] The seventh transparent conductive layer 33r, and the eighth transparent conductive layer 33g and ninth transparent conductive layer 33b described below are formed of a transparent conductive film such as a crystalline ITO film or an (amorphous) IZO film.
[0036] The first metal layer 34r, and the second and third metal layers 34g and 34b, which will be described later, are formed of a metal film such as a silver film or a silver alloy film.
[0037] The first transparent conductive layer 35r, and the fourth and sixth transparent conductive layers 35g and 35b (described later) are formed of a crystalline transparent conductive film such as a crystalline ITO film, etc. Here, the first transparent conductive layer 35r, the fourth transparent conductive layer 35g, and the sixth transparent conductive layer 35b are formed thicker than the seventh transparent conductive layer 33r, the eighth transparent conductive layer 33g, and the ninth transparent conductive layer 33b.
[0038] The second transparent conductive layer 36r is formed of an amorphous transparent conductive film such as an amorphous ITO film or an (amorphous) IZO film, etc. Here, the second transparent conductive layer 36r is formed thicker than the third transparent conductive layer 37r and a fifth transparent conductive layer 37g described later.
[0039] The third transparent conductive layer 37r and the fifth transparent conductive layer 37g are formed of an amorphous transparent conductive film such as an amorphous ITO film or an (amorphous) IZO film.
[0040] 4, the first electrode 40g is provided on the third electrode 31g by sequentially stacking an eighth transparent conductive layer 33g, a second metal layer 34g, a fourth transparent conductive layer 35g, and a fifth transparent conductive layer 37g. Note that, as shown in FIG. 4, the first electrode 40g is provided on the third electrode 31g and is electrically connected to the third electrode 31g.
[0041] 4, the first electrode 40b is provided by laminating a ninth transparent conductive layer 33b, a third metal layer 34b, and a sixth transparent conductive layer 35b in this order on the third electrode 31b. Note that, as shown in FIG. 4, the first electrode 40b is provided on the third electrode 31b and is electrically connected to the third electrode 31b.
[0042] Here, as described above, the first transparent conductive layer 35r, the fourth transparent conductive layer 35g, and the sixth transparent conductive layer 35b are formed from crystalline transparent conductive films, and are therefore formed from materials that have a lower etching rate with respect to oxalic acid than the second transparent conductive layer 36r, the third transparent conductive layer 37r, and the fifth transparent conductive layer 37g, which are formed from amorphous transparent conductive films.
[0043] 4 , in the first electrode 40, the first transparent conductive layer 35r, the fourth transparent conductive layer 35g, and the sixth transparent conductive layer 35b are made of the same material and provided in the same layer, and therefore have the same thickness. Also, in the first electrode 40, the third transparent conductive layer 37r and the fifth transparent conductive layer 37g are made of the same material and provided in the same layer, and therefore have the same thickness. Therefore, in the first electrode 40, as shown in FIG. 4 , the optical path length can be set for each of the first sub-pixel Pr, the second sub-pixel Pg, and the third sub-pixel Pb depending on the number and thicknesses of the transparent conductive layers above the first metal layer 34r, the second metal layer 34g, and the third metal layer 34b, and a cavity structure can be formed that improves light extraction efficiency by the optical resonance effect.
[0044] 3, the second edge cover 41 is provided in a grid pattern over the entire display area D, and is provided so as to cover the peripheral edge of the first electrode 40. Here, the second edge cover 41 is made of an inorganic insulating film, such as a single layer film or a multilayer film, made of silicon nitride, silicon oxide, silicon oxynitride, or the like.
[0045] 6 , the organic EL layer 42 is provided as a light-emitting functional layer, and includes a hole injection layer 1, a hole transport layer 2, a light-emitting layer 3, an electron transport layer 4, and an electron injection layer 5, which are stacked in this order on the first electrode 40. Note that, although the present embodiment illustrates a configuration in which each of the plurality of light-emitting functional layers is an organic EL layer 42, at least one of the plurality of light-emitting functional layers may be an organic EL layer 42.
[0046] The hole injection layer 1 is also called an anode buffer layer, and has the function of bringing the energy levels of the first electrode 40 and the organic EL layer 42 closer to each other and improving the efficiency of hole injection from the first electrode 40 to the organic EL layer 42. Examples of materials that form the hole injection layer 1 include triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, phenylenediamine derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, and stilbene derivatives.
[0047] The hole transport layer 2 has a function of improving the efficiency of transporting holes from the first electrode 40 to the organic EL layer 42. Here, examples of materials constituting the hole transport layer 2 include porphyrin derivatives, aromatic tertiary amine compounds, styrylamine derivatives, polyvinylcarbazole, poly-p-phenylenevinylene, polysilane, triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stilbene derivatives, hydrogenated amorphous silicon, hydrogenated amorphous silicon carbide, zinc sulfide, and zinc selenide.
[0048] The light-emitting layer 3 is a region into which holes and electrons are injected from the first electrode 40 and the second electrode 43, respectively, and where the holes and electrons recombine when a voltage is applied between the first electrode 40 and the second electrode 43. The light-emitting layer 3 is formed of a material with high luminous efficiency. Examples of materials constituting the light-emitting layer 3 include metal oxinoid compounds (8-hydroxyquinoline metal complexes), naphthalene derivatives, anthracene derivatives, diphenylethylene derivatives, vinylacetone derivatives, triphenylamine derivatives, butadiene derivatives, coumarin derivatives, benzoxazole derivatives, oxadiazole derivatives, oxazole derivatives, benzimidazole derivatives, thiadiazole derivatives, benzothiazole derivatives, styryl derivatives, styrylamine derivatives, bisstyrylbenzene derivatives, trisstyrylbenzene derivatives, perylene derivatives, perinone derivatives, aminopyrene derivatives, pyridine derivatives, rhodamine derivatives, aquidin derivatives, phenoxazone, quinacridone derivatives, rubrene, poly-p-phenylenevinylene, and polysilane.
[0049] The electron transport layer 4 has a function of efficiently transferring electrons to the light-emitting layer 3. Examples of materials constituting the electron transport layer 4 include organic compounds such as oxadiazole derivatives, triazole derivatives, benzoquinone derivatives, naphthoquinone derivatives, anthraquinone derivatives, tetracyanoanthraquinodimethane derivatives, diphenoquinone derivatives, fluorenone derivatives, silole derivatives, and metal oxinoid compounds.
[0050] The electron injection layer 5 has a function of bringing the energy levels of the second electrode 43 and the organic EL layer 42 closer to each other and improving the efficiency of electron injection from the second electrode 43 to the organic EL layer 42, and this function can reduce the driving voltage of the organic EL element 45. The electron injection layer 5 is also called a cathode buffer layer. Here, examples of materials constituting the electron injection layer 5 include lithium fluoride (LiF), magnesium fluoride (MgF 2 ), calcium fluoride (CaF 2 ), strontium fluoride (SrF 2 ), barium fluoride (BaF 2inorganic alkali compounds such as aluminum oxide (Al 2 O 3 ), strontium oxide (SrO), etc.
[0051] 3, the second electrode 43 is provided so as to cover each organic EL layer 42 and the second edge cover 41. The second electrode 43 also has the function of injecting electrons into the organic EL layer 42. The second electrode 43 is preferably made of a material with a small work function in order to improve the efficiency of electron injection into the organic EL layer 42. Here, the second electrode 43 is formed of a transparent conductive film such as an ITO film or an IZO film, and has high light transmittance.
[0052] 3 , the sealing film 65 is provided so as to cover the second electrode 43, and includes a first inorganic sealing film 61, an organic sealing film 62, and a second inorganic sealing film 63 laminated in this order on the second electrode 43, and has the function of protecting the organic EL layer 42 of the organic EL element 45 from moisture, oxygen, etc. Here, the first inorganic sealing film 61 and the second inorganic sealing film 63 are made of inorganic insulating films such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film. Furthermore, the organic sealing film 62 is made of an organic resin material such as an acrylic resin, an epoxy resin, a silicone resin, a polyurea resin, a parylene resin, a polyimide resin, or a polyamide resin.
[0053] The organic EL display device 100 described above is configured such that, in each subpixel P, a gate signal is input to the first TFT 9a via the gate line 14g to turn the first TFT 9a on, a data signal is written to the gate electrode 14b and capacitor 9c of the second TFT 9b via the source line 18f, and a current from the power supply line 18g corresponding to the gate voltage of the second TFT 9b is supplied to the organic EL element 45, causing the light-emitting layer 3 of the organic EL element 45 to emit light, thereby displaying an image. Note that in the organic EL display device 100, even if the first TFT 9a is turned off, the gate voltage of the second TFT 9b is held by the capacitor 9c, so that light emission by the light-emitting layer 3 is maintained until a gate signal for the next frame is input.
[0054] Next, a method for manufacturing the organic EL display device 100 of this embodiment will be described. The method for manufacturing the organic EL display device 100 of this embodiment includes a TFT layer formation process, an organic EL element layer formation process including a first electrode formation process, and a sealing film formation process. FIGS. 7 and 8 are cross-sectional views showing the first and second halves of a first step of the first electrode formation process in the method for manufacturing the organic EL display device 100. FIG. 9 is a cross-sectional view showing the second step of the first electrode formation process in the method for manufacturing the organic EL display device 100. FIGS. 10 and 11 are cross-sectional views showing the first and second halves of a third step of the first electrode formation process in the method for manufacturing the organic EL display device 100. FIG. 12 is a cross-sectional view showing the first half of a fourth step of the first electrode formation process in the method for manufacturing the organic EL display device 100.
[0055] <TFT Layer Formation Process> First, a silicon nitride film (thickness: about 50 nm) and a silicon oxide film (thickness: about 250 nm) are sequentially formed on a resin substrate 10 formed on a glass substrate by, for example, a plasma CVD (Chemical Vapor Deposition) method, thereby forming a base coat film 11.
[0056] Next, on the surface of the substrate on which the base coat film 11 has been formed, InGaZnO 4 After forming a semiconductor film made of an oxide semiconductor by depositing a film (thickness: about 30 nm) or the like, the semiconductor film is patterned by photolithography or the like to form the semiconductor layers 12a and 12b or the like.
[0057] Thereafter, a silicon oxide film (about 150 nm thick) is formed by, for example, plasma CVD on the surface of the substrate on which the semiconductor layer 12a and the like are formed, thereby forming the gate insulating film 13.
[0058] Furthermore, a molybdenum film (thickness: about 260 nm) or the like is formed by, for example, sputtering on the surface of the substrate on which the gate insulating film 13 is formed, to form a second metal film, and then the second metal film is patterned by photolithography or the like to form gate electrodes 14a and 14b, a lower conductive layer 14c, a gate line 14g, etc.
[0059] Next, on the substrate surface on which the gate electrode 14a and the like are formed, a silicon nitride film (about 100 nm thick) and a silicon oxide film (about 100 nm thick) are sequentially formed by, for example, plasma CVD to form the first interlayer insulating film 15. Note that by heat treatment after the formation of the first interlayer insulating film 15, part of the semiconductor layer 12a (12b) is made conductive, and a source region, a drain region, and a channel region are formed in the semiconductor layer 12a (12b).
[0060] Thereafter, a molybdenum film (approximately 260 nm thick) or the like is formed on the substrate surface on which the first interlayer insulating film 15 is formed, for example, by sputtering to form a third metal film, and then the third metal film is patterned by photolithography or the like to form an upper conductive layer 16c or the like.
[0061] Furthermore, a silicon oxide film (about 100 nm thick) and a silicon nitride film (about 100 nm thick) are sequentially formed on the substrate surface on which the upper conductive layer 16c and the like are formed, for example, by plasma CVD, thereby forming a second interlayer insulating film 17.
[0062] Next, on the substrate surface on which the second interlayer insulating film 17 has been formed, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 are appropriately patterned by photolithography or the like to form contact holes.
[0063] Thereafter, a titanium film (about 10 nm thick), an aluminum film (about 300 nm thick), and a titanium film (about 50 nm thick) are sequentially formed by, for example, sputtering on the surface of the substrate on which the contact holes have been formed to form a fourth metal film, and then the fourth metal film is patterned by, for example, photolithography to form source electrodes 18a and 18c, drain electrodes 18b and 18d, source line 18f, power line 18g, and the like.
[0064] Furthermore, a protective insulating film 19 is formed on the substrate surface on which the source electrode 18a and the like are formed by depositing a silicon oxide film (approximately 85 nm thick) and a silicon nitride film (approximately 400 nm thick), for example, by plasma CVD.
[0065] Next, an acrylic photosensitive resin film (about 2.5 μm thick) is applied to the substrate surface on which the protective insulating film 19 has been formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed, and post-baked to form a planarization film 20 having contact holes.
[0066] Finally, the protective insulating film 19 exposed from the contact hole in the planarizing film 20 is removed to make the contact hole reach the drain electrode 18d of the second TFT 9b.
[0067] In this manner, the TFT layer 30 can be formed.
[0068] <Organic EL element layer forming process> First, a transparent conductive film such as an ITO film (thickness: about 100 nm) is formed by, for example, a sputtering method on the surface of the substrate on which the TFT layer 30 has been formed in the TFT layer forming process, and then the transparent conductive film is patterned by, for example, a photolithography method to form third electrodes 31 (31r, 31g, 31b) and the like (third electrode forming process).
[0069] Next, an acrylic photosensitive resin film (approximately 2.5 μm thick) is applied to the substrate surface on which the third electrode 31 etc. are formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed and post-baked to form the first edge cover 32 (first edge cover formation process).
[0070] Then, as shown in FIG. 7 , a fourth transparent conductive film 33 (thickness: about 9 nm) such as an amorphous ITO film, a first metal film 34 (thickness: about 95 nm) such as an Ag film, and a first transparent conductive film 35 (thickness: about 65 nm) such as an amorphous ITO film are formed in this order on the surface of the substrate on which the first edge cover 32 has been formed, for example by sputtering. Then, as shown in FIG. 8 , a resist pattern is formed on the stacked film of the fourth transparent conductive film 33, the first metal film 34, and the first transparent conductive film 35 by photolithography, and the stacked film (first transparent conductive film 35 / first metal film 34 / fourth transparent conductive film 33) exposed from the resist pattern is patterned by wet etching using a mixed solution of phosphoric acid, nitric acid, and acetic acid (first process / first electrode formation process). 7 and 8 , in this first step, a thirteenth transparent conductive layer 33br, a fourteenth transparent conductive layer 33bg, and a fifteenth transparent conductive layer 33bb are formed from the fourth transparent conductive film 33, a first metal layer 34r, a second metal layer 34g, and a third metal layer 34b are formed from the first metal film 34, and a tenth transparent conductive layer 35br, an eleventh transparent conductive layer 35bg, and a twelfth transparent conductive layer 35bb are formed from the first transparent conductive film 35. Note that the first electrode formation step of forming the plurality of first electrodes 40 includes a first step, and a second, third, and fourth steps, which will be described later.
[0071] Furthermore, the substrate on which the thirteenth transparent conductive layer 33br and the like are formed is baked, for example, at about 220°C, to crystallize the thirteenth transparent conductive layer 33br, the fourteenth transparent conductive layer 33bg, the fifteenth transparent conductive layer 33bb, the tenth transparent conductive layer 35br, the eleventh transparent conductive layer 35bg, and the twelfth transparent conductive layer 35bb, thereby forming the seventh transparent conductive layer 33r, the eighth transparent conductive layer 33g, the ninth transparent conductive layer 33b, the first transparent conductive layer 35r, the fourth transparent conductive layer 35g, and the sixth transparent conductive layer 35b, as shown in Figure 9 (second process / first electrode formation process).
[0072] Next, on the surface of the substrate on which the seventh transparent conductive layer 33r and the like have been formed, for example, by sputtering, an amorphous second transparent conductive film 36 (with a thickness of approximately 60 nm) such as an IZO film is formed so as to cover the first transparent conductive layer 35r, the fourth transparent conductive layer 35g, and the sixth transparent conductive layer 35b, as shown in FIG. 10. Thereafter, a resist pattern is formed on the second transparent conductive film 36 by photolithography, and the second transparent conductive film 36 exposed from the resist pattern is patterned by wet etching with oxalic acid, thereby forming the second transparent conductive layer 36r as shown in FIG. 11 (third process / first electrode formation process). Here, in this third step, the (first transparent conductive layer 35r,) fourth transparent conductive layer 35g and sixth transparent conductive layer 35b formed on the (first metal layer 34r,) second metal layer 34g and third metal layer 34b, respectively, are formed from a crystalline ITO film that is difficult to etch with oxalic acid, so the generation of ITO film residue can be suppressed.
[0073] Thereafter, on the surface of the substrate on which the second transparent conductive layer 36r has been formed, an amorphous third transparent conductive film 37 (with a thickness of approximately 35 nm) such as an IZO film is formed by, for example, a sputtering method so as to cover the second transparent conductive layer 36r, as shown in FIG. 12 . Thereafter, a resist pattern is formed on the third transparent conductive film 37 by photolithography, and the third transparent conductive film 37 exposed from the resist pattern is patterned by wet etching with oxalic acid, thereby forming a third transparent conductive layer 37r and a fifth transparent conductive layer 37g as shown in FIG. 4 , thereby forming first electrodes 40 (40r, 40g, 40b) (fourth step / first electrode formation step). Here, even in this fourth step, the (first transparent conductive layer 35r, fourth transparent conductive layer 35g, and) sixth transparent conductive layer 35b formed (respectively) on the (first metal layer 34r, second metal layer 34g, and) third metal layer 34b are formed from a crystalline ITO film that is difficult to etch with oxalic acid, so the generation of ITO film residue can be suppressed.
[0074] Furthermore, an inorganic insulating film such as a silicon nitride film (thickness: approximately 300 nm) is formed on the substrate surface on which the first electrode 40 is formed, for example, by plasma CVD, and the inorganic insulating film is then patterned by photolithography or the like to form a second edge cover 41 (second edge cover formation process).
[0075] Thereafter, on the surface of the substrate on which the second edge cover 41 is formed, a hole injection layer 1, a hole transport layer 2, an emissive layer 3, an electron transport layer 4, and an electron injection layer 5 are sequentially formed, for example, by vacuum deposition, to a thickness of approximately several tens of nanometers to 50 nanometers, thereby forming an organic EL layer 42 (organic EL layer formation process).
[0076] Finally, a transparent conductive film such as an ITO film (thickness: approximately 100 nm) is formed by sputtering on the surface of the substrate on which the organic EL layer 42 is formed using a film formation mask, thereby forming a second electrode 43 (second electrode formation process).
[0077] In this manner, the organic EL element layer 50 can be formed.
[0078] <Sealing film forming process> First, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is formed by plasma CVD using a film formation mask on the surface of the substrate on which the organic EL element layer 50 has been formed in the organic EL element layer forming process, thereby forming a first inorganic sealing film 61.
[0079] Subsequently, an organic resin material such as an acrylic resin is deposited by, for example, an inkjet method on the surface of the substrate on which the first inorganic sealing film 61 has been formed, to form an organic sealing film 62 .
[0080] Furthermore, on the substrate on which the organic sealing film 62 has been formed, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is formed by plasma CVD using a film formation mask to form a second inorganic sealing film 63, thereby forming a sealing film 65.
[0081] Finally, a protective sheet (not shown) is attached to the surface of the substrate on which the sealing film 65 is formed, and then laser light is irradiated from the glass substrate side of the resin substrate 10 to peel the glass substrate from the underside of the resin substrate 10, and further a protective sheet (not shown) is attached to the underside of the resin substrate 10 from which the glass substrate has been peeled.
[0082] In this manner, the organic EL display device 100 of this embodiment can be manufactured.
[0083] As described above, according to the organic EL display device 100 and its manufacturing method of this embodiment, the first electrode 40r corresponding to the first sub-pixel Pr that displays red is provided by sequentially stacking the seventh transparent conductive layer 33r, the first metal layer 34r, the first transparent conductive layer 35r, the second transparent conductive layer 36r, and the third transparent conductive layer 37r. The first electrode 40g corresponding to the second sub-pixel Pg that displays green is provided by sequentially stacking the eighth transparent conductive layer 33g, the second metal layer 34g, the fourth transparent conductive layer 35g, and the fifth transparent conductive layer 37g. The first electrode 40b corresponding to the third sub-pixel Pb that displays blue is provided by sequentially stacking the ninth transparent conductive layer 33b, the third metal layer 34b, and the sixth transparent conductive layer 35b. Here, the first transparent conductive layer 35r, the fourth transparent conductive layer 35g, and the sixth transparent conductive layer 35b are formed of a crystalline ITO film that is difficult to etch with oxalic acid, and are formed of a material with a lower etching rate than the second transparent conductive layer 36r, the third transparent conductive layer 37r, and the fifth transparent conductive layer 37g, which are made of an amorphous transparent conductive film that is easily etched with oxalic acid. Therefore, in the third and fourth steps of the first electrode formation process for forming the first electrodes 40 (40r, 40g, and 40b), the first transparent conductive layer 35r, the fourth transparent conductive layer 35g, and the sixth transparent conductive layer 35b formed on the first metal layer 34r, the second metal layer 34g, and the third metal layer 34b are difficult to etch with oxalic acid, and therefore, the generation of ITO film residue can be suppressed. This makes it possible to suppress the generation of foreign matter on the surface of the first electrode 40 due to residues of the ITO film, thereby suppressing the occurrence of short circuits between the first electrode 40 and the second electrode 43, forming a cavity structure, and suppressing a decrease in the manufacturing yield of the organic EL display device 100.
[0084] Other Embodiments In the first embodiment, the organic EL layer has a five-layer laminated structure including a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. However, the organic EL layer may have a three-layer laminated structure including, for example, a hole injection layer / hole transport layer, a light-emitting layer, and an electron transport layer / electron injection layer.
[0085] In addition, in the first embodiment described above, an organic EL display device in which the first electrode is an anode and the second electrode is a cathode is exemplified. However, the present invention can also be applied to an organic EL display device in which the layered structure of the organic EL layer is reversed, and the first electrode is a cathode and the second electrode is an anode.
[0086] Furthermore, in the first embodiment described above, an organic EL display device is exemplified in which the electrode of the TFT connected to the first electrode is used as the drain electrode, but the present invention can also be applied to an organic EL display device in which the electrode of the TFT connected to the first electrode is called the source electrode.
[0087] Furthermore, in the above-described first embodiment, an organic EL display device has been described as an example of the display device. However, the present invention can be applied to a display device including a plurality of light-emitting elements driven by current, and can be applied to, for example, a display device including QLEDs (Quantum-dot light emitting diodes), which are light-emitting elements using a quantum dot-containing layer.
[0088] As described above, the present invention is useful for flexible display devices.
[0089] D Display area P Subpixel Pr First subpixel Pg Second subpixel Pb Third subpixel 10 Resin substrate (base substrate) 30 TFT layer (thin film transistor layer) 31, 31r, 31g, 31b Third electrode 33r Seventh transparent conductive layer 33g Eighth transparent conductive layer 33b Ninth transparent conductive layer 34 First metal film 34r First metal layer 34g Second metal layer 34b Third metal layer 35 First transparent conductive film 35br Tenth transparent conductive layer 35bg Eleventh transparent conductive layer 35bb Twelfth transparent conductive layer 35r First transparent conductive layer 35g Fourth transparent conductive layer 35b Sixth transparent conductive layer 36 Second transparent conductive film 36r Second transparent conductive layer 37 Third transparent conductive film 37r Third transparent conductive layer 37g Fifth transparent conductive layer 40, 40r, 40g, 40b First electrode 42 Organic EL layer (organic electroluminescence layer, light-emitting functional layer) 43 Second electrode 50 Organic EL element layer (light-emitting element layer) 65 Sealing film 100 Organic EL display device
Claims
1. A display device comprising: a base substrate; a thin film transistor layer provided on the base substrate; and a light emitting element layer provided on the thin film transistor layer, the light emitting element layer including a plurality of first electrodes, a plurality of light emitting functional layers, and a common second electrode laminated in this order corresponding to a plurality of subpixels constituting a display area, the plurality of subpixels being first subpixels, second subpixels, and third subpixels that display different colors from one another, wherein the first electrode corresponding to the first subpixel is provided by laminating a first metal layer, a first transparent conductive layer, a second transparent conductive layer, and a third transparent conductive layer in this order, the first electrode corresponding to the second subpixel is provided by laminating a second metal layer, a fourth transparent conductive layer, and a fifth transparent conductive layer in this order, and the first electrode corresponding to the third subpixel is provided by laminating a third metal layer and a sixth transparent conductive layer in this order, A display device characterized in that the first transparent conductive layer, the fourth transparent conductive layer, and the sixth transparent conductive layer are formed from a material having a lower etching rate than the second transparent conductive layer, the third transparent conductive layer, and the fifth transparent conductive layer.
2. A display device according to claim 1, wherein the first transparent conductive layer, the fourth transparent conductive layer and the sixth transparent conductive layer are formed from crystalline indium tin oxide, and the second transparent conductive layer, the third transparent conductive layer and the fifth transparent conductive layer are formed from indium zinc oxide or amorphous indium tin oxide.
3. A display device according to claim 1 or 2, wherein the first electrode corresponding to the first sub-pixel is formed by laminating in order a seventh transparent conductive layer, the first metal layer, the first transparent conductive layer, the second transparent conductive layer, and the third transparent conductive layer; the first electrode corresponding to the second sub-pixel is formed by laminating in order an eighth transparent conductive layer, the second metal layer, the fourth transparent conductive layer, and the fifth transparent conductive layer; the first electrode corresponding to the third sub-pixel is formed by laminating in order a ninth transparent conductive layer, the third metal layer, and the sixth transparent conductive layer; and the seventh transparent conductive layer, the eighth transparent conductive layer, and the ninth transparent conductive layer are formed from crystalline indium tin oxide or indium zinc oxide.
4. A display device according to claim 3, characterized in that the first transparent conductive layer, the fourth transparent conductive layer and the sixth transparent conductive layer are formed thicker than the seventh transparent conductive layer, the eighth transparent conductive layer and the ninth transparent conductive layer.
5. A display device according to any one of claims 1 to 4, characterized in that the second transparent conductive layer is formed thicker than the third transparent conductive layer and the fifth transparent conductive layer.
6. A display device according to any one of claims 1 to 5, wherein the light emitting element layer comprises a plurality of third electrodes provided on the thin film transistor layer side of the plurality of first electrodes in correspondence with the plurality of sub-pixels and electrically connected to the plurality of first electrodes, respectively.
7. The display device according to any one of claims 1 to 6, further comprising a sealing film provided on the light emitting element layer.
8. The display device according to any one of claims 1 to 7, wherein at least one of the plurality of light-emitting functional layers is an organic electroluminescence layer.
9. A method for manufacturing a display device according to any one of claims 1 to 8, wherein the first electrode forming step of forming the plurality of first electrodes comprises: a first step of sequentially forming a first metal film and an amorphous first transparent conductive film on the thin film transistor layer, and then patterning the first metal film and the first transparent conductive film to form the first metal layer, the second metal layer, and the third metal layer from the first metal film, and forming a tenth transparent conductive layer, an eleventh transparent conductive layer, and a twelfth transparent conductive layer from the first transparent conductive film, which will become the first transparent conductive layer, the fourth transparent conductive layer, and the sixth transparent conductive layer; and a second step of crystallizing the tenth transparent conductive layer, the eleventh transparent conductive layer, and the twelfth transparent conductive layer formed in the first step by baking to form the first transparent conductive layer, the fourth transparent conductive layer, and the sixth transparent conductive layer. a third step of forming an amorphous second transparent conductive film so as to cover the first transparent conductive layer, the fourth transparent conductive layer, and the sixth transparent conductive layer formed in the second step, and then patterning the second transparent conductive film to form the second transparent conductive layer; and a fourth step of forming an amorphous third transparent conductive film so as to cover the second transparent conductive layer formed in the third step, and then patterning the third transparent conductive film to form the third transparent conductive layer and the fifth transparent conductive layer.
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