Semiconductor storage device and information processing device

Abstract

A card controller (22) receives, from a host device (10), application information associated with an application currently being executed by the host device (10). When an operation parameter including application information matching the received application information is stored in a register (31a), the card controller (22) reads the operation parameter from the register (31a) and operates an SD card (20) according to the operation parameter. When an operation parameter including application information matching the received application information is not stored in the register (31a), the card controller (22) determines an operation parameter by communicating with the host device (10), stores the determined operation parameter in the register (31a), and operates the SD card (20) according to the determined operation parameter.

Description

Semiconductor memory device and information processing device

[0001] The present disclosure relates to a semiconductor memory device and an information processing device.

[0002] Semiconductor memory devices such as flash memory have evolved to have higher density, capacity, and speed, and are being used in an increasingly wide range of industrial applications.

[0003] For example, Patent Document 1 discloses speeding up the startup of a storage system interface.

[0004] Japanese Patent Application Laid-Open No. 2022-052200

[0005] "SD Specifications Part 1 Physical Layer Simplified Specification Version 9.10," SD Association, December 1, 2023, [Retrieved June 20, 2024], Internet <URL: https: / / www.sdcard.org / downloads / pls / pdf / ?p=Part1_Physical_Layer_Simplified_Specification_Ver9.10.jpg&f=Part1PhysicalLayerSimplifiedSpecificationVer9.10Fin_20231201.pdf&e=EN_SS9_1>

[0006] As the speed of semiconductor memory devices increases, the initialization process becomes more complex, and the time required for initialization, i.e., startup, increases. Therefore, there is a demand for semiconductor memory devices that can be started up in a shorter time than before.

[0007] An object of the present disclosure is to provide a semiconductor memory device that can be started up in a shorter time than conventional devices, and an information processing device that writes and reads data to and from such a semiconductor memory device.

[0008] A semiconductor storage device according to one aspect of the present disclosure is a semiconductor storage device comprising: a first interface connected to an information processing device; a semiconductor storage element for storing data to be sent to or received from the information processing device; and a first controller, wherein the semiconductor storage device further comprises a non-volatile memory for storing operational parameters related to the transmission and reception of data between the semiconductor storage device and the information processing device when a predetermined application is executed by the information processing device, the operational parameters including application information associated with the application; the first controller receives from the information processing device application information associated with an application currently being executed by the information processing device; and if operational parameters including application information matching the received application information are stored in the non-volatile memory, reads the operational parameters from the non-volatile memory and operates the semiconductor storage device in accordance with the operational parameters; and if operational parameters including application information matching the received application information are not stored in the non-volatile memory, determines operational parameters by communicating with the information processing device, stores the determined operational parameters in the non-volatile memory, and operates the semiconductor storage device in accordance with the determined operational parameters.

[0009] According to one aspect of the present disclosure, it is possible to provide a semiconductor memory device that can be started up in a shorter time than conventional semiconductor memory devices.

[0010] 1 is a block diagram showing an example of the configuration of a host device 10 and an SD card 20 according to an embodiment. FIG. 2 is a table showing examples of bus speed modes usable by the host device 10 and the SD card 20 of FIG. 1. FIG. 3 is a table showing examples of operating parameters stored in the register 31a of FIG. 1. FIG. 4 is a flowchart showing an example of an initialization process executed by the host controller 12 of the host device 10 of FIG. 1. FIG. 5 is a flowchart showing an example of an initialization process executed by the card controller 22 of the SD card 20 of FIG. 1. FIG. 6 is a diagram showing an example of an operation when the SD card 20 of FIG. 1 operates in a removable mode. FIG. 7 is a diagram showing an example of an operation when the SD card 20 of FIG. 1 operates in an internal mode.

[0011] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. However, unnecessary detailed descriptions may be omitted. For example, detailed descriptions of well-known matters and redundant descriptions of substantially identical configurations may be omitted. This is to avoid unnecessary redundancy in the following description and to facilitate understanding by those skilled in the art.

[0012] The inventor(s) provide the accompanying drawings and the following description to enable those skilled in the art to fully understand the present disclosure, and do not intend for them to limit the subject matter described in the claims.

[0013] Embodiments A semiconductor memory device and an information processing device according to embodiments will be described below with reference to FIGS.

[0014] [Configuration of the embodiment] FIG. 1 is a block diagram showing an example of the configuration of a host device 10 and an SD card 20 according to the embodiment.

[0015] The host device 10 includes a host interface (I / F) 11, a host controller 12, a CPU (Central Processing Unit) 13, a RAM (Random Access Memory) 14, and an SSD (Solid State Drive) 15. The host interface 11 is connected to a card interface 21 (described below) of the SD card 20, and data is sent to and received from the SD card 20 via the host interface 11. The host interface 11 may include, but is not limited to, a legacy SD interface and / or a PCI Express interface. The host controller 12 controls the writing and reading of data to and from the SD card 20. The host controller 12 includes a processor that executes programs. The CPU 13 executes programs such as an operating system and application programs, and controls the overall operation of the host device 10. The RAM 14 temporarily stores programs and data required for the operation of the host device 10. The SSD 15 stores programs and data required for the operation of the host device 10.

[0016] The host device 10 is an example of an information processing device. Examples of the host device 10 include industrial equipment such as robots, machine tools, and IoT (Internet of Things) devices, as well as personal computers, tablet terminal devices, smartphones, and digital cameras.

[0017] The SD card 20 includes a card interface (I / F) 21, a card controller 22, and a NAND flash memory 23. The card interface 21 is connected to the host interface 11 of the host device 10, and data is sent to and received from the host device 10 via the card interface 21. The card interface 21 includes, but is not limited to, a legacy SD interface and / or a PCI Express interface. The card controller 22 controls the overall operation of the SD card 20, and in particular controls the writing and reading of data to and from the NAND flash memory 23. The NAND flash memory 23 stores data to be sent to or received from the host device 10.

[0018] The card controller 22 includes a processor 31, a buffer memory 32, and a NAND controller 33. The processor 31 executes programs. The buffer memory 32 temporarily stores data to be written to or read from the NAND flash memory 23. The NAND controller 33 controls writing and reading of data to and from the NAND flash memory 23.

[0019] The card controller 22 further includes a register 31a inside or outside the processor 31. The register 31a stores operational parameters related to the transmission and reception of data between the SD card 20 and the host device 10 when a predetermined application is executed by the host device 10. The operational parameters include, for example, an application identifier indicating the application, a signal voltage, a bus speed mode, etc. The register 31a may further store identification information of the SD card 20, including identification information of the manufacturer of the SD card 20, a product name, a serial number, etc.

[0020] The SD card 20 is an example of a semiconductor memory device. The NAND flash memory 23 is an example of a semiconductor memory element. The register 31a is an example of a non-volatile memory. The operating parameters may be stored in the NAND flash memory 23 instead of the register 31a. In this case, the NAND flash memory 23 is an example of a non-volatile memory.

[0021] The functions of each component of the host device 10 and the SD card 20 are not limited to being realized by only a single physical element, but may be realized by multiple elements having different locations and / or characteristics depending on the function.

[0022] In this embodiment, a case will be described in which the host device 10 and the SD card 20 support the UHS-I transmission method. UHS stands for "Ultra High Speed," and UHS-I is a single-ended, 4-bit parallel transmission method.

[0023] FIG. 2 is a table showing examples of bus speed modes usable by the host device 10 and SD card 20 of FIG. 1. In the UHS-I transmission system, data can be transmitted at one of five bus speed modes: SDR12, SDR25, DDR50, SDR50, and SDR104, as shown in FIG. 2, depending on the bus speed mode supported by the host device 10 and SD card 20, respectively. Note that SDR stands for "Single Data Rate," and DDR stands for "Dual Data Rate." In FIG. 2, "S" indicates a standard SD card, and "M" indicates a micro SD card. Furthermore, "○" indicates a required feature, "△" indicates an optional feature, and "-" indicates unavailable.

[0024] [Operation of the embodiment] [Operation mode] The SD card 20 has a first operation mode or "removable mode" in which it is detachably connected to the host device 10, and a second operation mode or "embedded mode" in which it is substantially permanently connected to the host device 10. In the removable mode, the SD card 20 is used, for example, to transfer data between the host device 10 and another host device. In the embedded mode, the SD card 20 is used, for example, as an internal storage device of the host device 10.

[0025] Generally, since the SD card 20 is a removable storage medium, it may be removed from the host device 10 at any time. If the SD card 20 is removed from the host device 10 while data is being written to the NAND flash memory 23, the writing may be interrupted and the data may be corrupted. To prevent such data corruption, in the removable mode, the card controller 22 writes data from the buffer memory 32 to the NAND flash memory 23 at a relatively high frequency.

[0026] Furthermore, the SD card 20 may be used as an internal storage device of a host device, rather than for transferring data between multiple host devices. In this case, the SD card 20 remains connected to the host device 10 and is not likely to be removed from the host device 10. The host device 10 may, for example, run an application that continues to record some kind of log data to the SD card 20 over a long period of time. Therefore, in the internal mode, the card controller 22 may write data from the buffer memory 32 to the NAND flash memory 23 at a relatively low frequency.

[0027] [Operational Parameters] The host device 10 and the SD card 20 transmit and receive data to and from each other according to operational parameters including the signal voltage and bus speed mode of the SD card 20. Before starting to transmit and receive data, the host device 10 and the SD card 20 perform an initialization process to determine the operational parameters. Different operational parameters are determined depending on the application executed by the host device 10. In this embodiment, the determined operational parameters are stored in the register 31a of the SD card 20.

[0028] Fig. 3 is a table showing an example of operational parameters stored in register 31a of Fig. 1. Fig. 3 shows a case where register 31a stores multiple sets of operational parameters identified by index i (i=1, ..., N).

[0029] Each set of operating parameters includes V_HOSTID, V_APPID, V_MODE, V_VOLTAGE, V_CID, V_PASS, and V_BUSMODE. V_HOSTID is an identifier of the host device 10, and may be, for example, the MAC address of the host device 10. V_APPID is an identifier of an application executed by the host device 10 of V_HOSTID. V_MODE is the operating mode of the SD card 20, with "REMOVEABLE" indicating the removable mode and "EMBEDDED" indicating the built-in mode. V_VOLTAGE is the signal voltage of the SD card 20. V_CID is the identifier of the SD card 20. V_PASS is a password used to unlock the SD card 20. V_BUSMODE is the bus speed mode between the host device 10 and the SD card 20. The operating parameters V_HOSTID, V_APPID, and V_MODE are received from the host device 10. The operating parameters V_VOLTAGE, V_CID, V_PASS, and V_BUSMODE are determined by the host device 10 and the SD card 20 communicating with each other through an initialization process described below with reference to Figures 4 and 5. When the host device 10 with V_HOSTID executes the application with V_APPID, the host device 10 and the SD card 20 operate in accordance with the operating parameters V_MODE, V_VOLTAGE, V_CID, V_PASS, and V_BUSMODE.

[0030] Each set of operating parameters is determined for each application executed by the host device 10 .

[0031] The register 31a may store only one set of operating parameters, and in the initial state, the register 31a does not store any operating parameters.

[0032] [Reducing Start-Up Time] To determine operating parameters, the host device 10 and the SD card 20 must communicate with each other to initialize the SD card 20. That is, the host device 10 must transmit several command signals (one example of a control signal) to the SD card 20, and the SD card 20 must transmit corresponding response signals to the host device 10. However, if the host device 10 and the SD card 20 support a high-speed bus speed mode, for example, the bus speed mode SDR104 of the UHS-I transmission system, it takes a long time to initialize the SD card 20. Below, with reference to Figures 4 and 5, a process for initializing and starting up the SD card 20 in a short time will be described.

[0033] FIG. 4 is a flowchart showing an example of an initialization process executed by the host controller 12 of the host device 10 of FIG.

[0034] The process of FIG. 4 starts when the card interface 21 is connected to the host interface 11 and power supply from the host device 10 to the SD card 20 is started.

[0035] In step S1 of FIG. 4, the host controller 12 resets the SD card 20 by sending a command CMD0 to the card controller 22.

[0036] In step S2, the host controller 12 sends a command CMDNEW including an operation mode H_MODE and an application identifier H_APPID to the card controller 22. The operation mode H_MODE indicates the operation mode of the SD card 20 specified by the host device 10, i.e., the removable mode or the built-in mode. The application identifier H_APPID indicates the application currently being executed by the host device 10. The command CMDNEW may further include an identifier H_HOSTID of the host device 10.

[0037] 5, the card controller 22 determines whether previously set operating parameters including an application identifier V_APPID that matches the application identifier H_APPID are stored in the register 31a based on the operating mode H_MODE and the application identifier H_APPID. The card controller 22 notifies the host controller 12 whether previously set operating parameters are stored in the register 31a using the return value of the command CMDNEW. If the return value is 0, the previously set operating parameters do not exist in the register 31a. On the other hand, if the return value is 1, the previously set operating parameters are stored in the register 31a.

[0038] In step S3, the host controller 12 determines whether the return value of the command CMDNEW is 0 or not, and if YES, the process proceeds to step S4, and if NO, the process proceeds to step S13.

[0039] In step S4, the host controller 12 sends a command CMD8 to the card controller 22 to notify the card controller 22 of the supply voltage of the host device 10 and to inquire whether the SD card 20 supports the supply voltage of the host device 10. The host controller 12 also sends a command CMD8 to the card controller 22 to check the capacity of the SD card 20.

[0040] In step S5, the host controller 12 transmits a command ACMD41′ to the card controller 22 to transmit HCS (Host Capacity Support) information to the card controller 22 and receives OCR (Operating Condition Register) information from the card controller 22.

[0041] In step S6, the host controller 12 changes the signal voltage from 3.3 V to 1.8 V by sending a command CMD11 to the card controller 22. Note that the signal voltage of 1.8 V is specified for the UHS-I transmission method. If the SD card 20 does not support the UHS-I transmission method, the host controller 12 skips step S6.

[0042] In step S7, the host controller 12 sends a command CMD2 to the card controller 22 to read the identifier V_CID of the SD card 20 from the register 31a.

[0043] In step S8, the host controller 12 sends a command CMD3 to the card controller 22, causing the SD card 20 to generate a relative card address (RCA).

[0044] In step S9, the host controller 12 sends command CMD7 to the card controller 22, thereby selecting the SD card 20 using the relative card address generated in step S8 as an argument, and transitioning the SD card 20 to a transfer state, i.e., a state in which data can be transmitted.

[0045] In step S10, the host controller 12 sends a command CMD42 to the card controller 22 to unlock the SD card 20 using the password V_PASS if the SD card 20 is locked.

[0046] In step S11, the host controller 12 sends a command ACMD6 to the card controller 22 to change the bus width between the host device 10 and the SD card 20 from 1 bit to 4 bits.

[0047] In step S12 , the host controller 12 sends a command CMD6 to the card controller 22 to set the bus speed mode between the host device 10 and the SD card 20 .

[0048] By executing steps S4 to S12, the host controller 12 communicates with the card controller 22 to determine operating parameters, and sets the determined operating parameters in the host device 10.

[0049] In step S13, the host controller 12 receives, from the card controller 22, operational parameters including the application identifier V_APPID that matches the application identifier H_APPID, which have been previously set and stored in the register 31a. The host controller 12 then sets the received operational parameters in the host device 10.

[0050] In step S14, the host controller 12 determines whether or not the bus speed mode SDR 104 of the UHS-I transmission method is set, and if YES, the process proceeds to step S15, and if NO, the process ends.

[0051] In step S15, the host controller 12 requests the card controller 22 to transmit a known data pattern called a tuning block by transmitting a command CMD19 to the card controller 22. The host controller 12 adjusts the sample points of the host device 10 based on the tuning block.

[0052] Thereafter, the host device 10 operates in accordance with the determined operating parameters or the operating parameters read from the register 31 a , and transmits or receives data to or from the SD card 20 .

[0053] The commands CMD0, CMD8, ACMD41′, CMD11, CMD2, CMD3, CMD7, CMD42, ACMD6, CMD6, and CMD19 in steps S1, S4 to S12, and S15 are existing commands for the SD card 20 (see Non-Patent Document 1). On the other hand, the command CMDNEW in step S2 is a newly added command.

[0054] Fig. 5 is a flowchart showing an example of initialization processing executed by the card controller 22 of the SD card 20 of Fig. 1. Fig. 5 shows processing by the card controller 22 corresponding to the processing by the host controller 12 shown in Fig. 4.

[0055] 4, the process of FIG. 5 starts when the card interface 21 is connected to the host interface 11 and power supply from the host device 10 to the SD card 20 is started.

[0056] In step S21, the card controller 22 receives the command CMD0 from the host controller 12 and resets the SD card 20.

[0057] In step S22, the card controller 22 receives from the host controller 12 a command CMDNEW including an operation mode H_MODE and an application identifier H_APPID.

[0058] In step S23, the card controller 22 sets the return value of the command CMDNEW to 0. The return value may be written to an address in the register 31a that can be read by the host device 10.

[0059] In step S24, the card controller 22 sets an index i indicating a set of operating parameters to N.

[0060] In step S25, the card controller 22 determines whether the index i is equal to 0 or not, and if YES, proceeds to step S26, and if NO, proceeds to step S27.

[0061] In step S26, the card controller 22 receives the commands CMD8, ACMD41′, CMD11, CMD2, CMD3, CMD7, CMD42, ACMD6, and CMD6 from the host controller 12 and determines operational parameters by executing processes associated with these commands. The card controller 22 further sets the determined operational parameters in the SD card 20. The card controller 22 stores a set of new operational parameters, including the determined operational parameters and the operational mode H_MODE, application identifier H_APPID, and identifier H_HOSTID of the host device 10 included in the command CMDNEW, in the register 31a. The operational mode H_MODE, application identifier H_APPID, and identifier H_HOSTID of the host device 10 are stored in the register 31a as operational parameters V_MODE, V_APPID, and V_HOSTID.

[0062] In step S27, the card controller 22 determines whether the received application identifier H_APPID matches the application identifier V_APPID included in the i-th set of operating parameters stored in the register 31a, and if the answer is YES, the process proceeds to step S29, and if the answer is NO, the process proceeds to step S28. If these application identifiers match, it is determined that operating parameters associated with the application currently being executed by the host device 10 have been previously set and stored in the register 31a.

[0063] In step S28, the card controller 22 decrements the index i by 1. While i≠0, the card controller 22 searches the register 31a to determine whether or not the operating parameters including the application identifier V_APPID that matches the received application identifier H_APPID are stored in the register 31a. If i=0 is reached, it is determined that the operating parameters including the application identifier V_APPID that matches the received application identifier H_APPID are not stored in the register 31a.

[0064] In step S29, the card controller 22 reads from the register 31a the previously set operating parameters including the application identifier V_APPID that matches the received application identifier H_APPID, and then sets the read operating parameters in the SD card 20.

[0065] In step S30, the card controller 22 sets the return value of the command CMDNEW to 1.

[0066] In step S31, the card controller 22 transmits the previously set operating parameters read from the register 31a to the host controller 12. For this purpose, the operating parameters may be written to an address in the register 31a that is readable by the host device 10.

[0067] Thereafter, the SD card 20 operates in accordance with the determined operating parameters or the operating parameters read from the register 31 a, and transmits or receives data to or from the host device 10 .

[0068] 4 and 5, if previously set operating parameters are stored in register 31a, host device 10 and SD card 20 operate in accordance with the operating parameters read from register 31a. This eliminates the need to issue commands CMD8, ACMD41', CMD11, CMD2, CMD3, CMD7, CMD42, ACMD6, and CMD6 to determine operating parameters, and enables SD card 20 to start up in a shorter time than conventional methods.

[0069] 3, the register 31a may store multiple sets of operating parameters each associated with a different application executed by the host device 10. In this case, the card controller 22 reads from the register 31a the operating parameters including the application identifier that matches the application identifier indicating the application currently being executed by the host device 10.

[0070] If the host device 10 executes only one predetermined application, the identifier of the host device 10 may be used instead of the application identifier to identify previously set operating parameters associated with the application currently executed by the host device 10. In this case, in step S2 of FIG. 4, the host controller 12 sends a command CMDNEW including the identifier H_HOSTID of the host device 10 to the card controller 22. Then, in step S27 of FIG. 5, the card controller 22 determines whether the received identifier H_HOSTID of the host device 10 matches the identifier V_HOSTID of the host device 10 included in the i-th set of operating parameters stored in the register 31a. In step S29, the card controller 22 reads from the register 31a the previously set operating parameters including the identifier V_HOSTID of the host device 10 that matches the received identifier H_HOSTID of the host device 10. In other respects, the host controller 12 and the card controller 22 operate in the same way as when using an application identifier. In this way, the host controller 12 and the card controller 22 can identify previously set operating parameters using application information that includes at least one of an identifier indicating the application itself and an identifier indicating the host device 10 that runs the application.

[0071] [Garbage Collection] NAND flash memory requires a process called garbage collection (GC) to make it possible to write other data to an area where data has been written.

[0072] 6 is a diagram showing an example of the operation of the SD card 20 of FIG. 1 when it operates in the removable mode. When the SD card 20 is connected to the host device 10 and power supply is started, the card controller 22 initializes the SD card 20 and determines operating parameters in step S41, and then performs garbage collection on the NAND flash memory 23 in step S42. Thereafter, when writing data from the host device 10 to the SD card 20, the card controller 22 temporarily stores the data in the buffer memory 32, and then moves the data from the buffer memory 32 to the NAND flash memory 23 in steps S43 to S46. Therefore, the card controller 22 alternately repeats a write period T1a during which data is written to the NAND flash memory 23 and a non-write period T1b during which writing of data to the NAND flash memory 23 is stopped. When the SD card 20 is in the insertion / removal mode, writing occurs, for example, when the size of data written from the host device 10 to the buffer memory 32 exceeds a threshold, or when the elapsed time since the data was written from the host device 10 to the buffer memory 32 exceeds a threshold. The data size threshold is set to be much smaller than the size of the buffer memory 32. The elapsed time threshold is set to, for example, 20 milliseconds. When data is written from the buffer memory 32 to the NAND flash memory 23, the data size in the buffer memory 32 is reset to zero, and the elapsed time is also reset to zero. Therefore, data is written from the buffer memory 32 to the NAND flash memory 23 in a relatively short period T1 (or with a relatively high frequency). In other words, when the SD card 20 is in the insertion / removal mode, the card controller 22 alternately repeats a write period T1a and a non-write period T1b in a short period T1 (or with a high frequency) when writing data to the NAND flash memory 23. Every time data is written to the NAND flash memory 23, garbage collection of the NAND flash memory 23 is required.However, when the SD card 20 operates in the removable mode, the non-writing period T1b may not have a sufficient length of time to perform garbage collection, and therefore garbage collection may not be performed sufficiently.

[0073] Conventional SD cards only support removable mode. Therefore, if an SD card that only supports removable mode remains connected to a host device and data continues to be recorded on the SD card for a long period of time, there is a possibility that garbage collection may not be performed sufficiently. This may result in an inability to secure space for writing new data, and the SD card's lifespan may be shortened. Therefore, even if the SD card remains connected to a host device and data continues to be recorded on the SD card for a long period of time, it is necessary to perform garbage collection appropriately.

[0074] 7 is a diagram showing an example of the operation of the SD card 20 of FIG. 1 when it operates in the built-in mode. When the SD card 20 is connected to the host device 10 and power supply is started, the card controller 22 initializes the SD card 20 and determines operating parameters in step S51, and then performs garbage collection of the NAND flash memory 23 in step S52. The operating parameters determined in step S51 are stored in the register 31a. Thereafter, for example, when power supply is temporarily stopped and then resumed, the card controller 22 may initialize the SD card 20 and set operating parameters in step S53, and then perform garbage collection of the NAND flash memory 23 in step S54. In step S53, the card controller 22 reads the operating parameters from the register 31a. Thereafter, when writing data from the host device 10 to the SD card 20, the card controller 22 temporarily stores the data in the buffer memory 32, and then, in steps S55 and S57, moves the data from the buffer memory 32 to the NAND flash memory 23. Therefore, the card controller 22 alternates between a write period T2a and a non-write period T2b. When the SD card 20 is in the built-in mode, writing occurs, for example, when the size of the data written from the host device 10 to the buffer memory 32 reaches the size of the buffer memory 32, or when the host device 10 issues an instruction to write data from the buffer memory 32 to the NAND flash memory 23. The host device 10 issues a write instruction, for example, every 1 to 10 seconds, or when the power supply is stopped. Therefore, data is written from the buffer memory 32 to the NAND flash memory 23 at a period T2 longer than the period T1 (or at a relatively low frequency). In other words, when the SD card 20 is in the built-in mode, the card controller 22 alternately repeats a write period T2a and a non-write period T2b at a long cycle T2 (or at a low frequency) when writing data to the NAND flash memory 23.When the SD card 20 operates in the built-in mode, the card controller 22 performs garbage collection during the non-write period T2b, for example, in steps S56 and S58. In the built-in mode, data is written from the buffer memory 32 to the NAND flash memory 23 less frequently than in the removable mode, and as a result, the non-write period is longer than in the removable mode, making it easier to perform garbage collection.

[0075] The period T2 in the built-in mode is longer than the period T1 in the detachable mode. Therefore, the durations of the writing period T2a and non-writing period T2b in the built-in mode are longer than the durations of the writing period T1a and non-writing period T1b in the detachable mode.

[0076] The card controller 22 receives a command CMDNEW from the host device 10, which includes an operating mode H_MODE that specifies either the removable mode or the built-in mode. When the command CMDNEW specifies the built-in mode, the card controller 22 executes garbage collection of the NAND flash memory 23 during a non-write period. This allows garbage collection to be performed appropriately even when the SD card 20 remains connected to the host device 10 and data continues to be recorded on the SD card 20 for an extended period of time. This makes it less likely for the SD card 20 to deteriorate, allowing the SD card 20 to be used for an extended period of time.

[0077] In the built-in mode, data is written from the buffer memory 32 to the NAND flash memory 23 less frequently than in the removable mode, but the amount of data written at one time is greater than in the removable mode. Therefore, in step S57 of Fig. 7, the same amount of data as that written in steps S44 and S45 of Fig. 6 can be written from the buffer memory 32 to the NAND flash memory 23.

[0078] In the built-in mode, the number of times the NAND flash memory 23 is rewritten is less than in the removable mode. By reducing the number of times the NAND flash memory 23 is rewritten, the number of blocks that need to be garbage collected is also reduced. This makes it less likely that the SD card 20 will deteriorate, allowing the SD card 20 to be used for a longer period of time.

[0079] The host controller 12 may set the operation mode H_MODE to specify one of the removable mode and the internal mode according to an application currently being executed by the host device 10. Generally, it is possible to identify whether the SD card 20 is to be used in the removable mode or the internal mode based on the application currently being executed by the host device 10. The host controller 12 may also set the operation mode H_MODE to specify one of the removable mode and the internal mode according to a user input obtained via some input device (not shown).

[0080] Effects of the Embodiment The SD card 20 according to the embodiment includes a card interface 21 connected to the host device 10, a NAND flash memory 23 that stores data to be sent to or received from the host device 10, and a card controller 22. The SD card 20 further includes a register 31a that stores operational parameters related to data transmission and reception between the SD card 20 and the host device 10 when a predetermined application is executed by the host device 10, the operational parameters including application information associated with the application. The card controller 22 receives, from the host device 10, application information associated with an application currently being executed by the host device 10. If operational parameters including application information matching the received application information are stored in the register 31a, the card controller 22 reads the operational parameters from the register 31a and operates the SD card 20 in accordance with the operational parameters. If operational parameters including application information matching the received application information are not stored in the register 31a, the card controller 22 determines the operational parameters by communicating with the host device 10, stores the determined operational parameters in the register 31a, and operates the SD card 20 in accordance with the determined operational parameters.

[0081] This configuration allows the SD card 20 to be started up in a shorter time than before.

[0082] According to the SD card 20 of the embodiment, if operating parameters including application information that matches the received application information are stored in the register 31a, the card controller 22 may read the operating parameters from the register 31a and transmit them to the host device 10.

[0083] This configuration allows communication between the host device 10 and the SD card 20 to begin in a shorter time than before.

[0084] According to the SD card 20 of the embodiment, the application information may include at least one of a first identifier indicating the application itself and a second identifier indicating the host device 10 that executes the application.

[0085] This configuration allows previously set operating parameters to be determined in a flexible manner.

[0086] According to the SD card 20 of the embodiment, the register 31 a may store multiple sets of operating parameters associated with multiple different applications executed by the host device 10 .

[0087] With this configuration, regardless of which application the host device 10 is executing, the SD card 20 can be started up in a shorter time than before.

[0088] According to the SD card 20 of the embodiment, the SD card 20 may have first and second operation modes. In this case, when writing data from the host device 10 to the SD card 20, the card controller 22 alternately repeats a write period in which data is written to the NAND flash memory 23 and a non-write period in which writing of data to the NAND flash memory 23 is stopped. In this case, the card controller 22 receives a control signal from the host device 10 that specifies one of the first and second operation modes. When the control signal specifies the second operation mode, the card controller 22 performs garbage collection of the NAND flash memory 23 during the non-write period.

[0089] With this configuration, garbage collection can be performed appropriately even when the SD card 20 is connected to the host device 10 and data continues to be recorded on the SD card 20 for a long period of time.

[0090] According to the SD card 20 of this embodiment, when the SD card 20 is in a first operating mode, the card controller 22 may alternately repeat write periods and non-write periods at a first frequency when writing data from the host device 10 to the SD card 20. Furthermore, when the SD card 20 is in a second operating mode, the card controller 22 may alternately repeat write periods and non-write periods at a second frequency that is lower than the first frequency when writing data from the host device 10 to the SD card 20.

[0091] This configuration makes it possible to make data less susceptible to corruption in the first mode, and to perform garbage collection appropriately in the second mode.

[0092] According to the SD card 20 of the embodiment, the control signal may specify one of the first and second operation modes according to the application currently being executed by the host device 10 .

[0093] This configuration allows the SD card 20 to operate in the appropriate operating mode depending on the application currently being executed by the host device 10 .

[0094] The host device 10 according to the embodiment includes a host interface 11 connected to an SD card 20 and a host controller 12 that transmits application information to the SD card 20 .

[0095] This configuration allows the SD card 20 to be started up in a shorter time than before.

[0096] According to the host device 10 of the embodiment, if operating parameters including application information that matches the transmitted application information are stored in register 31a, the host controller 12 may receive the operating parameters from the SD card 20 and operate the host device 10 according to the operating parameters.

[0097] This configuration allows communication between the host device 10 and the SD card 20 to begin in a shorter time than before.

[0098] [Other Embodiments] As described above, the embodiments have been described as examples of the technology disclosed in the present application. However, the technology in the present disclosure is not limited to these, and can be applied to embodiments in which modifications, substitutions, additions, omissions, etc. are made as appropriate.

[0099] Furthermore, the accompanying drawings and detailed description are provided to explain the embodiments. Therefore, the components described in the accompanying drawings and detailed description may include not only components essential for solving the problem, but also components that are not essential for solving the problem in order to illustrate the above technology. Therefore, the fact that these non-essential components are described in the accompanying drawings or detailed description should not be interpreted as immediately identifying these non-essential components as essential.

[0100] Furthermore, since the above-described embodiments are intended to illustrate the technology of the present disclosure, various modifications, substitutions, additions, omissions, etc. may be made within the scope of the claims or their equivalents.

[0101] When multiple host devices 10 execute one or more common applications, the operating parameters determined by the combination of a first host device 10 and a first SD card 20 may be copied to the register 31a of the second SD card 20 included in the combination of a second host device 10 and a second SD card 20. In this case, the second host device 10 and the second SD card 20 operate according to the operating parameters read from the register 31a without executing steps S4 to S12 of Fig. 4 and step S26 of Fig. 5, and the SD card 20 can be started up in a shorter time than conventional methods.

[0102] When the SD card 20 is in the built-in mode, the card controller 22 may alternate between write periods and non-write periods at the same frequency as when the SD card 20 is in the removable mode when writing data from the host device 10 to the SD card 20.

[0103] The above-described embodiment is not limited to an SD card and a corresponding host device, but can be applied to any semiconductor memory device and a corresponding information processing device.

[0104] [Summary of the embodiment] A semiconductor storage device according to a first aspect of the present disclosure is a semiconductor storage device comprising: a first interface connected to an information processing device; a semiconductor storage element that stores data to be transmitted to or received from the information processing device; and a first controller, wherein the semiconductor storage device further comprises a non-volatile memory that stores operational parameters related to transmission and reception of data between the semiconductor storage device and the information processing device when a predetermined application is executed by the information processing device, the operational parameters including application information associated with the application, wherein the first controller receives, from the information processing device, application information associated with an application currently being executed by the information processing device; and, if operational parameters including application information matching the received application information are stored in the non-volatile memory, reads the operational parameters from the non-volatile memory and operates the semiconductor storage device in accordance with the operational parameters; and, if operational parameters including application information matching the received application information are not stored in the non-volatile memory, determines operational parameters by communicating with the information processing device, stores the determined operational parameters in the non-volatile memory, and operates the semiconductor storage device in accordance with the determined operational parameters.

[0105] According to the semiconductor memory device of the second aspect of the present disclosure, in the semiconductor memory device of the first aspect, if operating parameters including application information that matches the received application information are stored in the non-volatile memory, the first controller reads the operating parameters from the non-volatile memory and transmits them to the information processing device.

[0106] According to a semiconductor memory device relating to a third aspect of the present disclosure, in the semiconductor memory device relating to the first or second aspect, the application information includes at least one of a first identifier indicating the application itself and a second identifier indicating an information processing device that executes the application.

[0107] According to a semiconductor memory device relating to a fourth aspect of the present disclosure, in the semiconductor memory device relating to one of the first to third aspects, the non-volatile memory stores multiple sets of operating parameters respectively associated with multiple different applications executed by the information processing device.

[0108] According to a fifth aspect of the present disclosure, in the semiconductor memory device according to any one of the first to fourth aspects, the semiconductor memory device is an SD card.

[0109] According to a semiconductor memory device according to a sixth aspect of the present disclosure, in the semiconductor memory device according to one of the first to fifth aspects, the semiconductor memory device has first and second operating modes, and when writing data from the information processing device to the semiconductor memory device, the first controller alternates between a write period in which data is written to the semiconductor memory element and a non-write period in which writing of data to the semiconductor memory element is stopped, and the first controller receives a control signal from the information processing device that specifies one of the first and second operating modes, and when the control signal specifies the second operating mode, performs garbage collection of the semiconductor memory element during the non-write period.

[0110] According to a semiconductor memory device according to a seventh aspect of the present disclosure, in the semiconductor memory device according to the sixth aspect, when the semiconductor memory device is in the first operating mode, the first controller alternately repeats the write period and the non-write period at a first frequency when writing data from the information processing device to the semiconductor memory device, and when the semiconductor memory device is in the second operating mode, the first controller alternately repeats the write period and the non-write period at a second frequency lower than the first frequency when writing data from the information processing device to the semiconductor memory device.

[0111] According to the semiconductor memory device of the eighth aspect of the present disclosure, in the semiconductor memory device of the sixth or seventh aspect, the control signal specifies one of the first and second operating modes according to an application currently being executed by the information processing device.

[0112] An information processing device according to a ninth aspect of the present disclosure includes a second interface connected to a semiconductor memory device according to one of the first to eighth aspects, and a second controller that transmits the application information to the semiconductor memory device.

[0113] According to the information processing device of the tenth aspect of the present disclosure, in the information processing device of the ninth aspect, when operating parameters including application information that matches the transmitted application information are stored in the non-volatile memory, the second controller receives the operating parameters from the semiconductor storage device and operates the information processing device in accordance with the operating parameters.

[0114] The present disclosure is applicable to consumer devices that use semiconductor storage devices such as SD cards, and is also applicable to industrial devices including robot control devices and industrial equipment.

[0115] 10 Host device 11 Host interface (I / F) 12 Host controller 13 CPU (Central Processing Unit) 14 RAM (Random Access Memory) 15 SSD (Solid State Drive) 20 SD card 21 Card interface (I / F) 22 Card controller 23 NAND flash memory 31 Processor 31a Register 32 Buffer memory 33 NAND controller

Claims

1. A semiconductor storage device comprising: a first interface connected to an information processing device; a semiconductor storage element for storing data to be transmitted to or received from the information processing device; and a first controller, wherein the semiconductor storage device further comprises a non-volatile memory for storing operational parameters relating to the transmission and reception of data between the semiconductor storage device and the information processing device when a predetermined application is executed by the information processing device, the operational parameters including application information associated with the application; the first controller receives from the information processing device application information associated with an application currently being executed by the information processing device; and, if operational parameters including application information matching the received application information are stored in the non-volatile memory, reads the operational parameters from the non-volatile memory and operates the semiconductor storage device in accordance with the operational parameters; and, if operational parameters including application information matching the received application information are not stored in the non-volatile memory, determines operational parameters by communicating with the information processing device, stores the determined operational parameters in the non-volatile memory, and operates the semiconductor storage device in accordance with the determined operational parameters.

2. The semiconductor memory device according to claim 1, wherein, if operating parameters including application information that matches the received application information are stored in the nonvolatile memory, the first controller reads the operating parameters from the nonvolatile memory and transmits them to the information processing device.

3. The semiconductor memory device according to claim 1, wherein the application information includes at least one of a first identifier that identifies the application itself and a second identifier that identifies an information processing device that executes the application.

4. The semiconductor memory device according to claim 1, wherein said non-volatile memory stores a plurality of sets of operating parameters respectively associated with a plurality of different applications executed by said information processing device.

5. The semiconductor memory device according to claim 1, wherein the semiconductor memory device is an SD card.

6. A semiconductor memory device according to any one of claims 1 to 5, wherein the semiconductor memory device has first and second operating modes, and the first controller, when writing data from the information processing device to the semiconductor memory device, alternates between a write period in which data is written to the semiconductor memory element and a non-write period in which writing of data to the semiconductor memory element is stopped, and the first controller receives a control signal from the information processing device that specifies one of the first and second operating modes, and when the control signal specifies the second operating mode, performs garbage collection of the semiconductor memory element during the non-write period.

7. A semiconductor memory device according to claim 6, wherein when the semiconductor memory device is in the first operating mode, the first controller alternately repeats the write period and the non-write period at a first frequency when writing data from the information processing device to the semiconductor memory device, and when the semiconductor memory device is in the second operating mode, the first controller alternately repeats the write period and the non-write period at a second frequency lower than the first frequency when writing data from the information processing device to the semiconductor memory device.

8. The semiconductor memory device according to claim 6, wherein the control signal specifies one of the first and second operation modes in accordance with an application currently being executed by the information processing device.

9. An information processing device comprising: a second interface connected to the semiconductor storage device according to claim 1; and a second controller that transmits the application information to the semiconductor storage device.

10. The information processing device according to claim 9, wherein, if operating parameters including application information that matches the transmitted application information are stored in the non-volatile memory, the second controller receives the operating parameters from the semiconductor storage device and operates the information processing device in accordance with the operating parameters.

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