Distance image imaging device and driving method

Abstract

A distance image imaging device (100) comprises: a light source (10) that emits irradiation light; a plurality of pixels (22) that receive reflected light that is the irradiation light reflected from an object; a drive control unit (23); and a signal processing unit (26) that calculates the distance to the object. Each pixel (22) includes a photoelectric conversion unit that converts the reflected light into a signal charge, a plurality of charge storage units that store signal charges, and a plurality of charge transfer gates that distribute and transfer the signal charges to the plurality of charge storage units. The drive control unit (23) controls the driving of the plurality of pixels (22) by dividing the plurality of pixels (22) into one or more groups in which the plurality of charge transfer gates are driven at the same timing. The drive control unit (23) has a first control mode in which the number of the one or more groups is a first number, and a second control mode in which the number of the one or more groups is a second number greater than the first number.

Description

Range image capturing device and driving method

[0001] The present disclosure relates to a distance imaging device and a method for driving a distance imaging device.

[0002] Conventionally, distance imaging devices that employ an indirect ToF (Time of Flight) method for measuring the distance to an object have been known. In the indirect ToF method, light emitted from a light source is exposed to light reflected by an object over multiple exposure periods with different timings, and the distance is calculated based on the amount of delay of the reflected light calculated from the signal ratio corresponding to each exposure period. Furthermore, research is being conducted on distance imaging devices that can implement multiple control modes as drive control modes for generating a distance image using the distance imaging device.

[0003] For example, Patent Document 1 discloses a distance measuring device that generates a distance image by performing ToF detection using a sine wave modulation method and ToF detection using a pulse modulation method.

[0004] JP 2017-167120 A

[0005] In distance measurement using the indirect ToF method, signal charges generated in a photoelectric conversion unit based on reflected light are distributed and transferred to multiple charge accumulation units. To improve the accuracy of distance measurement in a range imaging device, it is necessary to suppress unintended transfer of signal charges to the charge accumulation units.

[0006] Therefore, the present disclosure provides a range imaging device and the like having a control mode that can suppress unintended transfer of signal charges to a charge accumulation section.

[0007] A distance imaging device according to one aspect of the present disclosure is a distance imaging device that generates a distance image using an indirect ToF (Time of Flight) method, and includes: a light source that irradiates a space with illumination light; a plurality of pixels that receive light reflected from an object in the space from the illumination light; a semiconductor substrate on which the plurality of pixels are two-dimensionally arranged; a drive control unit that controls the driving of the light source and the plurality of pixels; and a signal processing unit that calculates a distance to the object based on signals output by the plurality of pixels based on the reflected light, wherein each of the plurality of pixels includes a photoelectric conversion unit that converts the reflected light into a signal charge, and a signal processing unit that accumulates the signal charge converted by the photoelectric conversion unit. The pixel includes a plurality of charge accumulation sections and a plurality of charge transfer gates that distribute and transfer the signal charges converted by the photoelectric conversion section to the plurality of charge accumulation sections, and the drive control section divides the plurality of pixels into one or more groups that drive the plurality of charge transfer gates at the same timing for each frame, controls the driving of the plurality of pixels, and has control modes for controlling the driving of the light source and the plurality of pixels, including a first control mode in which the number of the one or more groups is a first number, and a second control mode in which the number of the one or more groups is a second number that is greater than the first number.

[0008] A driving method according to an embodiment of the present disclosure is an indirect Time of Flight (ToF) driving method. a driving method for a distance image pickup device that generates a distance image using a Flight system, the distance image pickup device comprising: a light source that irradiates illumination light into a space; a plurality of pixels that receive light reflected from an object in the space from the illumination light; and a semiconductor substrate on which the plurality of pixels are two-dimensionally arranged, each of the plurality of pixels having a photoelectric conversion unit that converts the reflected light into a signal charge; a plurality of charge accumulation units that accumulate the signal charge converted by the photoelectric conversion unit; and a plurality of charge transfer gates that allocate and transfer the signal charge converted by the photoelectric conversion unit to the plurality of charge accumulation units; the driving method divides the plurality of pixels into one or more groups that drive the plurality of charge transfer gates at the same timing for each frame, and controls driving of the plurality of pixels; in a first frame, controlling driving of the light source and the plurality of pixels in a first control mode in which the number of the one or more groups is a first number; and in a second frame, controlling driving of the light source and the plurality of pixels in a second control mode in which the number of the one or more groups is a second number that is greater than the first number.

[0009] According to the present disclosure, it is possible to provide a range imaging device or the like having a control mode that can suppress unintended transfer of signal charges to a charge accumulation section.

[0010] FIG. 1 is a diagram illustrating an overview of a range imaging device according to a first embodiment. FIG. 2 is a functional block diagram illustrating an example of the configuration of a range imaging device according to the first embodiment. FIG. 3 is a plan view illustrating an example of the configuration of a pixel according to the first embodiment. FIG. 4 is a circuit diagram illustrating an example of the circuit configuration of a pixel according to the first embodiment. FIG. 5 is a timing chart illustrating an example of driving the range imaging device in a pulse ToF control mode. FIG. 6 is a timing chart illustrating a transfer control signal for each column of pixels in the pulse ToF control mode shown in FIG. 5. FIG. 7 is a timing chart illustrating a driving example of the range imaging device in another pulse ToF control mode. FIG. 8 is a timing chart illustrating a driving example of the range imaging device in a CWToF control mode. FIG. 9 is a timing chart illustrating a transfer control signal for each column of pixels in the CWToF control mode shown in FIG. 8. FIG. 10 is a diagram illustrating the time changes in the voltage supplied to pixels and the potential of the p-type semiconductor layer in the pulse ToF control mode. FIG. 11 is a diagram illustrating the time changes in the voltage supplied to pixels and the potential of the p-type semiconductor layer in the CWToF control mode. Fig. 12 is a timing chart for explaining an example of the operation of the voltage generating circuit. Fig. 13 is a plan view showing an example of a pixel configuration according to a first modified example of embodiment 1. Fig. 14 is a plan view showing an example of a pixel configuration according to a second modified example of embodiment 1. Fig. 15 is a functional block diagram showing an example of the configuration of a range image pickup device according to embodiment 2.

[0011] (How an aspect of the present disclosure was achieved) As described above, in distance measurement using the indirect ToF method, signal charges generated in a photoelectric conversion unit based on reflected light are distributed and transferred to multiple charge accumulation units. At this time, in each pixel of the distance imaging device, a gate for transferring the signal charges to the charge accumulation units is driven at high speed in order to distribute and transfer the signal charges to the multiple charge accumulation units. Driving the gate at high speed requires a momentary large current.

[0012] When a large current flows instantaneously to drive the gate, the potential of the semiconductor substrate (well) in which the photoelectric conversion unit is formed fluctuates due to wiring resistance and other factors when the current flows, and this can result in unintended transfer of signal charge to the charge accumulation unit even when a turn-off voltage is applied to the gate. The inventors of the present application have found that when the gates of all pixels are driven simultaneously, the fluctuation in the well potential is significant, and that the fluctuation in the well potential can be suppressed by varying the gate drive timing between pixels.

[0013] Indirect ToF methods can be broadly divided into CW (Continuous Wave) ToF methods, also known as continuous wave methods, and pulse ToF methods. In the CW ToF method, illumination light, which is modulated light with a predetermined emission frequency, is emitted, and distance is calculated from the phase difference between the illumination light and the light reflected by an object. Therefore, in the CW ToF method, signals corresponding to four exposure periods with different phase differences relative to the illumination light are acquired. Therefore, in the CW ToF method, multiple pixels are divided into several groups and driven with exposure periods with different phase differences relative to the illumination light, making it easy to differentiate the gate drive timing between pixels.

[0014] The present disclosure has been made based on the above circumstances, and embodiments of the present disclosure will be described in detail below with reference to the drawings.

[0015] The embodiments described below are all comprehensive or specific examples. The numerical values, shapes, components, component placement and connection configurations, steps, and step sequences shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Furthermore, among the components in the following embodiments, components not recited in independent claims are described as optional components. Each figure is a schematic diagram and is not necessarily an exact illustration. In each figure, substantially identical components are designated by the same reference numerals, and redundant descriptions may be omitted or simplified.

[0016] Furthermore, in this specification, terms indicating the relationship between elements, such as perpendicular, parallel, or coincident, terms indicating the shape of elements, and numerical ranges are not expressions that only express a strict meaning, but are expressions that also include a substantially equivalent range, for example, a difference of about a few percent.

[0017] Furthermore, in this specification, unless otherwise specified, ordinal numbers such as "first" and "second" do not refer to the number or order of components, etc., but are used for the purpose of avoiding confusion and distinguishing between components of the same type.

[0018] In addition, in this specification, "connection" between elements means electrical connection unless otherwise specified.

[0019] First Embodiment [Configuration] First, the configuration of a range imaging device according to this embodiment will be described.

[0020] Fig. 1 is a diagram for explaining an overview of a range imaging device 100 according to this embodiment. Fig. 2 is a functional block diagram showing an example of the configuration of the range imaging device 100 according to this embodiment.

[0021] As shown in Figure 1, the distance image capturing device 100 receives light reflected from an object OBJ in space from light emitted into space by a light source 10 using an image capturing element 20, and generates a distance image by measuring the distance to the object OBJ using an indirect ToF method.

[0022] As shown in FIG. 2, the range image capturing device 100 includes a light source 10, an image capturing element 20, a system controller 30, and a capacitive element 40.

[0023] The light source 10 is a light irradiator that irradiates a space with irradiation light in accordance with an input light emission control signal. The light source 10 irradiates pulsed light as irradiation light, for example, in accordance with the timing indicated by a light emission control pulse included in the input light emission control signal. As will be described in detail later, the light source 10 repeatedly irradiates pulsed light at a predetermined cycle in accordance with the light emission control signal.

[0024] The light source 10 is configured with a light irradiator including, for example, a light emitting diode or a laser element that emits infrared light. The light source 10 may include multiple light irradiators. When the light source 10 includes multiple light irradiators, the multiple light irradiators can be used appropriately depending on the irradiation pattern of the pulsed light.

[0025] The imaging element 20 is, for example, a charge coupled device (CCD) sensor or a complementary metal oxide semiconductor (CMOS) sensor.

[0026] As shown in FIG. 2, the imaging element 20 includes a pixel array 21, a drive control unit 23, a plurality of pixel drive circuits 24, an AD conversion circuit 25, a signal processing unit 26, a voltage generation circuit 27, a voltage control unit 28, and a semiconductor substrate 50.

[0027] The semiconductor substrate 50 is a p-type semiconductor substrate or an n-type semiconductor substrate. In the example shown in FIG. 2 , the pixel array 21, the pixel driving circuit 24, and the AD conversion circuit 25 are formed on the semiconductor substrate 50. Note that it is sufficient that the pixel array 21 is formed on the semiconductor substrate 50, and the pixel driving circuit 24 and the AD conversion circuit 25 may be formed on a substrate separate from the semiconductor substrate 50. Furthermore, when the separate substrate is a semiconductor substrate, the semiconductor substrate 50 and the separate substrate may be stacked and bonded to each other. Furthermore, at least one of the drive control unit 23, the signal processing unit 26, the voltage generation circuit 27, and the voltage control unit 28 may be formed on the semiconductor substrate 50.

[0028] The pixel array 21 is composed of a plurality of pixels 22 arranged two-dimensionally. The plurality of pixels 22 are arranged, for example, in a matrix on a semiconductor substrate 50. The plurality of pixels 22 generate signals based on incident light. The plurality of pixels 22 have substantially the same configuration as one another. The plurality of pixels 22 receive light reflected by an object OBJ as incident light. The plurality of pixels 22, for example, convert the reflected light into signal charges and generate signals based on the converted signal charges. The plurality of pixels 22 are exposed multiple times within one frame at timing indicated by an exposure control signal output from the drive control unit 23. A frame is a unit of time from the exposure of the plurality of pixels 22 to the readout of signals from the plurality of pixels 22.

[0029] Here, a detailed configuration of the pixel 22 will be described with reference to FIG. 3 . FIG. 3 is a plan view showing an example of the configuration of the pixel 22 according to the present embodiment. FIG. 3 shows the planar layout of the pixel 22 when the semiconductor substrate 50 is viewed in plan. Note that in FIG. 3 , the multiple charge transfer gates 55 a, 55 b and the multiple reset gates 56, which are gates formed on the p-type semiconductor layer 50 p, are marked with dots for distinction. Also, in FIG. 3 , the configuration of the pixel 22 other than the photoelectric conversion unit 51, the charge accumulation units 52 a, 52 b, the charge transfer units 53 a, 53 b, 53 c, ​​the transfer channel 54, the charge transfer gates 55 a, 55 b, the reset gate 56, and the charge discharge unit 57 are omitted from the illustration.

[0030] As shown in FIG. 3, the pixel 22 has a photoelectric conversion unit 51, a plurality of charge storage units 52a, 52b, a plurality of charge transfer units 53a, 53b, 53c, a plurality of charge transfer gates 55a, 55b, a plurality of reset gates 56, and a plurality of charge discharge units 57.

[0031] The photoelectric conversion unit 51 generates signal charges by converting incident light incident on the pixel 22 into signal charges. The incident light incident on the pixel 22 includes light emitted from the light source 10 and reflected by an object OBJ. In the example shown in FIG. 3 , the photoelectric conversion unit 51 is a photodiode formed in a p-type semiconductor layer 50p, which is a well. When the semiconductor substrate 50 is a p-type semiconductor substrate, the semiconductor substrate 50 itself may be the p-type semiconductor layer 50p. When the semiconductor substrate 50 is an n-type semiconductor substrate, the p-type semiconductor layer 50p is a p-type well formed in the semiconductor substrate 50.

[0032] Each of the charge accumulation units 52a, 52b accumulates signal charges converted by the photoelectric conversion unit 51. Each of the charge accumulation units 52a, 52b is, for example, an n-type impurity region formed in the p-type semiconductor layer 50p. In the example shown in FIG. 3 , each of the charge accumulation units 52a, 52b is a part of a transfer channel 54, which is a CCD channel, and overlaps with a transfer electrode (not shown) for transferring charges in the transfer channel 54 in a plan view. The configuration of the charge accumulation units 52a, 52b is not limited to a configuration in which they are part of the transfer channel 54, and is not particularly limited, as long as they can accumulate signal charges. For example, the charge accumulation units 52a, 52b may be n-type impurity regions formed as floating diffusion layers in the p-type semiconductor layer 50p.

[0033] Each of the charge transfer portions 53 a, 53 b, and 53 c is an n-type impurity region formed in the p-type semiconductor layer 50 p for transferring the signal charges stored in the charge storage portions 52 a, 52 b. In the example shown in Fig. 3, each of the charge transfer portions 53 a, 53 b, and 53 c is a part of a transfer channel 54, which is a CCD channel, and overlaps in plan view with a transfer electrode (not shown) for transferring charges in the transfer channel 54.

[0034] The plurality of charge transfer gates 55a, 55b distribute and transfer the signal charges converted by the photoelectric conversion unit 51 to the plurality of charge accumulation units 52a, 52b. The plurality of charge transfer gates 55a, 55b are provided in one-to-one correspondence with the plurality of charge accumulation units 52a, 52b. In the pixel 22, there are two each of the charge accumulation units 52a, 52b and the charge transfer gates 55a, 55b. The charge transfer gate 55a transfers the signal charges to the charge accumulation unit 52a, and the charge transfer gate 55b transfers the signal charges to the charge accumulation unit 52b. The plurality of charge transfer gates 55a, 55b are, for example, gate electrodes formed on the p-type semiconductor layer 50p via a gate insulating film.

[0035] The multiple reset gates 56 discharge signal charges from the photoelectric conversion unit 51 to the outside of the pixel 22 via the multiple charge drain units 57. The multiple reset gates 56 are, for example, gate electrodes formed on the p-type semiconductor layer 50p via a gate insulating film. The multiple reset gates 56 can also be considered electrodes that control the discharge of signal charges by the charge drain units 57. The multiple reset gates 56 are, for example, electrically connected to each other, and the same voltage is applied to them to drive them in conjunction with each other at the same timing. The multiple charge drain units 57 discharge signal charges converted by the photoelectric conversion unit 51 to the outside of the pixel 22. The multiple charge drain units 57 are, for example, n-type impurity regions formed in the p-type semiconductor layer 50p. In the example shown in FIG. 3 , the number of reset gates 56 and the number of charge drain units 57 included in the pixel 22 are two, but are not particularly limited thereto and may be one, three, or more.

[0036] 2 again, the drive control unit 23 controls the driving of the light source 10, the plurality of pixels 22, and the AD conversion circuit 25. The drive control unit 23 outputs a light emission control signal to the light source 10 for driving the light source 10. The drive control unit 23 also outputs an exposure control signal to the pixel drive circuit 24 for driving the plurality of pixels 22.

[0037] Drive control unit 23 has a plurality of control modes for causing a plurality of pixels 22 to output signals for generating a distance image, and for controlling the driving of light source 10 and a plurality of pixels 22. Drive control unit 23 has, for example, as the plurality of control modes, a pulse ToF control mode for calculating the distance to an object OBJ using the pulse ToF method and a CWToF control mode for calculating the distance to an object OBJ using the CWToF method.

[0038] 2, the drive control unit 23 includes a pulse ToF signal generation circuit 23a and a CW ToF signal generation circuit 23b. The pulse ToF signal generation circuit 23a generates light emission control signals and exposure control signals for driving the light source 10 and the pixels 22 in the pulse ToF control mode. The CW ToF signal generation circuit 23b generates light emission control signals and exposure control signals for driving the light source 10 and the pixels 22 in the CW ToF control mode.

[0039] The drive control unit 23 divides the pixels 22 into one or more groups in which the charge transfer gates 55 a, 55 b are driven at the same timing for each frame, and controls the driving of the pixels 22. Details of the control by the drive control unit 23 will be described later.

[0040] Each of the pixel drive circuits 24 is a driver circuit that outputs a voltage (signal) to drive various gates of the pixels 22. Each of the pixel drive circuits 24 applies a voltage to various gates of the pixels 22 based on an exposure control signal input from the drive control unit 23. In the example shown in FIG. 2 , the image sensor 20 includes two pixel drive circuits 24. The two pixel drive circuits 24 are driven in parallel by the drive control unit 23. As a result, each pixel 22 constituting the pixel array 21 is driven from above and below (both sides in the column direction) by the two pixel drive circuits 24. This prevents the distance between the pixel drive circuit 24 and the pixel 22 from becoming long, and reduces delays in applying voltages from the pixel drive circuit 24 to the pixel 22. Note that the image sensor 20 may include only one pixel drive circuit 24.

[0041] The AD conversion circuit 25 converts analog signals output from the plurality of pixels 22 into digital signals (AD conversion). The AD conversion circuit 25 may perform processing such as correlated double sampling on the analog signals before AD conversion. The digital signals converted by the AD conversion circuit 25 are output to the signal processing unit 26.

[0042] The signal processing unit 26 performs signal processing on signals output from the plurality of pixels 22. For example, the signal processing unit 26 calculates the distance to the object OBJ for each pixel 22 based on signals output from the plurality of pixels 22 based on reflected light. The signal processing unit 26 generates a distance image indicating the calculated distance, and outputs the image to the system controller 30 and / or to the outside of the distance image pickup device 100.

[0043] The voltage generation circuit 27 is an example of a voltage supply unit and applies a voltage to each of the photoelectric conversion units 51 of the multiple pixels 22. Specifically, the voltage generation circuit 27 applies a voltage to the p-type semiconductor layer 50p, thereby applying a voltage to the anode of the photoelectric conversion unit 51. The voltage generation circuit 27 is a power supply circuit that can change the voltage applied to the photoelectric conversion unit 51. As a result, the voltage generation circuit 27 can apply different voltages to the photoelectric conversion unit 51 in multiple control modes in the drive control unit 23 based on the control of the voltage control unit 28. The voltage generation circuit 27 is, for example, an LDO (Low Drop Out) regulator circuit. The following describes an example in which the voltage generation circuit 27 is an LDO regulator circuit. Note that the voltage generation circuit 27 is not particularly limited as long as it is a circuit that can change the voltage applied to the photoelectric conversion unit 51. Furthermore, instead of the voltage generating circuit 27, a circuit capable of switching the voltage applied to the photoelectric conversion unit 51 using a switch may be provided in the image sensor 20 as the voltage supply unit.

[0044] The voltage control unit 28 controls the voltage output by the voltage generation circuit 27. Specifically, the voltage control unit 28 outputs a voltage control signal to the voltage generation circuit 27 to control the voltage that the voltage generation circuit 27 applies to the photoelectric conversion unit 51.

[0045] The drive control unit 23, the signal processing unit 26, and the voltage control unit 28 are processing circuits realized by, for example, a memory that stores a program and a processor that executes the program. Although shown as separate components in the block diagram, all or part of the drive control unit 23, the signal processing unit 26, and the voltage control unit 28 may be configured with the same memory and processor. Furthermore, at least one of the drive control unit 23, the signal processing unit 26, and the voltage control unit 28 may be a dedicated logic circuit that performs a predetermined process.

[0046] The system controller 30 controls the entire range image capturing device 100. The system controller 30 determines the control mode to be performed by the drive control unit 23 based on, for example, instructions from a user via a user interface (not shown), sensing results from a sensor (not shown), or imaging results from the image sensor 20 output from the signal processing unit 26. The system controller 30 outputs a signal indicating the determined control mode to the drive control unit 23. The system controller 30 may cause the drive control unit 23 to perform control in a sequence consisting of multiple consecutive frames for generating range images using multiple control modes.

[0047] The system controller 30 is a processing circuit realized by, for example, a memory that stores programs and a processor that executes the programs. The system controller 30 may be provided in the image sensor 20. In this case, the system controller 30 may be configured with the same memory and processor as all or part of the drive control unit 23, signal processing unit 26, and voltage control unit 28. Furthermore, at least one of the drive control unit 23, signal processing unit 26, and voltage control unit 28 may not be provided in the image sensor 20, but may be configured with the same memory and processor as the system controller 30.

[0048] The capacitance element 40 is a bypass capacitor connected to the photoelectric conversion unit 51 and the voltage generation circuit 27. One end of the capacitance element 40 is directly connected to the anode of the photoelectric conversion unit 51 and the output terminal of the voltage generation circuit 27 without passing through a switch or the like. In other words, one end of the capacitance element 40 is always electrically connected to the anode of the photoelectric conversion unit 51 and the output terminal of the voltage generation circuit 27. The other end of the capacitance element 40 is connected to ground.

[0049] [Circuit Configuration of Pixel] Next, a description will be given of the circuit configuration of the pixel 22. Fig. 4 is a circuit diagram showing an example of the circuit configuration of the pixel 22 according to the present embodiment. Fig. 4 shows the circuit configuration of one pixel 22, as well as a voltage generating circuit 27 and a capacitive element 40.

[0050] As shown in FIG. 4, the pixel 22 has a photoelectric conversion unit 51, a plurality of transfer transistors 65 a, 65 b, a charge discharging transistor 66, a transfer channel 54 in which a plurality of charge storage units 52 a, 52 b and a plurality of charge transfer units 53 a, 53 b, 53 c are formed, a memory read transistor 61, a source follower transistor 62, a selection transistor 63, a reset transistor 64, and a charge storage unit FD.

[0051] Each of the multiple transfer transistors 65 a, 65 b, the charge drain transistor 66, the memory read transistor 61, the source follower transistor 62, the selection transistor 63, and the reset transistor 64 is, for example, an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The multiple transfer transistors 65 a, 65 b each include, as their gates, the multiple charge transfer gates 55 a, 55 b shown and described in FIG. 3 . The charge drain transistor 66 includes, as its gate, the reset gate 56 shown and described in FIG. 3 . Because the multiple reset gates 56 are driven in conjunction with each other at the same timing, each is shown in FIG. 4 as the gate of a single charge drain transistor 66.

[0052] The anode of the photoelectric conversion unit 51 is connected to the output terminal of the voltage generation circuit 27 and one end of the capacitive element 40. A voltage based on a voltage control signal CTRL output from the voltage control unit 28 is applied to the anode of the photoelectric conversion unit 51 from the voltage generation circuit 27. The cathode of the photoelectric conversion unit 51 is connected to one of the source and drain of each of the multiple transfer transistors 65 a, 65 b and the charge discharging transistor 66.

[0053] The other of the source and drain of the transfer transistor 65a is connected to the charge storage unit 52a. A voltage based on a transfer control signal TG1 is applied to the gate of the transfer transistor 65a. The other of the source and drain of the transfer transistor 65b is connected to the charge storage unit 52b. A voltage based on a transfer control signal TG2 is applied to the gate of the transfer transistor 65b.

[0054] The power supply voltage VDD is applied to the other of the source and drain of the charge discharging transistor 66. A voltage based on the charge discharging control signal PRS is applied to the gate of the charge discharging transistor 66.

[0055] The transfer channel 54 transfers the signal charges accumulated in the charge accumulation units 52 a and 52 b to the charge transfer unit 53 c in the same manner as a CCD. The charge transfer unit 53 c is connected to one of the source and drain of the memory read transistor 61.

[0056] The memory read transistor 61 controls the transfer of signal charges from the charge transfer unit 53c to the charge storage unit FD. The other of the source and drain of the memory read transistor 61 is connected to the charge storage unit FD. The charge storage unit FD is, for example, a charge storage region including a floating diffusion layer formed in the p-type semiconductor layer 50p. A voltage based on a memory read signal OG is applied to the gate of the memory read transistor 61. The signal charges stored in each of the multiple charge storage units 52a, 52b are sequentially transferred to the charge storage unit FD by the transfer channel 54 and the memory read transistor 61.

[0057] The gate of the source follower transistor 62 is connected to the charge storage unit FD. A power supply voltage VDD is applied to one of the source and drain of the source follower transistor 62. The other of the source and drain of the source follower transistor 62 is connected to one of the source and drain of the selection transistor 63, and the source follower transistor 62 outputs a signal corresponding to the potential of the charge storage unit FD via the selection transistor 63. In other words, the source follower transistor 62 outputs a signal corresponding to the amount of signal charge stored in each of the multiple charge storage units 52 a, 52 b by exposure.

[0058] The other of the source and drain of the selection transistor 63 is connected to the AD conversion circuit 25 (not shown in FIG. 4) via a signal line. A voltage based on a selection control signal SEL is applied to the gate of the selection transistor 63. When the selection transistor 63 is turned on, the source follower transistor 62 reads out the signal charge.

[0059] The reset transistor 64 resets the potential of the charge storage unit FD. One of the source and drain of the reset transistor 64 is connected to the charge storage unit FD. The power supply voltage VDD is applied to the other of the source and drain of the reset transistor 64. A voltage based on a reset control signal RG is applied to the gate of the reset transistor 64. When the reset transistor 64 is turned on, the potential of the charge storage unit FD is reset to the power supply voltage VDD.

[0060] The transfer control signal TG1, the transfer control signal TG2, the charge discharge control signal PRS, the memory read signal OG, the selection control signal SEL and the reset control signal RG are generated, for example, by the drive control unit 23, and voltages based on these signals are supplied to each pixel 22 by the pixel drive circuit 24.

[0061] Note that the circuit configuration of the pixel 22 described above is merely an example and can be modified as appropriate. When the plurality of charge storage units 52 a, 52 b are impurity regions formed as floating diffusion layers in the p-type semiconductor layer 50 p, a memory read transistor 61 may be provided corresponding to each of the plurality of charge storage units 52 a, 52 b, and signal charges may be transferred from the plurality of charge storage units 52 a, 52 b to the charge storage unit FD. When the plurality of charge storage units 52 a, 52 b are impurity regions formed as floating diffusion layers in the p-type semiconductor layer 50 p, a source follower transistor 62 and a selection transistor 63 may be provided corresponding to each of the plurality of charge storage units 52 a, 52 b, and a signal corresponding to the amount of signal charge stored in each of the plurality of charge storage units 52 a, 52 b may be output from the corresponding source follower transistor 62.

[0062] [Operation] Next, the operation of the range imaging device 100 according to this embodiment will be described.

[0063] As described above, the drive control unit 23 has a plurality of control modes for generating a distance image. Furthermore, the drive control unit 23 divides the plurality of pixels 22 into one or more groups that are exposed at the same timing for each frame, and controls the driving of the plurality of pixels 22. For example, the number of the one or more groups differs among the plurality of control modes.

[0064] The drive control unit 23 has, for example, a plurality of control modes, such as a pulse ToF control mode for calculating the distance to the object OBJ using the pulse ToF method and a CW ToF control mode for calculating the distance to the object OBJ using the CW ToF method.

[0065] The pulse ToF method is an indirect ToF method in which the light source 10 emits pulsed light having a predetermined pulse width as irradiation light, and calculates the distance to the object OBJ based on the time difference (delay time) between the time when the light source 10 emits the irradiation light and the time when the reflected light of the irradiation light by the object OBJ is received by the plurality of pixels 22. The CW ToF method is an indirect ToF method in which the light source 10 emits continuous waves whose intensity is modulated at a predetermined frequency as irradiation light, and calculates the distance to the object OBJ based on the phase difference between the irradiation light emitted by the light source 10 and the reflected light of the irradiation light by the object OBJ that is received by the plurality of pixels 22.

[0066] Examples of control modes that the drive control unit 23 can have will be described below.

[0067] (1) Pulse ToF Control Mode First, the operation of the range imaging device 100 in the pulse ToF control mode will be described.

[0068] Fig. 5 is a timing chart showing an example of driving the range imaging device 100 in the pulse ToF control mode. Fig. 5 shows the timing of light emission and exposure of the range imaging device 100 in the pulse ToF control mode. The pulse ToF control mode shown in Fig. 5 is an example of a first control mode in which the number of groups, one or more, is a first number. Furthermore, the frame in which control is performed in the pulse ToF control mode shown in Fig. 5 is an example of a first frame.

[0069] "Reflected light" in FIG. 5 indicates the change over time in the intensity of the reflected light from the object OBJ of the irradiated light.

[0070] The "light-emission control signal" in Fig. 5 indicates the change over time in the voltage level of the light-emission control signal output by the drive control unit 23. While the light-emission control signal is at a high level, the light source 10 irradiates the space with irradiation light. As shown in Fig. 5, the light-emission control signal includes a light-emission control pulse, which is a pulsed voltage, and the light source 10 irradiates pulsed light as irradiation light in accordance with the light-emission control pulse.

[0071] The "exposure period" in Fig. 5 indicates an exposure period during which the drive control unit 23 exposes the pixels 22 to light in response to an exposure control signal to accumulate signal charge. In the range image pickup device 100, one frame includes multiple exposure periods, and the signal charge generated by the photoelectric conversion unit 51 during each exposure period is accumulated in one of the multiple charge accumulation units 52a, 52b. The exposure period of the pixels 22 is determined by the exposure control signal. In the example shown in Fig. 5, the exposure control signal includes a transfer control signal TG1, a transfer control signal TG2, and a charge discharge control signal PRS.

[0072] 5 indicates the change over time in the voltage level of the charge discharge control signal PRS output by the drive control unit 23. It can also be said that "PRS" indicates the change over time in the voltage level applied to the reset gate 56. While the charge discharge control signal PRS is at a high level, the charge discharge transistor 66 is turned on, and the reset gate 56 discharges signal charge from the photoelectric conversion unit 51. In other words, while the charge discharge control signal PRS is at a high level, no signal charge accumulates in the photoelectric conversion unit 51.

[0073] 5, "TG1" indicates the change over time in the voltage level of the transfer control signal TG1 output by the drive control unit 23. It can also be said that "TG1" indicates the change over time in the voltage level applied to the charge transfer gate 55a. While the transfer control signal TG1 is at a high level, the transfer transistor 65a is turned on, and the signal charge generated in the photoelectric conversion unit 51 is transferred to the charge accumulation unit 52a by the charge transfer gate 55a.

[0074] 5, "TG2" indicates the change over time in the voltage level of the transfer control signal TG2 output by the drive control unit 23. It can also be said that "TG2" indicates the change over time in the voltage level applied to the charge transfer gate 55b. While the transfer control signal TG2 is at a high level, the transfer transistor 65b is turned on, and the signal charge generated in the photoelectric conversion unit 51 is transferred to the charge accumulation unit 52b by the charge transfer gate 55b.

[0075] 5, in the pulse ToF control mode, the drive control unit 23 outputs an emission control signal including an emission control pulse with a pulse width P1 to cause the light source 10 to emit pulsed light. Furthermore, because a sufficient signal charge cannot be obtained by emitting pulsed light once, the drive control unit 23 repeatedly outputs an emission control pulse with a period T1. In the pulse ToF control mode, the duty ratio (P1 / T1) of the emission control pulse is, for example, less than 50%, and may be less than 25%. The lower limit of the duty ratio (P1 / T1) of the emission control pulse is not particularly limited and may be set appropriately depending on the purpose.

[0076] 5, the drive control unit 23 exposes the pixel 22 in two exposure periods, exposure period A0 and exposure period A1. The lengths of exposure period A0 and exposure period A1 are the same as pulse width P1. Exposure period A0 starts simultaneously with the start of the light-emission control pulse. Exposure period A1 starts with a delay of pulse width P1 from the start of exposure period A0 and the start of the light-emission control pulse. Therefore, exposure period A1 starts simultaneously with the end of exposure period A0.

[0077] Before the start of the exposure period A0, the charge discharge control signal PRS is at a high level, so even if signal charge is generated in the photoelectric conversion unit 51, the signal charge is discharged by the reset gate 56 and is not accumulated in the photoelectric conversion unit 51. At the start of the exposure period A0, the charge discharge control signal PRS goes to a low level, and the transfer control signal TG1 and the transfer control signal TG2 are also at a low level, so the signal charge generated in the photoelectric conversion unit 51 is temporarily accumulated in the photoelectric conversion unit 51. Thereafter, the transfer control signal TG1 goes to a high level during the exposure period A0, so the signal charge accumulated in the photoelectric conversion unit 51 is transferred to the charge accumulation unit 52a by the charge transfer gate 55a. Because the transfer control signal TG1 remains at a high level until the end of the exposure period A0, the signal charge generated in the photoelectric conversion unit 51 during the exposure period A0 is accumulated in the charge accumulation unit 52a. The transfer control signal TG1 may go high at any time after the start of the exposure period A0, as long as the signal charge can be transferred to the charge storage section 52a by the end of the exposure period A0.

[0078] Next, at the start of exposure period A1, the transfer control signal TG1 goes low, and the charge discharge control signal PRS and transfer control signal TG2 are also low, so the signal charge generated by photoelectric conversion unit 51 is temporarily accumulated in photoelectric conversion unit 51. Then, during exposure period A1, the transfer control signal TG2 goes high, so the signal charge accumulated in photoelectric conversion unit 51 is transferred to charge accumulation unit 52b by charge transfer gate 55b. Because the transfer control signal TG2 remains high until the end of exposure period A1, the signal charge generated by photoelectric conversion unit 51 during exposure period A1 is accumulated in charge accumulation unit 52b. Note that the transfer control signal TG2 may go high at any time after the start of exposure period A1, as long as the signal charge can be transferred to charge accumulation unit 52b by the end of exposure period A1.

[0079] At the end of the exposure period A1, the transfer control signal TG2 goes low, and then the charge discharge control signal PRS goes high. Therefore, even if signal charge is generated in the photoelectric conversion unit 51, the signal charge is discharged by the reset gate 56 and is no longer accumulated in the photoelectric conversion unit 51. This state is maintained until the next exposure period A0, and these operations are repeated in a cycle T1. After the operation in the cycle T1 is repeated a predetermined number of times, a signal corresponding to the amount of signal charge accumulated in each of the plurality of charge accumulation units 52a, 52b is read out.

[0080] 5, the light reflected by the object OBJ is received by the pixel 22 after the irradiated light (pulsed light) by a time Δt, depending on the distance to the object OBJ. Therefore, the signal charge generated by the reflected light is distributed and accumulated in the multiple charge accumulation units 52a, 52b depending on the distance to the object OBJ during the exposure period A0 and the exposure period A1. Here, if the signal value corresponding to the exposure period A0 is A0 and the signal value corresponding to the exposure period A1 is A1, the time Δt is calculated by the following equation (1). The time Δt is also referred to as the delay time.

[0081]

[0082] Furthermore, if the distance to the object OBJ is D and the speed of light is c, the irradiated light travels a distance twice the distance D in time Δt, so the distance D is calculated using the following equation (2).

[0083]

[0084] In the pulse ToF control mode, the signal processing unit 26 calculates the distance D to the object OBJ based on, for example, the above formula (2). Furthermore, in the pulse ToF control mode, since the distance D is calculated based on the above formula (2), it is necessary to unify the timing of the exposure period A0 and the exposure period A1 based on the light emission control pulse for all pixels 22.

[0085] In addition, in the pulse ToF control mode, the signal processing unit 26 can determine whether the distance D to the object OBJ is accurately measured, for example, when the distance D to the object OBJ is outside the distance measurement range. For example, if the sum (A0 + A1) of the signals detected during the exposure periods A0 and A1 is equal to or less than a predetermined value, the signal processing unit 26 may determine that the distance is not accurately measured, such as "outside the distance measurement range," and output the determination result. The signal processing unit 26 may also determine that the distance is not accurately measured and output the determination result when a signal based on reflected light is detected only during the exposure period A0 or A1, or when no signal based on reflected light is detected during the exposure periods A0 and A1. In this way, the pulse ToF control mode can suppress the occurrence of aliasing noise that occurs in the CW ToF control mode, as described below. Meanwhile, in the pulse ToF control mode, although the distance measurement accuracy can be improved by shortening the pulse width P1, the timing of the light emission control pulse must be precisely adjusted, making it difficult to shorten the pulse width P1.

[0086] Here, the driving of each pixel 22 in the pulse ToF control mode will be described. In the pulse ToF control mode shown in Fig. 5, the drive control unit 23 divides the pixels 22 into a single group in which the charge transfer gates 55a, 55b are driven at the same timing, and controls the driving of the pixels 22. In other words, the drive control unit 23 drives the charge transfer gates 55a, 55b at the same timing for all pixels 22. This is because, as described above, it is necessary to unify the timing of the exposure period A0 and the exposure period A1 for all pixels 22.

[0087] Fig. 6 is a timing chart illustrating the transfer control signal TG1 for the pixels 22 in each column in the pulse ToF control mode shown in Fig. 5. For simplicity, Fig. 6 shows an example of the transfer control signal TG1 for controlling the charge transfer gate 55a of the pixels 22 in each column when a plurality of pixels 22 are arranged in four columns, from the first column to the fourth column. Note that the content indicated by the "light-emitting control signal" in Fig. 6 is the same as that in Fig. 5. Also, in Fig. 6, "TG1" in the first to fourth columns indicates the change over time in the voltage level of the transfer control signal TG1 for the pixels 22 in the first to fourth columns.

[0088] 6, a voltage based on the transfer control signal TG1 that goes high at the same time is applied to the charge transfer gates 55a of the pixels 22 in all columns. Although not shown, a voltage based on the transfer control signal TG2 that goes high at the timing shown in FIG. 5 is also applied to the charge transfer gates 55b of the pixels 22 in all columns. Therefore, as will be described in detail later, the potential of the p-type semiconductor layer 50p may fluctuate due to wiring resistance and the like that accompanies an increase in current for driving the multiple charge transfer gates 55a and 55b, which may result in unintended transfer of signal charges.

[0089] 5, the exposure period A0 starts simultaneously with the start of the light emission control pulse, but it may start a predetermined time later than the start of the light emission control pulse, thereby shifting the upper and lower limits of the distance measurement range in the longer direction.

[0090] Furthermore, in order to widen the ranging range, the pixel 22 may be exposed in an exposure period other than the exposure period A0 and the exposure period A1. FIG. 7 is a timing chart showing an example of driving the range image pickup device 100 in another pulse ToF control mode. In FIG. 7, the contents indicated by "reflected light," "light emission control signal," "PRS," "TG1," and "TG2" are the same as those in FIG. 5. The other pulse ToF control mode shown in FIG. 7 is an example of a first control mode in which the number of the one or more groups is a first number. Furthermore, the frame in which control is performed in the other pulse ToF control mode shown in FIG. 7 is an example of a first frame.

[0091] The other pulse ToF control mode shown in Fig. 7 differs from the pulse ToF control mode shown in Fig. 5 mainly in that the drive control unit 23 exposes the pixels 22 in four exposure periods, namely, exposure period A2 and exposure period A3 in addition to exposure period A0 and exposure period A1. In the following description of the other pulse ToF control mode, the differences from the pulse ToF control mode shown in Fig. 5 will be mainly described, and descriptions of commonalities will be omitted or simplified.

[0092] 7, the lengths of the exposure periods A0, A1, A2, and A3 are the same as the pulse width P1. The start timings of the exposure periods A0 and A1 are as described above. The exposure period A2 starts with a delay of twice the pulse width P1 from the start of the exposure period A0 and the start of the light-emission control pulse. The exposure period A3 starts with a delay of three times the pulse width P1 from the start of the exposure period A0 and the start of the light-emission control pulse.

[0093] In the example shown in FIG. 7 , the drive control unit 23 drives the light source 10 and the plurality of pixels 22 in the first and second sub-frames, and signals corresponding to the amounts of signal charge accumulated in each of the plurality of charge accumulation units 52 a and 52 b are read out in each sub-frame. In the example shown in FIG. 7 , either the first sub-frame or the second sub-frame can be performed first. The first sub-frame includes only the exposure periods A0 and A2 out of the four exposure periods, and the second sub-frame includes only the exposure periods A1 and A3 out of the four exposure periods. Therefore, signals corresponding to the exposure periods A0 and A2 are read out from the pixels 22 in the first sub-frame, and signals corresponding to the exposure periods A1 and A3 are read out from the pixels 22 in the second sub-frame.

[0094] In the first subframe, the signal charge generated during the exposure period A0 is accumulated in the charge accumulation unit 52a, and the signal charge generated during the exposure period A2 is accumulated in the charge accumulation unit 52b. After the exposure period A0 ends, the charge discharge control signal PRS goes high, and the signal charge generated in the photoelectric conversion unit 51 during the period between the exposure periods A0 and A2 is discharged.

[0095] In the second sub-frame, the signal charge generated in the exposure period A1 is accumulated in the charge accumulation unit 52a, and the signal charge generated in the exposure period A3 is accumulated in the charge accumulation unit 52b. After the exposure period A1 ends, the charge discharge control signal PRS goes high, and the signal charge generated in the photoelectric conversion unit 51 during the period between the exposure periods A1 and A3 is discharged.

[0096] In another pulse ToF control mode shown in FIG. 7 , the pixel 22 receives reflected light only during two of the four exposure periods. Specifically, because there is a gap of pulse width P1 between exposure period A0 and exposure period A2, the pixel 22 receives reflected light only during one of exposure periods A0 and A2. Furthermore, because there is a gap of pulse width P1 between exposure period A1 and exposure period A3, the pixel 22 receives reflected light only during one of exposure periods A1 and A3. In the example shown in FIG. 7 , the first subframe includes exposure period A0 and exposure period A2, and the second subframe includes exposure period A1 and exposure period A3. However, which two of the four exposure periods are assigned to each subframe can be arbitrarily set. Furthermore, if the pixel 22 has four charge storage sections and four charge transfer gates, one frame can also include exposure period A0, exposure period A1, exposure period A2, and exposure period A3.

[0097] In addition to reflected light, the pixel 22 may also receive background light, such as sunlight or indoor lighting, and thus signal charges based on the background light may be generated in the photoelectric conversion unit 51. A constant amount of signal charges based on background light is usually generated regardless of reflected light. An increase in the amount of signal charges based on background light can cause an error in the distance D to the object OBJ. In the example shown in FIG. 7 , the influence of background light can be eliminated by subtracting the signal corresponding to the exposure period in which the pixel 22 does not receive reflected light from the signal corresponding to the exposure period in which the pixel 22 receives reflected light. For example, if the pixel 22 receives reflected light during exposure periods A0 and A1 as shown in FIG. 7 , the influence of background light can be eliminated by subtracting the signal corresponding to exposure period A2 from the signal corresponding to exposure period A0 and by subtracting the signal corresponding to exposure period A3 from the signal corresponding to exposure period A1.

[0098] For the above reasons, in the example shown in FIG. 7 , the signal processing unit 26 calculates the distance D to the object OBJ by replacing A0 with the larger of "A0-A2" and "A2-A0" (or the absolute value of the difference between A0 and A2) and replacing A1 with the larger of "A1-A3" and "A3-A1" (or the absolute value of the difference between A1 and A3) in the above equation (2). Here, A2 is the signal value corresponding to the exposure period A2, and A3 is the signal value corresponding to the exposure period A3. Note that, in the example shown in FIG. 7 , since the distance D is calculated as described above, it is necessary to unify the timing of the exposure periods A0, A1, A2, and A3 relative to the light-emission control pulse for all pixels 22.

[0099] 7, the signal processing unit 26 can also determine when the distance D to the object OBJ is outside the distance measurement range. For example, when |A0-A2|+|A1-A3| is equal to or less than a predetermined value, the signal processing unit 26 may determine that the distance has not been accurately measured, such as "outside the distance measurement range," and output the determination result. The signal processing unit 26 may also determine that the distance has not been accurately measured and output the determination result when a signal based on reflected light is detected only during the exposure period A0 or the exposure period A3, or when no signal based on reflected light is detected during the exposure periods A0 to A3.

[0100] 7 , the drive control unit 23 divides the pixels 22 into groups each having a plurality of charge transfer gates 55 a, 55 b driven at the same timing, and controls the driving of the pixels 22. In other words, the drive control unit 23 drives the plurality of charge transfer gates 55 a, 55 b for all the pixels 22 at the same timing.

[0101] 7 , the drive control unit 23 may not cause the pixel 22 to perform exposure in the exposure period A3. Even in this case, the pixel 22 does not receive reflected light in one of the exposure periods A0, A1, and A2, and therefore the influence of background light can be removed using the signal corresponding to that one exposure period.

[0102] (2) CWToF Control Mode Next, the operation of the range imaging device 100 in the CWToF control mode will be described.

[0103] FIG. 8 is a timing chart showing an example of driving the range imaging device 100 in the CWToF control mode. FIG. 8 illustrates the timing of light emission and exposure of the range imaging device 100 in the CWToF control mode. As will be described in detail later, in the CWToF control mode, the pixels 22 are divided into groups in which the charge transfer gates 55 a, 55 b are driven at the same timing. Therefore, FIG. 8 illustrates an exposure control signal corresponding to a pixel 22 among the pixels 22 (specifically, the pixel 22 belonging to the first column, described later). The CWToF control mode shown in FIG. 8 is an example of a second control mode in which the number of the one or more groups is a second number greater than the first number. Furthermore, the frames in which control is performed in the CWToF control mode (each of the first and second subframes, described later) are examples of second frames.

[0104] In FIG. 8, the contents indicated by "reflected light", "light emission control signal", "PRS", "TG1" and "TG2" are the same as those in FIG.

[0105] 8 , in the CWToF control mode, the drive control unit 23 drives the light source 10 and the plurality of pixels 22 in the first subframe and the second subframe, and signals corresponding to the amounts of signal charges accumulated in the plurality of charge accumulation units 52 a, 52 b are read out in each subframe. In the CWToF control mode, either the first subframe or the second subframe may be performed first.

[0106] As shown in FIG. 8, in the CWToF control mode, the drive control unit 23 repeatedly outputs a light emission control pulse having a pulse width P2 at a period T2 to cause the light source 10 to emit pulsed light.

[0107] The pulse width P2 is different from the pulse width P1 in the pulse ToF control mode. The difference between the pulse width P1 and the pulse width P2 makes it possible to set the pulse width of the pulsed light according to the control mode. The pulse width P2 is, for example, shorter than the pulse width P1.

[0108] Furthermore, the period T2 is different from the period T1 in the pulse ToF control mode. This allows the period of the pulsed light to be set according to the control mode. The period T2 is, for example, shorter than the period T1.

[0109] In the CWToF control mode, the duty ratio (P2 / T2) of the light emission control pulse is normally 50%, as shown in Fig. 8, but distance measurement using the CWToF method is possible if it is between 25% and 75%. In the first and second subframes in the CWToF control mode, the drive controller 23 outputs light emission control pulses with the same pulse width P2 and period T2.

[0110] In the CWToF control mode, the transfer control signals TG1 and TG2 are continuous pulses with a period T2 in each subframe. The pulse width of the continuous pulses is half the period T2. In each subframe, the phases of the continuous pulses of the transfer control signals TG1 and TG2 are shifted by 180°, that is, the phases are inverted. Therefore, only one of the transfer control signals TG1 and TG2 goes high, and the multiple charge transfer gates 55a and 55b are driven to transfer signal charges mutually exclusively.

[0111] Furthermore, in the CWToF control mode, in any subframe, the charge discharge control signal PRS is at a low level during exposure of the pixel 22, and the signal charge generated in the photoelectric conversion unit 51 is not discharged to the outside of the pixel 22. In other words, the drive control unit 23 does not cause the reset gate 56 to discharge the signal charge from the photoelectric conversion unit 51 during the period in which the plurality of charge transfer gates 55 a, 55 b are distributing and transferring the signal charge to the plurality of charge accumulation units 52 a, 52 b.

[0112] 8 , in the first subframe, the phase difference between the light-emission control signal and the transfer control signal TG1 is 0°, and the phase difference between the light-emission control signal and the transfer control signal TG2 is 180°. In the second subframe, the phase difference between the light-emission control signal and the transfer control signal TG1 is 90°, and the phase difference between the light-emission control signal and the transfer control signal TG2 is 270°. In the first subframe and the second subframe, the phase of the transfer control signal TG1 differs by 90°, and the phase of the transfer control signal TG2 also differs by 90°.

[0113] In this way, in the CWToF control mode, signal charges generated during exposure periods whose phases with respect to the light-emission control signal differ by 90° are accumulated in the charge accumulation units 52 a and 52 b in each of two subframes, and signals corresponding to the amounts of signal charges accumulated in the charge accumulation units 52 a and 52 b are read out. Note that if the pixel 22 has four charge accumulation units and four charge transfer gates, it is also possible to accumulate signal charges generated during exposure periods whose phases with respect to the light-emission control signal differ by 90° in one frame in the four charge accumulation units. In this case, too, the four charge transfer gates are driven to transfer signal charges mutually exclusively.

[0114] As shown in FIG. 8 , light reflected by an object OBJ is received by the pixel 22 with a delay of a phase Φ from the irradiated light (pulsed light) depending on the distance to the object OBJ. Here, assuming that the signal values ​​of the exposure periods with a phase difference of 90° are C1, C2, C3, and C4, respectively, the delayed phase Φ is calculated using the following equation (3). Here, C1, C2, C3, and C4 are signal values ​​corresponding to the exposure periods whose phases are delayed in this order relative to the start of the light-emission control pulse. In the example shown in FIG. 8 , C1 is a signal value corresponding to the amount of signal charge transferred to the charge accumulation unit 52a by the transfer control signal TG1 of the first subframe. C2 is a signal value corresponding to the amount of signal charge transferred to the charge accumulation unit 52a by the transfer control signal TG1 of the second subframe. C3 is a signal value corresponding to the amount of signal charge transferred to the charge accumulation unit 52b by the transfer control signal TG2 of the first subframe. Furthermore, C4 is a signal value corresponding to the amount of signal charge transferred to the charge storage section 52b by the transfer control signal TG2 of the second subframe.

[0115]

[0116] Furthermore, if the speed of light is c and the frequency of the successive light emission control pulses is f (= 1 / T2), the distance D to the object OBJ is calculated by the following formula (4): In reality, the arctan (atan) function can only return values ​​within the range of ±π / 2, so a function called atan2 is used to enable the range of ±π to be handled, but for simplicity's sake, it will be expressed as arctan (atan) here.

[0117]

[0118] In the CWToF control mode, the signal processing unit 26 calculates the distance D to the object OBJ, for example, based on the above formula (4). Furthermore, in the CWToF control mode, since the distance D is calculated based on the above formula (4), each pixel 22 can calculate the distance D if it outputs a signal corresponding to an exposure period with a phase difference of 90°. In other words, each pixel 22 can calculate the distance D even if the phase difference between the light-emission control signal and the exposure period is not one of the combinations of 0°, 90°, 180°, and 270° shown in FIG. 8 . Therefore, the timing of the exposure periods does not need to be uniform among multiple pixels 22.

[0119] In the CWToF control mode, even if the reflected light is received by the pixel 22 with a delay of more than the period T2 after the irradiation of the irradiated light, the phase Φ is calculated to be the same as when the reflected light is received by the pixel 22 within the period T2 after the irradiation of the irradiated light. Therefore, no matter how long the delay after the irradiation of the irradiated light is when the reflected light is received by the pixel 22, it cannot be determined that the light is outside the range of distance measurement, and so-called aliasing noise occurs. On the other hand, in the CWToF control mode, it is easy to increase the frequency f, and increasing the frequency f can improve the accuracy of distance measurement.

[0120] Here, the driving of each pixel 22 in the CWToF control mode will be described. In the CWToF control mode shown in FIG. 8 , the drive control unit 23 divides the pixels 22 into multiple groups, each group driving the charge transfer gates 55 a and 55 b at the same timing, and controls the driving of the multiple pixels 22. That is, the drive control unit 23 drives the charge transfer gates 55 a and 55 b of the pixels 22 belonging to different groups at different timings. The number of groups can be set arbitrarily. This is because, as described above, if each pixel 22 outputs a signal corresponding to an exposure period with a phase difference of 90°, the distance D can be calculated even if the timing of the exposure periods of the multiple pixels 22 is not uniform. The number of groups may be four or more, for example, from the viewpoint of suppressing fluctuations in the potential of the p-type semiconductor layer 50 p described below. The number of groups may also be eight or less, for example, from the viewpoint of reducing the processing load for generating the exposure control signal.

[0121] 9 is a timing chart illustrating the transfer control signal TG1 for the pixels 22 in each column in the CWToF control mode shown in FIG. 8. For simplicity, FIG. 9 shows an example of the transfer control signal TG1 for controlling the charge transfer gate 55a of the pixels 22 in each column when a plurality of pixels 22 are arranged in four columns, from the first column to the fourth column. Note that in FIG. 9, the content indicated by "reflected light" is the same as in FIG. 5. Also, in FIG. 9, "TG1" in the first to fourth columns indicates the change over time in the voltage level of the transfer control signal TG1 for the pixels 22 in the first to fourth columns.

[0122] In the example shown in Fig. 9, pixels 22 belonging to the same column belong to the same group among the above-mentioned multiple groups. Therefore, in the example shown in Fig. 9, the multiple pixels 22 are divided into four groups. Note that the method of dividing the multiple pixels 22 into groups is not limited to the example of dividing by column, and is not particularly limited. For example, the multiple pixels 22 may be divided by row. Furthermore, two pixels 22 that are not adjacent to each other may belong to the same group.

[0123] As shown in Fig. 9, in the first and second subframes, voltages based on transfer control signals TG1 whose phases differ by 45° are applied to the charge transfer gates 55a of the pixels 22 in each of the first to fourth columns. Furthermore, voltages based on transfer control signals TG1 whose phases differ by 90° between the first and second subframes are applied to the charge transfer gates 55a of the pixels 22 in each column. Although not shown, a voltage based on a transfer control signal TG2 whose phase is inverted from that of the transfer control signal TG1 is applied to the charge transfer gates 55b of the pixels 22 in each column. Although not shown, the light-emission control signals and charge-discharge control signals PRS are as shown in Fig. 8.

[0124] In the CWToF control mode, signal charges generated during exposure periods with a phase difference of 90° based on the light-emission control signal for each column of pixels 22 are accumulated in the charge accumulation units 52 a, 52 b in each of two sub-frames. Therefore, as shown in Fig. 9, even if the phases of the exposure periods based on the light-emission control signal for each column of pixels 22 are different from each other, each pixel 22 can be exposed to reflected light without any leakage, and the phase Φ and distance D can be calculated.

[0125] Furthermore, since the timing of driving the charge transfer gates 55 a, 55 b differs for each column of pixels 22, the increase in current for driving the charge transfer gates 55 a, 55 b is dispersed, and fluctuations in the potential of the p-type semiconductor layer 50 p are suppressed compared to the pulse ToF control mode described above. This point will be explained while showing the results of measuring actual fluctuations in the potential of the p-type semiconductor layer 50 p.

[0126] FIG. 10 shows the time variation of the voltage supplied to the pixel 22 and the potential of the p-type semiconductor layer 50p in the pulse ToF control mode. FIG. 10 shows measurement results when the drive control unit 23 outputs the exposure control signals shown in FIGS. 5 and 6. FIG. 11 shows the time variation of the voltage supplied to the pixel 22 and the potential of the p-type semiconductor layer 50p in the CWToF control mode. FIG. 11 shows measurement results when the drive control unit 23 outputs the exposure control signals shown in FIGS. 8 and 9. The upper parts of FIGS. 10 and 11 show measurement results of the voltage supplied to the pixel 22 based on the transfer control signal TG1 (dashed line), the transfer control signal TG2 (solid line), and the charge discharge control signal PRS (dotted line). The lower parts of FIGS. 10 and 11 show measurement results of the potential of the p-type semiconductor layer 50p (hereinafter also referred to as the well potential) with dashed lines. In the CWToF control mode, the phases of the transfer control signals TG1 and TG2 are different for each column of pixels 22, but Figure 11 shows a representative voltage supplied to the pixels 22 belonging to the first column based on the transfer control signals TG1, TG2, and the charge discharge control signal PRS.

[0127] 10 , in the pulse ToF control mode, the voltages supplied to all pixels 22 change at the same time based on the transfer control signal TG1, the transfer control signal TG2, and the charge discharge control signal PRS. Therefore, the well potential fluctuates when these voltages change. As a result, even if the transfer control signal TG1 and the transfer control signal TG2 are at low level, unintended transfer of signal charges to the charge accumulation units 52 a, 52 b may occur when the well potential fluctuates and drops. This is because the low-level voltages of the charge transfer gates 55 a, 55 b become relatively high relative to the well potential when the well potential drops.

[0128] In contrast, in the CWToF control mode, as shown in FIG. 9, the phases of the continuous pulses of the transfer control signal TG1 and the transfer control signal TG2 are different for each column of pixels 22, so the well potential hardly fluctuates, as shown in FIG. 11. Therefore, the unintended transfer of signal charges to the multiple charge accumulation units 52 a, 52 b as described above is unlikely to occur. Furthermore, in the CWToF control mode, while the multiple charge transfer gates 55 a, 55 b are distributing and transferring signal charges to the multiple charge accumulation units 52 a, 52 b, the charge discharge control signal PRS is always at a low level, so no current flows to drive the reset gate 56, and fluctuations in the well potential are further suppressed.

[0129] As described above, by having the drive control unit 23 have a CWToF control mode that drives multiple pixels 22 as described above, it is possible to realize a distance image capturing device 100 that has a control mode that can suppress unintentional transfer of signal charge to multiple charge storage units 52a, 52b.

[0130] Furthermore, the drive control unit 23 has multiple control modes, including a pulse ToF control mode and a CW ToF control mode, which enables the generation of a distance image according to the imaging environment, conditions, etc. For example, when prioritizing suppression of aliasing noise over distance measurement accuracy, the drive control unit 23 drives the light source 10 and the multiple pixels 22 in the pulse ToF control mode. Furthermore, when generating a distance image in a situation where aliasing noise is unlikely to occur, the drive control unit 23 drives the light source 10 and the multiple pixels 22 in the CW ToF control mode, thereby improving distance measurement accuracy. Furthermore, the drive control unit 23 may drive the light source 10 and the multiple pixels 22 in a sequence of consecutive frames, including a frame in which control is performed in the pulse ToF control mode and a frame in which control is performed in the CW ToF control mode.

[0131] (3) Operation of the Voltage Generation Circuit Next, we will explain the operation of the voltage generation circuit 27. The range image pickup device 100 can change the voltage that the voltage generation circuit 27 applies to the p-type semiconductor layer 50p in accordance with the control mode set by the drive control unit 23.

[0132] Fig. 12 is a timing chart for explaining an example of the operation of the voltage generating circuit 27. In Fig. 12, the contents indicated by "PRS," "TG1," and "TG2" are the same as those in Fig. 5. Also, in Fig. 12, "LDO" indicates the change over time in the voltage applied by the voltage generating circuit 27 to the p-type semiconductor layer 50p (photoelectric conversion unit 51).

[0133] In the example shown in FIG. 12 , a CWToF frame controlled in the CWToF control mode and a pulsed ToF frame controlled in the pulsed ToF control mode are consecutively arranged. As shown in FIG. 12 , the CWToF frame and the pulsed ToF frame each include an emission exposure period and a readout period following the emission exposure period. The emission exposure period is a period during which the drive control unit 23 drives the light source 10 and the multiple pixels 22 using the emission control signal and the exposure control signal, as described above with reference to FIGS. 5 to 9 . The emission exposure period can also be considered a period during which the light source 10 repeatedly emits pulsed light and the multiple charge transfer gates 55 a, 55 b distribute and transfer signal charges to the multiple charge accumulation units 52 a, 52 b. The readout period is a period during which signals corresponding to the amounts of signal charges accumulated in each of the multiple charge accumulation units 52 a, 52 b during the emission exposure period are read out from the multiple pixels 22. The driving of the light source 10 and the plurality of pixels 22 during the light emission exposure period of the CWToF frame shown in Fig. 12 is the driving in the example described using Fig. 8 and Fig. 9. Also, the driving of the light source 10 and the plurality of pixels 22 during the light emission exposure period of the pulsed ToF frame shown in Fig. 12 is the driving in the example described using Fig. 5 and Fig. 6.

[0134] As shown in FIG. 12 , the voltage generation circuit 27 applies different voltages to the p-type semiconductor layer 50p during the light emission exposure period in the pulse ToF control mode and the CW ToF control mode. Specifically, the voltage generation circuit 27 applies a voltage to the p-type semiconductor layer 50p during the light emission exposure period in the pulse ToF control mode that is higher than the voltage applied to the p-type semiconductor layer 50p during the light emission exposure period in the CW ToF control mode. This increases the base well potential in the pulse ToF control mode. As a result, even when the well potential drops due to fluctuations in the well potential, the low-level voltages of the multiple charge transfer gates 55a, 55b can be prevented from becoming relatively high relative to the well potential. Therefore, even in the pulse ToF control mode, unintended transfer of signal charges to the multiple charge accumulation units 52a, 52b is suppressed. Furthermore, in the CWToF control mode, the charge transfer gates 55 a, 55 b are driven more frequently than in the pulse ToF control mode, so the transfer speed of the signal charges in the charge transfer gates 55 a, 55 b is important. Therefore, in the CWToF control mode, the well potential is lower than in the pulse ToF control mode, which increases the difference between the high-level voltage of the charge transfer gates 55 a, 55 b and the well potential, thereby increasing the transfer speed of the signal charges in the charge transfer gates 55 a, 55 b.

[0135] The difference between the voltage supplied by the voltage generating circuit 27 during the light emission exposure period in the pulse ToF control mode and the voltage supplied by the voltage generating circuit 27 during the light emission exposure period in the CW ToF control mode is, for example, 0.2 V or more and 0.8 V or less.

[0136] 12 , the voltage generation circuit 27 changes the voltage applied to the p-type semiconductor layer 50p during the readout period. Specifically, in two consecutive frames, the voltage generation circuit 27 changes the voltage applied to the p-type semiconductor layer 50p during the light emission exposure period of the previous frame during the readout period of the previous frame to the voltage applied to the p-type semiconductor layer 50p during the light emission exposure period of the subsequent frame. This prevents the change in the voltage applied to the p-type semiconductor layer 50p by the voltage generation circuit 27 from affecting the transfer of signal charges from the photoelectric conversion unit 51 to the multiple charge accumulation units 52a and 52b. Note that when control is performed in the same control mode in two consecutive frames, the voltage generation circuit 27 does not change the voltage applied to the p-type semiconductor layer 50p.

[0137] [Modification] Next, a modification of embodiment 1 will be described. The range imaging device according to the modification of embodiment 1 has the same configuration as the range imaging device 100 according to embodiment 1, except that the planar layout of pixels is different. In the following description of the modification, differences from embodiment 1 will be mainly described, and descriptions of commonalities will be omitted or simplified.

[0138] FIG. 13 is a plan view showing an example of the configuration of a pixel 22A according to a first modified example of the present embodiment. FIG. 13 shows a planar layout of the pixel 22A when the semiconductor substrate 50 is viewed in plan. FIG. 14 is a plan view showing an example of the configuration of a pixel 22B according to a second modified example of the present embodiment. FIG. 14 shows a planar layout of the pixel 22B when the semiconductor substrate 50 is viewed in plan. Note that in FIGS. 13 and 14 , the multiple charge transfer gates 55 a, 55 b and the multiple reset gates 56, which are gates formed on the p-type semiconductor layer 50 p, are marked with dots for distinction. Also, in FIGS. 13 and 14 , the configuration of the pixels 22A and 22B other than the photoelectric conversion unit 51, the charge accumulation units 58 a, 58 b, the charge transfer gates 55 a, 55 b, the reset gate 56, and the charge exhaust unit 57 are omitted from the illustration.

[0139] As shown in FIG. 13, pixel 22A differs from pixel 22 mainly in that pixel 22A has a plurality of charge storage portions 58a, 58b instead of a plurality of charge storage portions 52a, 52b, and in that a plurality of reset gates 56 are shared by two adjacent pixels 22A.

[0140] Each of the plurality of charge accumulation units 58a, 58b accumulates signal charges converted by the photoelectric conversion unit 51. Each of the plurality of charge accumulation units 58a, 58b is, for example, an impurity region formed as a floating diffusion layer in the p-type semiconductor layer 50p. In the pixel 22A, the charge transfer gate 55a transfers the signal charges to the charge accumulation unit 58a, and the charge transfer gate 55b transfers the signal charges to the charge accumulation unit 58b.

[0141] In pixel 22A, similarly to pixel 22, the multiple reset gates 56 are electrically connected to each other, are applied with the same voltage, and are driven in unison at the same timing. There are two reset gates 56 in pixel 22A. Each of the two reset gates 56 is located outside the area in which the multiple charge transfer gates 55a, 55b are located in plan view of the semiconductor substrate 50. This allows the multiple charge transfer gates 55a, 55b to be closer to each other, enabling signal charges to be distributed to the multiple charge accumulation units 58a, 58b at high speed.

[0142] In the pixel 22A, the two reset gates 56 are arranged on both ends of the photoelectric conversion unit 51 in the column direction. Each of the two reset gates 56 is shared by two adjacent pixels 22A. Specifically, each of the two reset gates 56 is shared by two adjacent pixels 22A in the column direction. This allows the pixel 22A to be miniaturized and the short channel effect to be suppressed. Each of the two reset gates 56 may be shared by two adjacent pixels 22A in the row direction. Alternatively, only one of the two reset gates 56 may be shared by two adjacent pixels 22A.

[0143] As shown in FIG. 14, the pixel 22B differs from the pixel 22A mainly in that the planar layout of the pixel 22B is changed and the number of reset gates 56 is one.

[0144] In pixel 22B, multiple charge transfer gates 55a, 55b are arranged on both ends of photoelectric conversion unit 51 in the column direction. One reset gate 56 is arranged inside the range in which multiple charge transfer gates 55a, 55b are arranged in a plan view of semiconductor substrate 50. This enables pixel 22B to be miniaturized.

[0145] Furthermore, one reset gate 56 is shared by two adjacent pixels 22B. Specifically, one reset gate 56 is shared by two adjacent pixels 22B in the row direction. This allows the pixels 22B to be miniaturized and also suppresses the short channel effect in the reset gate 56. Note that one reset gate 56 may also be shared by two adjacent pixels 22B in the column direction.

[0146] (Embodiment 2) Next, a description will be given of a range imaging device according to embodiment 2. In the following description of embodiment 2, differences from embodiment 1 will be mainly described, and description of commonalities will be omitted or simplified.

[0147] The imaging element provided in a range imaging device is generally driven by a plurality of power supply voltages. Examples of the plurality of power supply voltages include an analog power supply voltage (AVDD) of about 2.8 V, an I / O power supply voltage (IOVDD) of about 1.8 V, and a digital power supply voltage (DVDD) of about 1.1 V. On the other hand, from the viewpoint of reducing the number of components constituting a module and suppressing an increase in the mounting area, it is desirable to reduce the number of types of power supplies used. Therefore, in a second embodiment, a range imaging device that can reduce the number of types of power supplies used will be described.

[0148] Fig. 15 is a functional block diagram showing an example of the configuration of a range imaging device 200 according to this embodiment. Note that Fig. 15 mainly illustrates the configuration in the range imaging device 200 in which voltage is supplied from the analog power supply 80, and other components are not shown. For example, the range imaging device 200 has a configuration similar to the configuration of the range imaging device 100 described using Figs. 2 to 4, with elements not shown. Note that the configuration of the range imaging device 200 is not particularly limited as long as it is capable of generating a range image.

[0149] As shown in FIG. 15, the range image pickup device 200 includes an analog power supply 80 , a resistor 90 , a capacitance element 91 , and a capacitance element 92 .

[0150] The analog power supply 80 is connected to one end of the resistor 90, one end of the capacitance element 91, and to the analog circuit unit 29 and pixel array 21 in the image sensor 20. The analog power supply 80 supplies an analog power supply voltage AVDD to the analog circuit unit 29 and pixel array 21. The analog power supply voltage AVDD corresponds to the above-mentioned power supply voltage VDD. The analog circuit unit 29 includes various analog circuits in the image sensor 20, such as the above-mentioned voltage generation circuit 27 and AD conversion circuit 25.

[0151] The other end of the resistor 90 is connected to one end of the capacitance element 92 and to the pixel drive circuit 24 in the image sensor 20. The analog power supply 80 supplies a pixel drive power supply voltage DRVVDD to the pixel drive circuit 24 via the resistor 90. The pixel drive power supply voltage DRVVDD is a high-level voltage that the pixel drive circuit 24 supplies to various gates of the plurality of pixels 22.

[0152] The capacitive element 91 is a bypass capacitor connected to the wiring connecting the analog power supply 80 and the analog circuit section 29 .

[0153] The capacitance element 92 is a bypass capacitor connected to the wiring connecting the resistor 90 and the pixel drive circuit 24. Inserting the resistor 90 makes the voltage supplied to the pixel drive circuit 24 more likely to fluctuate, but inserting the capacitance element 92 can suppress the voltage fluctuations. However, if the capacitance of the capacitance element 92 becomes too large, it will take time for the voltage drop effect caused by inserting the resistor 90 to appear. For this reason, the capacitance of the capacitance element 92 is designed to be, for example, about 0.1 μF.

[0154] In the range image capturing device 200, the pixel drive power supply voltage DRVVDD is lower than the analog power supply voltage AVDD due to the voltage drop caused by the resistor 90. For example, by using a 2.8 V analog power supply 80 and a 1 Ω resistor 90, the pixel drive power supply voltage DRVVDD can be set to approximately 2.7 V while maintaining the analog power supply voltage AVDD at 2.8 V. Without the resistor 90, the pixel array 21 must be designed assuming that the high-level voltage applied from the pixel drive circuit 24 to the multiple charge transfer gates 55 a, 55 b, etc., is the analog power supply voltage AVDD. However, depending on the driving mode of the pixels 22, a voltage different from the analog power supply voltage AVDD may be optimal. For example, to drive the multiple charge transfer gates 55 a, 55 b at high speed, it may be better to use a voltage lower than the analog power supply voltage AVDD. Therefore, without the resistor 90, a power supply for the pixel drive power supply voltage DRVVDD must be prepared to optimally drive the pixels 22. In this embodiment, the depth image pickup device 200 is provided with a resistor 90, so that a pixel drive power supply voltage DRVVDD that is different from the analog power supply voltage AVDD can be realized without using an additional power supply, and the number of types of power supplies used can be reduced.

[0155] The configuration of the analog power supply 80 and resistor 90 shown in FIG. 15 may be applied to an imaging device that generates a two-dimensional image, instead of the range image imaging device 200 that is an imaging device that generates a range image.

[0156] (Other) While the distance imaging device according to one or more aspects of the present disclosure has been described above based on the embodiments, the present disclosure is not limited to the embodiments. As long as it does not deviate from the spirit of the present disclosure, various modifications conceivable by a person skilled in the art to each embodiment or configurations constructed by combining components of different embodiments may also be included within the scope of one or more aspects of the present disclosure.

[0157] For example, in the above-described embodiment, in the other pulse ToF control mode described with reference to FIG. 7 and the CW ToF control mode described with reference to FIGS. 8 and 9, the pixels 22 are driven in the first and second subframes, but this is not limited thereto. For example, the pixels 22 may be divided into a group of pixels 22 driven in the first subframe and a group of pixels 22 driven in the second subframe, and the pixels 22 may be driven in the first and second subframes in one frame. For example, the drive control unit 23 may divide two adjacent pixels 22 into different groups and accumulate signal charges for calculating the distance D in the charge accumulation units 52 a, 52 b of the two pixels 22. While this reduces resolution, it allows a distance image to be generated in a shorter period of time than when driving the pixels in two subframes, thereby suppressing the occurrence of motion blur. This also increases the number of groups consisting of pixels 22 whose charge transfer gates 55 a, 55 b are driven at the same time. Therefore, in the pixels 22 belonging to different groups, the drive timings of the charge transfer gates 55a and 55b are different, so that fluctuations in the well potential can be suppressed.

[0158] Furthermore, for example, in the alternative pulse ToF control mode described with reference to FIG. 7 in the above embodiment, the drive control unit 23 divides the pixels 22 into a single group in which the charge transfer gates 55 a, 55 b are driven at the same timing, and controls the driving of the pixels 22. However, this is not limited to this. For example, the drive control unit 23 may divide the pixels 22 into a group in which the pixels 22 are driven first in the first subframe and a group in which the pixels 22 are driven first in the second subframe, and control the driving of the pixels 22. This can suppress fluctuations in the well potential. The alternative pulse ToF control mode in this case can be an example of the second control mode.

[0159] Furthermore, the distance imaging device according to the present disclosure does not need to include all of the components described in the above embodiments, and may be configured with only the components required to perform the desired operation.

[0160] In the above-described embodiments, each component may be realized by executing a software program suitable for that component, or by a program execution unit such as a processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0161] Furthermore, each component may be realized by hardware. Each component may be a circuit (or integrated circuit). These circuits may form a single circuit as a whole, or each may be a separate circuit. Furthermore, each of these circuits may be a general-purpose circuit or a dedicated circuit.

[0162] Furthermore, the general or specific aspects of the present disclosure may be realized as a system, an apparatus, a method, an integrated circuit, a computer program, or a computer-readable recording medium such as a CD-ROM, or as any combination of a system, an apparatus, a method, an integrated circuit, a computer program, and a recording medium.

[0163] For example, the present disclosure may be realized as the distance imaging device of the above embodiment, as a control device that controls the distance imaging device, as a driving method for a distance imaging device that includes the steps (processing) described as the operation of the above distance imaging device, as a program for causing a computer to execute such a driving method for a distance imaging device, or as a computer-readable non-transitory recording medium on which such a program is recorded.

[0164] Below, examples of the distance imaging device and driving method according to the present disclosure described based on the above embodiment will be shown. The distance imaging device and driving method according to the present disclosure are not limited to the following examples.

[0165] For example, a distance imaging device according to a first aspect of the present disclosure is a distance imaging device that generates a distance image using an indirect ToF (Time of Flight) method, and includes: a light source that irradiates a space with illumination light; a plurality of pixels that receive light reflected from an object in the space from the illumination light; a semiconductor substrate on which the plurality of pixels are two-dimensionally arranged; a drive control unit that controls driving of the light source and the plurality of pixels; and a signal processing unit that calculates a distance to the object based on signals output by the plurality of pixels based on the reflected light, wherein each of the plurality of pixels includes a photoelectric conversion unit that converts the reflected light into a signal charge, and stores the signal charge converted by the photoelectric conversion unit. The pixel includes a plurality of charge accumulation sections and a plurality of charge transfer gates that distribute and transfer the signal charges converted by the photoelectric conversion section to the plurality of charge accumulation sections, and the drive control section divides the plurality of pixels into one or more groups that drive the plurality of charge transfer gates at the same timing for each frame, controls the driving of the plurality of pixels, and has control modes for controlling the driving of the light source and the plurality of pixels, including a first control mode in which the number of the one or more groups is a first number, and a second control mode in which the number of the one or more groups is a second number that is greater than the first number.

[0166] As a result, in the second control mode, which has a large number of groups (one or more) of pixels each configured to drive multiple charge transfer gates at the same timing, the drive timing of the multiple charge transfer gates is spread out across the multiple pixels. As a result, potential fluctuations in the semiconductor substrate caused by currents for driving the multiple charge transfer gates can be suppressed. This can prevent unintended transfer of signal charge to the charge accumulation unit due to a potential drop in the semiconductor substrate when a low-level voltage is applied to the charge transfer gate. Therefore, this aspect realizes a range imaging device having a control mode that can prevent unintended transfer of signal charge to the charge accumulation unit.

[0167] Also, for example, a distance image capturing device according to a second aspect of the present disclosure is a distance image capturing device according to the first aspect, which is provided with a voltage supply unit that applies different voltages to the photoelectric conversion unit in the first control mode and the second control mode when the plurality of charge transfer gates are driven.

[0168] As a result, in a control mode in which the voltage applied to the photoelectric conversion unit by the voltage supply unit is high, the potential of the semiconductor substrate is increased, and even if a potential drop occurs in the semiconductor substrate due to potential fluctuations, the low-level voltage of the charge transfer gate can be prevented from becoming relatively higher than the potential of the semiconductor substrate. Therefore, in a control mode in which the voltage applied to the photoelectric conversion unit by the voltage supply unit is high, it is possible to prevent unintended transfer of signal charges to the charge accumulation unit.

[0169] Also, for example, a distance image capturing device according to a third aspect of the present disclosure is a distance image capturing device according to the second aspect, wherein the voltage supply unit applies a voltage to the photoelectric conversion unit in the first control mode that is higher than the voltage applied to the photoelectric conversion unit in the second control mode when driving the plurality of charge transfer gates.

[0170] This increases the potential of the semiconductor substrate in the first control mode, where the potential of the semiconductor substrate is prone to fluctuating due to a small number of groups of pixels that simultaneously drive multiple charge transfer gates. Therefore, even if a potential drop occurs in the semiconductor substrate due to potential fluctuations, the low-level voltage of the charge transfer gate can be prevented from becoming relatively higher than the potential of the semiconductor substrate. Therefore, unintended transfer of signal charges to the charge accumulation section can be prevented not only in the second control mode but also in the first control mode.

[0171] Furthermore, for example, a distance imaging device according to a fourth aspect of the present disclosure is a distance imaging device according to the second or third aspect, and includes a capacitive element connected to the photoelectric conversion unit and the voltage supply unit, and the voltage supply unit is a voltage generation circuit capable of changing the voltage applied to the photoelectric conversion unit.

[0172] This allows a stable voltage to be supplied to the photoelectric conversion unit.

[0173] Also, for example, a distance imaging device according to a fifth aspect of the present disclosure is a distance imaging device according to any one of the second to fourth aspects, wherein the voltage supply unit changes the voltage applied to the photoelectric conversion unit during a period in which signals from the plurality of pixels are read out.

[0174] This makes it possible to prevent a change in the voltage applied to the photoelectric conversion unit by the voltage supply unit from affecting the transfer of signal charges from the photoelectric conversion unit to the plurality of charge accumulation units.

[0175] Furthermore, for example, a distance imaging device according to a sixth aspect of the present disclosure is a distance imaging device according to any one of the second to fifth aspects, wherein the semiconductor substrate is an n-type semiconductor substrate, the photoelectric conversion unit is formed in a p-type well formed in the n-type semiconductor substrate, and the voltage supply unit applies a voltage to the photoelectric conversion unit by applying a voltage to the p-type well.

[0176] This allows the voltage supply unit to apply a voltage to the photoelectric conversion unit via the p-type well.

[0177] Furthermore, for example, a distance imaging device according to a seventh aspect of the present disclosure is a distance imaging device according to any one of the second to fifth aspects, wherein the semiconductor substrate is a p-type semiconductor substrate, the photoelectric conversion unit is formed on the p-type semiconductor substrate, and the voltage supply unit applies a voltage to the photoelectric conversion unit by applying a voltage to the p-type semiconductor substrate.

[0178] This allows the voltage supply unit to apply a voltage to the photoelectric conversion unit via the p-type semiconductor substrate.

[0179] Also, for example, a distance imaging device according to an eighth aspect of the present disclosure is a distance imaging device according to any one of the first to seventh aspects, wherein the first control mode is a control mode for calculating the distance to the object using a pulse ToF method, and the second control mode is a control mode for calculating the distance to the object using a CW (Continuous Wave) ToF method.

[0180] In the CWToF method, as long as each pixel outputs a signal corresponding to an exposure period with a predetermined phase difference, the distance to the object can be calculated at each pixel even if the exposure timing is not unified among multiple pixels. Therefore, it is easy to increase the number of groups (one or more) consisting of pixels that drive multiple charge transfer gates at the same timing, and fluctuations in the potential of the semiconductor substrate in the second control mode can be further suppressed.

[0181] Also, for example, a distance image capturing device according to a ninth aspect of the present disclosure is a distance image capturing device according to the eighth aspect, wherein each of the plurality of pixels has one or more reset gates that drain the signal charge from the photoelectric conversion unit, and the drive control unit does not cause the one or more reset gates to drain the signal charge from the photoelectric conversion unit during a period in which the drive control unit is causing the plurality of charge transfer gates to distribute and transfer the signal charge to the plurality of charge accumulation units in the second control mode.

[0182] As a result, the reset gate is not driven while the plurality of charge transfer gates are driven, so that no current flows to drive the reset gate, and fluctuations in the potential of the semiconductor substrate can be further suppressed.

[0183] Furthermore, for example, a distance imaging device according to a tenth aspect of the present disclosure is a distance imaging device according to any one of the first to ninth aspects, wherein the light source irradiates pulsed light as the irradiation light in accordance with a light emission control pulse output from the drive control unit, and the pulse width of the light emission control pulse in the first control mode is different from the pulse width of the light emission control pulse in the second control mode.

[0184] This makes it possible to set the pulse width of the pulsed light in accordance with each of the first control mode and the second control mode.

[0185] Furthermore, for example, a distance image capturing device according to an eleventh aspect of the present disclosure is a distance image capturing device according to any one of the first to tenth aspects, wherein the light source irradiates pulsed light as the irradiation light in accordance with a light emission control pulse output from the drive control unit, the drive control unit repeatedly outputs the light emission control pulse at a predetermined period, and the period at which the light emission control pulse is output in the first control mode is different from the period at which the light emission control pulse is output in the second control mode.

[0186] This makes it possible to set the period of the pulsed light in accordance with each of the first control mode and the second control mode.

[0187] Furthermore, for example, a distance imaging device according to a twelfth aspect of the present disclosure is a distance imaging device according to any one of the first to eleventh aspects, wherein each of the plurality of pixels has two reset gates that discharge the signal charge from the photoelectric conversion unit, and each of the two reset gates is arranged outside the range in which the plurality of charge transfer gates are arranged in a planar view of the semiconductor substrate.

[0188] This allows a plurality of charge transfer gates to be placed close to each other, so that signal charges can be distributed to a plurality of charge accumulation sections at high speed.

[0189] Furthermore, for example, a distance imaging device according to a thirteenth aspect of the present disclosure is a distance imaging device according to any one of the first to eleventh aspects, wherein each of the plurality of pixels has one reset gate that discharges the signal charge from the photoelectric conversion unit, and the one reset gate is arranged inside the range in which the plurality of charge transfer gates are arranged in a planar view of the semiconductor substrate.

[0190] This allows for smaller pixels.

[0191] Furthermore, for example, a distance imaging device according to a fourteenth aspect of the present disclosure is a distance imaging device according to any one of the first to thirteenth aspects, wherein each of the plurality of pixels has one or more reset gates that discharge the signal charge from the photoelectric conversion unit, and two adjacent pixels among the plurality of pixels share at least one of the one or more reset gates.

[0192] This allows the pixel to be made smaller and also suppresses the short channel effect in the reset gate.

[0193] Furthermore, for example, the driving method according to the fifteenth aspect of the present disclosure is an indirect Time of Flight (ToF) driving method. a driving method for a distance image pickup device that generates a distance image using a Flight system, the distance image pickup device comprising: a light source that irradiates illumination light into a space; a plurality of pixels that receive light reflected from an object in the space from the illumination light; and a semiconductor substrate on which the plurality of pixels are two-dimensionally arranged, each of the plurality of pixels having a photoelectric conversion unit that converts the reflected light into a signal charge; a plurality of charge accumulation units that accumulate the signal charge converted by the photoelectric conversion unit; and a plurality of charge transfer gates that allocate and transfer the signal charge converted by the photoelectric conversion unit to the plurality of charge accumulation units; the driving method divides the plurality of pixels into one or more groups that drive the plurality of charge transfer gates at the same timing for each frame, and controls driving of the plurality of pixels; in a first frame, controlling driving of the light source and the plurality of pixels in a first control mode in which the number of the one or more groups is a first number; and in a second frame, controlling driving of the light source and the plurality of pixels in a second control mode in which the number of the one or more groups is a second number that is greater than the first number.

[0194] This also makes it possible to realize a range imaging device having a control mode that can suppress unintended transfer of signal charges to the charge accumulation section, similar to the range imaging device according to the first aspect described above.

[0195] The range image capturing device and the like according to the present disclosure can be applied to a variety of applications, such as a distance measurement system, and a sensing system and recognition system that use range images.

[0196] 10 Light source 20 Imaging element 21 Pixel array 22, 22A, 22B Pixel 23 Drive control unit 23a Pulse ToF signal generation circuit 23b CW ToF signal generation circuit 24 Pixel drive circuit 25 AD conversion circuit 26 Signal processing unit 27 Voltage generation circuit 28 Voltage control unit 29 Analog circuit unit 30 System controller 40, 91, 92 Capacitor element 50 Semiconductor substrate 50p p-type semiconductor layer 51 Photoelectric conversion unit 52a, 52b, 58a, 58b, FD Charge storage unit 53a, 53b, 53c Charge transfer unit 54 Transfer channel 55a, 55b Charge transfer gate 56 Reset gate 57 Charge discharge unit 61 Memory read transistor 62 Source follower transistor 63 Selection transistor 64 Reset transistor 65a, 65b Transfer transistor 66 Charge discharge transistor 80 Analog power supply 90 Resistor 100, 200 Range image capturing device

Claims

1. A distance imaging device that generates a distance image using an indirect ToF (Time of Flight) method, comprising: a light source that irradiates a space with illumination light; a plurality of pixels that receive light reflected from an object in the space from the illumination light; a semiconductor substrate on which the plurality of pixels are two-dimensionally arranged; a drive control unit that controls the driving of the light source and the plurality of pixels; and a signal processing unit that calculates the distance to the object based on signals output by the plurality of pixels based on the reflected light, wherein each of the plurality of pixels has: a photoelectric conversion unit that converts the reflected light into signal charges; a plurality of charge accumulation units that accumulate the signal charges converted by the photoelectric conversion unit; and a plurality of charge transfer gates that allocate and transfer the signal charges converted by the photoelectric conversion unit to the plurality of charge accumulation units, and the drive control unit controls the driving of the plurality of pixels by dividing the plurality of pixels into one or more groups that drive the plurality of charge transfer gates at the same timing for each frame, A range imaging device having, as control modes for controlling driving of the light source and the plurality of pixels, a first control mode in which the number of the one or more groups is a first number, and a second control mode in which the number of the one or more groups is a second number that is greater than the first number.

2. The distance imaging device according to claim 1, further comprising a voltage supply unit that applies different voltages to the photoelectric conversion unit in the first control mode and the second control mode when the plurality of charge transfer gates are driven.

3. The distance imaging device according to claim 2, wherein the voltage supply unit applies a voltage to the photoelectric conversion unit in the first control mode that is higher than the voltage applied to the photoelectric conversion unit in the second control mode when driving the plurality of charge transfer gates.

4. A distance imaging device according to claim 2 or 3, comprising a capacitive element connected to the photoelectric conversion unit and the voltage supply unit, the voltage supply unit being a voltage generating circuit capable of changing the voltage applied to the photoelectric conversion unit.

5. The distance imaging device according to any one of claims 2 to 4, wherein the voltage supply unit changes the voltage applied to the photoelectric conversion unit during a period in which signals are read out from the plurality of pixels.

6. A distance imaging device according to any one of claims 2 to 5, wherein the semiconductor substrate is an n-type semiconductor substrate, the photoelectric conversion unit is formed in a p-type well formed in the n-type semiconductor substrate, and the voltage supply unit applies a voltage to the photoelectric conversion unit by applying a voltage to the p-type well.

7. A distance imaging device according to any one of claims 2 to 5, wherein the semiconductor substrate is a p-type semiconductor substrate, the photoelectric conversion unit is formed on the p-type semiconductor substrate, and the voltage supply unit applies a voltage to the photoelectric conversion unit by applying a voltage to the p-type semiconductor substrate.

8. A distance imaging device according to any one of claims 1 to 7, wherein the first control mode is a control mode for calculating the distance to the object using a pulse ToF method, and the second control mode is a control mode for calculating the distance to the object using a CW (Continuous Wave) ToF method.

9. The distance imaging device of claim 8, wherein each of the plurality of pixels has one or more reset gates that drain the signal charge from the photoelectric conversion unit, and the drive control unit does not cause the one or more reset gates to drain the signal charge from the photoelectric conversion unit during a period in which the drive control unit is causing the plurality of charge transfer gates to distribute and transfer the signal charge to the plurality of charge accumulation units in the second control mode.

10. A distance imaging device according to any one of claims 1 to 9, wherein the light source emits pulsed light as the irradiation light in accordance with a light emission control pulse output from the drive control unit, and the pulse width of the light emission control pulse in the first control mode is different from the pulse width of the light emission control pulse in the second control mode.

11. A distance imaging device according to any one of claims 1 to 10, wherein the light source emits pulsed light as the irradiation light in accordance with a light emission control pulse output from the drive control unit, the drive control unit repeatedly outputs the light emission control pulse at a predetermined cycle, and the cycle at which the light emission control pulse is output in the first control mode is different from the cycle at which the light emission control pulse is output in the second control mode.

12. A distance imaging device according to any one of claims 1 to 11, wherein each of the plurality of pixels has two reset gates that discharge the signal charge from the photoelectric conversion unit, and each of the two reset gates is arranged outside the range in which the plurality of charge transfer gates are arranged in a planar view of the semiconductor substrate.

13. A distance imaging device according to any one of claims 1 to 11, wherein each of the plurality of pixels has one reset gate that discharges the signal charge from the photoelectric conversion unit, and the one reset gate is arranged inside the range in which the plurality of charge transfer gates are arranged in a planar view of the semiconductor substrate.

14. A distance imaging device according to any one of claims 1 to 13, wherein each of the plurality of pixels has one or more reset gates that discharge the signal charge from the photoelectric conversion unit, and two adjacent pixels among the plurality of pixels share at least one of the one or more reset gates.

15. A method for driving a distance imaging device that generates a distance image using an indirect ToF (Time of Flight) method, wherein the distance imaging device comprises: a light source that irradiates illumination light into a space; a plurality of pixels that receive light reflected from an object in the space from the illumination light; and a semiconductor substrate on which the plurality of pixels are two-dimensionally arranged, each of the plurality of pixels having: a photoelectric conversion unit that converts the reflected light into a signal charge; a plurality of charge accumulation units that accumulate the signal charge converted by the photoelectric conversion unit; and a plurality of charge transfer gates that allocate and transfer the signal charge converted by the photoelectric conversion unit to the plurality of charge accumulation units; and the driving method comprises: dividing the plurality of pixels into one or more groups that drive the plurality of charge transfer gates at the same timing for each frame, and controlling the driving of the plurality of pixels; and controlling the driving of the light source and the plurality of pixels in a first control mode in which the number of the one or more groups is a first number in a first frame; In a second frame, the driving of the light source and the plurality of pixels is controlled in a second control mode in which the number of the one or more groups is a second number greater than the first number.

Images