Wiring body and quantum computer
The implementation of oxide superconducting wiring structures with shielding and insulating layers addresses the heat instability issue in quantum computers, ensuring stable operation by reducing thermal conductivity.
Patent Information
- Application Number
- PCT/JP2025/026897
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-30
- Filing Date
- 2025-07-29
- Publication Date
- 2026-02-05
AI Technical Summary
Conventional metal-based superconducting cables used in quantum computers generate excessive heat due to high thermal conductivity, destabilizing the operation of quantum bits in cryogenic environments.
Employing a wiring structure made of oxide superconductors with signal lines supported by a support substrate, including shielding layers and insulating layers to reduce thermal conductivity and stabilize quantum bit operations.
The use of oxide superconductors with low thermal conductivity stabilizes quantum bit operations by minimizing heat influx into cryogenic environments, enhancing the stability and efficiency of quantum computers.
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Figure JP2025026897_05022026_PF_FP_ABST
Abstract
Description
Wiring body and quantum computer
[0001] The present invention relates to a wiring body and a quantum computer. For designated countries where incorporation by reference of documents is permitted, the content of Japanese Patent Application No. 2024-123708 filed in Japan on July 30, 2024 is incorporated by reference into this specification and made a part of the description of this specification.
[0002] A cable for a quantum computer is known that includes an insulator and superconducting wiring (see, for example, Patent Document 1). In this cable, the insulator is made of an insulating base material, and the superconducting wiring includes a superconducting layer made of a metallic material (see, for example, Patent Document 1 (paragraphs 35-36 and FIG. 4A)).
[0003] Such cables are used in cryogenic environments, specifically to connect multiple quantum chips together or to connect a quantum chip to a control unit (see, for example, Patent Document 1 (paragraph 29 and Figure 2C)).
[0004] US Patent Application Publication No. 2021 / 0280765
[0005] It is said that quantum computers will require around one million quantum bits in the future. To achieve this level of integration of quantum bits, a large number of cables will be required to increase the number of signal lines for transmission.
[0006] However, when a large amount of cables having a superconducting layer made of a metal material as in the above-mentioned conventional technology are used, there is a problem that, because metal materials have high thermal conductivity, a large amount of heat flows into the cryogenic environment via the signal line, making the operation of the quantum chip unstable.
[0007] The problem to be solved by the present invention is to provide an interconnection and a quantum computer that can stabilize the operation of quantum bits by suppressing heat inflow.
[0008] [1] A first aspect of the present invention is a wiring structure used in a quantum computer, which is made of an oxide superconductor and includes a signal line for transmitting a signal.
[0009] [2] Aspect 2 of the present invention may be a wiring body according to aspect 1, wherein the wiring body is a tape wire having a first main surface and further including a support substrate that supports the signal line on the first main surface side.
[0010] [3] A third aspect of the present invention may be a wiring body according to the first or second aspect, wherein the wiring body includes a plurality of the signal lines.
[0011] [4] A fourth aspect of the present invention may be a wiring body according to the third aspect, wherein the signal line includes a first signal line that transmits a first signal, and a second signal line that transmits a second signal different from the first signal.
[0012] [5] A fifth aspect of the present invention may be a wiring body according to the third or fourth aspect, wherein the signal line includes a first signal line and a second signal line that is spaced apart from the first signal line and thereby electrically insulated from the first signal line.
[0013] [6] A sixth aspect of the present invention may be a wiring body according to any one of the first to fifth aspects, comprising: a support substrate having a first main surface; a pair of ground wires supported by the support substrate on the first main surface side and arranged adjacent to the signal wire with a gap therebetween; and the signal wire supported by the support substrate on the first main surface side and arranged between the pair of ground wires.
[0014] [7] A seventh aspect of the present invention is a wiring body according to any one of Aspects 1 to 6, wherein the wiring body has a first main surface and a second main surface opposite to the first main surface, and further comprises a support substrate that supports the signal line on the first main surface side, a first shielding layer that is located on the first main surface side of the support substrate and arranged to face the signal line, and a second shielding layer that is located on the second main surface side of the support substrate and arranged to face the signal line, and the signal line may be disposed in the wiring body between the first and second shielding layers.
[0015] [8] Aspect 8 of the present invention may be a wiring body according to any one of Aspects 1 to 7, further comprising: a support base material having a first main surface, supporting the signal line on the first main surface side, and made of a metal material; and an insulating layer interposed between the first main surface and the signal line, the insulating layer having electrical insulation properties.
[0016] [9] A ninth aspect of the present invention may be the wiring body of any one of the first to eighth aspects, wherein the wiring body further includes a resin layer that covers the signal line.
[0017]
[10] A tenth aspect of the present invention is a quantum computer comprising an interconnect body according to any one of aspects 1 to 9, and a quantum circuit to which the interconnect body is electrically connected.
[0018]
[11] Aspect 11 of the present invention is the quantum computer of aspect 10, further comprising a refrigerator that houses the quantum circuit and cools the quantum circuit, the refrigerator having a low-temperature region having an internal temperature of 10 mK or more and equal to or less than the critical temperature of the oxide superconductor, and the wiring body may be disposed in the low-temperature region.
[0019]
[12] A twelfth aspect of the present invention may be the quantum computer of Aspect 10 or 11, further comprising an amplifier that amplifies an output signal output from the quantum circuit, and the wiring body is disposed between the quantum circuit and the amplifier, and transmits the output signal to the amplifier.
[0020] The wiring structure of the present invention includes a signal line made of an oxide superconductor, which has a relatively low thermal conductivity, and therefore can suppress heat flow into a cryogenic environment, thereby stabilizing the operation of the quantum bit.
[0021] Fig. 1 is a schematic diagram showing an example of a quantum computer according to an embodiment of the present invention, Fig. 2 is a plan view showing an example of a wiring board according to an embodiment of the present invention, and Fig. 3 is a cross-sectional view taken along line III-III in Fig. 2.
[0022] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
[0023] 1 is a schematic diagram showing an example of a quantum computer 1 according to this embodiment. As shown in FIG. 1, the quantum computer 1 according to this embodiment includes a control device 10, a quantum circuit 20, a dilution refrigerator 30, a control line 40, and a readout line 50.
[0024] The control device 10 is, for example, a classical computer, and includes a CPU (Central Processing Unit) which is a processor, a ROM (Read Only Memory) in which a program is stored, and a RAM (Random Access Memory) which functions as an accessible storage device. Although not particularly limited, the CPU is an operating circuit for executing the program stored in the ROM and realizing the functions of the control device 10.
[0025] The quantum circuit 20 has a plurality of integrated quantum bits and input / output terminals for controlling and reading out the quantum bits. The quantum bits are, for example, superconducting, semiconductor spin, or annealing quantum bits, and operate in an extremely low temperature environment. The quantum circuit 20 in this embodiment performs calculations, initialization, etc., under the control of the control device 10. The quantum circuit 20 also outputs the calculation results to the control device 10.
[0026] The quantum circuit 20 is housed in a dilution refrigerator 30. The dilution refrigerator 30 is a refrigerator capable of cooling the interior to extremely low temperatures, and cools the quantum circuit 20. The dilution refrigerator 30 in this embodiment is, but is not limited to, a refrigerator that uses a mixed solution of helium-3 and helium-4. The dilution refrigerator 30 corresponds to an example of a "refrigerator" in an aspect of the present invention.
[0027] This dilution refrigerator 30 includes a plurality of freezing chambers 31 to 35 and a plurality of metal plates 36. Note that, although the number of freezing chambers in this embodiment is five, the number is not limited to this.
[0028] Freezing chambers 31 to 35 are closed spaces partitioned by a metal plate 36, a cylindrical radiation plate (not shown), or the like, and the interiors can be cooled to several mK to several tens of K. Although not particularly shown, the diameters of freezing chambers 31 to 35 become smaller as they are positioned on the −Z direction side, with freezing chamber 31 having the largest diameter and freezing chamber 35 having the smallest diameter. Freezing chamber 35 is located inside freezing chamber 34, freezing chamber 34 is located inside freezing chamber 33, freezing chamber 33 is located inside freezing chamber 32, and freezing chamber 32 is located inside freezing chamber 31.
[0029] The internal temperatures of the freezer compartments 31 to 35 decrease in stages toward the center. For example, the internal temperature of the freezer compartment 31 can be 35 K, the internal temperature of the freezer compartment 32 can be 3 K, the internal temperature of the freezer compartment 33 can be 900 mK, the internal temperature of the freezer compartment 34 can be 100 mK, and the internal temperature of the freezer compartment 35 can be 10 mK. Note that the internal temperatures of the freezer compartments 31 to 35 are not limited to these. The quantum circuit 20 is disposed inside the freezer compartment 35, which has the lowest temperature. The freezer compartments 31 to 35 correspond to an example of a "low temperature region" in this aspect of the present invention.
[0030] The metal plate 36 is a plate member that separates the freezing compartments 31 to 35. This metal plate 36 has a through-hole (not shown), through which wiring including a control line 40 and a readout line 50 is inserted.
[0031] The control line 40 is a transmission path for transmitting a control signal from the control device 10 to the quantum circuit 20. The control line 40 is electrically connected to the control device 10 and the quantum circuit 20. Although not particularly limited, the control line 40 is made up of a plurality of coaxial cables connected to each other by connectors or the like.
[0032] The readout line 50 is a transmission path that transmits a plurality of output signals, including the operation results output from the quantum circuit 20, to the control device 10. The readout line 50 includes a wiring board 60, a HEMT (High Electron Mobility Transistor) amplifier 70, and a coaxial cable 80. The wiring board 60 corresponds to an example of a "wiring body" in an aspect of the present invention.
[0033] The wiring board 60 is disposed between the quantum circuit 20 and the HEMT amplifier 70. The wiring board 60 in this embodiment is disposed in one of the freezer compartments 32 to 35, which are in a temperature range of 10 mK to 3 K, although this is not particularly limited. Although not shown, electronic components such as an isolator, a parametric amplifier, and a filter are disposed between the quantum circuit 20 and the wiring board 60. The location where the wiring board 60 is disposed is determined based on the critical temperature (transition temperature) T c Any low-temperature region having an internal temperature below the temperature limit may be used, and for example, wiring board 60 in this embodiment may extend from freezer compartment 35 to freezer compartment 31.
[0034] FIG. 2 is a plan view showing an example of a wiring board 60 according to this embodiment, and FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2 . As shown in FIG. 2 , the wiring board 60 has a tape shape extending in a predetermined direction. The thin tape shape of the wiring board 60 can reduce the increase in the volume of the readout line 50, thereby saving space. For example, even if a large number of wiring boards 60 are required for the readout line 50 due to an increase in the number of quantum bits, the volume of the readout line 50 can be limited to a level that allows for safe installation within the dilution refrigerator 30. Note that, while FIG. 2 shows the wiring board 60 extending in only one direction (the Z direction in the figure), this is not limited thereto, and the wiring board 60 may include a bent portion that curves or bends in a direction other than the Z direction, a branch portion that branches in two or more directions, or the like.
[0035] 3, the wiring board 60 includes a superconducting tape wire 61, a first shielding plate 62, and a second shielding plate 63. In the wiring board 60 of this embodiment, the first and second shielding plates 62, 63 are attached to both main surfaces of the superconducting tape wire 61.
[0036] The superconducting tape wire 61 is a wiring board that functions as a transmission path for separately transmitting a plurality of signals output from the quantum circuit 20. Such a superconducting tape wire 61 is fabricated by, but not limited to, an IBAD (Ion-Beam-Assisted Deposition) method.
[0037] The superconducting tape wire 61 includes a support substrate 611, a plurality of intermediate layers 612, a plurality of superconducting layers 613, and a plurality of resin layers 616. The intermediate layers 612 correspond to an example of an "insulating layer" in an aspect of the present invention.
[0038] The support substrate 611 has a tape shape and includes a first main surface 611 a and a second main surface 611 b opposite to the first main surface 611 a. The support substrate 611 supports a plurality of intermediate layers 612, a plurality of superconducting layers 613, and a plurality of resin layers 616 on the side of the first main surface 611 a.
[0039] There is no particular limitation on the material constituting the support substrate 611, but examples thereof include metal materials. There is no particular limitation on the metal material, but examples thereof include nickel alloys such as Hastelloy (registered trademark), stainless steel, and oriented Ni—W alloys in which a texture is introduced into a nickel alloy.
[0040] It is particularly preferable to use Hastelloy as the material constituting the support substrate 611. Since the thermal conductivity of Hastelloy is lower than that of general metals, it is possible to suppress heat inflow into the dilution refrigerator 30 through the support substrate 611. Although not particularly limited, the thermal conductivity of Hastelloy is, for example, 20 W / (m·K) or less at temperatures below the critical temperature. On the other hand, the thermal conductivity of metals such as copper and silver is, for example, about several hundred W / (m·K) at temperatures below the critical temperature.
[0041] An intermediate layer 612 is formed on the main surface of the support substrate 611, and the intermediate layer 612 is interposed between the support substrate 611 and the superconducting layer 613. The intermediate layer 612 has a linear shape extending in the Z direction in the figure. The intermediate layer 612 has electrical insulation properties, and electrically insulates the support substrate 611 from the superconducting layer 613.
[0042] Such intermediate layer 612 is not particularly limited, but is composed of multiple layers stacked along the Y direction in the figure. The intermediate layer 612 has, for example, a diffusion prevention layer, a bed layer, an orientation layer, a cap layer, etc. The diffusion prevention layer, bed layer, and orientation layer are stacked in this order toward the superconducting layer 613. Note that these layers are not necessarily provided one by one; some layers may be omitted, or two or more layers of the same type may be repeatedly stacked. Furthermore, the intermediate layer 612 may be omitted when the support substrate 611 has orientation, etc.
[0043] The diffusion prevention layer included in the intermediate layer 612 prevents some of the components of the support substrate 611 from diffusing and being mixed as impurities into the superconducting layer 613. Examples of materials that make up the diffusion prevention layer include Si 3 N 4 , Al 2 O 3 , and GZO(Gd 2 Zr2 O 7 ) and the like can be exemplified.
[0044] The bed layer included in the intermediate layer 612 reduces the reaction at the interface between the support substrate 611 and the superconducting layer 613 and also improves the orientation of the orientation layer formed on the bed layer. 2 O 3 , Er 2 O 3 , CeO 2 , Dy 2 O 3 , Eu 2 O 3 , Ho 2 O 3 , and La 2 O 3 Examples include:
[0045] The orientation layer included in the intermediate layer 612 controls the crystal orientation of the cap layer. Examples of materials that make up the orientation layer include Gd 2 Zr 2 O 7 , MgO, ZrO 2 -Y 2 O 3 (YSZ), SrTiO 3 , CeO 2 , Y 2 O 3 , Al 2 O 3 , Gd 2 O 3 , Zr 2 O 3 , Ho 2 O 3 , Nd 2 O 3 The following can be exemplified.
[0046] The cap layer included in the intermediate layer 612 improves the orientation of the superconducting layer 613 by self-orientation. Examples of materials that make up this cap layer include CeO 2 , Y 2 O 3 , Al 2 O 3 , Gd 2 O 3 , ZrO 2 , Y.S.Z., Ho2 O 3 , Nd 2 O 3 , LaMnO 3 Examples include:
[0047] A superconducting layer 613 is formed on the intermediate layer 612. As shown in Fig. 2, the superconducting layer 613, like the intermediate layer 612, has a linear shape extending in the Z direction in the figure.
[0048] The superconducting layer 613 is made of an oxide superconductor. The oxide superconductor is not particularly limited, but for example, a superconducting oxide having the general formula REBa 2 Cu 3 O y An example of such a superconductor is an RE-Ba-Cu-O-based oxide superconductor (REBCO-based oxide superconductor) represented by (RE123). In the above general formula, y is generally 7-x (oxygen deficiency x: approximately 0 to 1).
[0049] Examples of the rare earth element RE include one or more of Y, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu. It is preferable to use one of Y, Gd, Eu, and Sm, or a combination of two or more of these elements, as the rare earth element RE.
[0050] The superconducting layer 613 made of such a material is a high-temperature superconducting layer. The critical temperature (transition temperature) T c is not particularly limited, but is, for example, 77 K or less (T c ≦77K). The thermal conductivity of the superconducting layer 613 is, for example, 20 W / (m·K) or less at temperatures equal to or lower than the critical temperature.
[0051] 2 and 3, the plurality of superconducting layers 613 in this embodiment form two coplanar structures. That is, the superconducting layers 613 form a pair of signal lines 613a. 1 , 613a 2 and two pairs of ground lines 613b 1 , 613b 2 , 613b 3 , 613b 4By providing such a coplanar structure, it is possible to improve high frequency characteristics. The number of coplanar structures may be one, or three or more.
[0052] Signal line 613a 1 , 613a 2 are signal lines that transmit the output signal output from the quantum circuit 20. Because the output signal from the quantum circuit 20 is weak, a superconductor that has almost no resistance at temperatures below the critical temperature is used as the transmission line.
[0053] As shown in FIG. 2, the signal line 613a 1 and signal line 613a 2 extend substantially parallel to the Z direction in the drawing, and the signal line 613a 1 is signal line 613a 2 That is, the signal line 613a is not physically connected to the 1 The whole of the signal line 613a 2 This separates the signal line 613a 1 is signal line 613a 2 is electrically insulated.
[0054] Therefore, the signal line 613a in this embodiment 1 is the first signal S 1 whereas signal line 613a transmits 2 is the first signal S 1 a second signal S different from 2 That is, the wiring board 60 in this embodiment can transmit a plurality of output signals in parallel without multiplexing. 1 is the "first signal line" in this embodiment of the present invention, and signal line 613a 2 is the "second signal line" in this embodiment of the present invention.
[0055] In this way, the wiring board 60 has a plurality of signal lines 613a 1 , 613a 2 and each signal line 613a 1 , 613a 2Since signals can be transmitted in parallel, the integration density of signal lines can be increased.
[0056] Signal line 613a 1 is a pair of ground lines 613b 1 , 613b 2 In this embodiment, the pair of ground lines 613b are arranged in the X direction in the drawing. 1 , 613b 2 The ground line 613b is sandwiched between the 1 , 613b 2 is a superconducting layer 613 that does not transmit signals. 1 , 613b 2 is signal line 613a 1 It is possible to block noise from the
[0057] Similarly, signal line 613a 2 is a pair of ground lines 613b 3 , 613b 4 In this embodiment, the pair of ground lines 613b are arranged in the X direction in the drawing. 3 , 613b 4 The ground line 613b is sandwiched between the 2 , 613b 3 The ground line 613b is also a superconducting layer 613 that does not transmit signals. 1 , 613b 2 is signal line 613a 2 It is possible to shield the ground line 613b from noise. 1 ~613b 4 The potential may be, for example, ground or a constant potential.
[0058] The intermediate layer 612 and the superconducting layer 613 as described above can be formed, without any particular limitation, by using an IBAD method to form the intermediate layer 612 and the superconducting layer 613 over substantially the entire surface of the support substrate 611, and then processing the intermediate layer 612 and the superconducting layer 613 into a desired linear shape by laser scribing or the like. Alternatively, the intermediate layer 612 and the superconducting layer 613 as described above can also be formed by forming the intermediate layer 612 over substantially the entire surface of the support substrate 611, removing a portion of the intermediate layer 612, and then forming the superconducting layer 613.
[0059] Furthermore, the number of signal lines included in the superconducting layer 613 is not limited to two, and may be one, or three or more. Furthermore, the superconducting layer 613 does not need to include a coplanar structure. In other words, the ground line may be omitted, or a signal line may be arranged instead of the ground line.
[0060] As shown in Fig. 3, a resin layer 616 is formed on the superconducting layer 613. This resin layer 616 covers a covering portion 615 (see Fig. 3) which is a portion other than an exposed portion 614 (see Fig. 2) of the superconducting layer 613. This resin layer 616 protects the superconducting layer 613 from moisture and the like.
[0061] The resin layer 616 in this embodiment has a linear shape similar to the superconducting layer 613, but is not limited to this. The resin layer 616 may cover the first main surface 611a of the support substrate 611 up to a region where the intermediate layer 612 and the superconducting layer 613 are not formed.
[0062] Examples of materials that can be used to form the resin layer 616 include polyimide (PI), liquid crystal polymer (LCP), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyetherimide (PEI), polyether ether ketone (PEEK), and aramid.
[0063] Such a resin layer 616 can be formed, for example, by forming the superconducting layer 613 as described above, performing an oxygen annealing treatment on the superconducting layer 613, and then printing and hardening a resin material on the superconducting layer 613.
[0064] 3, a first shield plate 62 is attached to the above-described superconducting tape wire 61 via an adhesive layer 64. In this embodiment, the first shield plate 62 is attached to the superconducting tape wire 61 from the first main surface 611a side of the support substrate 611, and indirectly faces the first main surface 611a.
[0065] The first shield plate 62 includes a first resin base material 621 and a first shield layer 622. The first resin base material 621 has a tape shape, similar to the support base material 611. Examples of materials that can be used to form the first resin base material 621 include polyimide (PI), liquid crystal polymer (LCP), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyetherimide (PEI), polyether ether ketone (PEEK), and aramid.
[0066] The first shield layer 622 is a metal layer formed on the entire main surface of the first resin base material 621, and has a tape shape similar to the first resin base material 621. The first shield layer 622 is formed on the signal line 613a. 1 , 613a 2 The first shield layer 622 is a metal layer that does not transmit signals. 1 , 613a 2 The first shield layer 622 is electrically insulated from the ground line 613b. Examples of materials that can be used to form the first shield layer 622 include copper, aluminum, and superconductors. 1 ~613b 4 are connected to different grounds.
[0067] In addition, a second shield plate 63 is attached to the superconducting tape wire 61 via an adhesive layer 65. In this embodiment, the second shield plate 63 is attached to the superconducting tape wire 61 from the second main surface 611b side of the support substrate 611, and indirectly faces the second main surface 611b. As a result, the superconducting tape wire 61 is sandwiched between the first and second shield plates 62, 63.
[0068] The second shield plate 63 includes a second resin base material 631 and a second shield layer 632. The second resin base material 631 has a tape shape, similar to the support base material 611. Examples of materials constituting the second resin base material 631 include the same materials as those constituting the above-mentioned first resin base material.
[0069] The second shield layer 632 is a metal layer formed on the entire main surface of the second resin base material 631, and has a tape shape similar to the second resin base material 631. The second shield layer 632 is a metal layer formed on the entire main surface of the second resin base material 631. 1 , 613a 2 The second shield layer 632 is a metal layer that does not transmit signals. 1 , 613a 2 In this embodiment, the signal line 613a is electrically insulated from the 1 , 613a 2 is sandwiched between the first and second shield layers 622 and 632 on both sides in the Y direction in the drawing, and is disposed between the first and second shield layers 622 and 632 .
[0070] The second shield layer 632 may be made of the same material as the first shield layer 622. The second shield layer 632 may be made of the same material as the first shield layer 622. 1 ~613b 4 are connected to different grounds.
[0071] 1, inside the dilution refrigerator 30, a HEMT amplifier 70 is connected to the wiring board 60. This HEMT amplifier 70 amplifies the extremely weak output signal of the quantum circuit 20 in an extremely low temperature environment.
[0072] Inside the dilution refrigerator 30, a coaxial cable 80 is connected to the HEMT amplifier 70. This coaxial cable 80 extends from the inside to the outside of the dilution refrigerator 30, and is connected to the control device 10 outside the dilution refrigerator 30. The coaxial cable 80 transmits the output signal amplified by the HEMT amplifier 70 to the control device 10.
[0073] In the quantum computer 1 of this embodiment, the wiring board 60 has a signal line 613a made of an oxide superconductor. 1 , 613a 2 The thermal conductivity of the oxide superconductor is smaller than that of metal materials, and therefore the signal line 613a 1 , 613a 2 This can reduce the heat flow into the dilution refrigerator 30 via the ion beam. Therefore, the operation of the quantum bits of the quantum circuit 20 can be stabilized.
[0074] It should be noted that the above-described embodiments have been described to facilitate understanding of the present invention, and are not intended to limit the present invention. Therefore, each element disclosed in the above-described embodiments is intended to include all design modifications and equivalents that fall within the technical scope of the present invention.
[0075] For example, in the above embodiment, the control line 40 is composed of multiple coaxial cables, but the portion of the control line 40 located inside the dilution refrigerator 30 may include a wiring board 60.
[0076] In the above embodiment, the tape-shaped wiring board 60 has been described as an example of the "wiring body" of the present invention, but the present invention is not limited to this. For example, the "wiring body" may be a coaxial cable having a signal line made of an oxide superconductor.
[0077] REFERENCE SIGNS LIST 1 quantum computer 10 control device 20 quantum circuit 30 dilution refrigerator 31 to 35 freezing chamber 36 metal plate 40 control line 50 readout line 60 wiring board 61 superconducting tape wire 611 support substrate 612 intermediate layer 613 superconducting layer 613a 1 , 613a 2 ...Signal line 613b 1 ~613b 4...ground line 614...exposed portion 615...covering portion 616...resin layer 62...first shield plate 621...first resin base material 622...first shield layer 63...second shield plate 631...second resin base material 632...second shield layer 64, 65...adhesive layers 70...HEMT amplifier 80...coaxial cable
Claims
1. A wiring structure used in a quantum computer, which is made of oxide superconductors and has signal lines for transmitting signals.
2. A wiring body according to claim 1, wherein the wiring body is a tape wire having a first main surface and further comprising a support substrate that supports the signal line on the first main surface side.
3. A wiring body according to claim 1 or 2, wherein the wiring body comprises a plurality of the signal lines.
4. A wiring body according to claim 3, wherein the signal lines include a first signal line that transmits a first signal, and a second signal line that transmits a second signal different from the first signal.
5. A wiring body according to claim 3 or 4, wherein the signal line includes a first signal line and a second signal line that is spaced apart from the first signal line and is thereby electrically insulated from the first signal line.
6. A wiring body according to any one of claims 1 to 5, comprising: a support substrate having a first main surface; a pair of ground wires supported by the support substrate on the first main surface side and arranged adjacent to the signal wire with a gap therebetween; and the signal wire supported by the support substrate on the first main surface side and arranged between the pair of ground wires.
7. A wiring body according to any one of claims 1 to 6, the wiring body having a first main surface and a second main surface opposite the first main surface, and further comprising: a support substrate supporting the signal line on the first main surface side; a first shielding layer located on the first main surface side of the support substrate and arranged to face the signal line; and a second shielding layer located on the second main surface side of the support substrate and arranged to face the signal line, the signal line being arranged between the first and second shielding layers.
8. A wiring body according to any one of claims 1 to 7, further comprising: a support substrate having a first main surface, supporting the signal line on the first main surface side and made of a metal material; and an insulating layer interposed between the first main surface and the signal line and having electrical insulation properties.
9. A wiring body according to any one of claims 1 to 8, further comprising a resin layer covering the signal line.
10. A quantum computer comprising: an interconnection body according to any one of claims 1 to 9; and a quantum circuit electrically connected to said interconnection body.
11. A quantum computer according to claim 10, further comprising a refrigerator that houses the quantum circuit and cools the quantum circuit, the refrigerator having a low-temperature region with an internal temperature of 10 mK or more and less than the critical temperature of the oxide superconductor, and the wiring body being disposed in the low-temperature region.
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