Signal transmission method and signal transmission apparatus

Abstract

A signal transmission method and a signal transmission apparatus, which are conducive to avoiding an irrational rising / falling edge in an OOK modulation scenario, thereby improving the demodulation performance of a signal. The method comprises: executing a level conversion operation on a first chip comprised in a first symbol, and determining a second symbol, wherein the second symbol comprises at least two second chips, and the level of the first second chip among the at least two second chips is the same as the level of the last second chip among the at least two second chips; and sending a carrier signal on the basis of the second symbol.

Description

Signal transmission method and signal transmission device

[0001] The present application claims priority to the Chinese patent application No. 202411083380.X, filed on August 7, 2024, and entitled “Signal transmission method and signal transmission device”, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the field of communication, and more particularly, to a signal transmission method and a signal transmission device. BACKGROUND

[0003] In the Internet of Things technology, the three different speed gear classifications of Internet of Things practitioners for Internet of Things nodes have formed a consensus, namely high-speed Internet of Things, medium-speed Internet of Things and low-speed Internet of Things. On the basis of the above three types of Internet of Things scenarios, Ambient IoT is developing rapidly. Ambient IoT, also known as passive Internet of Things, is an Internet of Things network composed of devices with limited or no battery storage capacity. These devices rely on energy collected from the environment to power themselves, such as solar energy, radio waves, motion, vibration, heat or pressure, etc. Therefore, passive Internet of Things has many advantages such as energy saving, low maintenance cost, flexible layout, etc., and will become the main source of hundreds of billions of Internet of Things connection scenarios.

[0004] The transmitting end of the signal can modulate the orthogonal frequency division multiplexing (OFDM) symbol using the on-off keying (OOK) modulation method, and send the modulated symbol. In the current scheme, for the receiving end of the signal, the demodulation performance of the signal is poor, especially for passive Internet of Things devices in Ambient IoT. Therefore, how to improve the demodulation performance of the signal is a technical problem that needs to be solved at present. SUMMARY

[0005] The present application provides a signal transmission method and a signal transmission device. In the signal transmission scenario of passive Internet of Things, when the carrier signal is modulated using the OOK modulation method, the level transformation operation is performed on the chips included in the to-be-sent symbol to ensure that the level of the first chip and the level of the last chip in at least two chips in the symbol carrying the carrier signal are the same. This method is helpful to avoid unreasonable rising / falling edges in the OOK modulation scenario and improve the demodulation performance of the signal.

[0006] To achieve the above object, the embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect, a signal transmission method is provided, which can be performed by a signal transmitter or a chip or circuit in the signal transmitter. The method comprises performing a level conversion operation on first chips included in a first symbol, determining a second symbol, the second symbol including at least two second chips, a first one of the at least two second chips having a same level as a last one of the at least two second chips, and transmitting a carrier signal based on the second symbol.

[0008] Based on the signal transmission method provided in the first aspect, the level conversion operation can be performed on the first chips included in the first symbol, and the first one of the at least two second chips in the second symbol finally carrying the carrier signal has the same level as the last one of the at least two second chips. The method can improve the performance of signal demodulation and improve the spectral efficiency.

[0009] In combination with the first aspect, in some implementations of the first aspect, the second symbol further includes a second cyclic prefix (CP), and the second CP has the same level as the last one of the at least two second chips.

[0010] The second CP is added in the second symbol. This can reduce the inter-symbol interference and also ensure the orthogonality between subcarriers, thereby reducing the inter-subcarrier interference and improving the transmission performance. Further, the level of the added second CP is always the same as that of the first one of the at least two second chips in the second symbol. This method is conducive to ensuring that, in the case of OOK modulation, the level of the CP is the same as that of the first chip in the OFDM symbol, and can improve the correctness of signal transmission and improve the spectral efficiency.

[0011] In combination with the first aspect, in some implementations of the first aspect, the level conversion operation is predefined or configured through signaling.

[0012] Whether predefined or configured through signaling, both the two schemes can enable the signal receiver to learn the specific level conversion operation performed by the signal transmitter on the first symbol, thereby improving the demodulation performance and providing different implementation manners for the information synchronization between the signal receiver and the signal transmitter regarding the level conversion operation.

[0013] In combination with the first aspect, in some implementations of the first aspect, performing the level conversion operation on the first chips included in the first symbol comprises splitting all or part of the first chips included in the first symbol and performing the level conversion operation on the split chips, or performing the level conversion operation on part of the first chips included in the first symbol.

[0014] The level conversion operation is divided into two modes: mode 1, splitting all or part of the first chips included in the first symbol, and performing the level conversion operation on the chips obtained after splitting; mode 2, directly performing the level conversion operation on part of the first chips included in the first symbol. Mode 2 is simpler, can reduce the complexity of the operation, and reduce the consumption of computing resources. The above two modes improve the spectral efficiency and provide a flexible implementation mode for the level conversion operation.

[0015] In combination with the first aspect, in some implementations of the first aspect, splitting all or part of the first chips included in the first symbol and performing the level conversion operation on the chips obtained after splitting includes: splitting each of the all or part of the chips into two parts, and the level distribution of the two parts is level 0 and level 1, or the level distribution of the two parts is level 1 and level 0.

[0016] Splitting all or part of the first chips included in the first symbol and performing the level conversion operation on the chips obtained after splitting includes two level conversion modes, and the scheme further provides different choices for the level conversion operation.

[0017] In combination with the first aspect, in some implementations of the first aspect, all or part of the first chips include the last first chip in the first symbol; splitting all or part of the first chips included in the first symbol and performing the level conversion operation on the chips obtained after splitting includes: splitting the last first chip and performing the level conversion operation on the chips obtained after splitting.

[0018] Based on the two parts obtained after splitting the last first chip and the remaining first chips, a second symbol including a second CP can be determined. The second symbol has no unreasonable rising / falling edge, which can effectively improve the accuracy of signal demodulation and improve the spectral efficiency.

[0019] In combination with the first aspect, in some implementations of the first aspect, the all or part of the first chips further include the first first chip in the first symbol; splitting all or part of the first chips included in the first symbol and performing the level conversion operation on the chips obtained after splitting further includes: splitting the first first chip and performing the level conversion operation on the chips obtained after splitting.

[0020] Based on the two parts obtained after splitting the first first chip and the two parts obtained after splitting the last first chip, a second symbol including a second CP can be determined. The scheme can effectively improve the accuracy of signal demodulation and improve the spectral efficiency. The scheme provides another implementation mode for the level conversion operation.

[0021] In some implementations of the first aspect, the all or part of the first chips comprises all of the first chips in the first symbol; and the splitting the all or part of the first chips comprised in the first symbol and performing the level transform operation on the chips obtained by the splitting comprises: splitting all of the first chips and performing the level transform operation on the chips obtained by the splitting.

[0022] Based on the result of splitting all of the first chips, the second symbol comprising the second CP can be determined. This scheme can effectively improve the accuracy of signal demodulation and improve the spectral efficiency. This scheme provides another implementation of the level transform operation.

[0023] In some implementations of the first aspect, the part of the first chips comprises the last first chip in the first symbol; and the performing the level transform operation on the part of the first chips comprised in the first symbol comprises: performing the level transform operation on the last first chip to obtain the last second chip.

[0024] Based on the last second chip obtained by transforming the last first chip, the second symbol comprising the second CP can be determined. This scheme not only can effectively improve the accuracy of signal demodulation and improve the spectral efficiency, but also reduces the computational complexity and improves the system performance.

[0025] In some implementations of the first aspect, the performing the level transform operation on the last first chip comprises: copying the level value of the first first chip comprised in the first symbol, and determining the level value of the last first chip as the level value of the first first chip.

[0026] The above scheme describes a possible implementation of directly performing the level transform operation on the last first chip. This scheme is simple to operate and provides another possible implementation of the level transform operation.

[0027] In some implementations of the first aspect, the part of the first chips further comprises the second-to-last first chip in the first symbol; and the performing the level transform operation on the part of the first chips comprised in the first symbol further comprises: performing the level transform operation on the second-to-last first chip to obtain the second-to-last second chip of the at least two second chips.

[0028] Based on the last second chip and the second-to-last second chip obtained by transforming the last first chip and the second-to-last first chip, the second symbol comprising the second CP can be determined. This scheme is simple to operate and provides another possible implementation of the level transform operation.

[0029] With reference to the first aspect, in some implementations of the first aspect, performing the level transform operation on the second-to-last first chip comprises copying a level value of a second first chip included in the first symbol, and determining the level value of the second-to-last second chip as the level value of the second first chip.

[0030] The above scheme describes one possible implementation of directly performing the level transform operation on the second-to-last first chip. This scheme is simple in operation and provides another possible implementation of the level transform operation.

[0031] With reference to the first aspect, in some implementations of the first aspect, the partial first chips include a first first chip in the first symbol; and performing the level transform operation on the partial first chips included in the first symbol comprises performing the level transform operation on the first first chip to obtain a first second chip.

[0032] Based on the first second chip obtained by transforming the first first chip, a second symbol including a second CP can be determined. This scheme is simple in operation and provides another possible implementation of the level transform operation.

[0033] With reference to the first aspect, in some implementations of the first aspect, performing the level transform operation on the first first chip comprises copying a level value of a last first chip included in the first symbol, and determining the level value of the first first chip as the level value of the last first chip.

[0034] The above scheme describes one possible implementation of directly performing the level transform operation on the first first chip. This scheme is simple in operation and provides another possible implementation of the level transform operation.

[0035] With reference to the first aspect, in some implementations of the first aspect, the partial first chips further include a second first chip in the first symbol; and performing the level transform operation on the partial first chips included in the first symbol further comprises performing the level transform operation on the second first chip to obtain a second second chip of the at least two second chips.

[0036] Based on the first second chip and the second second chip obtained by transforming the first first chip and the second first chip, a second symbol including a second CP can be determined. This scheme is simple in operation and provides another possible implementation of the level transform operation.

[0037] With reference to the first aspect, in some implementations of the first aspect, the level transform operation on the second first chip comprises: copying a level value of a second last first chip included in the first symbol, and determining the level value of the second second chip as the level value of the second last first chip.

[0038] The above solution describes a possible implementation of directly performing a level transform operation on the second first chip. The solution is simple in operation and provides another possible implementation of the level transform operation.

[0039] With reference to the first aspect, in some implementations of the first aspect, the determining the second symbol comprises: determining the second symbol in a case where the following conditions are met: the number of the first chips included in the first symbol is a plurality; and the level of the first first chip in the first symbol is different from the level of the last first chip in the first symbol.

[0040] The above restriction condition describes a specific communication scenario in which the first device needs to determine the second symbol, avoiding performing a level transform operation on the first symbol to determine the second symbol in unnecessary cases. The above restriction condition is beneficial to reduce the consumption of computing resources and improve system performance.

[0041] With reference to the first aspect, in some implementations of the first aspect, a sum of the second CP and a length of the first second chip is equal to lengths of other chips in the at least two second chips.

[0042] Optionally, after the second cyclic prefix (CP) is added before the first second chip in the second symbol, the length of the first second chip can also be appropriately shortened, so that the sum of the second CP and the length of the first second chip is equal to the lengths of the other chips in the at least two second chips. The advantage of this method is that it can make the structure of the second symbol simpler, reduce the complexity of demodulating the carrier signal by the second device, and improve the efficiency of signal demodulation.

[0043] With reference to the first aspect, in some implementations of the first aspect, the carrier signal is used to transmit a preamble sequence.

[0044] The above signal transmission method can not only be applied to the transmission of the carrier signal, but also be applied to the transmission of a preamble sequence (preamble) and other similar communication scenarios. This solution further expands the application range of the signal transmission method and improves the transmission efficiency of the system.

[0045] In a second aspect, a signal transmission method is provided, which can be executed by a signal receiving end or a chip or circuit in the signal receiving end. The method comprises: receiving a carrier signal based on a second symbol; the second symbol comprises at least two second chips, and a first second chip in the at least two second chips has a same level as a last second chip in the at least two second chips.

[0046] With reference to the second aspect, in some implementations of the second aspect, the second symbol is obtained by splitting all or part of first chips comprised in a first symbol and performing a level conversion operation on the split chips; or the second symbol is obtained by performing a level conversion operation on part of the first chips comprised in the first symbol.

[0047] With reference to the second aspect, in some implementations of the second aspect, the all or part of the first chips comprises a last first chip in the first symbol; and the second symbol is obtained by splitting the last first chip and performing a level conversion operation on the split chips.

[0048] With reference to the second aspect, in some implementations of the second aspect, the all or part of the first chips further comprises a first first chip in the first symbol; and the second symbol is obtained by splitting the first first chip and performing a level conversion operation on the split chips.

[0049] With reference to the second aspect, in some implementations of the second aspect, the all or part of the first chips comprises all first chips in the first symbol; and the second symbol is obtained by splitting the all first chips and performing a level conversion operation on the split chips.

[0050] With reference to the second aspect, in some implementations of the second aspect, the part of the first chips comprises a last first chip in the first symbol; and the second symbol is obtained by performing a level conversion operation on the last first chip.

[0051] With reference to the second aspect, in some implementations of the second aspect, the part of the first chips further comprises a second last first chip in the first symbol; and the second symbol is obtained by performing a level conversion operation on the second last first chip.

[0052] With reference to the second aspect, in some implementations of the second aspect, the part of the first chips comprises a first first chip in the first symbol; and the second symbol is obtained by performing a level conversion operation on the first first chip.

[0053] In some embodiments of the second aspect, the second symbol is obtained in a case that: a number of first chips included in the first symbol is a plurality; and a level of a first first chip in the first symbol is different from a level of a last first chip in the first symbol.

[0054] In some embodiments of the second aspect, the second symbol further comprises a second cyclic prefix (CP), and a level of the second CP is the same as the level of the last second chip.

[0055] In some embodiments of the second aspect, a sum of the second CP and a length of the first second chip is equal to lengths of other chips in the at least two second chips.

[0056] In some embodiments of the second aspect, the level transformation operation is predefined or configured by signaling.

[0057] In some embodiments of the second aspect, the carrier signal is used to transmit a preamble sequence.

[0058] In addition, the technical effects of the signal transmission method of the second aspect can refer to the technical effects of the signal transmission method of the first aspect, which will not be repeated here.

[0059] In a third aspect, a signal transmission apparatus is provided, which is configured to perform the method in any possible implementation manner of the first aspect or the second aspect. Specifically, the apparatus comprises units / modules for performing the method in any possible implementation manner of the first aspect or the second aspect.

[0060] In a fourth aspect, the present application provides another signal transmission apparatus, which comprises a processor coupled with a memory, and is configured to execute instructions in the memory to implement the method in any possible implementation manner of the first aspect or the second aspect. Optionally, the signal transmission apparatus further comprises the memory. Optionally, the signal transmission apparatus further comprises a communication interface, and the processor is coupled with the communication interface.

[0061] In an implementation manner, the signal transmission apparatus is a terminal device (for example, an Ambient IoT device). When the signal transmission apparatus is a terminal device, the communication interface can be a transceiver, or an input / output interface.

[0062] In another implementation manner, the signal transmission apparatus is a chip configured in a terminal device (for example, an Ambient IoT device). When the signal transmission apparatus is a chip configured in a terminal device, the communication interface can be an input / output interface.

[0063] In an implementation, the signal transmitting apparatus is a network device. When the signal transmitting apparatus is a network device, the communication interface can be a transceiver, or an input / output interface.

[0064] In another implementation, the signal transmitting apparatus is a chip configured in the network device. When the signal transmitting apparatus is a chip configured in the network device, the communication interface can be an input / output interface.

[0065] In a fifth aspect, a processor is provided, including an input circuit, an output circuit and a processing circuit. The processing circuit is configured to receive a signal through the input circuit and transmit a signal through the output circuit, so that the processor performs the method in any possible implementation of the first aspect or the second aspect.

[0066] In a specific implementation, the processor can be a chip, the input circuit can be an input pin, the output circuit can be an output pin, and the processing circuit can be a transistor, a gate circuit, a flip-flop, various logic circuits, etc. The input signal received by the input circuit can be received and input by, for example but not limited to, a receiver, the output signal output by the output circuit can be output to and transmitted by, for example but not limited to, a transmitter, and the input circuit and the output circuit can be the same circuit which is used as the input circuit and the output circuit at different times. The embodiments of the present application do not limit the specific implementation of the processor and various circuits.

[0067] In a sixth aspect, a processing apparatus is provided, including a processor and a memory. The processor is configured to read instructions stored in the memory, and can receive a signal through a receiver and transmit a signal through a transmitter, to perform the method in any possible implementation of the first aspect or the second aspect.

[0068] Optionally, the processor is one or more, and the memory is one or more.

[0069] Optionally, the memory can be integrated with the processor, or the memory and the processor are separately arranged.

[0070] In a specific implementation, the memory can be a non-transitory memory, for example, a read only memory (ROM), which can be integrated on the same chip with the processor, or arranged on different chips respectively. The embodiments of the present application do not limit the type of the memory and the arrangement of the memory and the processor.

[0071] It should be understood that the relevant data interaction process, for example, sending indication information, can be a process of outputting indication information from the processor, and receiving capability information can be a process of receiving input capability information by the processor. Specifically, the processed output data can be output to the transmitter, and the input data received by the processor can come from the receiver. Among them, the transmitter and the receiver can be collectively referred to as a transceiver.

[0072] The processing device in the sixth aspect described above can be a chip, and the processor can be implemented by hardware or software. When implemented by hardware, the processor can be a logic circuit, an integrated circuit, etc. When implemented by software, the processor can be a general-purpose processor, which is implemented by reading software codes stored in a memory. The memory can be integrated in the processor or exist independently outside the processor.

[0073] In a seventh aspect, a computer program product is provided, which includes a computer program (also referred to as code or instructions), which, when executed, causes a computer to perform the method in any possible implementation manner of the first aspect or the second aspect.

[0074] In an eighth aspect, a computer-readable storage medium is provided, which stores a computer program (also referred to as code or instructions), which, when executed on a computer, causes the computer to perform the method in any possible implementation manner of the first aspect or the second aspect. BRIEF DESCRIPTION OF DRAWINGS

[0075] FIG. 1 is a schematic diagram of the connection scale of Internet of Things in different categories provided by the embodiments of the present application;

[0076] FIG. 2 is a schematic diagram of the architecture of a communication system provided by the embodiments of the present application;

[0077] FIG. 3 is a schematic diagram of the architecture of another communication system provided by the embodiments of the present application;

[0078] FIG. 4 is a schematic diagram of the architecture of another communication system provided by the embodiments of the present application;

[0079] FIG. 5 is a schematic diagram of the architecture of another communication system provided by the embodiments of the present application;

[0080] FIG. 6 is a flowchart of a specific implementation of adding CP to the OFDM symbol modulated by the OOK-1 modulation mode;

[0081] FIG. 7 is a flowchart of a specific implementation of adding CP to the OFDM symbol modulated by the OOK-4 modulation mode;

[0082] FIG. 8 is a flowchart of a specific implementation of adding CP to the OFDM symbol modulated by the OOK-4 modulation mode;

[0083] FIG. 9 is a flow diagram of a signal transmission method according to an embodiment of the present application;

[0084] FIG. 10 is a diagram of a possible level conversion operation according to an embodiment of the present application;

[0085] FIG. 11 is a diagram of another possible level conversion operation according to an embodiment of the present application;

[0086] FIG. 12 is a diagram of another possible level conversion operation according to an embodiment of the present application;

[0087] FIG. 13 is a diagram of another possible level conversion operation according to an embodiment of the present application;

[0088] FIG. 14 is a diagram of another possible level conversion operation according to an embodiment of the present application;

[0089] FIG. 15 is a diagram of another possible level conversion operation according to an embodiment of the present application;

[0090] FIG. 16 is a diagram of another possible level conversion operation according to an embodiment of the present application;

[0091] FIG. 17 is a schematic block diagram of a signal transmission apparatus according to an embodiment of the present application;

[0092] FIG. 18 is a schematic block diagram of another signal transmission apparatus according to an embodiment of the present application. DETAILED DESCRIPTION

[0093] The technical solutions in the present application will be described below with reference to the accompanying drawings.

[0094] In order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, the same items or similar items with basically the same functions and effects are distinguished by using "first", "second", etc. The skilled in the art can understand that "first", "second", etc. do not limit the quantity and execution order, and "first", "second", etc. also do not necessarily mean different.

[0095] It should be noted that in the present application, "exemplarily" or "for example" and the like are used to represent as an example, illustration or description. Any embodiment or design scheme described as "exemplarily" or "for example" in the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. Rather, the use of "exemplarily" or "for example" and the like is intended to present the relevant concept in a specific manner.

[0096] In addition, "at least one" means one or more, "multiple" means two or more. "And / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character " / " generally represents that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items. For example, at least one of a, b and c can mean: a, or b, or c, or a and b, or a and c, or b and c, or a, b and c, where a, b and c can be single or multiple.

[0097] In order to make the person skilled in the art more clearly understand the scheme of the present application, the application scene of the technical scheme of the present application will be described below in combination with FIG. 1 to FIG. 4.

[0098] With the development of Internet of Things (IoT) technology, it has been agreed that the three different speed gears of Internet of Things nodes are high-speed Internet of Things, medium-speed Internet of Things and low-speed Internet of Things. Among them, high-speed Internet of Things is mainly carried by 5th-Generation (5G) Enhanced Mobile Broadband (eMBB), Category.4+ (Cat.4+), Wi-Fi 6 and other technologies, medium-speed Internet of Things is currently mainly carried by 4G Cat.1, 3G, 2G and other technologies, and low-speed Internet of Things is mainly carried by Narrowband-Internet of Things (NB-IoT), Long Range Wide Area Network (LoRaWAN), Bluetooth Low Energy (BLE) and other technologies. Different speeds also correspond to different power consumption levels, forming three major categories of scenes, and also facing three different orders of magnitude of Internet of Things connection numbers.

[0099] FIG. 1 is a schematic diagram of the scale of Internet of Things connection of different categories provided by the embodiments of the present application. FIG. 1 describes the current three main categories of Internet of Things scenarios: high-speed Internet of Things, medium and low-speed Internet of Things supporting one billion connections, and narrowband Internet of Things supporting ten billion connections. FIG. 1 also describes the passive Internet of Things that can support one hundred billion connections in the future. In the current main Internet of Things scenarios, low-speed Internet of Things standards such as NB-IoT, LoRaWAN, BLE, etc. can support ten billion connections, and the connection scale brought by medium-speed Internet of Things standards and high-speed Internet of Things standards is much lower than that of low-speed Internet of Things. On the basis of the above three categories of Internet of Things scenarios, the Ambient IoT category will become the main source of one hundred billion Internet of Things connections.

[0100] The main application scenarios of Ambient IoT include, but are not limited to, industrial sensor networks, logistics and warehousing, smart wearable devices, medical health, smart home, etc., which are described in detail below.

[0101] Industrial sensor networks: Industrial sensor networks are mainly applied in industrial production processes, such as temperature and humidity monitoring, vibration monitoring, and production line monitoring, etc., so as to realize industrial automation and intelligent management. Taking rail measurement as an example, by deploying zero-power sensing devices under the rail, the rail pressure, temperature and other information can be monitored and collected. In addition, related devices can also be deployed in extreme environments such as high and low temperature, mobile or rotating parts, high vibration conditions, and high humidity, where batteries cannot last long.

[0102] Logistics and warehousing: With the continuous growth of the logistics industry, the pressure on enterprise warehousing and labor costs is increasing. Digital management of logistics packages can not only further improve the efficiency of logistics and warehousing management, but also save high labor costs. Zero-power communication technology attaches a communication terminal identifier to the surface of the package or the packaging of goods for logistics information acquisition and management of the entire logistics process, making warehousing operations more simple and efficient.

[0103] Smart wearable devices: Smart wearable devices are one of the most potential personal consumer terminals for large-scale application after mobile phones, and various wearable devices have achieved wireless connection. According to the functional positioning of different products, health monitoring, motion monitoring, mobile sensing, mobile positioning and other multi-scenario applications can be realized. The goal of zero-power communication technology is to ultimately break free from battery constraints, achieve longer battery life, more convenient energy security, and better user experience.

[0104] Medical health: portable medical devices can meet the needs of consumers for home health services, but due to the particularity of medical monitoring devices (especially human implantable devices), the problems of endurance and power carrying greatly limit the expansion of its application scenarios. Through zero-power Internet of Things technology, very low power consumption can be achieved; at the same time, without battery, the volume can be reduced, which is conducive to the realization of flexible folding, and there is no need to worry about liquid immersion, which will help real-time monitoring of medical device data and efficient digital management of health status.

[0105] Smart home: in the field of smart home, zero-power communication technology can be applied to get rid of complex wiring, enable each terminal to be independently controlled, and realize long-endurance online without human energy intervention.

[0106] Traditional radio frequency identification (RFID) is a passive Internet of Things technology, which realizes non-contact bidirectional data communication through wireless radio frequency, reads and writes the recording medium (electronic tag or radio frequency card) through wireless radio frequency, so as to achieve the purpose of identifying target and data exchange. However, this technology cannot manage interference, does not support mobility, and the coverage distance is only about 10m, so it is difficult to support the use demand of hundreds of billions of scale in the future. Therefore, the 3rd Generation Partnership Project (3GPP) is discussing the formulation of passive Internet of Things technology based on cellular communication. On the one hand, it can reduce costs by using existing large-scale cellular infrastructure, and on the other hand, it can also use many mature technologies of cellular communication to improve the coverage range of passive Internet of Things, such as interference management, mobility management and other technologies.

[0107] The architecture of the communication system in the embodiments of the present application will be introduced below.

[0108] FIG. 2 is a schematic diagram of the architecture of a communication system 200 provided by the embodiments of the present application.

[0109] The communication system 200 includes a network device 201, a terminal device 202 and an auxiliary node 203. The auxiliary node 203 can be a relay, a user equipment (UE), an integrated access and backhaul (IAB) node, a repeater, etc., and has the capability of environmental Internet of Things. In the uplink transmission process, the terminal device 202 can send uplink data to the network device 201 through the auxiliary node 203. The communication method proposed in the embodiments of the present application can be applied to the communication system described in FIG. 2.

[0110] FIG. 3 is a schematic diagram of the architecture of another communication system 300 provided by the embodiments of the present application.

[0111] The communication system 300 includes the network device 201, the terminal device 202 and the Ambient IoT device 204.

[0112] The Ambient IoT device 204 can be configured to receive the excitation signal or the backscattering signal.

[0113] Optionally, the Ambient IoT device 204 can not be a power storage device and can not independently generate or amplify the signal.

[0114] Optionally, the Ambient IoT device 204 can be a power storage device but can not independently generate or amplify the signal.

[0115] Optionally, the Ambient IoT device 204 can be a power storage device and can independently generate or amplify the signal.

[0116] Optionally, the Ambient IoT device 204 is a capacitor or a super capacitor. The communication method provided in the embodiments of the present application can be applied to the communication system shown in FIG. 3.

[0117] FIG. 4 is a schematic diagram of another communication system 400 provided by the embodiments of the present application.

[0118] The communication system 400 includes the network device 201 and the Ambient IoT device 204. The communication method provided in the embodiments of the present application can be applied to the communication system shown in FIG. 4.

[0119] FIG. 5 is a schematic diagram of another communication system 500 provided by the embodiments of the present application.

[0120] The communication system 500 includes the terminal device 202 and the Ambient IoT device 204. In the communication system, the terminal device 202 is a device deployed in a wireless access network to provide wireless communication function for the Ambient IoT device 204. The communication method provided in the embodiments of the present application can be applied to the communication system shown in FIG. 5.

[0121] The signal transmission method provided in the embodiments of the present application can be applied to a 3GPP related cellular communication system, for example, a 4G communication system such as a long term evolution (LTE) communication system, a 5G communication system such as a 5G new radio (NR) communication system, or various future communication systems.

[0122] The signal transmission method provided by the embodiments of the present application can also be applied to a Bluetooth system, a Wi-Fi system, a LoRa system or a vehicle networking system, support a communication system of multiple wireless technology fusion, a device-to-device (D2D) system. The method provided by the embodiments of the present application can also be applied to a satellite communication system. The satellite communication system can be fused with the above communication system. The wireless communication system involved in the present application also includes but is not limited to: a narrowband-internet of things (NB-IoT) system, a global system for mobile communications (GSM) system, an enhanced data rate for GSM evolution (EDGE) system, a wideband code division multiple access (WCDMA) system, a code division multiple access (CDMA2000) system or a time division-synchronization code division multiple access (TD-SCDMA) system.

[0123] The network device 201 can be an access network device of a 3GPP related cellular system. For example, a 4G mobile communication system or a 5G mobile communication system. The network device can also be an access network device in an open access network (O-RAN or ORAN) or a cloud radio access network (CRAN). Alternatively, the network device can also be an access network device in a communication system obtained by fusing two or more of the above communication systems.

[0124] The network device 201 includes, but is not limited to, an evolved Node B (eNB), a radio network controller (RNC), a Node B (NB), a base station controller (BSC), a base transceiver station (BTS), a home base station (for example, a home eNodeB, or home NB, HNB), a baseband unit (BBU), an access point (AP) in a wireless fidelity (WiFi) system, a macro base station, a micro base station, a wireless relay node, a donor node, a radio controller in a CRAN scenario, a wireless backhaul node, a transmission point (TP), or a transmission and receiving point (TRP). The network device can also be an access network device in a 5G mobile communication system. For example, a next generation NodeB (gNB), a TRP, a TP, or one or a group (including multiple antenna panels) of antenna panels of a base station in a new radio (NR) system, or a base station in a 5G mobile communication system. Alternatively, the network device can also be a network node that constitutes a gNB or a transmission point. For example, a centralized unit (CU), a distributed unit (DU), a CU-control plane (CP), a CU-user plane (UP), or a radio unit (RU), etc. The CU and the DU can be separately arranged, or can be included in the same network element. For example, a BBU. The RU can be included in a radio frequency device or a radio frequency unit. For example, in a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH). Alternatively, the network device can also be a server, a wearable device, a vehicle or a vehicle-mounted device, etc. For example, in a V2X technology, the network device can be a road side unit (RSU).

[0125] It should be noted that the network device can be the device or apparatus shown above, or a component (for example, a chip), a module, or a unit in the device or apparatus shown above, and the present application does not make any limitation.

[0126] The terminal device 202 can also be referred to as a user equipment (UE), a mobile station (MS), a mobile terminal (MT), etc., and is a device that provides voice or data connectivity to a user, and specifically includes a device that provides voice to a user, or a device that provides data connectivity to a user, or a device that provides both voice and data connectivity to a user. For example, it can include a handheld device having wireless connection capability, or a processing device connected to a wireless modem. The terminal device can communicate with a core network via a radio access network (RAN), exchange voice or data with the RAN, or interact with voice and data with the RAN. Currently, the terminal device can be a mobile phone, a tablet computer, a notebook computer, a palm computer, a mobile internet device (MID), a wearable device (e.g., a smart watch, a smart bracelet, a pedometer, etc.), a vehicle-mounted device (e.g., a car, a bicycle, an electric vehicle, an airplane, a ship, a train, a high-speed rail, etc.), a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a smart home device (e.g., a refrigerator, a television, an air conditioner, an electricity meter, etc.), a smart robot, a workshop device, a wireless terminal in unmanned driving, a wireless terminal in remote surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, or a wireless terminal in a smart home, a flight device (e.g., a smart robot, a hot air balloon, a drone, an airplane), etc. The terminal device can also be other devices with terminal functions, for example, the terminal device can also be a device that plays a terminal function in D2D communication.The terminal device can also include a vehicle to everything (V2X) terminal device, a machine to machine / machine-type communications (M2M / MTC) terminal device, an internet of things (IoT) terminal device, a light terminal device, a reduced capability UE (REDCAP UE), a subscriber unit, a subscriber station, a mobile station, a remote station, an access point (AP), a remote terminal, an access terminal, a user terminal, a user agent, or a user device, a drone device, etc. For example, it can include a mobile phone (or called "cellular" phone), a computer with a mobile terminal device, a portable, pocket, handheld, built-in computer mobile device, etc. For example, personal communication service (PCS) phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), etc. It also includes limited devices, such as devices with lower power consumption, or devices with limited storage capacity, or devices with limited computing capacity, etc. For example, it includes information sensing devices such as bar code, radio frequency identification (RFID), sensor, global positioning system (GPS), laser scanner, etc. In this application, the terminal device with wireless transceiver function and the chip that can be provided in the terminal device are collectively referred to as terminal device.

[0127] It should be noted that the terminal device can be a device or apparatus with a chip, or a device or apparatus integrated with a circuit, or a chip, module or control unit in the above-mentioned devices or apparatus, and the specific application is not limited.

[0128] In the process of sending a signal, the sending end of the signal can first encode the digital signal (i.e., the original information bit) to be sent to obtain encoded information bits, then modulate the encoded information bits by using an on-off keying (OOK) modulation mode, modulate the encoded information bits to an orthogonal frequency division multiplexing (OFDM) waveform to obtain an OOK-modulated carrier signal, and finally send the carrier signal. After receiving the carrier signal, the receiving end can demodulate and decode the carrier signal to recover the digital signal.

[0129] Next, the on-off keying (OOK) modulation mode will be described in detail in combination with FIGS. 6 to 8. The OOK modulation mode mainly includes OOK-1 and OOK-4.

[0130] FIG. 6 is a flowchart of modulating an OFDM symbol by using the OOK-1 modulation mode.

[0131] FIG. 6 describes an OFDM symbol after OOK-1 modulation from the perspective of the frequency domain. The OFDM symbol contains only one bit. First, the sending end device modulates the subcarriers based on the information bit to be transmitted. When the subcarrier for the Ambient IoT is 1, i.e., OOK = 1, it means that all subcarriers have been modulated. When the subcarrier for the Ambient IoT is 0, i.e., OOK = 0, all subcarriers are zero power consumption. Through inverse fast fourier transform (IFFT) and adding a cyclic prefix (CP), a modulated OFDM symbol is obtained.

[0132] FIG. 7 is a flowchart of modulating an OFDM symbol by using the OOK-4 modulation mode. The OOK-4 modulation mode will be described in combination with FIG. 7.

[0133] FIG. 7 describes an OFDM symbol after OOK-4 modulation from the perspective of the time domain, which transforms M-bit OOK in the time domain. The number of chips M = 4 in the figure, i.e., one OFDM symbol contains four bits, i.e., four chips. After generating the signal, the sending end device can modify the signal or not. Further, the sending end device generates N subcarrier information in the frequency domain by using discrete fourier transform (DFT) or least square transform. M-bit OOK also generates N' samples. If the sending end device does not truncate or otherwise modify the signal, N' = N.

[0134] As can be seen from FIG. 6 and FIG. 7, the modulation mode adopted by Ambient IoT is divided into two types: OOK-1 and OOK-4. And in the case of OOK-4, it is further divided into several different scenarios such as M = 1, 2, 4, 8, etc.

[0135] The OFDM symbol after OOK modulation can carry out the transmission of the carrier signal. When the network device and the terminal device (for example, Ambient IoT device) communicate, the unreasonable rising / falling edge in the modulated carrier signal of the sending end will affect the demodulation performance of the receiving end, especially for the Ambient IoT device with poor demodulation capability. Specifically, for an OFDM symbol, in order to reduce the inter-symbol interference and ensure the orthogonality between each subcarrier, a cyclic prefix CP needs to be added to the OFDM symbol.

[0136] FIG. 8 is a flow diagram of a specific implementation of adding CP to the OFDM symbol after OOK modulation. The adding process will be described below in combination with FIG. 8.

[0137] An OFDM symbol shown in FIG. 8 contains two chips after OOK modulation, that is, the number of chips M = 2. In order to reduce the inter-symbol interference and ensure the orthogonality between each subcarrier, a CP needs to be added to the OFDM symbol. The specific adding method is: first, determine the length of the CP to be added; then copy the part of the chip with the length from the last chip (i.e., the second chip) and add the part of the chip as CP before the first chip.

[0138] However, the level of the cyclic prefix in the OFDM symbol after adding the cyclic prefix CP is inconsistent with the level of the first chip in the OFDM symbol, that is, the unreasonable rising / falling edge in the modulated carrier signal. The role of adding the cyclic prefix CP is to solve the problem of channel interference, and the CP itself does not carry any information. However, in a possible scenario, the Ambient IoT device receives the carrier signal including the above OFDM symbol, and the Ambient IoT device needs to demodulate the OFDM symbol. Since the level of the cyclic prefix CP is 0 and the level of the first chip in the OFDM symbol is 1, this unreasonable rising edge causes the Ambient IoT device to demodulate the wrong signal according to the level information of the CP in the demodulation process, which reduces the spectral efficiency.

[0139] Therefore, the signal transmission method and the signal transmission device are provided. The level transformation operation is performed on the chips included in the to-be-sent symbol, so as to ensure that the level of the first chip and the level of the last chip in at least two chips in the symbol carrying the carrier signal are the same. The method can avoid unreasonable rising / falling edges in the OOK modulation scenario, and improve the demodulation performance of the signal.

[0140] The signal transmission method and the signal transmission device provided by the present application will be described in detail below with reference to the accompanying drawings. It should be understood that the technical solutions of the present application can be applied to a wireless communication system, for example, the communication system 200, 300, 400 or 500 shown in any one of FIGS. 2-5. For example, in FIG. 2, the sending end of the signal can be the network device 201, and the receiving end of the signal can be the terminal device 202. In FIG. 3, the sending end of the signal can be the terminal device 202, and the receiving end of the signal can be the Ambient IoT device 204. In FIG. 4, the sending end of the signal can be the Ambient IoT device 204, and the receiving end of the signal can be the network device 201. In FIG. 5, the sending end of the signal can be the Ambient IoT device 204, and the receiving end of the signal can be the terminal device 202. At least two communication devices in the wireless communication system can have a wireless communication connection relationship.

[0141] In the following, without loss of generality, the interaction process between the first device and the second device is taken as an example to describe the signal transmission method provided by the embodiments of the present application in detail. The first device is the sending end device of the signal, and the second device is the receiving end device of the signal. For example, in downlink transmission, the first device can be a network device, or a chip configured in the network device. The second device can be a terminal device, for example, an Ambient IoT device, or a chip configured in the Ambient IoT device. In uplink transmission, the first device can be a terminal device, for example, an Ambient IoT device, or a chip configured in the Ambient IoT device. The second device can be a network device, or a chip configured in the network device. The number of first devices can be one or more, and the number of second devices can be one or more, which are not limited by the embodiments of the present application.

[0142] FIG. 9 is a schematic diagram of a signal transmission method 900 provided by an embodiment of the present application. The method 900 can be applied to the communication system 200, 300, 400 or 500 shown in any one of FIGS. 2-5, and can also be applied to other communication systems, which are not limited by the embodiments of the present application. The method 900 includes the following steps:

[0143] S901, the first device performs a level conversion operation on the first chips included in the first symbol to determine a second symbol.

[0144] The second symbol includes at least two second chips, and a level of a first second chip in the at least two second chips is the same as a level of a last second chip in the at least two second chips.

[0145] S902, the first device transmits a carrier signal based on the second symbol. Correspondingly, the second device receives the carrier signal based on the second symbol.

[0146] S903, the second device demodulates the carrier signal to obtain modulation information.

[0147] Therefore, the signal transmission method of the embodiments of the present application can perform a level conversion operation on the first chips included in the first symbol to obtain the second symbol, and always ensure that the level of the first chip and the level of the last chip in the obtained second chips are the same. This method can improve the performance of signal demodulation and improve the spectral efficiency.

[0148] Further, the second symbol further includes a second cyclic prefix (CP), and a level of the second CP is the same as the level of the last second chip.

[0149] In order to reduce the interference between symbols and ensure the orthogonality between subcarriers, a second CP needs to be added in the second symbol. First, the length of the cyclic prefix CP to be added is determined, a part of chips of the above length is copied from the last second chip, and the part of chips is added as the second CP before the first second chip. This method can effectively reduce the interference between symbols, while ensuring the orthogonality between subcarriers, thereby reducing the signal interference between subcarriers and improving the transmission performance. Further, the level of the second CP added based on the last second chip in the second symbol is always the same as the level of the first second chip in the second symbol, that is, at the connection between the second CP and the first chip, the carrier signal will not appear unreasonable rising / falling edge. This method is beneficial to ensure that the level of the cyclic prefix CP is the same as the level of the first chip in the OFDM symbol in the OOK modulation scenario, which can improve the correctness of signal transmission and improve the spectral efficiency.

[0150] In the above signal transmission method, the level conversion operation is predefined or configured through signaling.

[0151] The first device obtains the second symbol by performing a level transform operation on the first chips included in the first symbol, and transmits a carrier signal based on the second symbol. After the second device receives the carrier signal based on the second symbol, the second device needs to demodulate the carrier signal. Therefore, the second device needs to know how the first device obtains the second symbol by performing the level transform operation on the first chips included in the first symbol. The level transform operation can be predefined in a communication protocol or configured through signaling.

[0152] In a possible scenario, the first device transmits radio resource control (RRC) signaling carrying a field describing the level transform operation. The field describing the level transform operation can be an index or information bits. For example, the first device transmits RRC signaling carrying a field describing the level transform operation. In the field, 00 indicates that the first device does not perform the level transform operation on the first symbol, and 01 indicates that the first device performs the level transform operation on the first symbol. After the second device receives the RRC signaling, the second device can further analyze the specific level transform manner performed by the first device on the first symbol, perform an inverse operation of the level transform operation on the second symbol, restore the second symbol to the first symbol, and then demodulate the signal based on the first symbol. Alternatively, after the second device receives the RRC signaling, the second device analyzes the specific level transform manner performed by the first device on the first symbol, and directly demodulates the signal based on the second symbol.

[0153] Both the above two schemes can enable the second device to learn the specific level transform operation performed by the first device on the first symbol, thereby improving the demodulation performance and providing different implementation manners for information synchronization about the level transform operation between the first device and the second device.

[0154] In a possible implementation manner, the first device performing the level transform operation on the first chips included in the first symbol includes: the first device splitting all or part of the first chips included in the first symbol, and performing the level transform operation on the chips obtained after the splitting; or the first device performing the level transform operation on part of the first chips included in the first symbol.

[0155] It should be understood that, to ensure that the level of the first second chip in the second symbol is the same as the level of the last second chip in the second symbol, the first device needs to perform the level transform operation on the first chips included in the first symbol. The level transform operation includes two manners: manner 1, the first device splits all or part of the first chips included in the first symbol, and performs the level transform operation on the chips obtained after the splitting; and manner 2, the first device directly performs the level transform operation on part of the first chips included in the first symbol.

[0156] It should also be understood that, for the above-mentioned manner 1, all or part of the first chips included in the first symbol are split. The chip splitting is not a physical splitting of the chips, but a transformation of the first chips in a virtual manner. The first device splits any one first chip to obtain two parts, and the sum of the lengths of the two parts is equal to the length of the first chip before splitting. Further, the first device performs a level transformation operation on the split chips to ensure that the level of the first second chip in the obtained second symbol is the same as the level of the last second chip.

[0157] For the above-mentioned manner 2, the first device directly performs a level transformation operation on part of the first chips included in the first symbol. In this scenario, the first chips do not need to be split, but a level transformation operation is directly performed to ensure that the level of the first second chip in the obtained second symbol is the same as the level of the last second chip. This manner is simpler, and can reduce the complexity of the operation of the first device and the second device, and reduce the consumption of computing resources.

[0158] The first device can perform a level transformation operation on the first chips included in the first symbol by the above-mentioned two manners, effectively ensuring that the level of the first second chip in the obtained second symbol is the same as the level of the last second chip. The above-mentioned two manners improve the spectral efficiency, and provide a flexible implementation manner for the level transformation operation.

[0159] The possible level transformation operation methods provided by the present application will be described in detail below with reference to the accompanying drawings. It should be understood that the level transformation operation of the present application can be applied to various different scenarios corresponding to the OOK modulation manner in the OFDM system. For example, the scenario can be that the OFDM symbol is modulated by using the OOK-1 or OOK-4 modulation manner, and the embodiments of the present application are not limited thereto.

[0160] As an optional embodiment, the first device splits all or part of the first chips included in the first symbol, and performs a level transformation operation on the split chips, including: the first device splits each of the all or part of the chips into two parts, and the level distribution of the two parts is level 0 and level 1, or the level distribution of the two parts is level 1 and level 0.

[0161] It should be understood that the above level conversion operation is a possible implementation of the level conversion operation in the above-described manner 1, i.e., the first device performs the level conversion operation in the manner 1 on each of the all or part of the chips in the same way as Manchester coding. In this method, the first device performs the level conversion operation on a first chip to obtain two parts, and the level distribution of the two parts can be 0 and 1, or 1 and 0, as long as the level of the first second chip in the obtained second symbol is the same as the level of the last second chip.

[0162] Alternatively, there are other possible implementations of the level conversion operation in the manner 1, i.e., the first device can also perform the level conversion operation in the manner 1 on each of the all or part of the chips in the same way as other coding methods. For example, under the premise that the level of the first second chip in the obtained second symbol is the same as the level of the last second chip, the first device can also perform the level conversion operation in the manner 1 on each of the all or part of the chips in the same way as other coding methods such as pulse interval encoding (PIE), Miller coding, differential binary phase (DBP), and the like, which are not limited in the embodiments of the present application.

[0163] As an optional embodiment, in the above-described manner 1, the all or part of the first chips can include the last first chip in the first symbol. The first device splits the all or part of the first chips included in the first symbol, and performs the level conversion operation on the chips obtained after the splitting, including: the first device splits the last first chip, and performs the level conversion operation on the chips obtained after the splitting.

[0164] The following takes M=2 as an example and is described in conjunction with FIG. 10.

[0165] FIG. 10 is a schematic diagram of a possible level conversion operation provided by an embodiment of the present application. The first symbol shown in FIG. 10 includes two first chips obtained by OOK modulation. The level of the first first chip is 1, and the level of the second first chip (i.e., the last first chip) is 0. In this scenario, when the first CP is added to the first symbol, part of the chips are copied from the second first chip, and the part of the chips is added as the first cyclic prefix CP before the first first chip. Since the levels of the first first chip and the last first chip are different, it will cause errors in signal demodulation of the second device, and reduce the spectral efficiency.

[0166] Therefore, the first device performs the level conversion operation on the first symbol, specifically, the first device performs the level conversion operation on the last first chip in the first symbol. The first device splits the last first chip into two parts. As mentioned above, the level distribution of the two parts can be level 0 and level 1, or level 1 and level 0. Since the level of the first chip in the first symbol shown in FIG. 10 is 1, in order to ensure that the level of the first second chip in the obtained second symbol is the same as the level of the last second chip, the level distribution of the two parts can only be 0 and 1.

[0167] Based on the two parts obtained by splitting the last first chip and the remaining first chip, further, the first device can determine the second symbol including the second CP. There is no unreasonable rising / falling edge in the second symbol, therefore, the first device and the second device perform the transmission of the carrier signal based on the second symbol, which can effectively improve the accuracy of signal demodulation and improve the spectral efficiency.

[0168] As an optional embodiment, in the above-mentioned manner 1, the all or part of the first chips can further include the first first chip in the first symbol. The first device splits the all or part of the first chips included in the first symbol, and performs the level conversion operation on the chips obtained by splitting, and further includes that the first device splits the first first chip, and performs the level conversion operation on the chips obtained by splitting.

[0169] Taking M=2 as an example, the above is described in combination with FIG. 11.

[0170] FIG. 11 is a schematic diagram of another possible level conversion operation provided by an embodiment of the present application. The first symbol shown in FIG. 11 includes two first chips obtained by OOK modulation. The level of the first first chip is 1, and the level of the second first chip (i.e., the last first chip) is 0. In this scenario, when the first CP is added to the first symbol, as mentioned above, it will cause the error of signal demodulation of the second device, and reduce the spectral efficiency.

[0171] Therefore, the first device performs the level conversion operation on the first symbol, specifically, the first device performs the level conversion operation on the first chip and the last first chip in the first symbol. The first device splits the first first chip into two parts, and also splits the last first chip into two parts. As mentioned above, the level distribution of the two parts obtained by splitting the first first chip can be level 0 and level 1, or level 1 and level 0; the level distribution of the two parts obtained by splitting the last first chip can also be level 0 and level 1, or level 1 and level 0.

[0172] In order to ensure that the level of the first second chip in the obtained second symbol is the same as the level of the last second chip, there are two cases for the level distribution of the two parts obtained by splitting: if the level distribution of the two parts obtained by splitting the first first chip is level 0 and level 1, then the level distribution of the two parts obtained by splitting the last first chip can only be level 1 and level 0, and the level distribution of the obtained second chip is 0110; if the level distribution of the two parts obtained by splitting the first first chip is level 1 and level 0, then the level distribution of the two parts obtained by splitting the last first chip can only be level 0 and level 1, and the level distribution of the obtained second chip is 1001.

[0173] Based on the above splitting of the two parts obtained by splitting the first first chip, the two parts obtained by splitting the last first chip, further, the first device can determine a second symbol including a second CP. There is no unreasonable rising / falling edge in the second symbol, so that the first device and the second device can effectively improve the accuracy of signal demodulation and improve the spectral efficiency based on the transmission of the carrier signal based on the second symbol. The scheme provides another implementation manner for the level conversion operation in mode 1.

[0174] As an optional embodiment, in the above mode 1, the all or part of the first chips can include all the first chips in the first symbol. The first device splits all or part of the first chips included in the first symbol, and performs a level conversion operation on the chips obtained by splitting, including: the first device splits all the first chips, and performs a level conversion operation on the chips obtained by splitting.

[0175] Next, taking M=4 as an example, the above is described in combination with FIG. 12.

[0176] FIG. 12 is a schematic diagram of another possible level conversion operation provided by an embodiment of the present application. The first symbol shown in FIG. 12 contains four first chips obtained by OOK modulation. The level of the first first chip is 1, the level of the second first chip is 0, the level of the third first chip is 1, and the level of the second first chip is 0. The level distribution of the above four first chips is 1010. In this scenario, when the first CP is added to the first symbol, as described above, it will cause the signal demodulation of the second device to be wrong, and reduce the spectral efficiency.

[0177] Therefore, the first device performs a level conversion operation on the first symbol, specifically, the first device performs a level conversion operation on all the first chips in the first symbol. The first device splits each of the first chips into two parts. As described above, the level distribution of the two parts split from each first chip can be level 0 and level 1, or level 1 and level 0; the level distribution of the two parts split from the last first chip can also be level 0 and level 1, or level 1 and level 0.

[0178] It should be understood that, in order to ensure that the level of the first second chip in the obtained second symbol is the same as the level of the last second chip, the level distribution of the two parts split above has two cases: if the level distribution of the two parts split from the first first chip is level 0 and level 1, then the level distribution of the two parts split from the last first chip can only be level 1 and level 0, and the level distribution of the obtained second chip is 01…10; if the level distribution of the two parts split from the first first chip is level 1 and level 0, then the level distribution of the two parts split from the last first chip can only be level 0 and level 1, and the level distribution of the obtained second chip is 10…01.

[0179] It should also be understood that the level distribution of the two parts split from the second first chip by the first device can be level 0 and level 1, or level 1 and level 0; the level distribution of the two parts split from the third first chip by the first device can also be level 0 and level 1, or level 1 and level 0. Since the splitting and level conversion of the second first chip and the third first chip do not affect the consistency of the level of the first second chip and the level of the last second chip in the finally obtained second symbol, the embodiments of the present application do not limit this. The two second symbols shown in FIG. 12 only represent two possible compositions of the second symbol, and other possible results are not described here.

[0180] Based on the results of splitting all the first chips, further, the first device can determine a second symbol including a second CP. There is no unreasonable rising / falling edge in the second symbol, so that the first device and the second device can effectively improve the accuracy of signal demodulation and improve the spectral efficiency based on the transmission of the carrier signal based on the second symbol. The scheme provides another possible implementation of the level conversion operation in mode 1.

[0181] As an optional embodiment, in the above-mentioned manner 2, the partial first chips include the last first chip in the first symbol; and the first device performs the level conversion operation on the partial first chips included in the first symbol, including: the first device performs the level conversion operation on the last first chip to obtain the last second chip.

[0182] The following takes M = 4 as an example and is described in combination with FIG. 13.

[0183] FIG. 13 is a schematic diagram of another possible level conversion operation provided by an embodiment of the present application. The first symbol shown in FIG. 13 contains four first chips obtained by OOK modulation. In this scenario, when the first CP is added to the first symbol, as described above, it will cause the signal demodulation of the second device to be wrong, and the spectral efficiency is reduced.

[0184] Therefore, the first device performs the level conversion operation on the last first chip in the first symbol. Since the level of the first first chip is 1, in order to maintain consistency, the first device directly changes the level of the last first chip to 1, thereby meeting the requirements.

[0185] Based on the last second chip obtained by converting the last first chip, further, the first device can determine a second symbol including a second CP. There is no unreasonable rising / falling edge in the second symbol, so the first device and the second device can perform the transmission of the carrier signal based on the second symbol. This method not only can effectively improve the accuracy of signal demodulation, improve the spectral efficiency, but also reduces the computational complexity, and improves the system performance.

[0186] As an optional embodiment, in the above-mentioned manner 2, the first device performs the level conversion operation on the last first chip, including: the first device copies the level value of the first first chip included in the first symbol, and the first device determines the level value of the last first chip as the level value of the first first chip.

[0187] The above-mentioned scheme describes a possible implementation manner of the first device directly performing the level conversion operation on the last first chip. That is, the first device copies the level value of the first first chip, and determines the level value of the last first chip as the level value of the first first chip. Based on the above-mentioned level conversion operation, further, the first device can determine a second symbol including a second CP. This method is simple in operation, and provides another possible implementation manner for the level conversion operation in manner 2.

[0188] As an optional embodiment, in the above-mentioned manner 2, the partial first chips further include the second-to-last first chip in the first symbol; the first device performing the level conversion operation on the partial first chips included in the first symbol further includes: the first device performing the level conversion operation on the second-to-last first chip to obtain the second-to-last second chip in the at least two second chips.

[0189] The following takes M=4 as an example and is described in combination with FIG. 14.

[0190] FIG. 14 is a schematic diagram of another possible level conversion operation provided by the embodiment of the present application. The first symbol shown in FIG. 14 contains four first chips obtained by OOK modulation. In this scenario, when the first CP is added to the first symbol, as described above, it will cause the signal demodulation of the second device to be wrong, and the spectral efficiency is reduced.

[0191] Therefore, the first device performs the level conversion operation on the last first chip and the second-to-last first chip in the first symbol. Since the level of the first first chip is 1, in order to maintain consistency, the first device directly converts the level of the last first chip to 1.

[0192] It should be understood that the first device performs the level conversion operation on the second-to-last first chip in the first symbol, which can be level 0 or level 1. Since the result of the level conversion operation on the second-to-last first chip does not affect the consistency of the level of the first second chip and the level of the last second chip in the finally obtained second symbol, the embodiment of the present application does not limit this. The second symbol shown in FIG. 14 only represents one possible composition of the second symbol, and other possible results are not described here.

[0193] Based on the last second chip and the second-to-last second chip obtained by converting the last first chip and the second-to-last first chip, further, the first device can determine the second symbol including the second CP. There is no unreasonable rising / falling edge in the second symbol, so the first device and the second device can perform the transmission of the carrier signal based on the second symbol. This method can effectively improve the accuracy of signal demodulation and improve the spectral efficiency, and provides another possible implementation manner for the level conversion operation in manner 2.

[0194] As an optional embodiment, in the above-mentioned manner 2, the first device performing the level conversion operation on the second-to-last first chip further includes: the first device copying the level value of the second first chip included in the first symbol, and the first device determining the level value of the second-to-last second chip as the level value of the second first chip.

[0195] The above solution describes one possible implementation of the first device directly performing a level conversion operation on the second last first chip. That is, the first device copies the level value of the second first chip, and determines the level value of the second last first chip as the level value of the second first chip. Based on the above level conversion operation, further, the first device can determine a second symbol including a second CP. This method provides another possible implementation of the level conversion operation in Mode 2.

[0196] As an optional embodiment, in the above Mode 2, the partial first chips include a first first chip in the first symbol; and the first device performing the level conversion operation on the partial first chips included in the first symbol includes: the first device performing the level conversion operation on the first first chip to obtain the first second chip.

[0197] The following takes M = 4 as an example and is described in combination with FIG. 15.

[0198] FIG. 15 is a schematic diagram of another possible level conversion operation provided by an embodiment of the present application. The first symbol shown in FIG. 15 contains four first chips obtained by OOK modulation. In this scenario, when a first CP is added to the first symbol, as described above, it will cause the signal demodulation of the second device to be wrong, and reduce the spectral efficiency.

[0199] Therefore, the first device performs a level conversion operation on the first symbol, and specifically, the first device performs a level conversion operation on a first first chip in the first symbol. Since the level of the last first chip is 0, in order to maintain consistency, the first device directly changes the level of the first first chip to 0, thereby meeting the requirement.

[0200] Based on the first second chip obtained by converting the first first chip, further, the first device can determine a second symbol including a second CP. There is no unreasonable rising / falling edge in the second symbol, and therefore the first device and the second device can perform transmission of a carrier signal based on the second symbol. This method provides another possible implementation of the level conversion operation in Mode 2.

[0201] As an optional embodiment, in the above Mode 2, the first device performing the level conversion operation on the first first chip includes: the first device copying the level value of a last first chip included in the first symbol, and the first device determining the level value of the first first chip as the level value of the last first chip.

[0202] The above scheme describes a possible implementation of the first device directly performing a level conversion operation on the first first chip. That is, the first device copies the level value of the last first chip, and determines the level value of the first first chip as the level value of the last first chip. Based on the above level conversion operation, further, the first device can determine a second symbol including a second CP. This method is simple in operation, and provides another possible implementation of the level conversion operation in Mode 2.

[0203] As an optional embodiment, in the above Mode 2, the partial first chips further include a second first chip in the first symbol; and the first device performing the level conversion operation on the partial first chips included in the first symbol further includes: the first device performing the level conversion operation on the second first chip to obtain a second second chip in the at least two second chips.

[0204] The following takes M=4 as an example, and is described in combination with FIG. 16.

[0205] FIG. 16 is a schematic diagram of another possible level conversion operation provided by an embodiment of the present application. The first symbol shown in FIG. 16 includes four first chips obtained by OOK modulation. In this scenario, when a first CP is added to the first symbol, as described above, it will cause the signal demodulation of the second device to be wrong, and reduce the spectral efficiency.

[0206] Therefore, the first device performs a level conversion operation on the first symbol, specifically, the first device performs the level conversion operation on the first first chip in the first symbol and a second first chip in the first symbol. Since the level of the last first chip is 0, in order to maintain consistency, the first device directly changes the level of the first first chip to 0.

[0207] It should be understood that the first device performs the level conversion operation on the second first chip in the first symbol, which can be level 0 or level 1. Since the result of the above level conversion operation on the second first chip does not affect the consistency of the level of the first second chip and the level of the last second chip in the finally obtained second symbol, the present embodiment does not limit this. The second symbol shown in FIG. 16 only represents one possible composition of the second symbol, and other possible results are not described here.

[0208] Based on the first second chip and the second second chip obtained by transforming the first first chip and the second first chip, further, the first device can determine a second symbol including a second CP. There is no unreasonable rising / falling edge in the second symbol, so the first device and the second device can perform transmission of the carrier signal based on the second symbol. This method provides another possible implementation of the level transformation operation in mode 2.

[0209] As an optional embodiment, in the above mode 2, the first device performs the level transformation operation on the second first chip, and further includes: the first device copying a level value of a second last first chip included in the first symbol, and the first device determining a level value of the second second chip as the level value of the second last first chip.

[0210] The above solution describes a possible implementation of the first device directly performing the level transformation operation on the second first chip. That is, the first device copies the level value of the second last first chip, and determines the level value of the second first chip as the level value of the second last first chip. Based on the above level transformation operation, further, the first device can determine a second symbol including a second CP. This method provides another optional mode for the level transformation operation.

[0211] In the above signal transmission method, the first device determines the second symbol in the case that: the number of the first chips included in the first symbol is multiple; and the level of the first first chip in the first symbol is different from the level of the last first chip in the first symbol.

[0212] It should be understood that the number of the first chips included in the first symbol is multiple specifically refers to that the number of the first chips is two or more. If the number of the first chips is only one, the first first chip and the last first chip are the same first chip. Since the first CP is also obtained based on the last first chip, that is, the level of the first CP, the level of the first first chip and the level of the last first chip are the same. When the first CP is added to the first symbol, there is no unreasonable rising / falling edge. Therefore, the first device can not need to determine the second symbol.

[0213] Similarly, if the level of the first first chip in the first symbol is the same as the level of the last first chip in the first symbol, the first device can also not need to determine the second symbol.

[0214] It should also be understood that the above restriction condition refers to a possible restriction condition under which the first device needs to determine the second symbol. When the above restriction condition is not met, the first device can also determine the second symbol, and the embodiments of the present application do not limit this.

[0215] The above restriction condition describes a specific communication scenario in which the first device needs to determine the second symbol, avoiding the first device from performing the level operation transformation on the first symbol to determine the second symbol in unnecessary cases. The above restriction condition helps to reduce the consumption of computing resources and improve system performance.

[0216] As an optional embodiment, in the above signal transmission method, the sum of the length of the second CP and the length of the first second chip is equal to the length of other chips in the at least two second chips.

[0217] Optionally, after the first device adds the second CP before the first second chip in the second symbol, the length of the first second chip can also be appropriately shortened, so that the sum of the length of the second CP and the length of the first second chip is equal to the length of other chips in the at least two second chips. The advantage of this method is that it can make the structure of the second symbol simpler, reduce the complexity of demodulating the carrier signal by the second device, and improve the efficiency of signal demodulation.

[0218] As an optional embodiment, the carrier signal in the above signal transmission method can also be used to transmit a preamble sequence.

[0219] It should be understood that the signal transmission method provided by the embodiments of the present application can not only be applied to the transmission of the carrier signal obtained by modulating the digital signal, but also be applied to the transmission of the preamble sequence (preamble) and other similar communication scenarios, and the embodiments of the present application do not limit this. This scheme further expands the application range of the signal transmission method and improves the transmission efficiency of the system.

[0220] The above describes in detail the method of signal transmission according to the embodiments of the present application in combination with FIG. 1 to FIG. 16. The apparatus of signal transmission according to the embodiments of the present application will be described in detail below in combination with FIG. 17 and FIG. 18.

[0221] FIG. 17 shows an apparatus 1700 of signal transmission provided by the embodiments of the present application. The apparatus 1700 includes a processing unit 1710 and a transceiver unit 1720.

[0222] In a possible implementation manner, the apparatus 1700 is configured to perform the steps / processs corresponding to the first device in the above method 900.

[0223] The processing unit 1710 is configured to perform a level transformation operation on the first chip included in the first symbol to determine a second symbol, the second symbol including at least two second chips, the level of the first second chip in the at least two second chips being the same as the level of the last second chip in the at least two second chips; and the transceiver unit 1720 is configured to transmit a carrier signal based on the second symbol.

[0224] Optionally, the processing unit 1710 is further configured to split all or part of the first chips included in the first symbol, and perform a level conversion operation on the split chips.

[0225] Optionally, the processing unit 1710 is further configured to split the last first chip, and perform a level conversion operation on the split chip.

[0226] Optionally, the processing unit 1710 is further configured to split the first first chip, and perform a level conversion operation on the split chip.

[0227] Optionally, the processing unit 1710 is further configured to split all the first chips, and perform a level conversion operation on the split chips.

[0228] Optionally, the processing unit 1710 is further configured to split each of the all or part of the chips into two parts, and the two parts have a level distribution of level 0 and level 1, or level 1 and level 0.

[0229] Optionally, the processing unit 1710 is further configured to perform a level conversion operation on the last first chip to obtain the last second chip.

[0230] Optionally, the processing unit 1710 is further configured to copy the level value of the first first chip included in the first symbol, and determine the level value of the last first chip as the level value of the first first chip.

[0231] Optionally, the processing unit 1710 is further configured to perform a level conversion operation on the second last first chip to obtain the second last second chip of the at least two second chips.

[0232] Optionally, the processing unit 1710 is further configured to copy the level value of the second first chip included in the first symbol, and determine the level value of the second last second chip as the level value of the second first chip.

[0233] Optionally, the processing unit 1710 is further configured to perform a level conversion operation on the first first chip to obtain the first second chip.

[0234] Optionally, the processing unit 1710 is further configured to copy the level value of the last first chip included in the first symbol, and determine the level value of the first first chip as the level value of the last first chip.

[0235] Optionally, the processing unit 1710 is further configured to perform a level transform operation on the second first chip to obtain a second second chip in the at least two second chips.

[0236] Optionally, the processing unit 1710 is further configured to copy a level value of a second last first chip included in the first symbol, and determine the level value of the second second chip as the level value of the second last first chip.

[0237] Optionally, the determining the second symbol comprises: determining the second symbol in a case where the following conditions are met: the number of the first chips included in the first symbol is a plurality; and the level of the first first chip in the first symbol is different from the level of the last first chip in the first symbol.

[0238] Optionally, the second symbol further comprises a second cyclic prefix (CP), and the level of the second CP is the same as the level of the last second chip.

[0239] Optionally, the sum of the second CP and the length of the first second chip is equal to the length of other chips in the at least two second chips.

[0240] Optionally, the level transform operation is predefined or configured through signaling.

[0241] Optionally, the carrier signal is used to transmit a preamble sequence.

[0242] In another possible implementation, the apparatus 1700 is configured to perform the steps / stages corresponding to the second device in the above method 900.

[0243] The transceiver 1720 is configured to receive a carrier signal based on a second symbol, the second symbol comprising at least two second chips, and the level of a first second chip in the at least two second chips being the same as the level of a last second chip in the at least two second chips.

[0244] Optionally, the processing unit 1710 is configured to demodulate the carrier signal to obtain modulation information.

[0245] Optionally, the second symbol is obtained by splitting all or part of first chips included in a first symbol and performing a level transform operation on the split chips; or the second symbol is obtained by performing a level transform operation on part of the first chips included in the first symbol.

[0246] Optionally, the all or part of the first chips comprise a last first chip in the first symbol; and the second symbol is obtained by splitting the last first chip and performing a level transform operation on the split chips.

[0247] Optionally, the all or part of the first chips further comprise a first first chip in the first symbol; and the second symbol is obtained by splitting the first first chip and performing a level transform operation on the split chips.

[0248] Optionally, the all or part of the first chips comprise all first chips in the first symbol; and the second symbol is obtained by splitting the all first chips and performing a level transform operation on the split chips.

[0249] Optionally, the part of the first chips comprise a last first chip in the first symbol; and the second symbol is obtained by performing a level transform operation on the last first chip.

[0250] Optionally, the part of the first chips further comprise a second last first chip in the first symbol; and the second symbol is obtained by performing a level transform operation on the second last first chip.

[0251] Optionally, the part of the first chips comprise a first first chip in the first symbol; and the second symbol is obtained by performing a level transform operation on the first first chip.

[0252] Optionally, the part of the first chips further comprise a second first chip in the first symbol; and the second symbol is obtained by performing a level transform operation on the second first chip.

[0253] Optionally, the second symbol is obtained in a case that: a quantity of the first chips comprised in the first symbol is a plurality; and a level of a first first chip in the first symbol is different from a level of a last first chip in the first symbol.

[0254] Optionally, the second symbol further comprises a second cyclic prefix (CP), and a level of the second CP is same as a level of the last second chip.

[0255] Optionally, a sum of the second CP and a length of the first second chip is equal to lengths of other chips in the at least two second chips.

[0256] Optionally, the level transform operation is predefined or configured by signaling.

[0257] Optionally, the carrier signal is used for transmitting a preamble sequence.

[0258] It should be understood that the apparatus 1700 herein is embodied in the form of functional units. The term “unit” herein can refer to an application specific integrated circuit (ASIC), an electronic circuit, a processor (for example, a shared processor, a dedicated processor, or a group processor, etc.) and a memory for executing one or more software or firmware programs, a combination of logic circuitry and / or other suitable components that support the described functions. In an optional example, those skilled in the art can understand that the apparatus 1700 can be embodied in the first device or the second device in the above embodiments, and the apparatus 1700 can be used to execute the respective processes and / or steps corresponding to the first device or the second device in the above method embodiments. To avoid repetition, details are not described here.

[0259] The apparatus 1700 of each of the above schemes has the function of implementing the respective steps executed by the first device or the second device in the above method; the function can be implemented by hardware, or implemented by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions. For example, the transceiver unit can be replaced by a receiver and a transmitter, and other units such as the processing unit can be replaced by a processor, which respectively execute the transceiving operations and related processing operations in each method embodiment.

[0260] In the embodiments of the present application, the apparatus 1700 in FIG. 17 can also be a chip or a chip system, for example, a system on chip (SoC). Correspondingly, the transceiver unit 1720 can be a transceiver circuit of the chip, which is not limited here.

[0261] FIG. 18 shows another signal transmission apparatus 1800 provided by the embodiments of the present application. The apparatus 1800 includes a processor 1810, a transceiver 1820, and a memory 1830. The processor 1810, the transceiver 1820, and the memory 1830 communicate with each other through an internal connection path. The memory 1830 is used to store instructions, and the processor 1810 is used to execute the instructions stored in the memory 1830 to control the transceiver 1820 to transmit and / or receive signals.

[0262] It should be understood that the apparatus 1800 can be specifically the first device or the second device in the above-described embodiments, and can be used to perform the steps and / or procedures corresponding to the first device or the second device in the above-described method embodiments. Optionally, the memory 1830 can include a read-only memory and a random access memory, and provide instructions and data for the processor. A part of the memory can also include a non-volatile random access memory. For example, the memory can also store device type information. The processor 1810 can be used to execute the instructions stored in the memory, and when the processor 1810 executes the instructions stored in the memory, the processor 1810 is used to perform the steps and / or procedures of the above-described method embodiments corresponding to the first device or the second device. The transceiver 1820 can include a transmitter and a receiver, the transmitter can be used to implement the steps and / or procedures corresponding to the transmitter for performing the transmitting actions described above, and the receiver can be used to implement the steps and / or procedures corresponding to the receiver for performing the receiving actions described above.

[0263] It should be understood that in the embodiments of the present application, the processor of the apparatus described above can be a central processing unit (CPU), and the processor can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor.

[0264] In the implementation process, the steps of the above-described method can be completed by the integrated logic circuit of hardware in the processor or the instructions in the form of software. The steps of the method disclosed in the embodiments of the present application can be directly embodied as hardware processor execution completion, or executed by a combination of hardware and software units in the processor. The software unit can be located in a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an electrically erasable programmable memory, a register, or other mature storage media in the art. The storage medium is located in the memory, and the processor executes the instructions in the memory to complete the steps of the above-described method in combination with the hardware thereof. To avoid repetition, it will not be described in detail here.

[0265] The present application also provides a computer readable storage medium for storing a computer program for implementing the method corresponding to the first device or the second device in the above-described embodiments.

[0266] The application further provides a computer program product, which comprises a computer program (also referred to as code or instructions), when the computer program runs on a computer, the computer can execute the method corresponding to the first device or the second device shown in the above embodiments.

[0267] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described system, device and unit can refer to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0268] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described system, device and unit can refer to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0269] In several embodiments provided in the application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the units is only a logical function division, and actual implementation can be in another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interface, device or unit, and can also be electrical, mechanical or other forms of connection.

[0270] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, that is, they can be located in one place, or can be distributed on a plurality of network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiments of the application.

[0271] In addition, each functional unit in each embodiment of the application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0272] The integrated unit, if implemented in the form of a software function unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application essentially or say the part of the prior art that contributes to the present application, or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0273] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A signal transmission method, characterized by, The method comprises: performing a level conversion operation on first chips included in a first symbol to determine a second symbol, the second symbol comprising at least two second chips, a first one of the at least two second chips having a same level as a last one of the at least two second chips; sending a carrier signal based on the second symbol.

2. The method of claim 1, wherein, The performing the level conversion operation on the first chips included in the first symbol comprises: splitting all or part of the first chips included in the first symbol and performing the level conversion operation on the chips after the splitting; or performing the level conversion operation on part of the first chips included in the first symbol.

3. The method of claim 2, wherein, The all or part of the first chips comprises a last one of the first chips in the first symbol. The splitting all or part of the first chips included in the first symbol and performing the level conversion operation on the chips after the splitting comprises: splitting the last one of the first chips and performing the level conversion operation on the chips after the splitting.

4. The method of claim 3, wherein, The all or part of the first chips further comprises a first one of the first chips in the first symbol. The splitting all or part of the first chips included in the first symbol and performing the level conversion operation on the chips after the splitting further comprises: splitting the first one of the first chips and performing the level conversion operation on the chips after the splitting.

5. The method of claim 2, wherein, The all or part of the first chips comprises all of the first chips in the first symbol. The splitting all or part of the first chips included in the first symbol and performing the level conversion operation on the chips after the splitting comprises: splitting all of the first chips and performing the level conversion operation on the chips after the splitting.

6. The method according to any one of claims 2 to 5, characterized in that, The splitting all or part of the first chips included in the first symbol and performing the level conversion operation on the chips after the splitting comprises: splitting each of the all or part of the chips into two parts, the two parts having a level distribution of level 0 and level 1, or level 1 and level 0.

7. The method of claim 2, wherein, The part of the first chips comprises a last one of the first chips in the first symbol. The performing the level conversion operation on part of the first chips included in the first symbol comprises: performing the level conversion operation on the last one of the first chips to obtain the last one of the second chips.

8. The method of claim 7, wherein, The performing the level conversion operation on the last one of the first chips comprises: copying a level value of a first one of the first chips included in the first symbol to determine a level value of the last one of the first chips as the level value of the first one of the first chips.

9. The method according to claim 7 or 8, characterized in that, The part of the first chips further comprises a second last one of the first chips in the first symbol. The performing the level conversion operation on part of the first chips included in the first symbol further comprises: performing the level conversion operation on the second last one of the first chips to obtain a second last one of the at least two second chips.

10. The method of claim 9, wherein, The performing the level conversion operation on the second last one of the first chips comprises: copying a level value of a first one of the first chips included in the first symbol to determine a level value of the second last one of the first chips as the level value of the first one of the first chips. Copy a level value of a second first chip included in the first symbol, and determine a level value of a second last first chip as the level value of the second first chip.

11. The method of claim 2, wherein, The partial first chips include a first first chip in the first symbol. The level transformation operation performed on the partial first chips included in the first symbol includes: Performing a level transformation operation on the first first chip to obtain the first second chip.

12. The method of claim 11, wherein, The level transformation operation performed on the first first chip includes: Copy a level value of a last first chip included in the first symbol, and determine the level value of the first first chip as the level value of the last first chip.

13. The method according to claim 11 or 12, characterized in that, The partial first chips further include a second first chip in the first symbol. The level transformation operation performed on the partial first chips included in the first symbol further includes: Performing a level transformation operation on the second first chip to obtain a second second chip of the at least two second chips.

14. The method of claim 13, wherein, The level transformation operation performed on the second first chip includes: Copy a level value of a second last first chip included in the first symbol, and determine a level value of the second second chip as the level value of the second last first chip.

15. The method according to any one of claims 1 to 14, characterized in that, The second symbol includes: Determine the second symbol in a case that: The first symbol includes a plurality of first chips; and A level of a first first chip in the first symbol is different from a level of a last first chip in the first symbol.

16. The method according to any one of claims 1 to 15, characterized in that, The second symbol further includes a second cyclic prefix (CP), and a level of the second CP is the same as a level of the last second chip.

17. The method of claim 16, wherein, A sum of a length of the second CP and a length of the first second chip is equal to lengths of other chips of the at least two second chips.

18. The method of any one of claims 1 to 17, wherein, The carrier signal is used to transmit a preamble sequence.

19. A method of signal transmission, the method comprising: The method includes: Receive a carrier signal based on a second symbol, the second symbol including at least two second chips, a level of a first second chip of the at least two second chips being the same as a level of a last second chip of the at least two second chips.

20. The method of claim 19, wherein, The second symbol is obtained by splitting all or partial first chips included in a first symbol and performing a level transformation operation on the split chips; or the second symbol is obtained by performing a level transformation operation on partial first chips included in the first symbol.

21. The method of claim 20, wherein, The all or partial first chips include: a last first chip in the first symbol; or a last first chip in the first symbol and a first first chip in the first symbol; or all first chips in the first symbol.

22. The method of claim 20, wherein, The partial first chips include: a last first chip in the first symbol; or a last first chip in the first symbol and a second last first chip in the first symbol; or a first first chip in the first symbol; or a first first chip in the first symbol and a second first chip in the first symbol.

23. The method of any one of claims 20-22, wherein, The second symbol is obtained in a case where the following conditions are satisfied: The first symbol includes a plurality of first chips; and A level of a first first chip in the first symbol is different from a level of a last first chip in the first symbol.

24. The method of any one of claims 19-23, wherein, The second symbol further includes a second cyclic prefix (CP), and a level of the second CP is the same as the level of the last second chip.

25. The method of claim 24, wherein, A sum of the second CP and a length of the first second chip is equal to lengths of other chips in the at least two second chips.

26. The method of any one of claims 19-25, wherein, The carrier signal is used to transmit a preamble sequence.

27. A signal transmission device, comprising: Comprise: A processor coupled with a memory, the memory being used to store programs or instructions, when the programs or instructions are executed by the processor, make the apparatus execute the signal transmission method as claimed in any one of claims 1 to 26.

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