Back-contact solar cell, battery assembly, and photovoltaic system

By designing alternating grooves and protrusions on the back side of the silicon substrate of the back-contact solar cell, combined with the design of dielectric layer and different doping concentrations, the isolation problem between P-type and N-type electrodes is solved, improving the cell efficiency and anti-hot spot performance.

WO2026031715A1PCT designated stage Publication Date: 2026-02-12SHANDONG AIKO SOLAR TECHNOLOGY CO LTD +5
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Patent Information

Application Number
PCT/CN2025/096121
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-08-09
Filing Date
2025-05-20
Publication Date
2026-02-12

AI Technical Summary

Technical Problem

In existing back-contact solar cells, the isolation effect between the P-type and N-type electrodes is poor, which affects the efficiency and performance of the cells.

Method used

Alternating first and second grooves are formed on the back side of a silicon substrate. The first and second doped layers are isolated by bosses and a dielectric layer. Different doping element concentrations and dielectric layer coverage are used to improve the isolation effect.

Benefits of technology

This improves the isolation effect and light reflectivity of back-contact solar cells, thereby increasing cell efficiency and resistance to hot spots.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure is applicable to the technical field of solar cells, and provides a back-contact solar cell, a cell assembly, and a photovoltaic system. In the back-contact solar cell, a protrusion is provided between a first recess and a second recess, a first doped layer is stacked on and covers only a portion of the bottom surface of the first recess, a first spacing region is provided between at least a portion of the first doped layer and the protrusion, and first spacing region is not provided with the first doped layer. In this way, in the back-contact solar cell, the first doped layer and a second doped layer can be isolated by means of the protrusion, while at least a portion of the first doped layer is further isolated from the protrusion by means of the first spacing region, thereby enhancing the isolation effect between the first doped layer and the second doped layer, improving the performance of the back-contact solar cell.
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Description

Back contact solar cell, cell assembly and photovoltaic system

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] The present disclosure refers to the Chinese Patent Application No. 202411095328.6 entitled "Back contact solar cell, cell assembly and photovoltaic system" filed on August 09, 2024, which is incorporated by reference in its entirety into the present disclosure. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of solar cell, in particular to a back contact solar cell, a cell assembly and a photovoltaic system. BACKGROUND

[0004] The back contact solar cell is a high-efficiency cell in which electrodes are both arranged on the back surface of the cell. Specifically, in the back contact solar cell, the P-type electrode and the N-type electrode are both arranged on the back surface, so that the front surface is not shielded by the metal grid lines, thereby improving the efficiency of the cell piece.

[0005] In the related art, the P-type doped silicon layer and the second doped layer in the back contact solar cell are directly deposited on the back surface of the silicon substrate, and the isolation of the first doped layer and the second doped layer is achieved by opening a groove between the two. SUMMARY

[0006] The present disclosure provides a back contact solar cell, a cell assembly and a photovoltaic system.

[0007] The present disclosure is implemented in this way, the back contact solar cell of the embodiment of the present disclosure comprises:

[0008] A silicon substrate having opposite front and back surfaces, the back surface is formed with a plurality of first grooves and a plurality of second grooves arranged alternately and spaced apart in sequence, so that the silicon substrate forms a protrusion between adjacent first grooves and second grooves;

[0009] A first doped layer is only laminated and arranged on a part of the area of the bottom surface of the first groove;

[0010] A first dielectric layer is laminated and arranged between the first doped layer and the silicon substrate, at least a part of the area of the first doped layer has a first spacing area with the protrusion, and the first spacing area is free of the first doped layer;

[0011] A second dielectric layer is laminated and arranged at the second groove; and

[0012] A second doped layer is arranged at the second groove and laminated at least on the second dielectric layer.

[0013] In some embodiments, all positions of the first doped layer are separated from the mesa by the first spacer and the first dielectric layer covers the first spacer, or the first dielectric layer covers the first spacer, or all positions of the first doped layer are separated from the mesa by the first spacer.

[0014] In some embodiments, the first spacer is a first recessed groove formed in the first recess and recessed into the silicon substrate, so as to form a first protrusion in the first recess, the first recessed groove separates the first protrusion from the mesa, and the first recessed groove is free of the first dielectric layer and the first doped layer.

[0015] In some embodiments, in the arrangement direction of the first recess and the second recess, the width of the first recessed groove is 10-200 μm, and the distance between the bottom surface of the first recessed groove and the bottom surface of the first recess is 50 nm-10 μm, or the distance between the bottom surface of the first recessed groove and the bottom surface of the first recess is 50 nm-10 μm, or the width of the first recessed groove is 10-200 μm.

[0016] In some embodiments, the second doped layer has a first extension part extending to the edge of the mesa, and at least part of the first extension part is provided with the first insulating layer between the first extension part and the mesa.

[0017] In some embodiments, the first doped layer is a doped layer formed by doping with a first doping element, and the second doped layer is a doped layer formed by doping with a second doping element, and in the mesa, the doping concentration of the second doping element in the region close to the second recess is greater than the doping concentration of the second doping element in the region close to the first recess.

[0018] In some embodiments, in the arrangement direction of the first recess and the second recess, the length of the first extension part is 10-60 μm.

[0019] In some embodiments, the mesa is a stepped structure, wherein the mesa has a first step surface and a second step surface, the second step surface is closer to the front surface than the first step surface, the first extension part covers the first step surface, and the first insulating layer is located between the first step surface and the first extension part.

[0020] In some embodiments, the first doped layer is provided with the first spacer only in part of the region between the first doped layer and the mesa, and the first doped layer is provided with a first non-spacer region in other regions between the first doped layer and the mesa, in the first non-spacer region, the first doped layer has a second extension part extending to the mesa, and the second extension part is electrically connected to the first extension part.

[0021] In some embodiments, the first extension part has a suspended segment suspended on the mesa, the suspended segment is free of the first insulating layer between the suspended segment and the mesa, and the second extension part is electrically connected to the suspended segment.

[0022] In some embodiments, a third dielectric layer is formed on the surface of the overhang towards the protrusion, and the second extension part covers the third dielectric layer and is conductively connected to the overhang through the third dielectric layer.

[0023] In some embodiments, the second extension part surrounds the overhang and extends to the surface of the first extension part away from the silicon substrate, and a second insulating layer is arranged between the second extension part and the first extension part on the surface of the first extension part away from the silicon substrate.

[0024] In some embodiments, the second extension part extends to the surface of the first extension part away from the silicon substrate along the protrusion, and a fourth dielectric layer is arranged between the second extension part and the side surface of the first extension part and the surface of the first extension part away from the silicon substrate, and the second extension part is conductively connected to the first extension part through the fourth dielectric layer.

[0025] In some embodiments, the first doped layer is separated from the protrusion by a first spacing region at all positions, and a first diffusion layer is formed on at least part of the surface of the protrusion and the first spacing region, and the first doped layer is conductively connected to the second doped layer through the first diffusion layer.

[0026] In some embodiments, the first recess and the second recess are alternately arranged in sequence along the first direction and extend along the second direction, the second direction is perpendicular to the first direction, the first diffusion layer extends along the second direction, and the first diffusion layer has a plurality of first diffusion regions with different doping concentrations in the second direction.

[0027] In some embodiments, the second doped layer is only arranged on part of the bottom surface of the second recess in a stacked manner, a second dielectric layer is arranged between the second doped layer and the silicon substrate, at least part of the second doped layer is separated from the protrusion by a second spacing region, and the second spacing region is free of the second doped layer.

[0028] In some embodiments, all positions of the second doped layer are separated from the protrusion by the second spacing region and the second dielectric layer covers the second spacing region, or the second dielectric layer covers the second spacing region, or all positions of the second doped layer are separated from the protrusion by the second spacing region.

[0029] In some embodiments, the second spacing region is a second inner recess formed in the second recess and recessed into the silicon substrate, so that a second protrusion is formed in the second recess, the second inner recess separates the second protrusion from the protrusion, and the second inner recess is free of the second dielectric layer and the second doped layer.

[0030] In some embodiments, the width of the second inner recess in the arrangement direction of the first and second recesses is 10-200 μm, and the distance between the bottom surface of the second inner recess and the bottom surface of the second recess is 50 nm-10 μm, or the distance between the bottom surface of the second inner recess and the bottom surface of the second recess is 50 nm-10 μm, or the width of the second inner recess in the arrangement direction of the first and second recesses is 10-200 μm.

[0031] In some embodiments, the first doped layer has a first spacing region between a portion of the regions and the mesa, and a first non-spacing region between other regions of the first doped layer and the mesa.

[0032] The second doped layer has a second spacing region between a portion of the regions and the mesa, and a second non-spacing region between other regions of the second doped layer and the mesa.

[0033] At the first non-spacing region, the first doped layer has a third extension part extending onto the mesa, and the third extension part is conductively connected with the second doped layer at the second non-spacing region.

[0034] In some embodiments, at the second non-spacing region, the second doped layer has a fourth extension part extending onto the mesa, and the fourth extension part is conductively connected with the third extension part.

[0035] The third extension part surrounds the side surface of the fourth extension part and extends onto the surface of the fourth extension part away from the silicon substrate, the fifth dielectric layer is arranged between the side surface of the fourth extension part and the third extension part, and the third insulating layer is arranged between the surface of the fourth extension part away from the silicon substrate and the third extension part.

[0036] In some embodiments, in the back contact solar cell, the second doped layer is only located in the second recess, and the third extension part extends onto the surface of the second doped layer away from the silicon substrate at the second non-spacing region to be conductively connected with the second doped layer.

[0037] In some embodiments, the sixth dielectric layer is arranged between the third extension part and the surface of the second doped layer away from the silicon substrate, and the third extension part is conductively connected with the second doped layer through the sixth dielectric layer.

[0038] In some embodiments, all regions of the first doped layer have the first spacing region with the mesa, and all regions of the second doped layer have the second spacing region with the mesa.

[0039] The second diffusion layer is formed on at least a portion of the surfaces of the mesa, the first spacing region and the second spacing region, and the first doped layer and the second doped layer are conductively connected through the second diffusion layer.

[0040] In some embodiments, the first grooves and the second grooves are arranged alternately along the first direction and extend along the second direction, the second direction is perpendicular to the first direction, and the second diffusion layer extends along the second direction, and in the second direction, the second diffusion layer has a plurality of second diffusion regions with different doping concentrations.

[0041] In some embodiments, the surface of the protrusion is a non-textured structure, and the surfaces of the first grooves and the second grooves are non-textured structures, or the surfaces of the first grooves and the second grooves are non-textured structures, or the surface of the protrusion is a non-textured structure.

[0042] In some embodiments, the depth of the first grooves is 100 nm-10 μm, the depth of the second grooves is 100 nm-10 μm, or the depth of the second grooves is 100 nm-10 μm, or the depth of the first grooves is 100 nm-10 μm.

[0043] The present disclosure also provides a battery assembly comprising a plurality of the back contact solar cells of any one of the above.

[0044] The present disclosure also provides a photovoltaic system comprising the battery assembly of the above.

[0045] In the back contact solar cell, the battery assembly, and the photovoltaic system of the embodiments of the present disclosure, the first grooves and the second grooves have the protrusion therebetween, the first doped layer is only arranged on a partial region of the bottom surface of the first grooves in a laminated manner, and at least a partial region of the first doped layer has the first spacing region with the protrusion, and the first spacing region is free of the first doped layer. In this way, in the back contact solar cell, the first doped layer and the second doped layer can be simultaneously isolated by the protrusion, and at least a partial region of the first doped layer is also isolated from the protrusion by the first spacing region, so that the isolation effect between the first doped layer and the second doped layer can be improved, and the performance of the back contact solar cell can be improved.

[0046] Additional aspects and advantages of the present disclosure will be made apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0047] FIG. 1 is a schematic diagram of a module of a photovoltaic system according to an embodiment of the present disclosure;

[0048] FIG. 2 is a schematic diagram of a planar structure of a back contact solar cell according to an embodiment of the present disclosure;

[0049] FIG. 3 is a schematic diagram of a cross-sectional structure of the back contact solar cell along line III-III in FIG. 2;

[0050] FIG. 4 is a schematic diagram of another cross-sectional structure of a back contact solar cell according to an embodiment of the present disclosure;

[0051] Fig. 5 is another schematic diagram of a cross-sectional structure of a back contact solar cell according to an embodiment of the present disclosure;

[0052] Fig. 6 is another schematic diagram of a planar structure of a back contact solar cell according to an embodiment of the present disclosure;

[0053] Fig. 7 is a schematic diagram of a cross-sectional structure of the back contact solar cell in Fig. 6 along line VII-VII;

[0054] Fig. 8 is another schematic diagram of a cross-sectional structure of a back contact solar cell according to an embodiment of the present disclosure;

[0055] Fig. 9 is another schematic diagram of a planar structure of a back contact solar cell according to an embodiment of the present disclosure;

[0056] Fig. 10 is a schematic diagram of a cross-sectional structure of the back contact solar cell in Fig. 9 along line X-X;

[0057] Fig. 11 is another schematic diagram of a planar structure of a back contact solar cell according to an embodiment of the present disclosure;

[0058] Fig. 12 is a schematic diagram of a cross-sectional structure of the back contact solar cell in Fig. 11 along line XII-XII;

[0059] Fig. 13 is another schematic diagram of a cross-sectional structure of a back contact solar cell according to an embodiment of the present disclosure;

[0060] Fig. 14 is another schematic diagram of a planar structure of a back contact solar cell according to an embodiment of the present disclosure;

[0061] Fig. 15 is a schematic diagram of a cross-sectional structure of the back contact solar cell in Fig. 14 along line XV-XV;

[0062] Fig. 16 is another schematic diagram of a cross-sectional structure of a back contact solar cell according to an embodiment of the present disclosure;

[0063] Fig. 17 is another schematic diagram of a planar structure of a back contact solar cell according to an embodiment of the present disclosure;

[0064] Fig. 18 is a schematic diagram of a cross-sectional structure of the back contact solar cell in Fig. 17 along line XVIII-XVIII.

[0065] Main element symbol explanation: 10, silicon substrate; 11, front surface; 12, back surface; 20, first dielectric layer; 30, first doped layer; 31, second extension part; 50, second dielectric layer; 60, second doped layer; 61, first extension part; 62, fourth extension part; 611, suspended section; 70, first insulating layer; 80, first diffusion layer; 81, first diffusion region; 90, second diffusion layer; 91, second diffusion region; 101, first spacing region; 102, first non-spacing region; 103, second spacing region; 104, second non-spacing region; 110, third dielectric layer; 120, second insulating layer; 130, fourth dielectric layer; 140, fifth dielectric layer; 150, third insulating layer; 160, sixth dielectric layer; 121, first recess; 122, second recess; 123, boss; 1211, first inner recess; 1212, first protrusion; 1221, second inner recess; 1222, second protrusion; 1231, first step surface; 1232, second step surface; 100, back contact solar cell; 200, cell assembly; 1000, photovoltaic system. DETAILED DESCRIPTION

[0066] In order to make the purpose, technical scheme and advantages of the present disclosure clearer, the present disclosure will be further described in detail below in combination with the drawings and examples. The examples of the examples are shown in the drawings, wherein the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions throughout. It should be noted that the examples described below by referring to the drawings are exemplary and are only used to explain the present disclosure, and cannot be understood as limiting the present disclosure. In addition, it should be understood that the specific examples described herein are only used to explain the present disclosure and not to limit the present disclosure.

[0067] In the description of the present disclosure, it should be understood that the terms "upper", "lower", "left", "right", "top", "bottom", "side", "lateral", "longitudinal" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present disclosure and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present disclosure.

[0068] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present disclosure, the meaning of "several" is two or more, unless otherwise explicitly and specifically limited.

[0069] In the present disclosure, unless specifically defined and limited otherwise, a first feature "on" or "under" a second feature can include that the first and second features are directly in contact, or that the first and second features are not directly in contact but are in contact through another feature between them. Also, the first feature "over", "above" and "on top of" the second feature includes that the first feature is directly above and obliquely above the second feature, or only means that the first feature is higher in horizontal height than the second feature. The first feature "under", "below" and "underneath" the second feature includes that the first feature is directly below and obliquely below the second feature, or only means that the first feature is lower in horizontal height than the second feature.

[0070] The following disclosure provides many different embodiments, or examples, for implementing different structures of the present disclosure. For the purpose of simplifying the present disclosure, the components and arrangements of the specific examples described below are intended to be examples only. Of course, they are not meant to limit the present disclosure in any way. Furthermore, the present disclosure can repeat reference numerals and / or letters in different examples and / or drawings to indicate similar and / or identical elements. Also, the present disclosure provides examples of various specific processes and materials, but one skilled in the art will recognize that other processes and / or materials can be used.

[0071] Referring to FIG. 1, a photovoltaic system 1000 in an embodiment of the present disclosure can include a cell assembly 200 in an embodiment of the present disclosure, and the cell assembly 200 in an embodiment of the present disclosure can include a plurality of back contact solar cells 100 in an embodiment of the present disclosure. The plurality of back contact solar cells 100 can be connected together in series by a solder ribbon to form a plurality of cell strings, and each cell string can form the cell assembly 200 in series, in parallel, or in series-parallel.

[0072] Referring to FIGS. 2 and 3, the back contact solar cell 100 in an embodiment of the present disclosure can include a silicon substrate 10, a first dielectric layer 20, a first doped layer 30, a second dielectric layer 50, and a second doped layer 60.

[0073] As shown in FIG. 3, the silicon substrate 10 has opposite front and back surfaces 11 and 12, and the back surface 12 has a plurality of first grooves 121 and a plurality of second grooves 122 formed thereon. The plurality of first grooves 121 and the plurality of second grooves 122 are alternately and spacedly arranged in sequence, so that the silicon substrate 10 has a plurality of protrusions 123 formed between adjacent first and second grooves 121 and 122, i.e., the first and second grooves 121 and 122 are the protrusions 123.

[0074] Specifically, as shown in FIG. 2 and FIG. 3, the first grooves 121 and the second grooves 122 can be arranged alternately and spacedly in the first direction and extend in the second direction, which is perpendicular to the first direction. For example, as shown in FIG. 2, in some embodiments, the first direction can be the lateral direction of the back contact solar cell 100, and the second direction can be the longitudinal direction of the back contact solar cell 100, which are perpendicular to each other. Of course, it can be understood that, in some embodiments, the first direction and the second direction can also be other directions, for example, the two directions can be two diagonal directions of the back contact solar cell 100, which are not limited herein.

[0075] Referring to FIG. 3, in the embodiments of the present disclosure, the first doped layer 30 is arranged only on a part of the bottom surface of the first groove 121, the first dielectric layer 20 is arranged between the first doped layer 30 and the silicon substrate 10, and at least a part of the first doped layer 30 is spaced from the boss 123, and the first doped layer 30 is not arranged at the first spacing area 101.

[0076] The second dielectric layer 50 is arranged at the second groove 122, and the second doped layer 60 is arranged at the second groove 122 and arranged at least on the second dielectric layer 50.

[0077] In the back contact solar cell 100, the cell assembly 200 and the photovoltaic system 1000 in the embodiments of the present disclosure, the first grooves 121 and the second grooves 122 have the boss 123, the first doped layer 30 is arranged only on a part of the bottom surface of the first groove 121, at least a part of the first doped layer 30 is spaced from the boss 123, and the first doped layer 30 is not arranged at the first spacing area 101. In this way, in the back contact solar cell 100, the first doped layer 30 and the second doped layer 60 can be isolated by the boss 123 at the same time, and at least a part of the first doped layer 30 is also isolated from the boss 123 by the first spacing area 101, which can improve the isolation effect between the first doped layer 30 and the second doped layer 60 and improve the performance of the back contact solar cell 100.

[0078] Specifically, in the embodiments of the present disclosure, the silicon substrate 10 can be a P-type silicon substrate or an N-type silicon substrate, which is not limited herein. One of the first doped layer 30 and the second doped layer 60 is a P-type doped layer, and the other can be an N-type doped layer. For example, in some embodiments, the first doped layer 30 can be a P-type doped polysilicon layer, a P-type doped microcrystalline silicon layer, etc., and the second doped layer 60 can be an N-type doped polysilicon layer, an N-type doped microcrystalline silicon layer, etc., which is not limited herein.

[0079] The first dielectric layer 20 and the second dielectric layer 50 can each be a tunneling oxide layer, for example, each can be a tunneling silicon oxide film layer. In addition, it can also be understood that in the back contact solar cell 100, a passivation film layer (not shown in the figure) can also be integrally covered on the back surface 12, covering the entire back surface 12, that is, covering the entire back surface area of the back contact solar cell 100. A first metal electrode (not shown in the figure) is provided at the corresponding position of the first doped layer 30 (i.e. at the first groove 121), which penetrates the passivation film layer and is in contact with the first doped layer 30. A second metal electrode (not shown in the figure) is provided at the corresponding position of the second doped layer 60 (i.e. at the first groove 121), which penetrates the passivation film layer and is in contact with the second doped layer 60.

[0080] In some embodiments, the width of a single protrusion 123 in the arrangement direction of the first grooves 121 and the second grooves 122 is 10 μm-700 μm.

[0081] In this way, by setting the width of the protrusion 123 within this reasonable range, the isolation effect of the first doped layer 30 and the second doped layer 60 can be ensured while the efficiency of the back contact solar cell 100 is ensured.

[0082] Specifically, in such embodiments, the width of the protrusion 123 can be, for example, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 100 μm, 150 μm, 200 μm, 250 μm, 300 μm, 350 μm, 400 μm, 450 μm, 500 μm, 550 μm, 600 μm, 650 μm, 700 μm, or any value between 10 μm-700 μm.

[0083] In some embodiments, the surface of the protrusion 123 (the surface of the region between the first grooves 121 and the second grooves 122 of the silicon substrate 10) is a non-textured structure, that is, the lower surface of the protrusion 123 shown in the figure is a polished surface.

[0084] In this way, the surface reflectivity at the protrusion 123 is higher, which can enhance the reflection of light rays that are incident from the front surface 11 and pass through the silicon substrate 10, so as to reflect more light rays back into the silicon substrate 10, thereby improving the efficiency of the back contact solar cell 100. At the same time, by setting the surface of the protrusion 123 as a non-textured structure, the passivation effect when subsequently covered by the passivation film layer can also be improved.

[0085] In some embodiments, the surface of the first grooves 121 and the second grooves 122 (all surfaces of the first grooves 121 and the second grooves 122) can each also be a non-textured structure, that is, all surfaces of the first grooves 121 and the second grooves 122 are polished surfaces.

[0086] In this way, the reflection of the light rays that enter from the front side 11 and pass through the silicon substrate 10 can be further enhanced, and more light rays can be re-reflected back into the silicon substrate 10, thereby improving the efficiency of the back contact solar cell 100.

[0087] Meanwhile, in the process of preparation, after the first groove 121 and the second groove 122 are formed, the first groove 121 and the second groove 122 can be polished to remove the damage (e.g., laser damage caused by laser grooving) caused when the first groove 121 and the second groove 122 are formed.

[0088] In some embodiments, the surface roughness of the second groove 122 is greater than the surface roughness of the first groove 121.

[0089] In this way, by optimizing and matching the roughness of different grooves, the bifaciality of the back contact solar cell 100 can be improved.

[0090] In some embodiments, the depth of the first groove 121 (i.e., the depth of the first groove 121 in the silicon substrate 10) can be 100 nm-10 μm.

[0091] In this way, by setting the depth of the first groove 121 within this reasonable range, the strength of the silicon substrate 10 can be prevented from being reduced due to the depth of the first groove 121 being too deep, and the height of the boss 123 can be prevented from being too small to affect the isolation effect due to the depth of the first groove 121 being too shallow.

[0092] Specifically, in such embodiments, the depth of the first groove 121 can be, for example, 100 nm, 150 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, or any value between 100 nm and 10 μm.

[0093] In some embodiments, the depth of the second groove 122 (i.e., the depth of the second groove 122 in the silicon substrate 10) can be 100 nm-10 μm.

[0094] In this way, by setting the depth of the second groove 122 within this reasonable range, the strength of the silicon substrate 10 can be prevented from being reduced due to the depth of the second groove 122 being too deep, and the height of the boss 123 can be prevented from being too small to affect the isolation effect due to the depth of the second groove 122 being too shallow.

[0095] Specifically, in such embodiments, the depth of the second recess 122 can be, for example, 100 nm, 150 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, or any value between 100 nm and 10 μm.

[0096] It should be noted that in the present disclosure, the depth of a recess refers to the distance between any position on the bottom surface of the recess and the back surface 12.

[0097] Referring to FIG. 2, in some embodiments, all positions of the first doped layer 30 are isolated from the mesa 123 by the first spacer 101, i.e., all positions of the first doped layer 30 are not in contact with the mesa 123.

[0098] In this way, the isolation effect of the first doped layer 30 and the second doped layer 60 can be further improved.

[0099] In some embodiments, the first dielectric layer 20 can cover the first spacer 101. In this way, the passivation effect can be improved, thereby improving the efficiency.

[0100] Referring to FIG. 4, in some embodiments, the first spacer 101 can be a first recessed groove 1211 formed in the first recess 121 and recessed into the silicon substrate 10, thereby forming a first protrusion 1212 in the first recess 121, the first recessed groove 1211 separating the first protrusion 1212 and the mesa 123, and the first recessed groove 1211 being free of the first dielectric layer 20 and the first doped layer 30.

[0101] In this way, by further forming the first recessed groove 1211 in the first recess 121, the first doped layer 30 and the mesa 123 can be isolated by the first recessed groove 1211, and the isolation effect of the first doped layer 30 and the second doped layer 60 can be further improved.

[0102] Specifically, in such embodiments, the first recessed groove 1211 can be formed in the silicon substrate 10 along the sidewall surface of the mesa 123 (i.e., the sidewall surface of the first recess 121), i.e., recessed into the silicon substrate 10 along the thickness direction. That is, only two structure configurations, the first protrusion 1212 and the first recessed groove 1211, exist in the bottom region of the first recess 121.

[0103] Of course, it can be understood that, as shown in FIG. 2, in some embodiments, the first interval region 101 can also not be the first inner recess 1211, but merely the bottom surface of the first recess 121, in which case, the partial region can not have the first dielectric layer 20 and the first doped layer 30, or the partial region can only have the first dielectric layer 20.

[0104] In some embodiments, the width of the first inner recess 1211 in the arrangement direction of the first recess 121 and the second recess 122 is 10 μm-200 μm.

[0105] In this way, by controlling the width of the first inner recess 1211, the width of the first inner recess 1211 can be avoided from being too wide while ensuring the isolation effect, thereby effectively avoiding the proportion of the first doped layer 30 in the first recess 121 being too small to affect the efficiency.

[0106] Specifically, in such embodiments, the width of the first inner recess 1211 can be, for example, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm, 170 μm, 180 μm, 190 μm, 200 μm, or any value between 10 μm-200 μm, which is not particularly limited herein.

[0107] In some embodiments, the distance between the bottom surface of the first inner recess 1211 and the bottom surface of the first recess 121 (i.e., the recess depth of the first inner recess 1211 relative to the bottom surface of the entire first recess 121) is 50 nm-10 μm.

[0108] In this way, by setting the overall recess depth of the first inner recess 1211 in this reasonable range, the strength of the silicon substrate 10 can be avoided from being reduced due to the depth of the first inner recess 1211 being too deep.

[0109] Specifically, in such embodiments, the distance between the bottom surface of the first inner recess 1211 and the back surface 12 can be, for example, 50 nm, 100 nm, 150 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, or any value between 100 nm-10 μm.

[0110] Please refer to FIG. 3 and FIG. 4, in some embodiments, the second dielectric layer 50 is laminated in the second recess 122, specifically, the second dielectric layer 50 can cover the bottom surface and the side surface of the second recess 122, and the second doped layer 60 is arranged at the second recess 122 and laminated on the second dielectric layer 50.

[0111] The second doped layer 60 has a first extension part 61 extending to the edge of the mesa 123, and at least part of the first extension part 61 is insulated from the silicon substrate 10 by the first insulating layer 70. That is, in addition to the part arranged in the second recess 122, the second doped layer 60 also extends along the side surface of the second recess 122 to the edge position of the mesa 123, thereby forming the first extension part 61, and at least part of the first extension part 61 is insulated from the silicon substrate 10 by the first insulating layer 70.

[0112] In this way, by arranging the first extension part 61 and the first insulating layer 70, the passivation effect of the edge of the second recess 122 (i.e. the edge of the mesa 123 close to the second recess 122) can be improved, thereby improving the performance of the back contact solar cell 100. In addition, the first insulating layer 70 at the edge position on one side of the mesa 123 can improve the reflectivity of light from the area of the front surface 11, thereby improving the utilization rate of light and further improving the performance of the back contact solar cell 100.

[0113] Specifically, the first insulating layer 70 can be a film layer such as a silicon oxide layer, a silicon nitride layer, etc. with insulating function, which is not specifically limited here as long as it can achieve the insulation between the first extension part 61 and the silicon substrate 10.

[0114] In some embodiments, the first doped layer 30 is a doped layer formed by doping with a first doping element, and the second doped layer 60 is a doped layer formed by doping with a second doping element, and in the mesa 123, the doping concentration of the second doping element in the area close to the second recess 122 is greater than the doping concentration of the second doping element in the area close to the first recess 121.

[0115] In this way, by designing different doping concentrations of the second doping element in different areas of the mesa 123, the passivation effect of the surface layer of the mesa 123 can be better, the surface recombination and edge recombination can be reduced, and the efficiency can be improved.

[0116] Specifically, in some embodiments, the first doped layer 30 can be a phosphorus-doped doped layer, and the second doped layer 60 can be a boron-doped doped layer, that is, the first doping element can be a phosphorus element, and the second doping element can be a boron element, and in the mesa 123, the boron doping concentration in the area close to the second recess 122 is greater than the boron doping concentration in the area close to the first recess 121.

[0117] In some embodiments, the length of the first extension portion 61 in the arrangement direction (i.e. the first direction) of the first groove 121 and the second groove 122 is 5-60 μm.

[0118] In this way, by setting the length of the first extension portion 61 within the above reasonable range, the passivation effect of the surface of the bump 123 can be improved to reduce the surface recombination and edge recombination, while avoiding the length of the first extension portion 61 being too long to cause the double-sided rate to decrease substantially.

[0119] Specifically, in such embodiments, the length of the first extension portion 61 can be, for example, 5 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, or any value between 10-10 μm. The length of the second first extension portion 61 can also be, for example, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, or any value between 5-60 μm.

[0120] Referring to FIG. 5, in some embodiments, the bump 123 is a stepped structure, wherein the bump 123 has a first step surface 1231 and a second step surface 1232, the second step surface 1232 is closer to the front surface 11 than the first step surface 1231, the first extension portion 61 covers the first step surface 1231, and the first insulating layer 70 is located between the first step surface 1231 and the first extension portion 61.

[0121] Referring to FIGS. 6 and 7, in some embodiments, the first doped layer 30 has a first spacing region 101 between the first doped layer 30 and the bump 123 in a partial region, and the first doped layer 30 and the bump 123 are in direct contact or indirectly contact through the first dielectric layer 20 in a first non-spacing region 102 (i.e. the first doped layer 30 is isolated from the bump 123 only in the partial region, and is in direct contact or indirect contact with the bump 123 in the first non-spacing region). In the first non-spacing region 102, the first doped layer 30 has a second extension portion 31 extending onto the bump 123, and the second extension portion 31 is in conductive connection with the first extension portion 61.

[0122] In this way, by conductively connecting the first extension portion 61 and the second extension portion 31 in the first non-spacing region 102, the first extension portion 61 and the second extension portion 31 can form a recombination contact in the first non-spacing region 102, which can reduce the reverse breakdown voltage and the risk of hot spots of the back contact solar cell 100, thereby improving the hot spot resistance of the back contact solar cell 100.

[0123] Specifically, in such embodiments, the second extension part 31 of the first doped layer 30 also has the second dielectric layer 50 between the silicon substrate 10, that is, the second dielectric layer 50 also has an extension part extending to the mesa 123 at the first non-spaced region 102.

[0124] Further, referring to FIG. 7, in some embodiments, the first extension part 61 has a hanging section 611 hanging over the mesa 123, and the second extension part 31 is electrically connected to the hanging section 611 without the first insulating layer 70 between the hanging section 611 and the mesa 123.

[0125] In this way, the second extension part 31 is only electrically connected to the hanging section 611, which can effectively avoid the area of the composite contact between the second extension part 31 and the first extension part 61 being too large to cause the efficiency to be reduced too much.

[0126] Further, as shown in FIG. 7, in such embodiments, the hanging section 611 can be formed with a third dielectric layer 110 towards the surface of the mesa 123, and the second extension part 31 can cover the third dielectric layer 110 and be electrically connected to the hanging section 611 through the third dielectric layer 110.

[0127] In this way, the second extension part 31 is electrically connected to the hanging section 611 through the third dielectric layer 110, which can improve the passivation effect on the hanging section 611 through the third dielectric layer 110 while achieving the composite contact between the second extension part 31 and the hanging section 611, thereby effectively balancing the relationship between the hot spot resistance and the efficiency.

[0128] Specifically, in such embodiments, the third dielectric layer 110 can also be a tunneling silicon oxide layer, which can be integrally formed with the second dielectric layer 50.

[0129] Further, referring to FIG. 7, in some embodiments, the second extension part 31 surrounds the hanging section 611 and extends to the surface of the first extension part 61 away from the silicon substrate 10, and a second insulating layer 120 is arranged between the second extension part 31 on the surface of the first extension part 61 away from the silicon substrate 10 and the first extension part 61.

[0130] In this way, by arranging the second insulating layer 120 between the second extension part 31 on the surface of the first extension part 61 away from the silicon substrate 10 and the first extension part 61, the contact area between the first extension part 61 and the second extension part 31 can be prevented from being too large to affect the efficiency.

[0131] Specifically, the second insulating layer 120 can be a phosphorus-silicon glass layer or a boron-silicon glass layer or a boron-phosphorus-silicon glass layer or a silicon oxide film layer with an insulating function, etc., which is not limited in particular herein.

[0132] Referring to FIG. 8, in some embodiments, the second extension part 31 can also not have the overhanging section 611, in which case the second extension part 31 extends along the mesa 123 to the surface of the first extension part 61 away from the silicon substrate 10, and the second extension part 31 is provided with a fourth dielectric layer 130 between the side surface of the first extension part 61 and the surface of the first extension part 61 away from the silicon substrate 10, and the second extension part 31 is conductively connected to the first extension part 61 through the fourth dielectric layer 130.

[0133] In this way, the conductive connection between the first extension part 61 and the second extension part 31 can also be achieved by extending the second extension part 31 of the first non-spacer region 102 to the surface of the first extension part 61 away from the silicon substrate 10, and directly conductively connecting the first extension part 61 through the fourth dielectric layer 130 provided on the surface of the first extension part 61 away from the silicon substrate 10, thereby achieving the function of resisting the hot spot risk.

[0134] Specifically, in such embodiments, the fourth dielectric layer 130 can be a tunneling oxide layer, for example, a tunneling silicon oxide film layer, which can be prepared together with the second dielectric layer 50.

[0135] Referring to FIGS. 9 and 10, in some embodiments, the first doped layer 30 has a first spacer region 101 between all positions and the mesa 123, and a first diffusion layer 80 is formed on at least part of the surface of the mesa 123 and the first spacer region 101 (i.e., all surfaces of the mesa 123 and the first spacer region 101), and the first doped layer 30 is conductively connected to the second doped layer 60 through the first diffusion layer 80.

[0136] In this way, the first diffusion layer 80 can enable the first doped layer 30 and the second doped layer 60 to form a conductive connection at least on part of the surface of the mesa 123 and the first spacer region 101, thereby reducing the hot spot risk of the back contact solar cell 100 and improving the anti-hot spot performance.

[0137] Specifically, in such embodiments, the first diffusion layer 80 can be formed by diffusion on the silicon substrate 10, and the doping type of the first diffusion layer 80 can be the same as that of the first doped layer 30 or the second doped layer 60, which can be a phosphorus diffusion layer or a boron diffusion layer, and the specific type is not limited here. The presence of the first diffusion layer 80 can enable the first doped layer 30 and the second doped layer 60 to be conductive through the first diffusion layer 80, thereby improving the anti-hot spot performance.

[0138] In such an embodiment, the first diffusion layer 80 can be in contact with the first dielectric layer 20 and the second dielectric layer 50 to realize the conductive connection between the first doped layer 30 and the second doped layer 60, or the first diffusion layer 80 can not diffuse to the bottom of the first insulating layer 70, and due to the extremely short width of the first insulating layer 70, the first diffusion layer 80 can form a conductive path with the second doped layer 60.

[0139] Further, referring to FIG. 9, in such an embodiment, the first recess 121 and the second recess 122 are arranged alternately along the first direction and extend along the second direction, the second direction is perpendicular to the first direction, and the first diffusion layer 80 extends along the second direction, and in the second direction, the first diffusion layer 80 has a plurality of first diffusion regions 81 with different doping concentrations.

[0140] In this way, by controlling the doping concentration of the first diffusion layer 80 in different first diffusion regions 81, the reverse breakdown voltage at the first diffusion region 81 with a higher doping concentration is lower, and the risk resistance ability of the back contact solar cell 100 to hot spots can be improved; the first diffusion region 81 with a lower doping concentration will not cause a large decrease in the reverse breakdown voltage, and the first diffusion region 81 corresponding to the low doping concentration will not cause a large leakage current, and the function of improving the risk resistance to hot spots is realized only by the first diffusion region 81 with a higher doping concentration. That is to say, in this way, the risk resistance to hot spots can be improved while avoiding a large decrease in the efficiency of the back contact solar cell 100 due to a large leakage current.

[0141] Specifically, in such an embodiment, the first extension part 61 and the second extension part 31 can realize the conductive connection therebetween by the first diffusion region 81 with a higher doping concentration to improve the risk resistance to hot spots, and the first diffusion region 81 with a lower doping concentration will not cause a large leakage current, avoiding a large decrease in the efficiency.

[0142] Referring to FIGS. 11 and 12, in some embodiments, the second doped layer 60 can also be arranged only on a part of the bottom surface of the second recess 122, the second doped layer 60 is provided with the second dielectric layer 50 between the second doped layer 60 and the silicon substrate 10, and the second doped layer 60 has a second spacing region 103 between at least a part of the second doped layer 60 and the boss 123, and the second spacing region 103 is free of the second doped layer 60.

[0143] Thus, in the back contact solar cell 100, at least part of the first doped layer 30 is isolated from the bump 123 by the first spacer 101, and at least part of the second doped layer 60 is also isolated from the bump 123 by the second spacer 103, which can further improve the isolation effect between the first doped layer 30 and the second doped layer 60, and improve the performance of the back contact solar cell 100.

[0144] Referring to FIG. 12, in some embodiments, all positions of the second doped layer 60 are isolated from the bump 123 by the second spacer 103, that is, all positions of the second doped layer 60 are not in contact with the bump 123.

[0145] Thus, the isolation effect between the first doped layer 30 and the second doped layer 60 can be further improved.

[0146] In some embodiments, the second dielectric layer 50 can cover the second spacer 103. Thus, the passivation effect can be improved, thereby improving the efficiency.

[0147] Referring to FIG. 13, in some embodiments, the second spacer 103 can be a second recessed groove 1221 formed in the second recess 122 and recessed into the silicon substrate 10, thereby forming a second protrusion 1222 in the second recess 122, the second recessed groove 1221 separates the second protrusion 1222 and the bump 123, and the second dielectric layer 50 and the second doped layer 60 are not present at the second recessed groove 1221.

[0148] Thus, by further forming the second recessed groove 1221 in the second recess 122, the second doped layer 60 and the bump 123 can be isolated by the second recessed groove 1221, which can further improve the isolation effect between the second doped layer 60 and the second doped layer 60.

[0149] Specifically, in such embodiments, the second recessed groove 1221 can be formed along the sidewall surface of the bump 123 (i.e., the sidewall surface of the second recess 122) and recessed into the silicon substrate 10 (recessed into the silicon substrate 10 along the thickness direction). That is, only two structure configurations of the second protrusion 1222 and the second recessed groove 1221 exist at the bottom region of the second recess 122.

[0150] Of course, it can be understood that, as shown in FIG. 12, in some embodiments, the second spacer 103 can not be the second recessed groove 1221, but only the bottom surface of the second recess 122, in which case, the part of the region can not have the second dielectric layer 50 and the second doped layer 60, or only have the second dielectric layer 50.

[0151] In some embodiments, the width of the second inner recess 1221 in the arrangement direction of the first recess 121 and the second recess 122 is 10 μm-200 μm.

[0152] In this way, by controlling the width of the second inner recess 1221, the width of the second inner recess 1221 can be prevented from being too wide while ensuring the isolation effect, thereby effectively preventing the proportion of the first doped layer 30 in the first recess 121 from being too small and affecting the efficiency.

[0153] Specifically, in such embodiments, the width of the second inner recess 1221 may, for example, be 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm, 170 μm, 180 μm, 190 μm, 200 μm, or any value between 10 μm-200 μm, without limitation in particular.

[0154] In some embodiments, the distance between the bottom surface of the second inner recess 1221 and the bottom surface of the first recess 121 (i.e., the recess depth of the second inner recess 1221 relative to the bottom surface of the entire first recess 121) is 50 nm-10 μm.

[0155] In this way, by setting the overall recess depth of the second inner recess 1221 within this reasonable range, the strength of the silicon substrate 10 can be prevented from being reduced due to the depth of the second inner recess 1221 being too deep.

[0156] Specifically, in such embodiments, the distance between the bottom surface of the second inner recess 1221 and the back surface 12 may, for example, be 50 nm, 100 nm, 150 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, or any value between 100 nm-10 μm.

[0157] Referring to FIGS. 14 and 15, in some embodiments, the first doped layer 30 has a first spacing region 101 between a portion of the region and the boss 123, and a first non-spacing region 102 between the other region of the doped layer 30 and the boss 123.

[0158] The second doped layer 60 has a second spacing region 103 between a portion of the region and the boss 123, and a second non-spacing region 104 between the other region of the doped layer 60 and the boss 123.

[0159] At the first non-interval region 102, the first doped layer 30 has a third extension part 32 extending onto the protrusion 123, and the third extension part 32 is conductively connected with the second doped layer 60 at the second non-interval region 104.

[0160] In this way, by conductively connecting the third extension part 32 and the second doped layer 60 at the second non-interval region 104, the third extension part 32 and the second doped layer 60 can form a composite contact at the second non-interval region 104, which can reduce the reverse breakdown voltage and the hot spot risk of the back contact solar cell 100, and thus improve the hot spot resistance of the back contact solar cell 100.

[0161] Specifically, in such embodiments, the first non-interval region 102 and the second non-interval region 104 can correspond to each other in the first direction, and they can be preferably directly aligned, or there can be at least an overlapping part in the first direction.

[0162] Referring to FIG. 15, in some embodiments, at the second non-interval region 104, the second doped layer 60 has a fourth extension part 62 extending onto the protrusion, and the fourth extension part 62 is conductively connected with the third extension part 32;

[0163] wherein the third extension part 32 wraps around the side surface of the fourth extension part 62 and extends onto the surface of the fourth extension part 62 away from the silicon substrate 10, the fifth dielectric layer 140 is arranged between the side surface of the fourth extension part 62 and the third extension part 32, and the third insulating layer 150 is arranged between the surface of the fourth extension part 62 away from the silicon substrate 10 and the third extension part 32.

[0164] In this way, the third extension part 32 is only conductively connected with the side surface of the fourth extension part 62, which can effectively avoid the area of the composite contact between the third extension part 32 and the fourth extension part 62 being too large to cause the efficiency to be reduced too much.

[0165] Specifically, in such embodiments, the fifth dielectric layer 140 can be a tunneling oxide layer, for example, a tunneling silicon oxide film layer, and the third insulating layer 150 can be a silicon oxide film layer or a phosphorus silicon glass layer or a boron silicon glass layer or a boron phosphorus silicon glass layer having an insulating function, which is not limited here.

[0166] Referring to FIG. 16, in some embodiments, in the back contact solar cell 100, the second doped layer 60 is only located in the second groove 122 (i.e., the second doped layer 60 does not have the fourth extension part 62), and the third extension part 32 extends onto the surface of the second doped layer 60 away from the silicon substrate 10 at the second non-interval region 104 to be conductively connected with the second doped layer 60.

[0167] In this way, the third extension part 32 is directly extended onto the second doped layer 60 to form a conductive connection with the second doped layer 60, and a composite contact is also formed between the two, thereby achieving the function of reducing the risk of hot spots.

[0168] Further, in some embodiments, a sixth dielectric layer 160 is arranged between the third extension part 32 and the surface of the second doped layer 60 away from the silicon substrate 10, and the third extension part 32 is conductively connected to the second doped layer 60 through the sixth dielectric layer 160.

[0169] In this way, the sixth dielectric layer 160 can improve the passivation effect while achieving the conductive connection between the third extension part 32 and the second doped layer 60.

[0170] Specifically, the sixth dielectric layer 160 can also be a tunneling oxide layer, for example, a tunneling silicon oxide film layer, and in one possible embodiment, the sixth dielectric layer 160 can be prepared together with the first dielectric layer 20.

[0171] Referring to FIGS. 17 and 18, in some embodiments, the first doped layer 30 has a first spacing region 101 between all regions of the first doped layer 30 and the bump 123, and the second doped layer 60 has a second spacing region 103 between all regions of the second doped layer 60 and the bump 123, that is, the first doped layer 30 does not have the third extension part 32, and the second doped layer 60 does not have the fourth extension part 62.

[0172] In this case, a second diffusion layer 90 is formed on at least part of the surface of the bump 123, the first spacing region 101, and the second spacing region 103, and the first doped layer 30 and the second doped layer 60 are conductively connected through the second diffusion layer 90.

[0173] In this way, the second diffusion layer 90 can form a conductive connection between the first doped layer 30 and the second doped layer 60, thereby reducing the risk of hot spots of the back contact solar cell and improving the hot spot resistance.

[0174] Specifically, in such embodiments, the second diffusion layer 90 can be formed by diffusion on the silicon substrate 10, and the second diffusion layer 90 can have the same doping type as the first doped layer 30 or the second doped layer 60, which can be a phosphorus diffusion layer or a boron diffusion layer, and the specific doping type is not limited herein. The presence of the second diffusion layer 90 can enable the first doped layer 30 and the second doped layer 60 to be conductive through the second diffusion layer 90, thereby improving the hot spot resistance.

[0175] In such embodiments, the first diffusion layer 80 can be in contact with the first dielectric layer 20 and the second dielectric layer 50 to realize the conductive connection between the first doped layer 30 and the second doped layer 60, or the first diffusion layer 80 can be directly conductively connected with the first doped layer 30 and the second doped layer 60, which is not particularly limited herein.

[0176] Referring to FIG. 17, in some embodiments, the first groove 121 and the second groove 122 are arranged alternately along the first direction and extend along the second direction, the second direction is transverse to the first direction, and the second diffusion layer 90 extends along the second direction, and in the second direction, the second diffusion layer 90 has a plurality of second diffusion regions 91 with different doping concentrations.

[0177] In this way, by controlling the doping concentrations of the second diffusion layer 90 in different second diffusion regions 91, the reverse breakdown voltage at the second diffusion region 91 with a higher doping concentration is lower, and the risk resistance of the back contact solar cell 100 to hot spots can be improved; the second diffusion region 91 with a lower doping concentration does not cause a large decrease in the reverse breakdown voltage, and the second diffusion region 91 corresponding to the low doping concentration does not cause a large leakage current, and the function of improving the risk resistance to hot spots is realized only by the second diffusion region 91 with a higher doping concentration. That is to say, in this way, the risk resistance to hot spots can be improved while avoiding a large decrease in the efficiency caused by a large leakage current of the back contact solar cell 100.

[0178] Specifically, in such embodiments, the first doped layer 30 and the second doped layer 60 can realize the conductive connection therebetween by the second diffusion region 91 with a higher doping concentration to improve the risk resistance to hot spots, and the second diffusion region 91 with a lower doping concentration does not cause a large leakage current, avoiding a large decrease in the efficiency.

[0179] In the description of the present specification, the description referring to the terms "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiments or examples are included in at least some embodiments or examples of the present disclosure. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiments or examples. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in one or more embodiments or examples.

[0180] In addition, the above only describes the preferred embodiments of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent replacements and improvements made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A back contact solar cell, comprising: a silicon substrate having opposite front and back surfaces, the back surface being formed with a plurality of first grooves and a plurality of second grooves arranged alternately and spaced apart in sequence, so that the silicon substrate is formed with a plurality of protrusions between adjacent first grooves and second grooves; a first doped layer only laminated on a partial region of a bottom surface of the first groove; a first dielectric layer laminated between the first doped layer and the silicon substrate, at least a partial region of the first doped layer being separated from the protrusion by a first spacing region, the first spacing region being free of the first doped layer; a second dielectric layer laminated at the second groove; and a second doped layer laminated at the second groove and at least on the second dielectric layer. all positions of the first doped layer are separated from the protrusion by the first spacing region and the first dielectric layer covers the first spacing region, or the first dielectric layer covers the first spacing region, or all positions of the first doped layer are separated from the protrusion by the first spacing region.

2. The back contact solar cell of claim 1, wherein, the first spacing region is a first recessed groove formed in the first groove and recessed into the silicon substrate, so that a first protruding part is formed in the first groove, the first recessed groove separating the first protruding part from the protrusion, the first recessed groove being free of the first dielectric layer and the first doped layer.

3. The back contact solar cell of claim 1, wherein, in the arrangement direction of the first grooves and the second grooves, the first recessed groove has a width of 10-200 μm and a distance between a bottom surface of the first recessed groove and a bottom surface of the first groove is 50 nm-10 μm, or the distance between the bottom surface of the first recessed groove and the bottom surface of the first groove is 50 nm-10 μm, or the first recessed groove has a width of 10-200 μm.

4. The back contact solar cell of claim 3, wherein, the second doped layer has a first extension part extending to an edge of the protrusion, at least a partial region of the first extension part being separated from the protrusion by a first insulating layer.

5. The back contact solar cell of claim 1, wherein, the first doped layer is a doped layer formed by doping with a first doping element, the second doped layer is a doped layer formed by doping with a second doping element, and in the protrusion, a doping concentration of the second doping element in a region close to the second groove is greater than a doping concentration of the second doping element in a region close to the first groove.

6. The back contact solar cell of claim 5, wherein, in the arrangement direction of the first grooves and the second grooves, the first extension part has a length of 10-60 μm.

7. The back contact solar cell of claim 5, wherein, the protrusion is a stepped structure, wherein the protrusion has a first step surface and a second step surface, the second step surface being closer to the front surface than the first step surface, the first extension part covering the first step surface, and the first insulating layer being between the first step surface and the first extension part.

8. The back contact solar cell of claim 5, wherein, ​ 9. The back contact solar cell of claim 5, wherein, The first doped layer has the first interval region only in a partial region between the first extension part and the boss, and has a first non-interval region between other regions of the first doped layer and the boss, at which the first doped layer has a second extension part extending onto the boss, and the second extension part is electrically connected with the first extension part.

10. The back contact solar cell of claim 9, wherein, The first extension part has a hanging section hanging over the boss, and the first insulating layer is not provided between the hanging section and the boss, and the second extension part is electrically connected with the hanging section through the third insulating layer.

11. The back contact solar cell of claim 10, wherein, The third insulating layer is formed on a surface of the boss facing the hanging section, and the second extension part covers the third insulating layer and is electrically connected with the hanging section through the third insulating layer.

12. The back contact solar cell of claim 11, wherein, The second extension part surrounds the hanging section and extends onto a surface of the first extension part away from the silicon substrate, and a second insulating layer is provided between the second extension part and the first extension part on the surface of the first extension part away from the silicon substrate.

13. The back contact solar cell of claim 9, wherein, The second extension part extends onto the surface of the first extension part away from the silicon substrate along the boss, and a fourth insulating layer is provided between the second extension part and a side surface of the first extension part and the surface of the first extension part away from the silicon substrate, and the second extension part is electrically connected with the first extension part through the fourth insulating layer.

14. The back contact solar cell of claim 5, wherein, The first doped layer has the first interval region between all positions of the first doped layer and the boss, and a first diffusion layer is formed on at least a partial region of a surface of the boss and the first interval region, and the first doped layer is electrically connected with the second doped layer through the first diffusion layer.

15. The back contact solar cell of claim 14, wherein, The first recess and the second recess are alternately arranged in a first direction and extend in a second direction, the second direction is perpendicular to the first direction, and the first diffusion layer extends in the second direction, and in the second direction, the first diffusion layer has a plurality of first diffusion regions with different doping concentrations.

16. The back contact solar cell of claim 1, wherein, The second doped layer is only provided on a partial region of a bottom surface of the second recess, and a second insulating layer is provided between the second doped layer and the silicon substrate, and at least a partial region of the second doped layer has a second interval region between the second doped layer and the boss, and the second doped layer is not provided at the second interval region.

17. The back contact solar cell of claim 16, wherein, All positions of the second doped layer are isolated from the boss through the second interval region, and the second insulating layer covers the second interval region, or the second insulating layer covers the second interval region, or all positions of the second doped layer are isolated from the boss through the second interval region.

18. The back contact solar cell of claim 16, wherein, The second interval region is a second recess formed in the second recess and recessed into the silicon substrate, so that a second protrusion is formed in the second recess, and the second recess separates the second protrusion and the boss, and the second insulating layer and the second doped layer are not provided at the second recess.

19. The back contact solar cell of claim 18, wherein, In the arrangement direction of the first groove and the second groove, the width of the second inner recess is 10-200 μm, and the distance between the bottom surface of the second inner recess and the bottom surface of the second groove is 50 nm-10 μm, or the distance between the bottom surface of the second inner recess and the bottom surface of the second groove is 50 nm-10 μm, or in the arrangement direction of the first groove and the second groove, the width of the second inner recess is 10-200 μm.

20. The back contact solar cell of claim 16, wherein, The first doped layer has the first spacing region between part of the regions and the convex, and has the first non-spacing region between other regions and the convex; the second doped layer has the second spacing region between part of the regions and the convex, and has the second non-spacing region between other regions and the convex. In the first non-spacing region, the first doped layer has a third extension part extending onto the convex, and the third extension part is conductively connected with the second doped layer in the second non-spacing region.

21. The back contact solar cell of claim 20, wherein, In the second non-spacing region, the second doped layer has a fourth extension part extending onto the convex, and the fourth extension part is conductively connected with the third extension part; wherein the third extension part wraps the side surface of the fourth extension part and extends onto the surface of the fourth extension part away from the silicon substrate, the fifth dielectric layer is arranged between the side surface of the fourth extension part and the third extension part, and the third insulating layer is arranged between the surface of the fourth extension part away from the silicon substrate and the third extension part.

22. The back contact solar cell of claim 20, wherein, In the back contact solar cell, the second doped layer is only located in the second groove, and the third extension part extends onto the surface of the second doped layer away from the silicon substrate in the second non-spacing region to be conductively connected with the second doped layer.

23. The back contact solar cell of claim 22, wherein, The sixth dielectric layer is arranged between the third extension part and the surface of the second doped layer away from the silicon substrate, and the third extension part is conductively connected with the second doped layer through the sixth dielectric layer.

24. The back contact solar cell of claim 16, wherein, All regions of the first doped layer have the first spacing region between the first doped layer and the convex, and all regions of the second doped layer have the second spacing region between the second doped layer and the convex; the second diffusion layer is formed on at least part of the surface of the convex, the first spacing region and the second spacing region, and the first doped layer and the second doped layer are conductively connected through the second diffusion layer.

25. The back contact solar cell of claim 24, wherein, The first groove and the second groove are alternately arranged in a first direction and extend in a second direction, the second direction is perpendicular to the first direction, the second diffusion layer extends in the second direction, and in the second direction, the second diffusion layer has a plurality of second diffusion regions with different doping concentrations.

26. The back contact solar cell of any of claims 1-25, wherein, The surface of the convex is a non-textured structure, and the surfaces of the first groove and the second groove are non-textured structures, or the surfaces of the first groove and the second groove are non-textured structures, or the surface of the convex is a non-textured structure.

27. The back contact solar cell of any of claims 1-25, wherein, the depth of the second groove is 100 nm - 10 μm, or the depth of the first groove is 100 nm - 10 μm.

28. The back contact solar cell of any of claims 1-25, wherein, the surface roughness of the second groove is greater than the surface roughness of the first groove.

29. A battery assembly comprising the back contact solar cell of any one of claims 1-28.

30. A photovoltaic system comprising the battery assembly of claim 29.

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