Zero current sensor and power supply circuit

Abstract

This zero current sensor (1) for detecting the timing at which a current flowing through a current path (CP) becomes zero comprises: a saturable inductor (Lsat) connected on the current path (CP); and a transformer (T) in which a primary winding (Np) is connected in parallel to the saturable inductor (Lsat). The zero current sensor (1) is provided with an output circuit (10) that is connected to a secondary winding (Ns) of the transformer (T) and outputs an induced current of the secondary winding (Ns) as a detection signal (Vsen). The output circuit (10) outputs, as a detection signal (Vsen), a positive pulse or a negative pulse corresponding to the direction of the induced current of the secondary winding (Ns).

Description

Zero current sensor and power supply circuit

[0001] The present invention relates to a zero current sensor for detecting zero current and a power supply circuit.

[0002] A zero current detection sensor is used in power supply circuits such as discontinuous current converters to determine current discontinuities. As shown in Figure 8, the zero current detection sensor detects a voltage drop due to a current flowing through Rshant, which is placed in the current path. In the boost circuit shown in Figure 8(a), when Q2 is on, the sensor detects the moment when the Q2 current becomes negative, such as when L → Vin → Rshant → Co → Q2 → L.

[0003] It has also been proposed to use a coupling transformer Lsatcoup with a saturable core to detect zero current (see, for example, Patent Document 1). FIG. 9 shows an example of a power factor correction circuit incorporating a coupling transformer Lsatcoup with a saturable core. Referring to FIG. 10(a), when the primary current flowing through the primary side Lsatcoup_p of the coupling transformer Lsatcoup changes between −lsat and +lsat, the L value (magnetic flux density B) of the primary side Lsatcoup_p changes, generating an induced voltage on the secondary side Lsatcoup_s. Depending on whether the primary current increases or decreases, the induced voltage becomes positive or negative, and the induced voltage pulse can be used as a zero current detection signal.

[0004] Swiss Patent No. 701847

[0005] However, the detection resistor Rshunt needed to have a low resistance to maintain high efficiency, and was prone to malfunction due to noise. Therefore, a filter to remove noise was required, which limited the ability to operate at high frequencies. Furthermore, the power factor correction circuit and inverter shown in Figure 8(b) often had a current detector installed in the AC line, and therefore required isolation from the AC line.

[0006] The saturable core-based coupled transformer Lsatcoup has a large hysteresis characteristic with a large squareness ratio, as shown in Figure 10(b). Therefore, the magnetization of the saturable core swings between +Isat and -Isat, tracing the core curve shown in Figure 5, resulting in large iron loss and a plateau in efficiency improvement. The symbols a to i in Figures 10(a) and 10(b) indicate the relationship between the primary current and the magnetization curve. As shown in Figure 10(b), the magnetization follows the outer edge of the magnetization curve. The energy of the secondary side Lsatcoup_s is extremely small, but the L value is large, resulting in large iron loss and a plateau in efficiency improvement.

[0007] One aspect of the present invention provides a zero current sensor and a power supply circuit that can detect the polarity of a current at high speed with extremely low loss.

[0008] A zero current sensor according to one aspect of the present invention is a zero current sensor that detects when a current flowing through a current path becomes zero, and includes a saturable inductor connected to the current path, and a transformer having a primary winding connected in parallel to the saturable inductor.

[0009] According to one aspect of the present invention, the iron loss in the saturable inductor Lsat can be made very small, so that the loss is extremely small and the polarity of the current can be detected at high speed.

[0010] FIG. 1 is a diagram showing a circuit configuration of an embodiment of a power supply circuit equipped with a zero current sensor. FIG. 2 is a diagram showing the configuration of an output circuit. FIG. 3 is a diagram showing the operation of a saturable inductor. FIG. 4 is a waveform diagram of each part of the zero current sensor. FIG. 5 is a diagram showing the magnetization curve of a saturable inductor. FIG. 6 is a diagram showing another configuration example of an output circuit. FIG. 7 is a diagram showing another power supply circuit equipped with a zero current sensor. FIG. 8 is a diagram showing the configuration of a conventional zero current sensor using a detection resistor. FIG. 9 is a diagram showing the configuration of a conventional zero current sensor using a coupled transformer with a saturable core. FIG. 10 is a diagram showing the operation of a coupled transformer with a saturable core.

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the following, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following embodiments, components having similar functions will be given the same reference numerals and descriptions thereof will be omitted as appropriate.

[0012] The zero current sensor 1 of this embodiment is a sensor that detects the timing when the current flowing through the current path CP becomes zero. Referring to Fig. 1, the zero current sensor 1 includes a saturable inductor Lsat, a transformer T, and an output circuit 10, and is mounted, for example, on a totem-pole PFC power supply circuit. In the example of the power supply circuit shown in Fig. 1, a current sensor CS for feedback control is separately provided.

[0013] The saturable inductor Lsat is connected in series with the inductor L on the current path CP. The saturable inductor Lsat has a large difference in inductance between the unsaturated and saturated states, and this change is also steep. The saturable inductor Lsat is configured by winding one or more turns around a toroidal or bead-shaped core. In other words, the wire carrying the current may simply be passed through the inductor, or it may be wound several times.

[0014] The transformer T has a primary winding Np connected in parallel with the saturable inductor Lsat, and transfers the current shunted from the unsaturated saturable inductor Lsat from the primary winding Np to the secondary winding Ns.

[0015] The output circuit 10 is connected to the secondary winding Ns of the transformer T and outputs the induced current in the secondary winding Ns as a detection signal Vsen. The detection signal Vsen outputs a positive pulse or a negative pulse depending on the direction of the induced current. Referring to FIG. 2 , the output circuit 10 includes voltage-dividing resistors R1 and R2, a capacitor C1, and a current-limiting resistor R3 connected in series between a voltage Vcc and a common voltage. One end of the secondary winding Ns is connected to the common voltage, and the other end is connected to the junction of the voltage-dividing resistors R1 and R2 via the capacitor C1 and the current-limiting resistor R3. The output circuit 10 outputs the voltage at the junction of the voltage-dividing resistors R1 and R2 as the detection signal Vsen.

[0016] The saturable inductor Lsat is in a non-saturated state when the current flowing therethrough is in the range of −Isat to +Isat, and is in a saturated state when the current flowing therethrough is less than −Isat and more than +Isat. In the non-saturated state, the saturable inductor Lsat has an inductance that is much larger than the saturated inductance.

[0017] In the saturated state, the saturable inductor Lsat can be regarded as being connected as shown in FIG. 3(a). Therefore, the inductor current I flowing through the inductor L Ｌ When the current I is less than −I sat or more than +I sat , as shown in FIG. Ｌｓａｔ becomes dominant.

[0018] In a non-saturated state, the saturable inductor Lsat can be regarded as being in a disconnected state as shown in FIG. 3(b). Therefore, the inductor current I Ｌ is within the range of −Isat to +Isat, the shunt current I to the transformer T is Ｔ As a result, there is no need to maintain the magnetization, and the magnetization curve of the saturable inductor Lsat is narrow (small squareness ratio) as shown in FIG. 5, and iron loss is very small. At this time, the inductance of the saturable inductor Lsat becomes large, but the inductor current I Ｌ is close to zero, the energy of the saturable inductor Lsat (Li ２ / 2) is extremely small. The shunt current I to the transformer T Ｔ Since the area of ​​the magnetization curve of the transformer T is also very small, the area of ​​the magnetization curve of the transformer T becomes very small, and the iron loss becomes very small.

[0019] In the output circuit 10, a capacitor C1 is connected between the secondary winding Ns of the transformer T and a circuit biased by a voltage Vcc and voltage dividing resistors R1 and R2, so that the current I Ｌｓａｔ The current limiting resistor R3 may be omitted. The detection signal Vsen output from the output circuit 10 is compared with the threshold values ​​Vth1 and Vth2 as shown in FIG. Ｌ You can see the direction.

[0020] The zero current sensor 1 is advantageous in that it can obtain a signal of a magnitude that makes it easier to detect the voltage Vsat across the saturable inductor Lsat as the current to be detected becomes higher in frequency. Ｌ→Ｈ In this case, the voltage Vsat between both ends is Lsat Ｌ→Ｈ Even if the current i itself is small, di / dt increases with increasing frequency, so the voltage Vsat across the saturable inductor Lsat becomes a large signal that is easy to detect.

[0021] When the frequency of the current to be detected is low, di / dt also becomes small, so in order to increase the L value of the saturable inductor Lsat, it is advisable to increase the number of turns of the saturable core or change to a core material with a higher magnetic permeability.

[0022] In the zero current sensor 1a shown in FIG. 6, an output circuit 10a is connected to a secondary winding Ns of a transformer T. The output circuit 10a includes an NPN transistor Q10, a PNP transistor Q11, diodes D1 to D4, a capacitor C1, and a current-limiting resistor R3. The NPN transistor Q10 and the PNP transistor Q11 are connected in series between a voltage Vcc and a common voltage. One end of the secondary winding Ns is connected to the junction between the emitter of the NPN transistor Q10 and the emitter of the PNP transistor Q11. The other end of the secondary winding Ns is connected to one end of a current-limiting resistor R3 via a capacitor C1. The other end of the current-limiting resistor R3 is connected to the collector of the NPN transistor Q10 via a diode D1 and to the base of the NPN transistor Q10 via a diode D2. The NPN transistor Q10 and diodes D1 and D2 form a first buffer (first Baker clamp) circuit, which clamps the level of a positive pulse. The PNP transistor Q11 has its base connected via diode D2 and its collector connected via diode D4 to the other end of current limiting resistor R3. The PNP transistor Q11 and diodes D3 and D4 form a second buffer (second Baker clamp) circuit, which clamps the level of a negative pulse. The voltage at the connection point between the emitter of the NPN transistor Q10 and the emitter of the PNP transistor Q11 is output as a detection signal Vsen. The first buffer circuit and second buffer circuit allow the output circuit 10a to lower its output impedance, support higher frequencies, and improve noise immunity.

[0023] 7A shows an example of a configuration in which the zero current sensor 1 is applied to an inverter, which is a power supply circuit. The inverter shown in FIG. 7A is a half-bridge type discontinuous current inverter, but it may also be a full-bridge type or a multi-level type. The inverter circuit system may be changed without departing from the spirit of the present invention.

[0024] FIG. 7(b) shows an example of a configuration in which the zero current sensor 1 is applied to a charge / discharge circuit of a storage battery, which is a power supply circuit. The zero current sensor 1 can quickly detect the current direction, so it can quickly detect the polarity of the charge / discharge current. The zero current sensor 1 can also be applied to abnormality detection. The charge / discharge circuit may be a converter, an inverter, an insulated circuit, or a non-insulated circuit. The destination connected to the storage battery via the charge / discharge circuit may be DC, a system, or a storage battery.

[0025] (Summary) (1) The zero current sensor 1 according to each embodiment of the present invention detects the current (inductor current I Ｌ The zero current sensor 1 detects the timing when a current path CP becomes zero, and includes a saturable inductor Lsat connected on a current path CP, and a transformer T having a primary winding Np connected in parallel to the saturable inductor Lsat.

[0026] According to the zero current sensor 1 described in (1) above, the iron loss in the saturable inductor Lsat can be made very small, so that the loss is extremely small and the polarity of the current can be detected at high speed. In other words, the zero current sensor 1 can be provided as a lossless sensor with significantly reduced loss. Furthermore, since the zero current sensor 1 uses the transformer T, it can also have an insulating function. The shunt current I to the transformer T Ｔ is very small, the transformer T can be made very small, and the iron loss of the transformer T becomes very small.

[0027] (2) The zero current sensor 1 described in (1) above may include an output circuit 10 connected to the secondary winding Ns of the transformer T and outputting the induced current of the secondary winding Ns as a detection signal Vsen.

[0028] According to the zero current sensor 1 described in (2) above, it is possible to obtain a detection signal Vsen of an appropriate magnitude.

[0029] (3) In the zero current sensor 1 described in (2) above, the output circuit 10 may output a positive pulse or a negative pulse as the detection signal Vsen according to the direction of the induced current in the secondary winding Ns.

[0030] According to the zero current sensor 1 described above in (3), the current flowing through the current path CP (inductor current IＬ ) orientation can be detected.

[0031] (4) In the zero current sensor 1 described in (3) above, the output circuit 10a may include a first buffer circuit that clamps the level of a positive pulse and a second buffer circuit that clamps the level of a negative pulse.

[0032] According to the zero current sensor 1 described in (4) above, the output impedance can be reduced, it can accommodate higher frequencies, and it is possible to improve noise resistance.

[0033] (5) A power supply circuit equipped with the zero current sensor 1 according to any one of (1) to (4) above.

[0034] According to the power supply circuit described above in (5), the current flowing through the current path CP (inductor current I Ｌ ) becomes zero can be detected quickly and accurately.

[0035] Although the present invention has been described above with reference to specific embodiments, it goes without saying that the above embodiments are merely examples and can be modified and implemented without departing from the spirit of the present invention.

[0036] 1, 1a Zero current sensor 10, 10a Output circuit B: Magnetic flux density C1 Capacitor CP Current path D1 to D4 Diodes L Inductor Lsatcoup_p: Primary side Lsatcoup_s: Secondary side Lsat Saturable inductor Np: Primary winding Ns: Secondary winding Q10 NPN transistor Q11 PNP transistor R1, R2 Voltage dividing resistors R3 Current limiting resistor T Transformer

Claims

1. A zero current sensor that detects when the current flowing through a current path becomes zero, comprising: a saturable inductor connected on the current path; and a transformer having a primary winding connected in parallel to the saturable inductor.

2. The zero current sensor according to claim 1, further comprising an output circuit connected to the secondary winding of the transformer and outputting the induced current in the secondary winding as a detection signal.

3. The zero current sensor according to claim 2, wherein the output circuit outputs a positive pulse or a negative pulse as the detection signal according to the direction of the induced current in the secondary winding.

4. The zero current sensor according to claim 3, wherein the output circuit comprises a first buffer circuit that clamps the level of the positive pulse and a second buffer circuit that clamps the level of the negative pulse.

5. A power supply circuit equipped with the zero current sensor according to claim 1 or 2.

Images