Buck-boost power converter and electronic device including same

Abstract

Disclosed are a buck-boost power converter and an electronic device including same. The power converter is a buck-boost power converter and may include a power switching circuit and a control circuit. The power switching circuit includes a plurality of switches and an inductor, and can supply a load with an output voltage boosted or bucked from an input voltage. The control circuit may generate switching signals on the basis of node signals corresponding to the input voltage, the output voltage, and an inductor current. The control circuit may control to make the operating mode one of a buck mode, a buck-boost mode, or a boost mode by outputting switching signals to the plurality of switches. The control circuit may output switching signals for controlling so that the inductor current has three different slopes in a first section, a second section, and a third section of one switching cycle operating in the buck-boost mode. Various other embodiments that can be understood through the present document are also possible.

Description

Buck-boost power converter and electronic device including the same

[0001] The present disclosure relates to a power converter and an electronic device including the same, and for example, to a buck-boost power converter and an electronic device including the same.

[0002] A power converter (or switching regulator) may include circuitry for converting a DC input voltage to a desired DC output voltage. Types of power converters include buck converters for step-down operation, boost converters for step-up operation, and buck-boost converters for both step-up and step-down operation.

[0003] Since a buck-boost converter can perform both step-up and step-down, it can cover a relatively wide range of input voltages compared to a buck converter or boost converter. However, the current of the inductors and switches is relatively large compared to a buck converter or boost converter, which may lower power efficiency.

[0004] Buck-boost converters can be implemented to enable mode switching. Buck-boost converters capable of mode switching may require an appropriate switching control scheme to improve power efficiency.

[0005] The above information may be provided as background information to aid in understanding the present disclosure. None of the above is claimed to be prior art related to the present disclosure or can be used to determine prior art related to the present disclosure.

[0006] A power converter according to an embodiment disclosed in the present document may include a power switching circuit and a control circuit. The power switching circuit may include a plurality of switches and an inductor, and may generate an output voltage (Vo) from an input voltage (Vin) through the plurality of switches and the inductor, and supply the output voltage (Vo) to a load. The control circuit may detect a node signal (Vcs) corresponding to the input voltage (Vin), the output voltage (Vo), and an inductor current flowing in the inductor, generate switching signals based on the input voltage (Vin), the output voltage (Vo), and the node signal (Vcs), and output the switching signals to the plurality of switches, thereby controlling an operation mode of the power converter to one of a buck mode, a buck-boost mode, and a boost mode. The control circuit may output a set of switching signals to the plurality of switches during a switching period (Ts) while operating in the buck-boost mode. The above switching signal set may include a switching signal having a designated first on-time (TON1) and another switching signal triggered together with the switching signal having a designated second on-time (TON2). As the switching signal set is output, the inductor current may increase during a first section (Ta) of the switching period (Ts), the amount of change in the inductor current may be maintained within a certain range during a second section (Tb) of the switching period (Ts), and the inductor current may decrease during a third section (Tc) of the switching period (Ts).

[0007] An electronic device according to one embodiment disclosed in the present document may include an organic light emitting display (OLED), a display driver IC (DDI) for driving the organic light emitting display, and a display power management IC (PMIC). The display PMIC may include a power converter and supply an output voltage (Vo) required to drive the display driver IC using the power converter. The power converter may include a power switching circuit and a control circuit. The power switching circuit may include a plurality of switches and an inductor, and generate an output voltage (Vo) from an input voltage (Vin) through the plurality of switches and the inductor, and supply the output voltage (Vo) to a load. The control circuit detects a node signal (Vcs) corresponding to the input voltage (Vin), the output voltage (Vo) and the inductor current flowing in the inductor, generates switching signals based on the input voltage (Vin), the output voltage (Vo) and the node signal (Vcs), and outputs the switching signals to the plurality of switches, thereby controlling the operation mode of the power converter to be one of a buck mode, a buck-boost mode and a boost mode. The control circuit can output a set of switching signals to the plurality of switches during one switching period (Ts) while operating in the buck-boost mode. The set of switching signals can include a switching signal having a designated first on-time (TON1) and another switching signal triggered together with the switching signal having a designated second on-time (TON2).As the above switching signal set is output, the inductor current may increase during the first section (Ta) of the switching period (Ts), the amount of change in the inductor current may be maintained within a certain range during the second section (Tb) of the switching period (Ts), and the inductor current may decrease during the third section (Tc) of the switching period (Ts).

[0008] Figure 1a is a circuit diagram of a buck-boost power converter according to a comparative example.

[0009] Figure 1b is an operation signal waveform diagram showing a switching control method of a buck-boost power converter according to a comparative example.

[0010] FIG. 1c is an operating signal waveform diagram when a buck-boost power converter according to a comparative example operates in buck mode and buck-boost mode.

[0011] FIG. 1d is an operating signal waveform diagram when a buck-boost power converter according to a comparative example operates in boost mode and buck-boost mode.

[0012] Figure 2 is a circuit diagram of a power converter according to one embodiment.

[0013] FIG. 3 is a diagram for exemplarily explaining the switching between buck mode, buck-boost mode, and boost mode of a power converter according to one embodiment.

[0014] FIG. 4a is a diagram showing a circuit operating state when a power converter according to one embodiment operates in buck mode.

[0015] FIG. 4b is an operating signal waveform diagram when a power converter according to one embodiment operates in buck mode.

[0016] FIG. 5a is a diagram showing a circuit operating state when a power converter according to one embodiment operates in buck-boost mode.

[0017] FIG. 5b is an operating signal waveform diagram when a power converter according to one embodiment operates in buck-boost mode.

[0018] FIG. 6a is a diagram showing a circuit operating state when a power converter according to one embodiment operates in boost mode.

[0019] FIG. 6b is an operating signal waveform diagram when a power converter according to one embodiment operates in boost mode.

[0020] Fig. 7 is a circuit diagram of a power converter according to one embodiment.

[0021] FIG. 8A is an operating signal waveform diagram when a power converter according to one embodiment switches from buck mode to buck-boost mode.

[0022] FIG. 8b is an operating signal waveform diagram when a power converter according to one embodiment switches from buck-boost mode to boost mode.

[0023] FIG. 9 is a graph for explaining changes in switch-on time according to changes in operating mode and / or input voltage in a power converter according to one embodiment.

[0024] FIG. 10a is an operating signal waveform diagram showing a change in switch-on time according to a change in input voltage when a power converter according to one embodiment operates in buck mode.

[0025] FIG. 10b is an operating signal waveform diagram showing a change in switch-on time according to a change in input voltage when a power converter according to one embodiment operates in boost mode.

[0026] FIG. 11a is an operational signal waveform diagram showing simulation results when a power converter according to one embodiment switches from buck mode to buck-boost mode.

[0027] FIG. 11b is an operational signal waveform diagram showing simulation results when a power converter according to one embodiment switches from buck-boost mode to boost mode.

[0028] FIG. 12 is a block diagram of an electronic device including a power converter according to one embodiment.

[0029] FIG. 13 is a block diagram of an electronic device within a network environment according to various embodiments.

[0030] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings so that those skilled in the art can easily implement the present disclosure. However, the present disclosure may be implemented in various different forms and is not limited to the embodiments described herein. In connection with the description of the drawings, the same or similar reference numerals may be used for identical or similar components. Furthermore, in the drawings and related descriptions, descriptions of well-known functions and configurations may be omitted for clarity and conciseness.

[0031] Fig. 1a is a configuration diagram of a buck-boost power converter (10) according to a comparative example. Fig. 1b is an operation signal waveform diagram for switching control of a buck-boost power converter according to a comparative example.

[0032] Referring to FIG. 1A, a buck-boost power converter (10) includes a switching circuit (11) and a control circuit (12). The control circuit (12) outputs switching signals (S1, S2, S3, S4) for controlling the on / off states of switches (Q1, Q2, Q3, Q4) in the switching circuit (11) in response to a clock signal (S0).

[0033] Referring to FIG. 1B, the buck-boost power converter (10) operates in one of the buck mode, the buck-boost mode, and the boost mode. The buck mode section (T_Buck) is a section in which the buck-boost power converter (10) operates in the buck mode. The buck-boost mode section (T_BB) is a section in which the buck-boost power converter (10) operates in the buck-boost mode. The boost mode section (T_Boost) is a section in which the buck-boost power converter (10) operates in the boost mode.

[0034] The first switching signal (S1), the second switching signal (S2), the third switching signal (S3), and the fourth switching signal (S4) of Fig. 1b are output to the first switch (Q1), the second switch (Q2), the third switch (Q3), and the fourth switch (Q4) in the switching circuit (11) of Fig. 1a, respectively. When the first switching signal (S1) is high, the first switch (Q1) is turned on. When the second switching signal (S2) is high, the second switch (Q2) is turned on. When the third switching signal (S3) is high, the third switch (Q3) is turned on. When the fourth switching signal (S4) is high, the fourth switch (Q4) is turned on.

[0035] When the control circuit (12) performs switching control for the switching circuit (11) using the switching signals (S1, S2, S3, S4) of Fig. 1b, mode switching is performed, and depending on the operation mode, the operation signal waveforms of the buck-boost power converter (10) may appear as in Figs. 1c and 1d.

[0036] FIG. 1c is an operating signal waveform diagram when a buck-boost power converter (10) according to a comparative example operates in buck mode and buck-boost mode.

[0037] In Fig. 1c, reference numeral 31 is a waveform diagram showing the inductor current (IL) and the switch currents (IQ1, IQ2, IQ4) of the turned-on switches (Q1, Q2, Q4) when the buck-boost power converter (10) operates in buck mode. Reference numeral 32 is a waveform diagram showing the voltage across the inductor (VLX) when the buck-boost power converter (10) operates in buck mode.

[0038] In Fig. 1c, reference numeral 41 is a waveform diagram showing the inductor current (IL) and the switch currents (IQ1, IQ2, IQ3, IQ4) of the turned-on switches (Q1, Q2, Q3, Q4) when the buck-boost power converter (10) operates in buck-boost mode. Reference numeral 42 is a waveform diagram showing the voltage across the inductor (VLX) when the buck-boost power converter (10) operates in buck-boost mode.

[0039] FIG. 1d is an operating signal waveform diagram when a buck-boost power converter (10) according to a comparative example operates in boost mode and buck-boost mode.

[0040] In FIG. 1d, reference numeral 51 is a waveform diagram showing the inductor current (IL) and the switch currents (IQ1, IQ3, IQ4) of the turned-on switches (Q1, Q3, Q4) when the buck-boost power converter (10) operates in boost mode. Reference numeral 52 is a waveform diagram showing the voltage (VL) across the inductor when the buck-boost power converter (10) operates in boost mode.

[0041] In FIG. 1d, reference numeral 61 is a waveform diagram showing the inductor current (IL) and the switch currents (IQ1, IQ2, IQ3, IQ4) of the turned-on switches (Q1, Q2, Q3, Q4) when the buck-boost power converter (10) operates in buck-boost mode. Reference numeral 62 is a waveform diagram showing the voltage (VL) across the inductor when the buck-boost power converter (10) operates in buck-boost mode.

[0042] As illustrated in FIGS. 1c and 1d, in buck-boost mode, the inductor current / switch current can relatively increase compared to buck mode or boost mode.

[0043] In addition, when the mode of the buck-boost power converter (10) is switched, for example, from buck mode to buck-boost mode or from buck-boost mode to boost mode, a large change may occur in the ripple and peak value of the inductor current / switch current (see Offset 1 in Fig. 1c and Offset 2 in Fig. 1d).

[0044] Referring to FIG. 1c, under the same operating conditions (e.g., input voltage Vin = 3.75 V, output voltage Vo = 3 V, output current Io = 1 A), when the buck-boost power converter (10) operates in buck-boost mode, the ripple and peak value of the inductor current / switch current may increase by about two times (Offset 1) compared to when it operates in buck mode.

[0045] Referring to FIG. 1d, under the same operating conditions (e.g., input voltage Vin = 2.5 V, output voltage Vo = 3 V, input current Iin = 1.2 A, output current Io = 1 A), when the buck-boost power converter (10) operates in buck-boost mode, the ripple and peak value of the inductor current / switch current may increase by about two times (Offset 2) compared to when it operates in boost mode.

[0046] In this way, in the section where the device operates in buck-boost mode, the inductor current may relatively increase compared to buck mode or boost mode, which may increase switching loss and lower power efficiency.

[0047] Additionally, as the ripple and peak value of the inductor current change significantly during the mode switching period, overshoot or undershoot of the output voltage may occur.

[0048] For example, when a buck-boost power converter (10) switches from buck mode to buck-boost mode, a large change may occur in the ripple and peak value of the inductor current (see Offset 1 in Fig. 1c). This may result in a large overshoot in which the output voltage temporarily rises to a value higher than the target value.

[0049] For example, when a buck-boost power converter (10) switches from buck-boost mode to boost mode, a large change in the ripple and peak value of the inductor current may occur (see Offset 2 in Fig. 1d). This may result in a large undershoot in which the output voltage temporarily drops to a value lower than the target value.

[0050] When a device (e.g., a display power device) that is sensitive to changes in operating characteristics such as current ripple is connected to the output side of a buck-boost power converter (10), overshoot or undershoot of the output voltage may lead to serious noise (e.g., screen noise).

[0051] According to various embodiments of the present disclosure, by applying an improved switching control method, the ripple and peak value of the inductor current can be reduced in a section where the power converter operates in buck-boost mode, thereby reducing switching loss and improving power efficiency.

[0052] According to various embodiments of the present disclosure, the degree of change in the magnitude of the inductor current during a mode switching period of a power converter can be reduced to prevent or improve the occurrence of undershoot or overshoot of the output voltage.

[0053] The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects that are not mentioned can be clearly understood by a person having ordinary skill in the art to which the present disclosure belongs from the above description.

[0054] Figure 2 is a circuit diagram of a power converter (200) according to one embodiment.

[0055] According to one embodiment, the power converter (200) is a buck-boost power converter that can provide an output voltage (Vo) of a certain level using an input voltage (Vin). For example, the power converter (200) may be a non-inverting buck-boost power converter.

[0056] According to one embodiment, the operating modes of the power converter (200) may include a buck mode, a buck-boost mode, and a boost mode. The power converter (200) may operate in any one of the buck mode, the buck-boost mode, and the boost mode.

[0057] According to one embodiment, the power converter (200) may operate in one of the buck mode, the buck-boost mode, and the boost mode, or perform a mode switch, based on the range of the input voltage (Vin). For example, the power converter (200) may operate in the buck mode when the input voltage (Vin) falls within a first range higher than the output voltage (Vo). The power converter (200) may operate in the buck-boost mode when the input voltage (Vin) falls within a second range similar to the output voltage (Vo). The power converter (200) may operate in the boost mode when the input voltage (Vin) falls within a third range lower than the output voltage (Vo).

[0058] Referring to FIG. 2, the power converter (200) may include a power switching circuit (220) and a control circuit (210) for controlling the power switching circuit.

[0059] According to one embodiment, the power switching circuit (220) can receive an input voltage (Vin) generated by a power source (201). The power switching circuit (220) can generate an output voltage (Vo) using the input voltage (Vin) and transmit the output voltage (Vo) to the load (202). For example, the power switching circuit (220) can step up or step down the input voltage (Vin) to a desired output voltage (Vo) and transmit the step-up or step-down step-up voltage to the load (202). For example, the power switching circuit (220) can transmit an output voltage (Vo) corresponding to the input voltage (Vin) (e.g., an output voltage (Vo) having the same level as the input voltage (Vin)) to the load (202).

[0060] According to one embodiment, the power switching circuit (220) may include a plurality of switches (221, 222, 223, 224) and an inductor (225). The power switching circuit (220) may generate an output voltage (Vo) from an input voltage (Vin) through the plurality of switches (221, 222, 223, 224) and the inductor (225). The power switching circuit (220) may supply the output voltage (Vo) to a load (202).

[0061] According to one embodiment, the power switching circuit (220) may include a plurality of switches, for example, a first switch (221), a second switch (222), a third switch (223), and a fourth switch (224). For example, each of the plurality of switches (221, 222, 223, 224) may include a metal-oxide-semiconductor field-effect transistor (MOSFET).

[0062] According to one embodiment, the first switch (221) may be disposed between a power source (201) supplying an input voltage (Vin) and a first node (N1) of an inductor (225). The second switch (222) may be disposed between the first node (N1) of the inductor (225) and ground, and may be connected in series with the first switch (221). The third switch (223) may be disposed between the second node (N2) of the inductor (225) and ground. The fourth switch (224) may be disposed between the second node (N2) of the inductor (225) and a load (202), and may be connected in series with the third switch (223).

[0063] According to one embodiment, the first switch (221) and the second switch (222) may be disposed on the input side of the power converter (200), to which the input voltage (Vin) from the power source (201) is supplied. The first switch (221) and the second switch (222) may be connected in series. The third switch (223) and the fourth switch (224) may be disposed on the output side of the power converter (200), which is connected to the load (202). The third switch (223) and the fourth switch (224) may be connected in series. One end of the inductor (225) may be connected to the first node (N1) between the first switch (221) and the second switch (222) that are connected in series. The other end of the inductor (225) may be connected to the second node (N2) between the third switch (223) and the fourth switch (224) that are connected in series.

[0064] According to one embodiment, the switching state (on / off state) of the plurality of switches (221, 222, 223, 224) may vary depending on the operating mode of the power converter (200).

[0065] According to one embodiment, the control circuit (210) can perform switching control on a plurality of switches (221, 222, 223, 224) within the power switching circuit (220). The control circuit (210) can output switching signals (G1, G2, G3, G4) for controlling the plurality of switches (221, 222, 223, 224) within the power switching circuit (220). The switching signals (G1, G2, G3, G4) may be for controlling the switching state and / or ON time of each switch (221, 222, 223, 224). The magnitude of the output voltage (Vo) may vary depending on the magnitude of the input voltage (Vin), the switching states (on / off states) of the plurality of switches (221, 222, 223, 224), and / or the on time of the turned-on switch(es) among the plurality of switches (221, 222, 223, 224). The on time may refer to the duration of the on state in a periodic switching signal in which the on state and the off state are repeated. The on time may be referred to as a switch on time. The switch on time may correspond to a duty cycle of the switch. The duty cycle of the switch may refer to the ratio of the time during one period occupied by the on time of the switch.

[0066] According to one embodiment, the control circuit (210) can detect (or receive) a node signal (Vcs) corresponding to an input voltage (Vin), an output voltage (Vo), and an inductor current (IL) flowing in the inductor (225).

[0067] According to one embodiment, the control circuit (210) can detect a node signal (Vcs) from a first node (N1) of the inductor (225). The node signal (Vcs) can correspond to an inductor current (IL). For example, the node signal (Vcs) can be proportional to the inductor current (IL). For example, the node signal (Vcs) can be a sensing voltage of the inductor current (IL).

[0068] According to one embodiment, the control circuit (210) can detect (or receive) an input voltage (Vin), an output voltage (Vo), and a node signal (Vcs). The control circuit (210) can generate switching signals (G1, G2, G3, G4) for controlling a plurality of switches (221, 222, 223, 224) within the power switching circuit (220) based on the input voltage (Vin), the output voltage (Vo), and the node signal (Vcs). The control circuit (210) can control the operation mode of the power converter (200) to one of a buck mode, a buck-boost mode, and a boost mode, or perform a mode switch by outputting the switching signals (G1, G2, G3, G4) to the plurality of switches (221, 222, 223, 224) within the power switching circuit (220).

[0069] According to one embodiment, among the plurality of switches (221, 222, 223, 224) included in the power switching circuit (220), the switches connected in series may be turned on alternately to prevent short circuits and / or damage. For example, while the first switch (221) among the switches (221, 222) on the input side is turned on, the second switch (222) connected in series with the first switch (221) may be turned off. While the third switch (223) among the switches (223, 224) on the output side is turned on, the fourth switch (224) connected in series with the third switch (223) may be turned off.

[0070] According to one embodiment, the buck mode section, the buck-boost mode section, and the boost mode section of the power converter (200) may each include a plurality of switching cycles (e.g., two or more). The length of each mode section may correspond to an integer multiple of the switching cycle.

[0071] According to one embodiment, the control circuit (210) can output a set of switching signals including a first switching signal (G1) for the first switch (221), a second switching signal (G2) for the second switch (222), a third switching signal (G3) for the third switch (223), and a fourth switching signal (G4) for the fourth switch during one switching cycle (or every switching cycle).

[0072] According to one embodiment, the control circuit (210) can generate a first switching signal set for each switching cycle during the buck mode period and output the first switching signal set to the plurality of switches (221, 222, 223, 224). The control circuit (210) can generate a second switching signal set for each switching cycle during the buck-boost mode period and output the second switching signal set to the plurality of switches (221, 222, 223, 224). The control circuit (210) can generate a third switching signal set for each switching cycle during the boost mode period and output the third switching signal set to the plurality of switches (221, 222, 223, 224).

[0073] According to one embodiment, when the power converter (200) operates in buck mode, the control circuit (210) can output a first switching signal set including a switching signal having a first on-time (TON1) to a plurality of switches (221, 222, 223, 224).

[0074] According to one embodiment, in buck mode, the first on-time (TON1) can change from a first value to a second value as the input voltage (Vin) varies.

[0075] According to one embodiment, when the power converter (200) operates in boost mode, the control circuit (210) can output a third switching signal set including a switching signal having a second on time (TON2) to a plurality of switches (221, 222, 223, 224).

[0076] According to one embodiment, in boost mode, the second on-time (TON1) can change from a third value to a fourth value as the input voltage (Vin) varies.

[0077] According to one embodiment, during a switching period (Ts) during which the power converter (200) operates in buck-boost mode, the control circuit (210) can output a second set of switching signals to a plurality of switches (221, 222, 223, 224). The second set of switching signals can include a switching signal having a designated first on-time (TON1) and another switching signal triggered together with (or simultaneously with) the switching signal having a designated second on-time (TON2).

[0078] According to one embodiment, in buck-boost mode, the specified first on-time (TON1) may be fixed to a first constant value regardless of variations in the input voltage (Vin). The specified second on-time (TON2) may be fixed to a second constant value regardless of variations in the input voltage (Vin).

[0079] According to one embodiment, during a switching period (Ts) in which the power converter (200) operates in buck-boost mode, the control circuit (210) can output a first switching signal (G1) for the first switch (221), a second switching signal (G2) for the second switch (222), a third switching signal (G3) for the third switch (223), and a fourth switching signal (G4) for the fourth switch (224). The first switching signal (G1) can be a signal having a designated first on-time (TON1). The second switching signal (G2) can be an inversion signal of the first switching signal (G1). The third switching signal (G3) can be a signal that is triggered together with (or simultaneously with) the first switching signal (G1) and has a designated second on-time (TON2). The fourth switching signal (G4) can be an inversion signal of the third switching signal (G3).

[0080] According to one embodiment, the control circuit (210) can output a first set of switching signals (e.g., the first to fourth switching signals (G1, G2, G3, G4) of FIG. 4B) to the plurality of switches (221, 222, 223, 224) during a switching period (e.g., Ts of FIG. 4B) during which the power converter (200) operates in buck mode. The first set of switching signals can be for pressure reduction.

[0081] According to one embodiment, the control circuit (210) can output a second set of switching signals (e.g., the first to fourth switching signals (G1, G2, G3, G4) of FIG. 5B) to the plurality of switches (221, 222, 223, 224) during a switching period (e.g., Ts of FIG. 5B) while the power converter (200) operates in buck-boost mode. The second set of switching signals can be for delivering an output voltage (Vo) at the same level (or below a certain offset) as the input voltage (Vin).

[0082] According to one embodiment, the control circuit (210) can control the plurality of switches (221, 222, 223, 224) in a dual constant on time manner during one switching cycle (e.g., Ts in FIG. 5b) while the power converter (200) operates in buck-boost mode.

[0083] According to one embodiment, the dual constant on-time scheme may refer to a switching control scheme using two fixed on-time values. The control circuit (210) may output a second switching signal set (e.g., the first to fourth switching signals (G1, G2, G3, G4) of FIG. 5b) for switching control of the dual constant on-time scheme to a plurality of switches (221, 222, 223, 224) during the switching period (e.g., Ts of FIG. 5b). The second switching signal set may include a switching signal (e.g., G1 of FIG. 5b) having a designated first on-time (TON1) (e.g., a first constant value) and another switching signal (e.g., G3 of FIG. 5b) having a designated second on-time (TON2) (e.g., a second constant value) and triggered together with (or simultaneously with) the switching signal.

[0084] According to one embodiment, the control circuit (210) may perform switching control on a plurality of switches (221, 222, 223, 224) during a switching period (e.g., Ts in FIG. 5b) in which the power converter (200) operates in buck-boost mode, thereby causing the inductor current (IL) flowing in the inductor (225) to have three slopes (e.g., a first slope (541), a second slope (542), and a third slope (543) in FIG. 5b). The control circuit (210) may generate a second switching signal set including switching signals for such switching control (e.g., the first to fourth switching signals (G1, G2, G3, G4) in FIG. 5b). The control circuit (210) can control the amount of change in the inductor current (IL) flowing through the inductor (225) to be maintained within a certain range by outputting the second switching signal set including the switching signals (e.g., the first to fourth switching signals (G1, G2, G3, G4) of FIG. 5b) to the plurality of switches (221, 222, 223, 224). According to one embodiment, as the second switching signal set is output from the control circuit (210) to the plurality of switches (221, 222, 223, 224), a magnetizing operation in which the inductor current (IL) increases can be performed during the first section (or first phase) (e.g., Ta of FIG. 5b) of the switching period (Ts) in which the power converter (200) operates in the buck-boost mode. As the second switching signal set is output, during the second section (or second phase) (e.g., Tb in FIG. 5b) of the switching period (Ts) in which the power converter (200) operates in buck-boost mode, the amount of change in the inductor current (IL) can be maintained within a certain range or the change in the inductor current (IL) can be limited.As the second switching signal set is output, a demagnetizing operation in which the inductor current (IL) decreases can be performed during the third period (or third phase) (e.g., Tc in FIG. 5b) of the switching period (Ts) in which the power converter (200) operates in buck-boost mode.

[0085] According to one embodiment, the inductor current (IL) flowing in the inductor (225) may have a first slope (e.g., the first slope (541) of FIG. 5b) that is a positive value during a first period (e.g., Ta of FIG. 5b) of a switching period (e.g., Ts of FIG. 5b) during which the power converter (200) operates in a buck-boost mode. During a second period (e.g., Tb of FIG. 5b) that is continuous with the first period of the switching period (e.g., Ts of FIG. 5b) during which the power converter (200) operates in a buck-boost mode, the inductor current (IL) may have a second slope (e.g., the second slope (542) of FIG. 5b). During a third period (e.g., Tc in FIG. 5b) that is continuous with the second period among the switching periods (e.g., Ts in FIG. 5b) in which the power converter (200) operates in buck-boost mode, the inductor current (IL) may have a third slope (e.g., the third slope (543) in FIG. 5b). The second slope may have any one of a zero level, a positive (+) value having a smaller change amount than the first slope, or a negative (-) value having a smaller change amount than the third slope.

[0086] According to one embodiment, the control circuit (210) can output a third switching signal set (e.g., the first to fourth switching signals (G1, G2, G3, G4) of FIG. 6b) to the plurality of switches (221, 222, 223, 224) during a switching period (e.g., Ts of FIG. 6b) while the power converter (200) operates in boost mode. The third switching signal set can be for boosting.

[0087] According to one embodiment, the power converter (200) (e.g., the control circuit (210)) can output a first switching signal set including a switching signal having a first on-time (TON1) in the buck mode. For example, the first on-time (TON1) of the buck mode can be set by the mathematical expression 1 described below. According to one embodiment, the first on-time (TON1) of the buck mode can be changed from a first value to a second value as the input voltage (Vin) varies.

[0088] According to one embodiment, the power converter (200) (e.g., the control circuit (210)) can output a second switching signal set including a switching signal having a first on-time (TON1) designated in the buck-boost mode and another switching signal having a second on-time (TON2) designated. The designated first on-time (TON1) of the buck-boost mode can be fixed (or set) to a first constant value regardless of variations in the input voltage (Vin). The designated second on-time (TON2) of the buck-boost mode can be fixed (or set) to a second constant value regardless of variations in the input voltage (Vin).

[0089] According to one embodiment, the first constant value set to the designated first on-time (TON1) of the buck-boost mode may be a value corresponding to the first on-time (TON1) of the buck mode. The second constant value set to the designated second on-time (TON2) of the buck-boost mode may be a value corresponding to the second on-time (TON2) of the boost mode.

[0090] According to one embodiment, the power converter (200) (e.g., the control circuit (210)) can output a third switching signal set including a switching signal having a second on-time (TON2) in the boost mode. For example, the second on-time (TON2) of the boost mode can be set by the mathematical expression 2 described below. According to one embodiment, the second on-time (TON2) of the boost mode can be changed from the third value to the fourth value as the input voltage (Vin) varies.

[0091] FIG. 3 is a drawing for exemplarily explaining the switching between buck mode, buck-boost mode, and boost mode of a power converter (200) according to one embodiment.

[0092] According to one embodiment, the control circuit (210) of the power converter (200) can determine the operating mode of the power converter (200) as one of the buck mode, the buck-boost mode, and the boost mode, or perform a mode switch, based on at least one of the input voltage (Vin), the output voltage (Vo), or the ratio of the input voltage (Vin) and the output voltage (Vo) (e.g., the ratio of the input voltage (Vin) to the output voltage (Vo).

[0093] According to one embodiment, the power converter (200) can operate in a buck mode in a first section (313) belonging to a first range in which the input voltage (Vin) is higher than the output voltage (Vo). The power converter (200) can operate in a buck-boost mode in a second section (sections 312 and 314) belonging to a second range in which the input voltage (Vin) is similar to the output voltage (Vo). The power converter (200) can operate in a boost mode in a third section (sections 311 and 315) belonging to a third range in which the input voltage (Vin) is lower than the output voltage (Vo).

[0094] According to one embodiment, the power converter (200) can set an operating mode or perform an operating mode switch based on a ratio of an input voltage (Vin) to an output voltage (Vo).

[0095] For example, the power converter (200) can switch from boost mode (section 311) to buck-boost mode (section 312) when the input voltage (Vin) increases from a state lower than the output voltage (Vo) and the input voltage (Vin) reaches 95% of the output voltage (Vo). Thereafter, when the input voltage (Vin) reaches 110% of the output voltage (Vo), the power converter (200) can switch from buck-boost mode (section 312) to buck mode (section 313).

[0096] For example, the power converter (200) can switch from buck mode (section 313) to buck-boost mode (section 314) when the input voltage (Vin) decreases from a state where it is high compared to the output voltage (Vo) and the input voltage (Vin) reaches 105% of the output voltage (Vo). Thereafter, when the input voltage (Vin) reaches 90% of the output voltage (Vo), the power converter (200) can switch from buck-boost mode (section 314) to boost mode (section 315).

[0097] According to one embodiment, the range (or threshold) of the input voltage (Vin) for each operation mode may be set differently depending on the battery charge state.

[0098] For example, the input voltage (Vin) may be the battery voltage. When the battery is fully charged, the input voltage (Vin) may have a maximum value (e.g., the fully charged voltage). When the battery is charged (or is being charged), the input voltage (Vin) may gradually increase. When the battery is discharged (or is being discharged), the input voltage (Vin) may gradually decrease.

[0099] For example, in the case of a battery charge state in which the input voltage (Vin) increases, the second range for entering or switching to the buck-boost mode (section 312) may be a range greater than or equal to a first threshold (e.g., 95% of the output voltage (Vo)) and less than a second threshold (e.g., 110% of the output voltage (Vo)). In the case of a battery discharge state in which the input voltage (Vin) decreases, the second range for entering or switching to the buck-boost mode (section 314) may be a range greater than or equal to a third threshold (e.g., 90% of the output voltage (Vo)) and less than a fourth threshold (e.g., 105% of the output voltage (Vo)).

[0100] According to one embodiment, the control circuit (210) of the power converter (200) can generate switching signals for controlling the switching states (on / off states) and / or on times of a plurality of switches (221, 222, 223, 224) depending on the operating mode. The control circuit (210) can perform switching control by outputting the switching signals to the plurality of switches (221, 222, 223, 224).

[0101] The switching control method for each operation mode of the power converter (200) will be described in more detail with reference to FIGS. 4a, 4b, 5a, 5b, 6a, and 6c below.

[0102] FIG. 4a is a diagram showing a circuit operating state when a power converter (200) according to one embodiment operates in buck mode. FIG. 4b is a diagram showing operating signal waveforms when a power converter (200) according to one embodiment operates in buck mode.

[0103] According to one embodiment, when the input voltage (Vin, e.g., 4.5 V) falls within a first range that is higher than the output voltage (Vo, e.g., 4 V) by a certain offset, the power converter (200) can perform a step-down operation by operating in buck mode (410).

[0104] According to one embodiment, a buck mode section operating in buck mode (410) may include one or more switching periods (Ts). Each switching period (Ts) within the buck mode section may include a first period (T1) and a second period (T2).

[0105] Referring to FIG. 4A, during a switching period (Ts) in which the power converter (200) operates in the buck mode (410), two switches, a first switch (221) and a second switch (222), disposed on the input side of the power converter (200) may be alternately turned on. During the switching period (Ts), a third switch (223), which is one of the two switches disposed on the output side of the power converter (200), may always be turned off. During the switching period (Ts), a fourth switch (224), which is the other of the two switches disposed on the output side of the power converter (200), may always be turned on (Always ON).

[0106] According to one embodiment, during a buck mode section operating in the buck mode (410), the control circuit (210) of the power converter (200) can perform switching control in the buck mode (410) by outputting switching signals (G1, G2, G3, G4) (first switching signal set) shown in FIG. 4B to a plurality of switches (221, 222, 223, 224). The first switching signal set may be for alternately turning on the first switch (221) and the second switch (222) on the input side among the plurality of switches (221, 222, 223, 224), maintaining the third switch (223) on the output side in a turn-off state, and maintaining the fourth switch (224) on the output side in a turn-on state. The power converter (200) can reduce the input voltage (Vin) to an output voltage (Vo) through such switching control and transmit it to the load (202).

[0107] Referring to FIG. 4B, reference numeral 420 is a waveform diagram of an inductor current (IL) and a switch current (IQ1, IQ2, IQ4). Reference numeral 431 is a waveform diagram of a first switching signal (or a first gate driving signal, G1) applied to a first switch (221). Reference numeral 432 is a waveform diagram of a second switching signal (or a second gate driving signal, G2) applied to a second switch (222). Reference numeral 433 is a waveform diagram of a third switching signal (or a third gate driving signal, G3) applied to a third switch (223). Reference numeral 434 is a waveform diagram of a fourth switching signal (or a fourth gate driving signal, G4) applied to a fourth switch (224).

[0108] According to one embodiment, reference symbol Ts represents one switching period within a buck mode period, T1 represents a first period (or first phase) of the switching period, and T2 represents a second period (or second phase) of the switching period.

[0109] According to one embodiment, the first switching signal (G1) may be high during a first period (T1) of a switching period (Ts) and low during a second period (T2) of the switching period (Ts). The first switching signal (G1) may be a signal having a relatively long first on-time (TON1) (e.g., a duty cycle of 90% or more). The first on-time (TON1) may be an on-time of the first switch (221). The first on-time (TON1) may be set based on the switching period (Ts) and the ratio of the input voltage (Vin) and the output voltage (Vo). For example, the first on-time (TON1), which is the on-time of the first switching signal (G1), may be set by the mathematical expression 1 described below.

[0110] According to one embodiment, the second switching signal (G2) may be low during a first period (T1) of the switching period (Ts) and high during a second period (T2) of the switching period (Ts). The second switching signal (G2) may be an inversion signal of the first switching signal (G1) and may be a signal having an off time corresponding to the first on time (TON1). The on time (e.g., a duty cycle of 10% or less) of the second switching signal (G2) (or the second switch (222)) may be relatively short compared to the first on time (TON1) (e.g., a duty cycle of 90% or more). As the first switching signal (G1) transitions from high to low, the second switching signal (G2) may transition from low to high.

[0111] According to one embodiment, during the buck mode period, the power converter (200) can adjust (e.g., increase / decrease) the value of the first on-time (TON1), which is the on-time of the first switching signal (G1), according to a variation of the input voltage (Vin) (e.g., decrease / increase of the battery voltage) in order to maintain the output voltage (Vo) at a constant level. For example, when the input voltage (Vin) varies while the output voltage (Vo) is fixed, the value of the first on-time (TON1) can be adjusted (e.g., increase / decrease) so that the value of the switching period (Ts) remains constant.

[0112] According to one embodiment, when the value of the first on-time (TON1), which is the on-time of the first switching signal (G1), is adjusted, the on-time value of the second switching signal (G2) may be adjusted together so that the value of the switching period (Ts) remains constant. For example, when the first on-time (TON1), which is the on-time of the first switching signal (G1), becomes longer, the on-time of the second switching signal (G2) may become shorter.

[0113] According to one embodiment, during the switching period (Ts), the third switching signal (G3) may be maintained low and the fourth switching signal (G4) may be maintained high.

[0114] According to one embodiment, the inductor current (IL) may increase during a first period (T1) of the switching period (Ts) and decrease during a second period (T2) of the switching period (Ts). This change in the inductor current (IL) may be repeated for each switching period.

[0115] According to one embodiment, an output current (Io in FIG. 4a, 421, 422 in FIG. 4b) according to a change in an inductor current (IL) can be delivered to a load (202) during a first period (T1) and a second period (T2). The output current is an output current of the power converter (200) (or power switching circuit (220)) and can correspond to an input current to the load (202).

[0116] According to one embodiment, during a first period (T1) in which the first switching signal (G1) and the fourth switching signal (G4) are high and the first switch (221) and the fourth switch (224) are turned on, the inductor current (IL) increases, and an output current (Io in FIG. 4A, 421 in FIG. 4B) according to the change in the inductor current (IL) can be transmitted to the load (202). During a second period (T2) in which the second switching signal (G2) and the fourth switching signal (G4) are high and the second switch (222) and the fourth switch (224) are turned on, the inductor current (IL) decreases, and an output current (Io in FIG. 4A, 422 in FIG. 4B) according to the change in the inductor current (IL) can be transmitted to the load (202).

[0117] FIG. 5a is a diagram showing a circuit operating state when a power converter (200) according to one embodiment operates in buck-boost mode. FIG. 5b is a diagram showing operating signal waveforms when a power converter (200) according to one embodiment operates in buck-boost mode.

[0118] According to one embodiment, when the input voltage (Vin, e.g., 4 V) falls within a second range similar to the output voltage (Vo, e.g., 4 V), the power converter (200) may operate in buck-boost mode (510).

[0119] According to one embodiment, a buck-boost mode section operating in buck-boost mode (510) may include one or more switching periods (Ts). Each switching period (Ts) within the buck-boost mode section may include a first period (Ta), a second period (Tb), and a third period (Tc).

[0120] Referring to FIG. 5A, during a switching period (Ts) in which the power converter (200) operates in buck-boost mode (510), two switches, a first switch (221) and a second switch (222), disposed on the input side of the power converter (200) may be turned on alternately. During the switching period (Ts), two switches, a third switch (223) and a fourth switch (224), disposed on the output side of the power converter (200) may be turned on alternately.

[0121] According to one embodiment, during a buck-boost mode section operating in the buck-boost mode (510), the control circuit (210) of the power converter (200) can perform switching control in the buck-boost mode (510) by outputting switching signals (G1, G2, G3, G4) (second switching signal set) shown in FIG. 5B to a plurality of switches (221, 222, 223, 224). The second switching signal set may be for alternately turning on the first switch (221) and the second switch (222) on the input side among the plurality of switches (221, 222, 223, 224) and alternately turning on the third switch (223) and the fourth switch (224) on the output side. The power converter (200) can transmit an output voltage (Vo) of the same level (or less than a certain offset) as the input voltage (Vin) to the load (202) through such switching control.

[0122] Referring to FIG. 5B, reference numeral 520 is a waveform diagram of an inductor current (IL) and a switch current (IQ1, IQ2, IQ3, IQ4). Reference numeral 531 is a waveform diagram of a first switching signal (or a first gate driving signal, G1) applied to a first switch (221). Reference numeral 532 is a waveform diagram of a second switching signal (or a second gate driving signal, G2) applied to a second switch (222). Reference numeral 533 is a waveform diagram of a third switching signal (or a third gate driving signal, G3) applied to a third switch (223). Reference numeral 534 is a waveform diagram of a fourth switching signal (or a fourth gate driving signal, G4) applied to a fourth switch (224).

[0123] According to one embodiment, reference symbol Ts represents one switching period within a buck-boost mode period, Ta represents a first period (or a first phase) of the switching period, Tb represents a second period (or a second phase) of the switching period, and Tc represents a third period (or a third phase) of the switching period.

[0124] According to one embodiment, the first switching signal (G1) may be high during a first period (Ta) and a second period (Tb) of the switching period (Ts), and may be low during a third period (Tc) of the switching period (Ts). The first switching signal (G1) may be a signal having a first on-time (TON1). The first on-time (TON1) may be an on-time of the first switch (221).

[0125] According to one embodiment, the first on-time (TON1) may have a designated value. For example, the first on-time (TON1) may be fixed to a first constant value regardless of variations in the input voltage (Vin).

[0126] According to one embodiment, the first on-time (TON1) of the buck-boost mode (510) may correspond to the first on-time (TON1) of the buck mode (410) illustrated in FIG. 4B. For example, when the power converter (200) switches from the buck mode (410) of FIG. 4A to the buck-boost mode (510) of FIG. 5A, a first constant value corresponding to the first on-time (TON1) of the buck-mode (410) (e.g., the N-1th switching period, mode switching point) may be set as the first on-time (TON1) of the buck-boost mode (510) (e.g., the Nth switching period).

[0127] According to one embodiment, the second switching signal (G2) may be low during a first period (Ta) and a second period (Tb) of the switching period (Ts), and high during a third period (Tc) of the switching period (Ts). The second switching signal (G2) may be an inversion signal of the first switching signal (G1) and may be a signal having an off time corresponding to the first on time (TON1). The on time (e.g., a duty cycle of 10% or less) of the second switching signal (G2) (or the second switch (222)) may be relatively short compared to the first on time (TON1) (e.g., a duty cycle of 90% or more). As the first switching signal (G1) transitions from high to low, the second switching signal (G2) may transition from low to high.

[0128] According to one embodiment, when the first on-time (TON1), which is the on-time of the first switch (221), becomes longer, the on-time of the second switch (222) may become shorter. The sum of the on-time of the first switch (221) and the on-time of the second switch (222) corresponds to a switching period (Ts) and may always be constant. During the first period (Ta) and the second period (Tb) in which the first switching signal (G1) is high and the second switching signal (G2) is low, the first switch (221) may be in an on-state, and the second switch (222) connected in series with the first switch (221) may be in an off-state. During the third period (Tc) in which the first switching signal (G1) is low and the second switching signal (G2) is high, the first switch (221) may be in an off-state, and the second switch (222) connected in series with the first switch (221) may be in an on-state.

[0129] According to one embodiment, the third switching signal (G3) may be high during a first period (Ta) of the switching period (Ts) and low during the first period (Tb) and the third period (Tc) of the switching period (Ts). The third switching signal (G3) may be a signal having a second on-time (TON2). The second on-time (TON2) may be an on-time of the third switch (223). The third switching signal (G3) may be a signal that is triggered together with the first switching signal (G1) and has a second on-time (TON2) that is shorter than the first on-time (TON1).

[0130] In one embodiment, the second on-time (TON2) may have a specified value. For example, the second on-time (TON2) may be fixed to a second constant value regardless of variations in the input voltage (Vin).

[0131] According to one embodiment, the second on-time (TON2) of the buck-boost mode (510) may correspond to the second on-time (TON2) of the boost mode (610) illustrated in FIG. 6B. For example, when the power converter (200) switches from the boost mode (610) to the buck-boost mode (510), a second constant value corresponding to the second on-time (TON2) of the boost mode (610) (e.g., the M-th switching period, the mode switching point) may be set to the second on-time (TON2) of the buck-boost mode (510) (e.g., the M+1-th switching period).

[0132] According to one embodiment, the fourth switching signal (G4) may be low during a first period (Ta) of the switching period (Ts) and high during a second period (Tb) and a third period (Tc) of the switching period (Ts). The fourth switching signal (G4) may be an inversion signal of the third switching signal (G3) and may be a signal having an off time corresponding to the second on time (TON2). The on time (e.g., a duty cycle of 90% or more) of the fourth switching signal (G4) (or the fourth switch (224)) may be relatively longer than the second on time (TON2) (e.g., a duty cycle of 10% or less). As the third switching signal (G3) transitions from high to low, the fourth switching signal (G4) may transition from low to high.

[0133] According to one embodiment, when the second on-time (TON2), which is the on-time of the third switch (223), is prolonged, the on-time of the fourth switch (224) may be shortened. The sum of the on-time of the third switch (223) and the on-time of the fourth switch (224) corresponds to a switching period (Ts) and may always be constant. During the first period (Ta) in which the third switching signal (G3) is high and the fourth switching signal (G4) is low, the third switch (223) may be in an on-state, and the fourth switch (224) connected in series with the third switch (223) may be in an off-state. During the second period (Tb) and the third period (Tc) in which the third switching signal (G3) is low and the fourth switching signal (G4) is high, the third switch (223) may be in an off-state, and the fourth switch (224) connected in series with the third switch (223) may be in an on-state.

[0134] According to one embodiment, the first on-time (TON1) may correspond to the length of the sum of the first section (Ta) and the second section (Tb) of the switching period (Ts). The second on-time (TON2) may correspond to the length of the first section (Ta) of the switching period (Ts).

[0135] Referring to FIG. 5b, the inductor current (IL) may increase during the first section (Ta) of the switching cycle (Ts), be maintained at a constant level without a relatively large change during the second section (Tb) of the switching cycle (Ts), and decrease during the third section (Tc) of the switching cycle (Ts). This change in the inductor current (IL) may be repeated in each switching cycle.

[0136] According to one embodiment, the output current (Io in FIG. 5a, 521, 522 in FIG. 5b) according to the change in the inductor current (IL) can be delivered to the load (202) during the second period (Tb) and the third period (Tc). The output current is an output current of the power converter (200) (or power switching circuit (220)) and can correspond to the input current to the load (202).

[0137] According to one embodiment, during the second period (Tb) in which the first switching signal (G1) and the fourth switching signal (G4) are high and the first switch (221) and the fourth switch (224) are turned on, the inductor current (IL) is maintained at a constant level, and the output current (Io in FIG. 5a, 521 in FIG. 5b) according to the inductor current (IL) can be transmitted to the load (202).

[0138] According to one embodiment, during the third period (Tc) in which the second switching signal (G2) and the fourth switching signal (G4) are high and the second switch (222) and the fourth switch (224) are turned on, the inductor current (IL) decreases, and the output current (Io of FIG. 5a, 522 of FIG. 5b) according to the change in the inductor current (IL) can be transmitted to the load (202).

[0139] According to one embodiment, during a first period (Ta) of a switching period (Ts) operating in buck-boost mode, the inductor current (IL) may increase to have a first slope (541) which is a positive (+) value. During a second period (Tb) which is continuous with the first period (Ta) of the switching period (Ts), the inductor current (IL) may have a second slope (542). During a third period (Tc) which is continuous with the second period (Tb) of the switching period (Ts), the inductor current (IL) may decrease to have a third slope (543) which is a negative (-) value.

[0140] According to one embodiment, as illustrated in FIG. 5b, the second slope (542) representing the slope of the inductor current (IL) during the second section (Tb) may be at a zero level (slope 0). In this case, the inductor current (IL) may be maintained at a constant level without a relatively large change and may appear in a flat shape.

[0141] According to one embodiment, the second slope representing the slope of the inductor current (IL) during the second period (Tb) may have a positive (+) value with a smaller change amount than the first slope of the first period (Ta). For example, referring to FIG. 8A, when the power converter (200) switches from buck mode to buck-boost mode, the second slope (802) of the inductor current (IL) may have a positive (+) value with a smaller change amount than the first slope (801).

[0142] According to one embodiment, the second slope representing the slope of the inductor current (IL) during the second period (Tb) may have a negative (-) value with a smaller change amount than the third slope of the third period (Tc). For example, referring to FIG. 8b, when the power converter (200) switches from buck-boost mode to buck mode, the second slope (806) of the inductor current (IL) may have a negative (-) value with a smaller change amount than the third slope (807).

[0143] According to one embodiment, the power converter (200) can prevent or reduce fluctuations in output voltage (or changes in output power) due to operation mode switching by selectively applying switching control using dual constant on-time values ​​(e.g., the first on-time (TON1) and the second on-time (TON2) of FIG. 5b) depending on the operation mode.

[0144] According to one embodiment, when the power converter (200) operates in buck-boost mode, it can reduce the ripple and peak value of the inductor current by performing switching control so that the inductor current has multiple slopes (e.g., three) within one switching cycle. Accordingly, switching loss can be reduced, thereby improving power efficiency.

[0145] FIG. 6a is a diagram showing a circuit operating state when a power converter (200) according to one embodiment operates in boost mode. FIG. 6b is a diagram showing operating signal waveforms when a power converter (200) according to one embodiment operates in boost mode.

[0146] According to one embodiment, when the input voltage (Vin, e.g., 3.5 V) falls within a third range that is lower than the output voltage (Vo, e.g., 4 V) by a certain offset or more, the power converter (200) may perform a step-up operation by operating in a boost mode (610).

[0147] According to one embodiment, a boost mode section operating in boost mode (410) may include one or more switching periods (Ts). Each switching period (Ts) within the boost mode section may include a first period (T1) and a second period (T2).

[0148] Referring to FIG. 6A, during a switching period (Ts) in which the power converter (200) operates in boost mode (610), two switches, a third switch (223) and a fourth switch (224), disposed on the output side of the power converter (200) may be alternately turned on. During the switching period (Ts), one of the two switches disposed on the input side of the power converter (200), a second switch (222), may always be turned off. During the switching period (Ts), the other of the two switches disposed on the input side of the power converter (200), a first switch (221), may always be turned on (Always ON).

[0149] According to one embodiment, during the boost mode operating in the boost mode (610), the control circuit (210) of the power converter (200) may perform switching control in the boost mode (610) by outputting the switching signals (G1, G2, G3, G4) (third switching signal set) shown in FIG. 6B to the plurality of switches (221, 222, 223, 224). The third switching signal set may be for alternately turning on the third switch (223) and the fourth switch (224) on the output side among the plurality of switches (221, 222, 223, 224), maintaining the first switch (221) on the input side in a turned-on state, and maintaining the second switch (222) on the input side in a turned-off state. The power converter (200) can boost the input voltage (Vin) to an output voltage (Vo) through such switching control and transmit it to the load (202).

[0150] Referring to FIG. 6B, reference numeral 620 is a waveform diagram of an inductor current (IL) and a switch current (IQ1, IQ3, IQ4). Reference numeral 631 is a waveform diagram of a first switching signal (or a first gate driving signal, G1) applied to a first switch (221). Reference numeral 632 is a waveform diagram of a second switching signal (or a second gate driving signal, G2) applied to a second switch (222). Reference numeral 633 is a waveform diagram of a third switching signal (or a third gate driving signal, G3) applied to a third switch (223). Reference numeral 634 is a waveform diagram of a fourth switching signal (or a fourth gate driving signal, G4) applied to a fourth switch (224).

[0151] According to one embodiment, reference symbol Ts represents one switching period within a boost mode period, T1 represents a first period (or first phase) of the switching period, and T2 represents a second period (or second phase) of the switching period.

[0152] According to one embodiment, during the switching period (Ts), the first switching signal (G1) may be maintained high and the second switching signal (G2) may be maintained low.

[0153] According to one embodiment, the third switching signal (G1) may be high during a first period (T1) of the switching period (Ts) and low during a second period (T2) of the switching period (Ts). The third switching signal (G3) may be a signal having a relatively short second on-time (TON2) (e.g., a duty cycle of 10% or less). The second on-time (TON2) may be the on-time of the third switch (223). The second on-time (TON2) may be set based on the switching period (Ts) and the ratio of the input voltage (Vin) and the output voltage (Vo). For example, the second on-time (TON2), which is the on-time of the third switching signal (G1), may be set by the mathematical expression 2 described below.

[0154] According to one embodiment, the fourth switching signal (G4) may be low during a first period (T1) of the switching period (Ts) and high during a second period (T2) of the switching period (Ts). The fourth switching signal (G4) may be an inversion signal of the third switching signal (G3) and may be a signal having an off time corresponding to the second on time (TON2). The on time (e.g., a duty cycle of 90% or more) of the fourth switching signal (G4) (or the fourth switch (224)) may be relatively longer than the second on time (TON2) (e.g., a duty cycle of 10% or less). As the third switching signal (G3) transitions from high to low, the fourth switching signal (G4) may transition from low to high.

[0155] According to one embodiment, during the boost mode period, the power converter (200) can adjust (e.g., increase / decrease) the value of the second on-time (TON2), which is the on-time of the third switching signal (G3), according to a variation of the input voltage (Vin) (e.g., decrease / increase of the battery voltage) in order to maintain the output voltage (Vo) at a constant level. For example, when the input voltage (Vin) varies while the output voltage (Vo) is fixed, the value of the second on-time (TON2) can be adjusted (e.g., increase / decrease) so that the value of the switching period (Ts) remains constant.

[0156] According to one embodiment, when the value of the second on-time (TON2), which is the on-time of the third switching signal (G3), is adjusted, the on-time value of the fourth switching signal (G4) may be adjusted together so that the value of the switching period (Ts) remains constant. For example, when the second on-time (TON2), which is the on-time of the third switching signal (G3), is lengthened, the on-time of the fourth switching signal (G4) may be shortened.

[0157] According to one embodiment, the inductor current (IL) may increase during a first period (T1) of the switching period (Ts) and decrease during a second period (T2) of the switching period (Ts). This change in the inductor current (IL) may be repeated for each switching period.

[0158] According to one embodiment, an output current (Io in FIG. 6a, 621 in FIG. 6b) according to a change in the inductor current (IL) can be transmitted to the load (202) during the second period (T2). The output current is an output current of the power converter (200) (or power switching circuit (220)) and can correspond to an input current to the load (202).

[0159] According to one embodiment, during a second period (T2) in which the first switching signal (G1) and the fourth switching signal (G4) are high and the first switch (221) and the fourth switch (224) are turned on, the inductor current (IL) decreases, and the output current (Io in FIG. 6a, 621 in FIG. 6b) according to the change in the inductor current (IL) can be transmitted to the load (202).

[0160] Fig. 7 is a circuit diagram of a power converter (700) according to one embodiment.

[0161] Referring to FIG. 7, the power converter (700) may be a buck-boost converter and may include a power switching circuit (710) and a control circuit (720). For example, the power converter (700) may be a non-inverting buck-boost power converter.

[0162] The power converter (700), power switching circuit (710), and control circuit (720) of FIG. 7 may correspond to the power converter (200), power switching circuit (220), and control circuit (210) of FIG. 2 described above, respectively.

[0163] According to one embodiment, the power switching circuit (710) may include a plurality of switches (711, 712, 713, 714) and an inductor (715). The power switching circuit (710) may store energy in the inductor (715) using an input voltage (Vin) from a power source (701) or transmit an output voltage (Vo) according to the energy stored in the inductor (715) to the load (702) depending on the switching state (on / off state) of the plurality of switches (711, 712, 713, 714). The size of the output voltage (Vo) may vary depending on the size of the input voltage (Vin), the switching state (on / off state) of the plurality of switches (711, 712, 713, 714), and / or the on time of the turned-on switch(es) among the plurality of switches (711, 712, 713, 714).

[0164] According to one embodiment, the control circuit (720) is for switching control of a plurality of switches (711, 712, 713, 714) within the power switching circuit (710), and may include an output feedback control circuit (730), a switching control circuit (740), and a mode control circuit (750).

[0165] According to one embodiment, the output feedback control circuit (730) can detect (or receive) the output voltage (Vo). The output feedback control circuit (730) can output a control voltage (Vc) based on a difference between the output voltage (Vo) and a designated target output voltage (e.g., 3 V). The control voltage (Vc) can be generated based on a comparison result between the actual output voltage (Vo) and the target output voltage (e.g., 3 V). The higher the control voltage (Vc), the more power can be transferred from the power switching circuit (710) to the load (702).

[0166] According to one embodiment, the output feedback control circuit (730) may include a PI controller (proportional and integral controller) to compensate for the difference (or error) between the output voltage (Vo) (actual output voltage) detected from the output node and the target output voltage (e.g., 3 V).

[0167] According to one embodiment, the switching control circuit (740) can generate a switching signal set including switching signals (G1, G2, G3, G4) for controlling switches (711, 712, 713, 714) and output the switching signal set to the switches (711, 712, 713, 714).

[0168] According to one embodiment, the switching control circuit (740) can receive a node signal (Vcs) from a first node (N1) of the inductor (715). The switching control circuit (740) can receive a control voltage (Vc) from an output feedback control circuit (730). The switching control circuit (740) can generate a set signal (Set) based on a comparison between the node signal (Vcs) and the control voltage (Vc). The switching control circuit (740) can output a first switching signal (G1) for controlling the first switch (711) and a second switching signal (G2) for controlling the second switch (712) based on the set signal (Set) and the boost enable signal (Boost_ENA). The switching control circuit (740) can output a third switching signal (G3) for controlling the third switch (713) and a fourth switching signal (G4) for controlling the fourth switch (714) based on the set signal (Set) and the buck-boost enable signal (BB_ENA).

[0169] According to one embodiment, the mode control circuit (750) can set the operating mode of the power converter (700) to one of buck mode, buck-boost mode, and boost mode or perform mode switching based on the range of the input voltage (Vin).

[0170] According to one embodiment, the mode control circuit (750) can output at least one of a boost enable signal (Boost_ENA) or a buck-boost enable signal (BB_ENA) for mode setting (or switching) based on a range of an input voltage (Vin).

[0171] According to one embodiment, the mode control circuit (750) can output (or activate) a buck-boost enable signal (BB_ENA) to the switching control circuit (740) based on a comparison between an input voltage (Vin) and a specified first threshold value (VTH1).

[0172] According to one embodiment, when the input voltage (Vin) (e.g., battery voltage) decreases from a high level (e.g., discharged state) compared to the output voltage (Vo) and reaches a first threshold value (VTH1), a buck-boost enable signal (BB_ENA) may transition from low to high to enter the buck-boost mode. For example, the first threshold value (VTH1) may be a value corresponding to 105% of the output voltage (Vo) (or target output voltage).

[0173] In one embodiment, when the input voltage (Vin) (e.g., battery voltage) increases from a level lower than the output voltage (Vo) (e.g., during charging) and reaches a first threshold value (VTH1), a buck-boost enable signal (BB_ENA) may transition from low to high to enter the buck-boost mode. For example, the first threshold value (VTH1) may be a value corresponding to 95% of the output voltage (Vo) (or target output voltage).

[0174] According to one embodiment, the mode control circuit (750) can output (or activate) a boost enable signal (Boost_ENA) to the switching control circuit (740) based on a comparison between an input voltage (Vin) and a designated second threshold value (VTH2).

[0175] According to one embodiment, when the input voltage (Vin) (e.g., battery voltage) decreases (e.g., discharges) and reaches a second threshold value (VTH2) after entering the buck-boost mode, a boost enable signal (Boost_ENA) may be activated to enter the boost mode. For example, the second threshold value (VTH2) may be a value corresponding to 90% of the output voltage (Vo) (or target output voltage).

[0176] In one embodiment, when the input voltage (Vin) (e.g., battery voltage) increases (e.g., is in a charging state) and reaches a second threshold value (VTH2) after entering the buck-boost mode, the boost enable signal (Boost_ENA) may be deactivated to enter the buck mode. For example, the second threshold value (VTH2) may be a value corresponding to 110% of the output voltage (Vo) (or target output voltage).

[0177] According to one embodiment, the operation mode of the power converter (700) can be set or mode switching can be performed based on the boost enable signal (Boost_ENA) and the buck-boost enable signal (BB_ENA).

[0178] Table 1 below illustrates the operating modes of the power converter (700) set based on the boost enable signal (Boost_ENA) and the buck-boost enable signal (BB_ENA).

[0179]

[0180] According to one embodiment, the switching control circuit (740) may include a comparator (741). A node signal (Vcs) from a first node (N1) and a control voltage (Vc) from an output feedback control circuit (730) may be input to the comparator (741). The comparator (741) may output a set signal (Set) based on a comparison between the node signal (Vcs) corresponding to an inductor current (IL) and the control voltage (Vc). For example, the comparator (741) may output the set signal (Set) when the node signal (Vcs) becomes lower than the control voltage (Vc). The set signal (Set) may be a trigger signal for outputting (or activating) a first control signal (G01) and a second control signal (G02).

[0181] According to one embodiment, the switching control circuit (740) may be for switching control for a plurality of switches (711, 712, 713, 714). The switching control circuit (740) may output a set of switching signals including switching signals (G1, G2, G3, G4) according to an operating mode. For example, the switching control circuit (740) may output a first set of switching signals in a buck mode. The switching control circuit (740) may output a second set of switching signals in a buck-boost mode. The switching control circuit (740) may output a third set of switching signals in a boost mode.

[0182] According to one embodiment, the switching control circuit (740) can generate and / or output a switching signal set including switching signals (G1, G2, G3, G4) for switching control of the buck mode, buck-boost mode, and boost mode by combining the buck-boost enable signal (BB_ENA) or the boost enable signal (Boost_ENA) output from the mode control circuit (750) and the first control signal (G01) and the second control signal (G02).

[0183] According to one embodiment, the switching control circuit (740) may include a plurality (e.g., two) of ON time generators (742, 743). The switching control circuit (740) may include a first ON time generator (742) and a second ON time generator (743). The first ON time generator (742) may be configured to set a first ON time (TON1). The first ON time generator (742) may output a first control signal (G01) having a first ON time (TON1). The second ON time generator (743) may be configured to set a second ON time (TON2). The second ON time generator (743) may output a second control signal (G02) having a second ON time (TON2).

[0184] According to one embodiment, at each switching cycle, when the node signal (Vcs) corresponding to the inductor current (IL) becomes lower than the control voltage (Vc), the first control signal (G01) and the second control signal (G02) may each transition from low to high. The first control signal (G01) may be maintained high for a first on-time (TON1) and then transitioned to low. The second control signal (G02) may be maintained high for a second on-time (TON2) and then transitioned to low.

[0185] According to one embodiment, the first on-time generator (742) can output a first control signal (G01) having a first on-time (TON1) in response to a set signal (Set) output from the comparator (741). The second on-time generator (743) can output a second control signal (G02) having a second on-time (TON2) in response to a set signal (Set) output from the comparator (741).

[0186] According to one embodiment, the first on-time (TON1) and the second on-time (TON2) can be determined as a function of the input voltage (Vin) and the output voltage (Vo) such that the value of each switching period (Ts) is constant.

[0187] In one embodiment, the first on-time (TON1) may be determined based on the switching period (Ts) and the ratio of the input voltage (Vin) and the output voltage (Vo). In one embodiment, the first on-time (TON1) is for buck mode (or step-down operation) and may be set, for example, by mathematical expression 1 described below.

[0188] In one embodiment, the second on-time (TON2) may be set based on the switching period (Ts) and the ratio of the input voltage (Vin) and the output voltage (Vo). In one embodiment, the second on-time (TON2) is for boost mode (or step-up operation) and may be set, for example, by mathematical expression 2 described below.

[0189] According to one embodiment, the first on-time (TON1) and the second on-time (TON2) can be determined as a function of the input voltage (Vin) and the output voltage (Vo) such that the value of each switching period (Ts) is constant.

[0190] According to one embodiment, the switching control circuit (740) may be for switching control in a dual constant ON time manner. The switching control circuit (740) may be for setting a designated first ON time (TON1) and a designated second ON time (TON2).

[0191] According to one embodiment, the switching control circuit (740) can perform switching control in a dual constant on-time manner during the buck-boost mode. The switching control circuit (740) can perform switching control in a dual constant on-time manner through two on-time generators (742, 743).

[0192] According to one embodiment, the first on-time generator (742) can output (or activate) a first control signal (G01) based on a set signal (Set) and a designated first on-time voltage (VTON1). The first on-time voltage (VTON1) can be a reference value for setting a designated first on-time (TON1). The designated first on-time (TON1) can be an on-time of the first control signal (G01).

[0193] According to one embodiment, the second on-time generator (743) can output (or activate) a second control signal (G02) based on a set signal (Set) and a designated second on-time voltage (VTON2). The second on-time voltage (VTON2) can be a reference value for setting a designated second on-time (TON2). The designated second on-time (TON2) can be an on-time of the second control signal (G02).

[0194] According to one embodiment, the first on-time voltage (VTON1) may be set to a value corresponding to a specified first on-time (TON1). The second on-time voltage (VTON2) may be set to a value corresponding to a specified second on-time (TON2).

[0195] According to one embodiment, based on a node signal (Vcs) corresponding to an inductor current (IL), a first switching signal (G1) and a third switching signal (G3) can transition from low to high, respectively. The first switching signal (G1) can be maintained high for a designated first on-time (TON1) and then transitioned to low. The third switching signal (G3) can be maintained high for a designated second on-time (TON2) and then transitioned to low.

[0196] According to one embodiment, the switching control circuit (740) may include a first logic driver (744) and a second logic driver (745). The first logic driver (744) may include an OR gate and an inverter. The second logic driver (745) may include an AND gate and an inverter.

[0197] According to one embodiment, the first logic driver (744) can output a first switching signal (G1) for the first switch (711) and a second switching signal (G2) for the second switch (712) in response to a boost enable signal (Boost_ENA) or a first control signal (G01) having a first on-time (TON1). The first switching signal (G1) can be a signal having a first on-time (TON1). The second switching signal (G2) can be an inverted signal of the first switching signal (G1).

[0198] According to one embodiment, the second logic driver (745) can output a third switching signal (G3) for the third switch (713) and a fourth switching signal (G4) for the fourth switch (714) in response to a buck-boost enable signal (BB_ENA) and a second control signal (G02) having a second on-time (TON2). The third switching signal (G3) can be a signal having a second on-time (TON2). The fourth switching signal (G4) can be an inverted signal of the third switching signal (G3).

[0199] According to one embodiment, the control circuit (720) can generate a first switching signal set including a first switching signal (G1), a second switching signal (G2), a third switching signal (G3), and a fourth switching signal (G4) for each switching cycle during the buck mode section, and output the first switching signal set to the plurality of switches (711, 712, 713, 714). The control circuit (720) can generate a second switching signal set including a first switching signal (G1), a second switching signal (G2), a third switching signal (G3), and a fourth switching signal (G4) for each switching cycle during the buck-boost mode section, and output the second switching signal set to the plurality of switches (711, 712, 713, 714). The control circuit (720) can generate a third switching signal set including a first switching signal (G1), a second switching signal (G2), a third switching signal (G3), and a fourth switching signal (G4) for each switching cycle during the boost mode period, and output the third switching signal set to a plurality of switches (711, 712, 713, 714).

[0200] According to one embodiment, the control circuit (720) can output a second switching signal set including a first switching signal (G1) for the first switch (711), a second switching signal (G2) for the second switch (712), a third switching signal (G3) for the third switch (713), and a fourth switching signal (G4) for the fourth switch (714) during a switching period (Ts) operating in buck-boost mode. The first switching signal (G1) can be a signal having a designated first on-time (TON1) (e.g., a first constant value). The first switching signal (G1) can be output to the first switch (711) (e.g., a gate terminal of a MOSFET) through an OR gate of a logic driver (744). The second switching signal (G2) can be an inverted signal of the first switching signal (G1). The second switching signal (G2) may be output to the second switch (712) (e.g., the gate terminal of a MOSFET) through an inverter of a logic driver (744). The third switching signal (G3) may be a signal that is triggered together with the first switching signal (G1) and has a designated second on-time (TON2) (e.g., a second constant value) that is shorter than the designated first on-time (TON1). The third switching signal (G3) may be output to the third switch (713) (e.g., the gate terminal of a MOSFET) through an AND gate of a second logic driver (745). The fourth switching signal (G4) may be an inverted signal of the third switching signal (G3). The fourth switching signal (G4) may be output to the fourth switch (714) (e.g., the gate terminal of a MOSFET) through an inverter of a second logic driver (745).

[0201] FIG. 8A is an operation signal waveform diagram when a power converter (700) according to one embodiment switches from buck mode to buck-boost mode.

[0202] According to one embodiment, the power converter (700) can switch from a buck mode to a buck-boost mode. The buck mode period can include multiple switching periods (Ts) (e.g., two or more). Each switching period (Ts) within the buck mode period can include a first period (T1) and a second period (T2). The buck-boost mode period can include multiple switching periods (Ts) (e.g., two or more). Each switching period (Ts) within the buck-boost mode period can include a first period (Ta), a second period (Tb), and a third period (Tc).

[0203] Referring to FIG. 8A, reference numeral 811 is a waveform diagram of a first control signal (G01). The first control signal (G01) may be an output of a first on-time generator (742) within a switching control circuit (740) illustrated in FIG. 7. Reference numeral 812 is a waveform diagram of a second control signal (G02). The second control signal (G02) may be an output of a second on-time generator (743) within a switching control circuit (740) illustrated in FIG. 7.

[0204] Reference numeral 821 is a waveform diagram of a buck-boost enable signal (BB_ENA). Reference numeral 822 is a waveform diagram of a boost enable signal (Boost_ENA). The buck-boost enable signal (BB_ENA) and the boost enable signal (Boost_ENA) may be outputs of the mode control circuit (750) illustrated in FIG. 7.

[0205] Reference numeral 831 is a waveform diagram of a first switching signal (G1) for controlling a first switch (711). Reference numeral 832 is a waveform diagram of a second switching signal (G2) for controlling a second switch (712). Reference numeral 833 is a waveform diagram of a third switching signal (G3) for controlling a third switch (713). Reference numeral 834 is a waveform diagram of a fourth switching signal (G4) for controlling a fourth switch (714). The first switching signal (G1), the second switching signal (G2), the third switching signal (G3), and the fourth switching signal (G4) may be outputs of a switching control circuit (740) illustrated in FIG. 7.

[0206] Reference numeral 841 is a waveform diagram of the voltage (VL) across the inductor (715). Reference numeral 842 is a waveform diagram of the inductor current (IL) flowing through the inductor (715).

[0207] According to one embodiment, a switching period (Ts) operating in buck mode may include a first period (T1) during which the inductor current (IL) increases and a second period (T2) during which the inductor current (IL) decreases.

[0208] The power converter (700) can be switched from buck mode to buck-boost mode as the buck-boost enable signal (BB_ENA) transitions from low to high.

[0209] According to one embodiment, at each switching period (Ts), when the node signal (Vcs) corresponding to the inductor current (IL) becomes lower than the control voltage (Vc), a trigger signal may be generated to cause the first control signal (G01) and the second control signal (G02) to transition from low to high, respectively. The first control signal (G01) may be maintained high for a specified time (or a first on-time (TON1)) and then transitioned from high to low again. The second control signal (G02) may be maintained high for a specified time (or a second on-time (TON2)) and then transitioned from high to low again. The first control signal (G01) may be a signal having a relatively long first on-time (TON1) (e.g., a duty cycle of 90% or more). The second control signal (G02) may be a signal having a relatively short second on-time (TON2) (e.g., a duty cycle of 10% or less).

[0210] According to one embodiment, during a switching period (Ts) operating in buck-boost mode, a first switching signal (G1) having a first on-time (TON1) and a second switching signal (G2) which is an inversion signal of the first switching signal (G1) may be generated based on a first control signal (G01). In addition, a third switching signal (G3) having a second on-time (TON2) and a fourth switching signal (G4) which is an inversion signal of the third switching signal (G3) may be generated based on a second control signal (G02).

[0211] According to one embodiment, a switching period (Ts) operating in buck-boost mode may include a first period (or first phase) (Ta) in which the inductor current (IL) increases, a second period (or second phase) (Tb) in which the amount of change in the inductor current (IL) is maintained within a certain range, and a third period (or third phase) (Tc) in which the inductor current (IL) decreases.

[0212] According to one embodiment, during a first period (Ta) of a switching period (Ts) operating in buck-boost mode, the inductor current (IL) may increase to have a first slope (801) (positive slope). During a second period (Tb) of the switching period (Ts), the inductor current (IL) may have a second slope (802) (slope 0, or a positive slope with a smaller angle than the first slope) that is smaller than the first slope. During the second period (Tb) of the switching period (Ts), the inductor current (IL) may be maintained at the same level (slope 0) or may increase to a second slope (positive slope) that is smaller than the first slope. During a third period (Tc) of the switching period (Ts), the inductor current (IL) may decrease to have a third slope (803) (negative slope).

[0213] According to one embodiment, since the voltage (VL) across the inductor is determined by the slope of the inductor current (IL), the voltage (VL) across the inductor can be maintained at the same level in a section where the slope of the inductor current (IL) is the same. In a first section (Ta) where the slope (or rate of change) of the inductor current (IL) is positive, the voltage (VL) across the inductor can have a first voltage (Vin). In a second section (Tb) where the slope of the inductor current (IL) is 0 or close to 0, the voltage (VL) across the inductor can have a second voltage (Vin-Vo). In a third section (Tc) where the rate of change of the inductor current (IL) is negative, the voltage (VL) across the inductor can have a third voltage (-Vo).

[0214] FIG. 8b is an operation signal waveform diagram when a power converter (700) according to one embodiment switches from buck-boost mode to boost mode.

[0215] According to one embodiment, the power converter (700) can switch from a buck-boost mode to a boost mode. The buck-boost mode period can include multiple switching periods (Ts) (e.g., two or more). Each switching period (Ts) within the buck-boost mode period can include a first period (Ta), a second period (Tb), and a third period (Tc). The boost mode period can include multiple switching periods (Ts) (e.g., two or more). Each switching period (Ts) within the boost mode period can include a first period (T1) and a second period (T2).

[0216] Referring to FIG. 8B, reference numeral 851 is a waveform diagram of a first control signal (G01). The first control signal (G01) may be an output of a first on-time generator (742) within a switching control circuit (740) illustrated in FIG. 7. Reference numeral 852 is a waveform diagram of a second control signal (G02). The second control signal (G02) may be an output of a second on-time generator (743) within a switching control circuit (740) illustrated in FIG. 7.

[0217] Reference numeral 861 is a waveform diagram of a buck-boost enable signal (BB_ENA). Reference numeral 862 is a waveform diagram of a boost enable signal (Boost_ENA). The buck-boost enable signal (BB_ENA) and the boost enable signal (Boost_ENA) may be outputs of the mode control circuit (750) illustrated in FIG. 7.

[0218] Reference numeral 871 is a waveform diagram of a first switching signal (G1) for controlling a first switch (711). Reference numeral 872 is a waveform diagram of a second switching signal (G2) for controlling a second switch (712). Reference numeral 873 is a waveform diagram of a third switching signal (G3) for controlling a third switch (713). Reference numeral 874 is a waveform diagram of a fourth switching signal (G1) for controlling a fourth switch (714). The first switching signal (G1), the second switching signal (G2), the third switching signal (G3), and the fourth switching signal (G4) may be outputs of the switching control circuit (740) illustrated in FIG. 7.

[0219] Reference numeral 881 is a waveform diagram of the voltage (VL) across the inductor (715). Reference numeral 882 is a waveform diagram of the inductor current (IL) flowing in the inductor (715).

[0220] According to one embodiment, at each switching period (Ts), when the node signal (Vcs) corresponding to the inductor current (IL) becomes lower than the control voltage (Vc), a trigger signal may be generated to cause the first control signal (G01) and the second control signal (G02) to transition from low to high, respectively. The first control signal (G01) may be maintained high for a specified time (or a first on-time (TON1)) and then transitioned from high to low again. The second control signal (G02) may be maintained high for a specified time (or a second on-time (TON2)) and then transitioned from high to low again. The first control signal (G01) may be a signal having a relatively long first on-time (TON1) (e.g., a duty cycle of 90% or more). The second control signal (G02) may be a signal having a relatively short second on-time (TON2) (e.g., a duty cycle of 10% or less).

[0221] According to one embodiment, during a switching period (Ts) operating in buck-boost mode, a first switching signal (G1) having a first on-time (TON1) and a second switching signal (G2) which is an inversion signal of the first switching signal (G1) may be generated based on a first control signal (G01). In addition, a third switching signal (G3) having a second on-time (TON2) and a fourth switching signal (G4) which is an inversion signal of the third switching signal (G3) may be generated based on a second control signal (G02).

[0222] According to one embodiment, a switching period (Ts) operating in buck-boost mode may include a first period (or first phase) (Ta) in which the inductor current (IL) increases, a second period (or second phase) (Tb) in which the amount of change in the inductor current (IL) is maintained within a certain range, and a third period (or third phase) (Tc) in which the inductor current (IL) decreases.

[0223] According to one embodiment, during a first section (Ta) of the switching period (Ts), the inductor current (IL) may increase with a first slope (805) (positive slope). During a third section (Tc) of the switching period (Ts), the inductor current (IL) may decrease with a third slope (807) (negative slope). During a second section (Tb) of the switching period (Ts), the inductor current (IL) may be maintained with a second slope (806) (slope 0, or a negative slope at a smaller angle than the third slope) that is smaller than the third slope. During the second section (Tb) of the switching period (Ts), the inductor current (IL) may be maintained at the same level (slope 0) or may decrease with a second slope (negative slope) that is smaller than the third slope.

[0224] According to one embodiment, since the voltage (VL) across the inductor is determined by the slope of the inductor current (IL), the voltage (VL) across the inductor can be maintained at the same level in a section where the slope of the inductor current (IL) is the same. In a first section (Ta) where the rate of change of the inductor current (IL) is positive, the voltage (VL) across the inductor can have a first voltage (Vin). In a second section (Tb) where the slope of the inductor current (IL) is 0 or close to 0, the voltage (VL) across the inductor can have a second voltage (Vin-Vo). In a third section (Tc) where the rate of change of the inductor current (IL) is negative, the voltage (VL) across the inductor can have a third voltage (-Vo).

[0225] According to one embodiment, the power converter (700) can transition from buck-boost mode to boost mode as the boost enable signal (Boost_ENA) transitions from low to high.

[0226] According to one embodiment, a switching period (Ts) operating in boost mode may include a first period (T1) during which the inductor current (IL) increases and a second period (T2) during which the inductor current (IL) decreases.

[0227] FIG. 9 is a graph for explaining a change in switch-on time according to an operating mode and / or variation in input voltage in a power converter (200) according to one embodiment.

[0228] According to one embodiment, the power converter (200) can operate in any one of the operation modes of buck mode, boost mode, or buck-boost mode depending on the range of the input voltage (Vin). The operation mode section of the power converter (200) can include a buck mode section (901), a buck-boost mode section (902), and a boost mode section (903).

[0229] Reference numeral 910 of FIG. 9 is a graph illustrating input voltage (Vin) and output voltage (Vo). According to one embodiment, as illustrated in the graph of reference numeral 910, the output voltage (Vo) (or target output voltage) may be fixed to a constant value (e.g., 3.5 V) regardless of changes in the operating mode. The input voltage (Vin) may vary over time, for example, depending on the charge / discharge status of the battery.

[0230] According to one embodiment, the input voltage (Vin) (e.g., battery voltage) of the power converter (200) may vary depending on the battery charge state (or discharge state). For example, in a fully charged state of a battery (e.g., battery 1389 illustrated in FIG. 11), the input voltage (Vin) may be 5 V, corresponding to the battery charge voltage. As the battery is discharged, the input voltage (Vin) may sequentially decrease from 5 V to a first range, a second range lower than the first range, and a third range lower than the second range.

[0231] Referring to the graph 910 illustrated in FIG. 9, the buck mode section (901) may be a section belonging to a first range in which the input voltage (Vin) is higher than the output voltage (Vo) by a predetermined offset or more. The power converter (200) may operate in the buck mode during the buck mode section (901). The buck-boost mode section (902) may be a section in which the input voltage (Vin) is at the same level as the output voltage (Vo) or belongs to a second range in which the input voltage (Vin) is similar to the output voltage (Vo). The power converter (200) may operate in the buck-boost mode during the buck-boost mode section (902). The boost mode section (903) may be a section in which the input voltage (Vin) is lower than the output voltage (Vo) by a predetermined offset or more. The power converter (200) may operate in the boost mode during the boost mode section (903).

[0232] Reference numeral 920 of FIG. 9 is a graph illustrating changes in switch-on time (TON1, TON2) values ​​according to the operating mode and / or the passage of time.

[0233] According to one embodiment, the switch on time (TON1, TON2) may correspond to the on time of a plurality of switches (e.g., the first to fourth switches (221, 222, 223, 224) of FIG. 2) within the power converter (200) or the on time of switching signals for on / off control of the plurality of switches.

[0234] According to one embodiment, the setting (or control) method of the switch on time (TON1, TON2) may vary depending on the operating mode of the power converter (200).

[0235] According to one embodiment, when the operating mode of the power converter (200) is a buck mode, the switch on time (e.g., the first on time (TON1)) may change as the input voltage (Vin) changes. When the operating mode of the power converter (200) is a boost mode, the switch on time (e.g., the second on time (TON2)) may change as the input voltage (Vin) changes.

[0236] According to one embodiment, when the output voltage (Vo) is fixed to a constant value (e.g., 3.5 V), in the buck mode section (901), the switch on time (TON1) may vary depending on the variation of the input voltage (Vin). When the output voltage (Vo) is fixed to a constant value (e.g., 3.5 V), in the boost mode section (903), the switch on time (TON2) may vary depending on the variation of the input voltage (Vin). In the buck-boost mode section (902), the switch on times (TON1, TON2) may be fixed regardless of the variation of the input voltage (Vin).

[0237] According to one embodiment, during the buck mode period (901), the power converter (200) (e.g., the control circuit (210) of FIG. 2) can adaptively set the value of the first on-time (TON1) according to variations in the input voltage (Vin) (e.g., the battery state of charge). For example, the first on-time (TON1) can change (e.g., increase) from a first value to a second value as the input voltage (Vin) varies (e.g., decreases).

[0238] According to one embodiment, in the buck mode section (901), the first on-time (TON1) (e.g., the on-time of the first switch (221) illustrated in FIG. 4A or the first on-time (TON1) of the first switch signal (G1) illustrated in FIG. 4B) may be set based on the input voltage (Vin), the output voltage (Vo), and the switching period (Ts, e.g., 1 μs). For example, the first on-time (TON1) may be calculated by the following mathematical expression 1.

[0239]

[0240] Here, TON1 is the first on-time, Vin is the input voltage, Vo is the output voltage, and Ts is the switching period.

[0241] According to one embodiment, during the buck mode section (901), the power converter (200) (e.g., the control circuit (210) of FIG. 2) may adjust (e.g., increase / decrease) the value of the first on-time (TON1) according to a variation of the input voltage (Vin) (e.g., decrease / increase of the battery voltage) to maintain the output voltage (Vo) at a constant level. For example, in the above mathematical expression 1, when the input voltage (Vin) varies while the output voltage (Vo) is fixed, the value of the first on-time (TON1) may be adjusted (e.g., decrease / increase) so that the value of the switching period (Ts) is constant.

[0242] According to one embodiment, during the boost mode period (903), the power converter (200) (e.g., the control circuit (210) of FIG. 2) can adaptively set the value of the second on-time (TON2) according to variations in the input voltage (Vin) (e.g., the battery state of charge). For example, the second on-time (TON1) can change (e.g., increase) from a third value to a fourth value as the input voltage (Vin) varies (e.g., decreases).

[0243] According to one embodiment, in the boost mode section (903), the second on-time (TON2) (the on-time of the third switch (223) illustrated in FIG. 6A or the second on-time (TON2) of the third switch signal (G3) illustrated in FIG. 6B) may be set based on the input voltage (Vin), the output voltage (Vo), and the switching period (Ts, e.g., 1 μs). For example, the second on-time (TON1) may be calculated by the following mathematical expression 2.

[0244]

[0245] Here, TON2 is the second on-time, Vin is the input voltage, Vo is the output voltage, and Ts is the switching period.

[0246] According to one embodiment, during the boost mode section (903), the power converter (200) can adjust (e.g., increase / decrease) the value of the second on-time (TON2) according to a variation (e.g., decrease / increase of the battery voltage) of the input voltage (Vin) to maintain the output voltage (Vo) at a constant level. For example, in the above mathematical expression 2, when the input voltage (Vin) varies while the output voltage (Vo) is fixed, the value of the second on-time (TON2) can be adjusted (e.g., decrease / increase) so that the value of the switching period (Ts) remains constant.

[0247] According to one embodiment, when the operating mode of the power converter (200) is a buck-boost mode, the switch on time (e.g., the first on time (TON1) and the second on time (TON2)) can be fixed to a constant value regardless of the fluctuation of the input voltage (Vin).

[0248] According to one embodiment, during the buck-boost mode period (902), the power converter (200) (e.g., the control circuit (210) of FIG. 2) can set the first on-time (TON1) and the second on-time (TON2) to designated values, respectively, regardless of variations in the input voltage (Vin) (e.g., the charge / discharge state of the battery). For example, the first on-time (TON1) can be fixed to a first constant value regardless of variations in the input voltage (Vin). The second on-time (TON2) can be fixed to a second constant value regardless of variations in the input voltage (Vin).

[0249] According to one embodiment, the power converter (200) can control a plurality of switches (e.g., the first to fourth switches (221, 222, 223, 224) of FIG. 2) in a dual constant on time manner during a buck-boost mode period (902). The dual constant on time manner can mean a switching control manner that uses two fixed on time values ​​(e.g., a first on time (TON1) and a second on time (TON2)). In the buck-boost mode section (902), the first on-time (TON1) (e.g., the on-time of the first switch (221) illustrated in FIG. 5A or the first on-time (TON1) of the first switch signal (G1) illustrated in FIG. 5B) and the second on-time (TON2) (e.g., the on-time of the third switch (223) illustrated in FIG. 5A or the second on-time (TON2) of the third switch signal (G3) illustrated in FIG. 5B) can be set based on the input voltage (Vin), the output voltage (Vo) and the switching period (Ts, e.g., 1 μs).

[0250] According to one embodiment, the first on-time (TON1) of the buck-boost mode section (902) may have a value corresponding to the first on-time (TON1) of the buck mode section (901). For example, when switching from the N-1th switching period of the buck mode section (901) to the Nth switching period of the buck-boost mode section (902), the first constant value corresponding to the first on-time (TON1) of the N-1th switching period may be set as the first on-time (TON1) of the Nth switching period. For example, the first constant value corresponding to the first on-time (TON1) of the buck-boost mode section (902) may be calculated by the above mathematical expression 1.

[0251] According to one embodiment, the second on-time (TON2) of the buck-boost mode section (902) may have a value corresponding to the second on-time (TON2) of the boost mode section (903). For example, when switching from the M-th switching period of the buck-boost mode section (902) to the (M+1)th switching period of the boost mode section (903), the second constant value corresponding to the second on-time (TON2) of the M-th switching period may be set as the second on-time (TON2) of the (M+1)th switching period. For example, the second constant value corresponding to the second on-time (TON2) of the buck-boost mode section (902) may be calculated by the above mathematical expression 2.

[0252] According to one embodiment, in the buck mode section (901), the first on-time (TON1) may change from a first value to a second value depending on a change in the input voltage (Vin). In a state where the first on-time (TON1) of the buck mode section (901) is changed to the second value, the operation mode may be switched from the buck mode to the buck-boost mode. In this case, the power converter (200) may set a first constant value corresponding to the second value as the first on-time (TON1) of the buck-boost mode section (902).

[0253] According to one embodiment, in a buck-boost mode section (902), when a second constant value is set to a second on-time (TON2), the operating mode may be switched from the buck-boost mode to the boost mode. In this case, the power converter (200) may set a third value corresponding to the second constant value as the second on-time (TON2) of the boost mode section (903). In the boost mode section (903), the second on-time (TON2) may be changed from the third value to a fourth value depending on a change in the input voltage (Vin).

[0254] According to one embodiment, in the buck-boost mode section (902), the first on-time (TON1) and the second on-time (TON2) can each be fixed to a constant value. As the first on-time (TON1) and the second on-time (TON2) are fixed, the slope (or change amount), ripple, or peak value of the inductor current can be maintained within a certain range. Accordingly, switching loss can be reduced, thereby improving power efficiency.

[0255] FIG. 10a is an operation signal waveform diagram showing a change in switch-on time according to a change in input voltage when a power converter (200) according to one embodiment operates in buck mode.

[0256] Reference numeral 1010 represents a waveform diagram of a duty cycle, an inductor current, and a switch current (IQ1, IQ2) corresponding to a first on-time (TON1) of a buck mode section (901) when the input voltage (Vin) is 4.5 V and the output voltage (Vo) is 3.5 V. Reference numeral 1020 represents a waveform diagram of a duty cycle, an inductor current, and a switch current (IQ1, IQ2) corresponding to a first on-time (TON1) of a buck mode section (901) when the output voltage (Vo) is fixed at 3.5 V and the input voltage (Vin) varies from 4.5 V to 4.0 V.

[0257] Referring to FIGS. 9 and 10A together, in the buck mode section (901), as the input voltage (Vin) decreases from 4.5 V to 4.0 V, the value of the first on-time (TON1) or the duty cycle corresponding to the first on-time (TON1) may increase from a first value (D1 of FIG. 10A, e.g., about 0.8) to a second value (D2 of FIG. 10A, e.g., about 0.9). For example, the value of the duty cycle when the input voltage (Vin) is 4.0 V (D2 of FIG. 10A, e.g., about 0.9) may be set to a larger value than the value of the duty cycle when the input voltage (Vin) is 4.5 V (D1 of FIG. 10A, e.g., about 0.8). Depending on the above duty cycle, the slope, ripple or peak value of the switch current (IQ1, IQ2) and / or the inductor current may vary.

[0258] FIG. 10b is an operating signal waveform diagram showing a change in switch-on time according to a change in input voltage when a power converter (200) according to one embodiment operates in boost mode.

[0259] Reference numeral 1050 represents waveforms of duty cycle, inductor current, and switch current (IQ3, IQ4) corresponding to the second on-time (TON2) when the input voltage (Vin) is 3.1 V and the output voltage (Vo) is 3.5 V. Reference numeral 1060 represents waveforms of duty cycle, inductor current, and switch current (IQ3, IQ4) corresponding to the second on-time (TON2) when the output voltage (Vo) is fixed at 3.5 V and the input voltage (Vin) is varied to 2.8 V.

[0260] Referring to FIGS. 9 and 10b together, in the boost mode section (903), as the input voltage (Vin) decreases from 3.1 V to 2.8 V, the value of the second on-time (TON2) or the duty cycle corresponding to the second on-time (TON2) may increase from a third value (D3 of FIG. 10b, for example, approximately 0.1) to a fourth value (D4 of FIG. 10b, for example, approximately 0.2). For example, the value of the duty cycle when the input voltage (Vin) is 2.8 V (D4 of FIG. 10b, for example, approximately 0.2) may be set to a larger value than the value of the duty cycle when the input voltage (Vin) is 3.1 V (D3 of FIG. 10b, for example, approximately 0.1). Depending on the above duty cycle, the slope, ripple or peak value of the switch current (IQ3, IQ4) and / or the inductor current may vary.

[0261] FIG. 11a is an operation signal waveform diagram showing simulation results when a power converter (700) according to one embodiment switches from buck mode to buck-boost mode.

[0262] According to one embodiment, the power converter (700) can switch from buck mode to buck-boost mode.

[0263] Referring to FIG. 11A, reference numeral 1110 is a waveform diagram of a buck-boost enable signal (BB_ENA), a boost enable signal (Boost_ENA), a first switching signal (G1) for controlling a first switch (711), and a third switching signal (G3) for controlling a third switch (713). Reference numeral 1121 is a waveform diagram of an inductor current (IL). Reference numeral 1122 is a waveform diagram of a voltage across the inductor (VL). Reference numeral 1130 is a waveform diagram of an output voltage (Vo). Reference numeral 1140 is a waveform diagram of a node signal (Vcs). The node signal (Vcs) may be a sensing voltage proportional to the inductor current (IL).

[0264] Reference numeral 1101 may be a transition section from buck mode to buck-boost mode.

[0265] As shown in the transition section (1101) of FIG. 11a, the waveform diagram (1121) of the inductor current (IL), and the waveform diagram (1130) of the output voltage (Vo), when the power converter (700) switches from the buck mode to the buck-boost mode, the overshoot of the output voltage (Vo) may not occur or may be reduced because the change in the magnitude of the inductor current (IL) (ripple and peak value) is small.

[0266] In addition, as illustrated in the waveform diagram (921) of the inductor current (IL) of FIG. 11a, while the power converter (700) operates in the buck-boost mode, the average inductor current can be reduced as the inductor current (IL) has three slopes compared to the case where the inductor current (IL) has two slopes (e.g., see the buck-boost mode according to the comparative example of FIG. 1c). Accordingly, switching loss can be reduced, thereby improving power efficiency.

[0267] FIG. 11b is an operation signal waveform diagram showing simulation results when a power converter (700) according to one embodiment switches from buck-boost mode to boost mode.

[0268] According to one embodiment, the power converter (700) can switch from buck-boost mode to boost mode.

[0269] Referring to FIG. 11B, reference numeral 1150 is a waveform diagram of a buck-boost enable signal (BB_ENA), a boost enable signal (Boost_ENA), a first switching signal (G1) for controlling a first switch (711), and a third switching signal (G3) for controlling a third switch (713). Reference numeral 1151 is a waveform diagram of an inductor current (IL). Reference numeral 1152 is a waveform diagram of a voltage across the inductor (VL). Reference numeral 1160 is a waveform diagram of an output voltage (Vo). Reference numeral 1170 is a waveform diagram of a node signal (Vcs). The node signal (Vcs) may be a sensing voltage proportional to the inductor current (IL).

[0270] Reference numeral 1102 may be a transition section from buck-boost mode to boost mode.

[0271] As shown in the transition section (1102) of FIG. 11b, the waveform diagram (1151) of the inductor current (IL), and the waveform diagram (1160) of the output voltage (Vo), when the power converter (700) switches from the buck-boost mode to the boost mode, the undershoot of the output voltage (Vo) may not occur or may be reduced because the change in the magnitude of the inductor current (IL) (ripple and peak value) is small.

[0272] In addition, as illustrated in the waveform diagram (1151) of the inductor current (IL) of FIG. 11b, while the power converter (700) operates in the buck-boost mode, the average inductor current can be reduced as the inductor current (IL) has three slopes compared to the case where the inductor current (IL) has two slopes (e.g., see the buck-boost mode according to the comparative example of FIG. 1d). Accordingly, switching loss can be reduced, thereby improving power efficiency.

[0273] FIG. 12 is a block diagram of an electronic device (1001) including a power converter (200) according to one embodiment.

[0274] Referring to FIG. 12, an electronic device (1301) according to one embodiment may include a display (1210), a display driver IC (DDI) (1220), and a display power management circuit (PMIC) (1230). In one example, the display (1210) may include an organic light emitting display (OLED) that requires one or more driving voltages. In one example, the display (1210) may include a flexible display.

[0275] According to one embodiment, the electronic device (1301) may be implemented by omitting some components or may further include components not shown. For example, the electronic device (1301) of FIG. 12 corresponds to the electronic device (1301) of FIG. 13 and may further include the processor (1320) and / or the battery (1389) shown in FIG. 13.

[0276] In one embodiment, the display (1210), the display drive IC (1220), and / or the display PMIC (1230) may be electrically connected.

[0277] According to one embodiment, the display drive IC (1220) is for driving the display (1210). The display drive IC (1220) can convert data transmitted from a processor (e.g., processor (1320) of FIG. 13) into a form that can be transmitted to the display (1210), and transmit the converted data (or display data) to the display (1210) so that visual information can be provided to a user through the display (1210). In one example, the converted data can be transmitted in units of pixels (PX).

[0278] According to one embodiment, the display PMIC (1230) includes a power converter (200, 700) and can generate an output voltage required to drive the display (1210) and / or the display driver IC (1220) using the power converter (200, 700). The display PMIC (1230) can convert (e.g., step up or step down) an input voltage (e.g., a battery voltage) from a power source (201) (e.g., a battery (1389) of FIG. 13 or an AC adapter) into an output voltage using the power converter (200, 700) and supply the output voltage to the display driver IC (1220). The display driver IC (1220) can generate a driving voltage(s) required to drive the display (1210) using the output voltage. The configuration and operations of the power converter (200, 700) in the display PMIC (1230) have already been described with reference to FIGS. 2, 3, 4a, 4b, 5a, 5b, 6a, 6b, 7, 8a, 8b, 9, 10a, 10b, 11a, and 11b, so a detailed description thereof will be omitted.

[0279] FIG. 13 is a block diagram of an electronic device (1301) within a network environment (1300) according to various embodiments. Referring to FIG. 13, in the network environment (1300), the electronic device (1301) may communicate with the electronic device (1302) via a first network (1398) (e.g., a short-range wireless communication network), or may communicate with the electronic device (1304) or a server (1308) via a second network (1399) (e.g., a long-range wireless communication network). In one embodiment, the electronic device (1301) may communicate with the electronic device (1304) via the server (1308). According to one embodiment, the electronic device (1301) may include a processor (1320), a memory (1330), an input module (1350), an audio output module (1355), a display module (1360), an audio module (1370), a sensor module (1376), an interface (1377), a connection terminal (1378), a haptic module (1379), a camera module (1380), a power management module (1388), a battery (1389), a communication module (1390), a subscriber identification module (1396), or an antenna module (1397). In some embodiments, the electronic device (1301) may omit at least one of these components (e.g., the connection terminal (1378)), or may have one or more other components added. In some embodiments, some of these components (e.g., sensor module (1376), camera module (1380), or antenna module (1397)) may be integrated into a single component (e.g., display module (1360)).

[0280] The processor (1320) may, for example, execute software (e.g., a program (1340)) to control at least one other component (e.g., a hardware or software component) of the electronic device (1301) connected to the processor (1320) and perform various data processing or operations. According to one embodiment, as at least a part of the data processing or operations, the processor (1320) may store commands or data received from other components (e.g., a sensor module (1376) or a communication module (1390)) in a volatile memory (1332), process the commands or data stored in the volatile memory (1332), and store result data in a non-volatile memory (1334). According to one embodiment, the processor (1320) may include a main processor (1321) (e.g., a central processing unit or an application processor) or an auxiliary processor (1323) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor) that can operate independently or together with the main processor (1321). For example, when the electronic device (1301) includes the main processor (1321) and the auxiliary processor (1323), the auxiliary processor (1323) may be configured to use less power than the main processor (1321) or to be specialized for a given function. The auxiliary processor (1323) may be implemented separately from the main processor (1321) or as a part thereof.

[0281] The auxiliary processor (1323) may control at least a portion of functions or states associated with at least one component (e.g., the display module (1360), the sensor module (1376), or the communication module (1390)) of the electronic device (1301), for example, on behalf of the main processor (1321) while the main processor (1321) is in an inactive (e.g., sleep) state, or together with the main processor (1321) while the main processor (1321) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (1323) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (1380) or a communication module (1390)). In one embodiment, the auxiliary processor (1323) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, on the electronic device (1301) where the artificial intelligence is performed, or can be performed through a separate server (e.g., server (1308)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include multiple artificial neural network layers.The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to, or alternatively to, a hardware structure, an artificial intelligence model may include a software structure.

[0282] The memory (1330) can store various data used by at least one component (e.g., the processor (1320) or the sensor module (1376)) of the electronic device (1301). The data can include, for example, software (e.g., the program (1340)) and input data or output data for commands related thereto. The memory (1330) can include volatile memory (1332) or non-volatile memory (1334).

[0283] The program (1340) may be stored as software in memory (1330) and may include, for example, an operating system (1342), middleware (1344), or an application (1346).

[0284] The input module (1350) can receive commands or data to be used in a component of the electronic device (1301) (e.g., a processor (1320)) from an external source (e.g., a user) of the electronic device (1301). The input module (1350) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0285] The audio output module (1355) can output audio signals to the outside of the electronic device (1301). The audio output module (1355) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. In one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.

[0286] The display module (1360) can visually provide information to an external party (e.g., a user) of the electronic device (1301). The display module (1360) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling the device. In one embodiment, the display module (1360) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.

[0287] The audio module (1370) can convert sound into an electrical signal, or vice versa. According to one embodiment, the audio module (1370) can acquire sound through the input module (1350), output sound through the sound output module (1355), or an external electronic device (e.g., electronic device (1302)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (1301).

[0288] The sensor module (1376) can detect the operating status (e.g., power or temperature) of the electronic device (1301) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (1376) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0289] The interface (1377) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (1301) with an external electronic device (e.g., the electronic device (1302)). In one embodiment, the interface (1377) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0290] The connection terminal (1378) may include a connector through which the electronic device (1301) may be physically connected to an external electronic device (e.g., the electronic device (1302)). In one embodiment, the connection terminal (1378) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0291] The haptic module (1379) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. In one embodiment, the haptic module (1379) may include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

[0292] The camera module (1380) can capture still images and videos. In one embodiment, the camera module (1380) may include one or more lenses, image sensors, image signal processors, or flashes.

[0293] The power management module (1388) can manage the power supplied to the electronic device (1301). According to one embodiment, the power management module (1388) can be implemented as, for example, at least a part of a power management integrated circuit (PMIC).

[0294] A battery (1389) may power at least one component of the electronic device (1301). In one embodiment, the battery (1389) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0295] The communication module (1390) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (1301) and an external electronic device (e.g., electronic device (1302), electronic device (1304), or server (1308)), and the performance of communication through the established communication channel. The communication module (1390) may operate independently from the processor (1320) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (1390) may include a wireless communication module (1392) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (1394) (e.g., a local area network (LAN) communication module, or a power line communication module). Any of these communication modules may communicate with an external electronic device (1304) via a first network (1398) (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network (1399) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a local area network or a wide area network)). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (1392) may use subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (1396) to verify or authenticate the electronic device (1301) within a communication network such as the first network (1398) or the second network (1399).

[0296] The wireless communication module (1392) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). The NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and connection of multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency communications (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (1392) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (1392) may support various technologies for securing performance in high-frequency bands, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (1392) may support various requirements specified in the electronic device (1301), an external electronic device (e.g., the electronic device (1304)), or a network system (e.g., the second network (1399)). According to one embodiment, the wireless communication module (1392) may support a peak data rate (e.g., 20 Gbps or more) for eMBB implementation, a loss coverage (e.g., 164 dB or less) for mMTC implementation, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL), or 1 ms or less for round trip) for URLLC implementation.

[0297] The antenna module (1397) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). In one embodiment, the antenna module (1397) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). In one embodiment, the antenna module (1397) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (1398) or the second network (1399), may be selected from the plurality of antennas by, for example, the communication module (1390). A signal or power may be transmitted or received between the communication module (1390) and an external electronic device via the at least one selected antenna. In some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (1397).

[0298] According to various embodiments, the antenna module (1397) may form a mmWave antenna module. In one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high frequency band.

[0299] At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).

[0300] According to one embodiment, commands or data may be transmitted or received between the electronic device (1301) and an external electronic device (1304) via a server (1308) connected to a second network (1399). Each of the external electronic devices (1302 or 1304) may be the same or a different type of device as the electronic device (1301). According to one embodiment, all or part of the operations executed in the electronic device (1301) may be executed in one or more of the external electronic devices (1302, 1304, or 1308). For example, when the electronic device (1301) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (1301) may, instead of or in addition to executing the function or service itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (1301). The electronic device (1301) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (1301) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In another embodiment, the external electronic device (1304) may include an Internet of Things (IoT) device. The server (1308) may be an intelligent server utilizing machine learning and / or a neural network.According to one embodiment, an external electronic device (1304) or server (1308) may be included within the second network (1399). The electronic device (1301) may be applied to intelligent services (e.g., smart homes, smart cities, smart cars, or healthcare) based on 5G communication technology and IoT-related technology.

[0301] According to one embodiment disclosed in the present document, a power converter (e.g., power converter (200) of FIG. 2, power converter (700) of FIG. 7) may include a power switching circuit (e.g., power switching circuit (220) of FIG. 2, power switching circuit (710) of FIG. 7) and a control circuit (e.g., control circuit (210) of FIG. 2, control circuit (720) of FIG. 7). The power switching circuit may include a plurality of switches and an inductor, and may generate an output voltage (Vo) from an input voltage (Vin) through the plurality of switches and the inductor, and supply the output voltage (Vo) to a load. The control circuit detects a node signal (Vcs) corresponding to the input voltage (Vin), the output voltage (Vo) and the inductor current flowing in the inductor, generates switching signals based on the input voltage (Vin), the output voltage (Vo) and the node signal (Vcs), and outputs the switching signals to the plurality of switches, thereby controlling the operation mode of the power converter to be one of a buck mode, a buck-boost mode and a boost mode. The control circuit can output a set of switching signals to the plurality of switches during one switching period (Ts) while operating in the buck-boost mode. The set of switching signals can include a switching signal having a designated first on-time (TON1) and another switching signal triggered together with the switching signal having a designated second on-time (TON2). As the above switching signal set is output, the inductor current may increase during the first section (Ta) of the switching period (Ts), the amount of change in the inductor current may be maintained within a certain range during the second section (Tb) of the switching period (Ts), and the inductor current may decrease during the third section (Tc) of the switching period (Ts).

[0302] According to one embodiment, the inductor current may have a first slope that is a positive value during a first period (Ta) of the switching period (Ts) operating in the buck-boost mode. The inductor current may have a second slope during a second period (Tb) that is continuous with the first period (Ta) of the switching period (Ts) operating in the buck-boost mode. The inductor current may have a third slope that is a negative value during a third period (Tc) that is continuous with the second period of the switching period (Ts) operating in the buck-boost mode. The second slope may have any one of a zero level, a positive value having a smaller change amount than the first slope, or a negative value having a smaller change amount than the third slope.

[0303] According to one embodiment, the node signal (Vcs) may be proportional to the inductor current.

[0304] In one embodiment, the designated first on-time (TON1) may correspond to the combined length of the first section (Ta) and the second section (Tb). The designated second on-time (TON2) may correspond to the length of the first section (Ta).

[0305] According to one embodiment, the control circuit can output a first set of switching signals including a switching signal having a first on-time (TON1) when the power converter operates in the buck mode. The first on-time (TON1) can change from a first value to a second value as the input voltage (Vin) varies. The control circuit can output a second set of switching signals including a switching signal having the first on-time (TON1) and a switching signal having a second on-time (TON2) when the power converter operates in the buck-boost mode. The first on-time (TON1) and the second on-time (TON2) can be fixed to a first constant value and a second constant value, respectively, regardless of a variation in the input voltage (Vin). The control circuit can output a third set of switching signals including a switching signal having the second on-time (TON2) when the power converter operates in the boost mode. The above second on-time (TON1) can be changed from a third value to a fourth value as the input voltage (Vin) changes.

[0306] According to one embodiment, the plurality of switches may include a first switch disposed between a power source supplying the input voltage (Vin) and a first node of the inductor, a second switch disposed between the first node of the inductor and ground and connected in series with the first switch, a third switch disposed between the second node of the inductor and ground, and a fourth switch disposed between the second node of the inductor and the load and connected in series with the third switch.

[0307] According to one embodiment, the control circuit can detect the node signal (Vcs) from the first node of the inductor.

[0308] According to one embodiment, the control circuit can output a first switching signal (G1) for the first switch, a second switching signal (G2) for the second switch, a third switching signal (G3) for the third switch, and a fourth switching signal (G4) for the fourth switch during the switching period (Ts) operating in the buck-boost mode. The first switching signal (G1) can be a signal having the designated first on-time (TON1). The second switching signal (G2) can be an inverted signal of the first switching signal (G1). The third switching signal (G3) can be a signal triggered together with the first switching signal (G1) and having the designated second on-time (TON2) shorter than the designated first on-time (TON1). The fourth switching signal (G4) can be an inverted signal of the third switching signal (G3).

[0309] According to one embodiment, the first switching signal (G1) and the third switching signal (G3) may each transition from low to high based on the node signal (Vcs). The first switching signal (G1) may be maintained high for the designated first on-time (TON1) and then transitioned to low. The second switching signal (G2) may transition from low to high alternately with the first switching signal (G1). The third switching signal (G3) may be maintained high for the designated second on-time (TON2) and then transitioned to low. The fourth switching signal (G4) may transition from low to high alternately with the third switching signal (G3).

[0310] According to one embodiment, the control circuit may include an output feedback control circuit (e.g., the feedback control circuit (730) of FIG. 7) and a switching control circuit (e.g., the switching control circuit (740) of FIG. 7). The output feedback control circuit may output a control voltage (Vc) based on a difference between the output voltage (Vo) and a target output voltage. The switching control circuit may generate a set signal based on a comparison between the node signal (Vcs) and the control voltage (Vc), output the first switching signal (G1) and the second switching signal (G2) based on the set signal and a boost enable signal (Boost_ENA), and output the third switching signal (G3) and the fourth switching signal (G4) based on the set signal and a buck-boost enable signal (BB_ENA).

[0311] According to one embodiment, the control circuit may include a mode control circuit (e.g., mode control circuit (750) of FIG. 7). The mode control circuit may selectively output one of the boost enable signal (Boost_ENA) and the buck-boost enable signal (BB_ENA) based on a range of the input voltage (Vin).

[0312] According to one embodiment, the mode control circuit can output the buck-boost enable signal (BB_ENA) based on a comparison between the input voltage (Vin) and a first threshold value (VTH1), and can output the boost enable signal (Boost_ENA) based on a comparison between the input voltage (Vin) and a second threshold value (VTH1).

[0313] According to one embodiment, the power converter can output a first switching signal set including a switching signal having a first on-time (TON1) in a buck mode. According to one embodiment, the first on-time (TON1) of the buck mode can be set by the aforementioned mathematical expression 1. According to one embodiment, the first on-time (TON1) of the buck mode can be changed from a first value to a second value as an input voltage (Vin) changes.

[0314] According to one embodiment, the power converter can output a second switching signal set including a switching signal having a first on-time (TON1) designated in a buck-boost mode and another switching signal having a second on-time (TON2) designated. The designated first on-time (TON1) of the buck-boost mode can be fixed (or set) to a first constant value regardless of a variation in an input voltage (Vin). The designated second on-time (TON2) of the buck-boost mode can be fixed (or set) to a second constant value regardless of a variation in an input voltage (Vin).

[0315] According to one embodiment, in the power converter, the first constant value set to the designated first on-time (TON1) of the buck-boost mode may be a value corresponding to the first on-time (TON1) of the buck mode. The second constant value set to the designated second on-time (TON2) of the buck-boost mode may be a value corresponding to the second on-time (TON2) of the boost mode.

[0316] According to one embodiment, the power converter can output a third switching signal set including a switching signal having a second on-time (TON2) in the boost mode. According to one embodiment, the second on-time (TON2) of the boost mode can be set by the aforementioned mathematical expression 2. According to one embodiment, the second on-time (TON2) of the boost mode can be changed from a third value to a fourth value as the input voltage (Vin) varies.

[0317] According to one embodiment disclosed in the present document, an electronic device (e.g., an electronic device (1301) of FIGS. 12 and 13) may include an organic light emitting display (OLED) (e.g., a display (1210) of FIG. 12), a display driver IC (DDI) for driving the organic light emitting display (e.g., a display driver IC (1220) of FIG. 12), and a display power management IC (PMIC) (e.g., a display PMIC (1230) of FIG. 12). The display PMIC may include a power converter (e.g., a power converter (200) of FIG. 2, a power converter (700) of FIG. 7)) and supply an output voltage (Vo) required to drive the display driver IC using the power converter. The power converter may include a power switching circuit and a control circuit. The power switching circuit includes a plurality of switches and an inductor, and can generate an output voltage (Vo) from an input voltage (Vin) through the plurality of switches and the inductor, and supply the output voltage (Vo) to a load. The control circuit detects a node signal (Vcs) corresponding to the input voltage (Vin), the output voltage (Vo), and an inductor current flowing in the inductor, generates switching signals based on the input voltage (Vin), the output voltage (Vo), and the node signal (Vcs), and outputs the switching signals to the plurality of switches, thereby controlling the operation mode of the power converter to one of a buck mode, a buck-boost mode, and a boost mode. The control circuit can output a set of switching signals to the plurality of switches during a switching period (Ts) during which the control circuit operates in the buck-boost mode.The above switching signal set may include a switching signal having a designated first on-time (TON1) and another switching signal triggered together with the switching signal having a designated second on-time (TON2). As the switching signal set is output, the inductor current may increase during a first section (Ta) of the switching period (Ts), the amount of change in the inductor current may be maintained within a certain range during a second section (Tb) of the switching period (Ts), and the inductor current may decrease during a third section (Tc) of the switching period (Ts).

[0318] According to one embodiment, in the electronic device, the inductor current may have a first slope that is a positive value during a first period (Ta) of the switching period (Ts) operating in the buck-boost mode. The inductor current may have a second slope during a second period (Tb) that is continuous with the first period (Ta) of the switching period (Ts) operating in the buck-boost mode. The inductor current may have a third slope that is a negative value during a third period (Tc) that is continuous with the second period of the switching period (Ts) operating in the buck-boost mode. The second slope may have any one of a zero level, a positive value having a smaller change amount than the first slope, or a negative value having a smaller change amount than the third slope.

[0319] According to one embodiment, in the electronic device, the node signal (Vcs) may be proportional to the inductor current.

[0320] According to one embodiment, in the electronic device, the designated first on-time (TON1) may correspond to the length of the first interval (Ta) and the second interval (Tb). The designated second on-time (TON2) may correspond to the length of the first interval (Ta).

[0321] According to one embodiment, the control circuit within the electronic device may output a first switching signal set including a switching signal having a first on-time (TON1) when the power converter operates in the buck mode. The first on-time (TON1) may change from a first value to a second value as the input voltage (Vin) varies. The control circuit may output a second switching signal set including a switching signal having the first on-time (TON1) and a switching signal having a second on-time (TON2) when the power converter operates in the buck-boost mode. The first on-time (TON1) and the second on-time (TON2) may be fixed to a first constant value and a second constant value, respectively, regardless of a variation in the input voltage (Vin). The control circuit can output a third switching signal set including a switching signal having the second on-time (TON2) when the power converter operates in the boost mode. The second on-time (TON1) can be changed from a third value to a fourth value as the input voltage (Vin) varies.

[0322] According to one embodiment, the plurality of switches in the electronic device may include a first switch disposed between a power source supplying the input voltage (Vin) and a first node of the inductor, a second switch disposed between the first node of the inductor and ground and connected in series with the first switch, a third switch disposed between the second node of the inductor and ground, and a fourth switch disposed between the second node of the inductor and the load and connected in series with the third switch.

[0323] According to one embodiment, the control circuit within the electronic device can detect the node signal (Vcs) from the first node of the inductor.

[0324] According to one embodiment, the control circuit in the electronic device may output, during the switching period (Ts) in which the control circuit operates in the buck-boost mode, a first switching signal (G1) for the first switch, a second switching signal (G2) for the second switch, a third switching signal (G3) for the third switch, and a fourth switching signal (G4) for the fourth switch. The first switching signal (G1) may be a signal having the designated first on-time (TON1). The second switching signal (G2) may be an inversion signal of the first switching signal (G1). The third switching signal (G3) may be a signal triggered together with the first switching signal (G1) and having the designated second on-time (TON2) shorter than the designated first on-time (TON1). The fourth switching signal (G4) may be an inversion signal of the third switching signal (G3).

[0325] According to one embodiment, in the electronic device, the first switching signal (G1) and the third switching signal (G3) may transition from low to high, respectively, based on the node signal (Vcs). The first switching signal (G1) may be maintained high for the designated first on-time (TON1) and then transitioned to low. The second switching signal (G2) may transition from low to high alternately with the first switching signal (G1). The third switching signal (G3) may be maintained high for the designated second on-time (TON2) and then transitioned to low. The fourth switching signal (G4) may transition from low to high alternately with the third switching signal (G3).

[0326] According to one embodiment, the control circuit in the electronic device may include an output feedback control circuit (e.g., the feedback control circuit (730) of FIG. 7) and a switching control circuit (e.g., the switching control circuit (740) of FIG. 7). The output feedback control circuit may output a control voltage (Vc) based on a difference between the output voltage (Vo) and a target output voltage. The switching control circuit may generate a set signal based on a comparison between the node signal (Vcs) and the control voltage (Vc), output the first switching signal (G1) and the second switching signal (G2) based on the set signal and a boost enable signal (Boost_ENA), and output the third switching signal (G3) and the fourth switching signal (G4) based on the set signal and a buck-boost enable signal (BB_ENA).

[0327] According to one embodiment, the control circuit within the electronic device may include a mode control circuit (e.g., the mode control circuit (750) of FIG. 7). The mode control circuit may selectively output one of the boost enable signal (Boost_ENA) and the buck-boost enable signal (BB_ENA) based on a range of the input voltage (Vin).

[0328] According to one embodiment, the mode control circuit within the electronic device can output the buck-boost enable signal (BB_ENA) based on a comparison between the input voltage (Vin) and a first threshold value (VTH1), and can output the boost enable signal (Boost_ENA) based on a comparison between the input voltage (Vin) and a second threshold value (VTH1).

[0329] According to one embodiment, the power converter in the electronic device can output a first switching signal set including a switching signal having a first on-time (TON1) in a buck mode. According to one embodiment, the first on-time (TON1) of the buck mode can be set by the aforementioned mathematical expression 1. According to one embodiment, the first on-time (TON1) of the buck mode can be changed from a first value to a second value as an input voltage (Vin) changes.

[0330] According to one embodiment, the power converter in the electronic device can output a second switching signal set including a switching signal having a first on-time (TON1) designated in a buck-boost mode and another switching signal having a second on-time (TON2). The designated first on-time (TON1) of the buck-boost mode can be fixed (or set) to a first constant value regardless of a variation in an input voltage (Vin). The designated second on-time (TON2) of the buck-boost mode can be fixed (or set) to a second constant value regardless of a variation in an input voltage (Vin).

[0331] According to one embodiment, in the power converter within the electronic device, the first constant value set to the designated first on-time (TON1) of the buck-boost mode may be a value corresponding to the first on-time (TON1) of the buck mode. The second constant value set to the designated second on-time (TON2) of the buck-boost mode may be a value corresponding to the second on-time (TON2) of the boost mode.

[0332] According to one embodiment, the power converter in the electronic device can output a third switching signal set including a switching signal having a second on-time (TON2) in the boost mode. According to one embodiment, the second on-time (TON2) of the boost mode can be set by the aforementioned mathematical expression 2. According to one embodiment, the second on-time (TON2) of the boost mode can be changed from a third value to a fourth value as the input voltage (Vin) varies.

[0333] The methods according to the embodiments described in the claims or specification of the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software.

[0334] When implemented in software, a computer-readable storage medium storing one or more programs (software modules) may be provided. The one or more programs stored in the computer-readable storage medium are configured for execution by one or more processors within an electronic device. The one or more programs include instructions that cause the electronic device to execute methods according to embodiments described in the claims or specification of the present disclosure.

[0335] In the present disclosure, the functions or operations performed by the electronic device may be performed by one or more processors executing one or more instructions stored in a memory. The functions or operations of the electronic device mentioned in the present disclosure may be performed by one processor executing one or more instructions, or may be performed by a combination of multiple processors executing one or more instructions. The processor mentioned in the present disclosure may be understood to include a circuit for performing operations or controlling other components of the electronic device. For example, the one or more processors may include a central processing unit (CPU), a microprocessor unit (MPU), an application processor (AP), a communication processor (CP), a neural processing unit (NPU), a system on a chip (SoC), or an integrated circuit (IC) configured to execute one or more instructions. The one or more processors may be configured to perform the operations of the electronic device described above.

[0336] In the present disclosure, a program (software module, software) may be stored in a non-volatile memory including a random access memory (RAM), a flash memory, a read only memory (ROM), an electrically erasable programmable read only memory (EEPROM), a magnetic disc storage device, a compact disc ROM (CD-ROM), digital versatile discs (DVDs) or other forms of optical storage devices, a magnetic cassette. Or, it may be stored in a memory formed by a combination of some or all of these. The memory may be formed by a single storage medium, or may be formed by a combination of a plurality of storage media. The one or more commands may be stored in a single storage medium, or may be distributed and stored in a plurality of storage media.

[0337] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to the embodiments of this document are not limited to the aforementioned devices.

[0338] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

[0339] The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0340] Various embodiments of the present document may be implemented as software (e.g., a program (1340)) including one or more instructions stored in a storage medium (e.g., an internal memory (1336) or an external memory (1338)) readable by a machine (e.g., an electronic device (1301)). For example, a processor (e.g., a processor (1320)) of the machine (e.g., an electronic device (1301)) may call at least one instruction among the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.

[0341] According to one embodiment, the method according to various embodiments disclosed in this document may be provided as a computer program product. The computer program product may be traded between sellers and buyers as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or may be provided through an application store (e.g., Play Store). TM ) or directly between two user devices (e.g., smart phones), online distribution (e.g., downloading or uploading). In the case of online distribution, at least a portion of the computer program product may be at least temporarily stored or temporarily created in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0342] According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and placed in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In the power converter (200, 700), A power switching circuit (220, 710) including a plurality of switches and an inductor, generating an output voltage (Vo) from an input voltage (Vin) through the plurality of switches and the inductor, and supplying the output voltage (Vo) to a load; and A control circuit (210, 720) is included that detects a node signal (Vcs) corresponding to the input voltage (Vin), the output voltage (Vo) and the inductor current flowing in the inductor, generates switching signals based on the input voltage (Vin), the output voltage (Vo) and the node signal (Vcs), and outputs the switching signals to the plurality of switches, thereby controlling the operation mode of the power converter (200, 700) to one of the buck mode, the buck-boost mode and the boost mode. The above control circuit (210, 720) outputs a set of switching signals to the plurality of switches during a switching period (Ts) operating in the buck-boost mode, wherein the set of switching signals includes a switching signal having a designated first on-time (TON1) and another switching signal triggered together with the switching signal having a designated second on-time (TON2). A power converter in which, as the switching signal set is output, the inductor current increases during a first section (Ta) of the switching period (Ts), the amount of change in the inductor current is maintained within a certain range during a second section (Tb) of the switching period (Ts), and the inductor current decreases during a third section (Tc) of the switching period (Ts).

2. In claim 1, The above inductor current is, It has a first slope which is a positive (+) value during the first section (Ta) of the switching period (Ts) operating in the buck-boost mode, During the switching period (Ts) operating in the buck-boost mode, the second slope is provided during the second period (Tb) which is continuous with the first period (Ta). It has a third slope which is a negative (-) value during the third section (Tc) which is continuous with the second section during the switching period (Ts) operating in the buck-boost mode. A power converter wherein the second slope has any one of a zero level, a positive (+) value having a smaller change amount than the first slope, or a negative (-) value having a smaller change amount than the third slope.

3. In claim 1, A power converter wherein the node signal (Vcs) is proportional to the inductor current.

4. In claim 1, The above-mentioned first on-time (TON1) corresponds to the length of the first section (Ta) and the second section (Tb), A power converter in which the above-mentioned second on-time (TON2) corresponds to the length of the first section (Ta).

5. In claim 1, The above control circuit (210, 720) When the power converter (200, 700) operates in the buck mode, it outputs a first switching signal set including a switching signal having a first on-time (TON1), wherein the first on-time (TON1) changes from a first value to a second value as the input voltage (Vin) changes, When the power converter (200, 700) operates in the buck-boost mode, it outputs a second switching signal set including a switching signal having the first on-time (TON1) and a switching signal having the second on-time (TON2), wherein the first on-time (TON1) and the second on-time (TON2) are fixed to a first constant value (a first constant value) and a second constant value (a second constant value), respectively, regardless of the variation of the input voltage (Vin). A power converter (200, 700) that outputs a third switching signal set including a switching signal having the second on-time (TON2) when the power converter (200, 700) operates in the boost mode, wherein the second on-time (TON1) changes from a third value to a fourth value as the input voltage (Vin) fluctuates.

6. In claim 1, The above multiple switches are, A first switch disposed between a power source supplying the input voltage (Vin) and a first node of the inductor; A second switch disposed between the first node of the inductor and ground and connected in series with the first switch; a third switch disposed between the second node of the inductor and ground; and A power converter comprising a fourth switch disposed between the second node of the inductor and the load and connected in series with the third switch.

7. In claim 6, A power converter, wherein the control circuit (210, 720) is configured to detect the node signal (Vcs) from the first node of the inductor.

8. In claim 6, The above control circuit (210, 720) During the switching period (Ts) operating in the buck-boost mode, It is configured to output a first switching signal (G1) for the first switch, a second switching signal (G2) for the second switch, a third switching signal (G3) for the third switch, and a fourth switching signal (G4) for the fourth switch, The above first switching signal (G1) is a signal having the above-mentioned first on-time (TON1), The second switching signal (G2) is an inverted signal of the first switching signal (G1), The third switching signal (G3) is a signal that is triggered together with the first switching signal (G1) and has a second on-time (TON2) that is shorter than the first on-time (TON1). A power converter wherein the fourth switching signal (G4) is an inverted signal of the third switching signal (G3).

9. In claim 8, Based on the node signal (Vcs), the first switching signal (G1) and the third switching signal (G3) are each transitioned from low to high, The above first switching signal (G1) is maintained high for the above-mentioned first on-time (TON1) and then transitions to low, The second switching signal (G2) transitions from low to high alternately with the first switching signal (G1), The third switching signal (G3) is maintained high for the specified second on-time (TON2) and then transitions to low. A power converter in which the fourth switching signal (G4) transitions from low to high alternately with the third switching signal (G3).

10. In claim 8, The above control circuit (210, 720) An output feedback control circuit (730) that outputs a control voltage (Vc) based on the difference between the output voltage (Vo) and the target output voltage; and A power converter comprising a switching control circuit (740) that generates a set signal based on a comparison between the node signal (Vcs) and the control voltage (Vc), outputs the first switching signal (G1) and the second switching signal (G2) based on the set signal and a boost enable signal (Boost_ENA), and outputs the third switching signal (G3) and the fourth switching signal (G4) based on the set signal and a buck-boost enable signal (BB_ENA).

11. In claim 10, The above control circuit (210, 720) A power converter comprising a mode control circuit (750) that selectively outputs one of the boost enable signal (Boost_ENA) and the buck-boost enable signal (BB_ENA) based on the range of the input voltage (Vin).

12. In claim 11, The above mode control circuit (750) Based on the comparison between the input voltage (Vin) and the first threshold (VTH1), the buck-boost enable signal (BB_ENA) is output, A power converter configured to output the boost enable signal (Boost_ENA) based on a comparison between the input voltage (Vin) and a second threshold value (VTH1).

13. In the electronic device (1301), Organic light emitting display (OLED) (1210); A display driver IC (DDI) (1220) driving the organic light-emitting display; and A display power management IC (PMIC) (1230) including a power converter (200, 700) and supplying an output voltage (Vo) required to drive the display driver IC (1220) using the power converter (200, 700), The above power converter (200, 700): A power switching circuit (220, 710) including a plurality of switches and an inductor, generating the output voltage (Vo) from an input voltage (Vin) through the plurality of switches and the inductor, and outputting the output voltage (Vo); and A control circuit (210, 720) is included that detects a node signal (Vcs) corresponding to the input voltage (Vin), the output voltage (Vo) and the inductor current flowing in the inductor, generates switching signals based on the input voltage (Vin), the output voltage (Vo) and the node signal (Vcs), and outputs the switching signals to the plurality of switches, thereby controlling the operation mode of the power converter (200, 700) to one of the buck mode, the buck-boost mode and the boost mode. The above control circuit (210, 720) outputs a set of switching signals to the plurality of switches during a switching period (Ts) operating in the buck-boost mode, wherein the set of switching signals includes a switching signal having a designated first on-time (TON1) and another switching signal triggered together with the switching signal having a designated second on-time (TON2). An electronic device in which, as the switching signal set is output, the inductor current increases during a first section (Ta) of the switching period (Ts), the amount of change in the inductor current is maintained within a certain range during a second section (Tb) of the switching period (Ts), and the inductor current decreases during a third section (Tc) of the switching period (Ts).

14. In claim 13, The above inductor current is, Having a first slope that is a positive (+) value during the first section (Ta) of the switching period (Ts) operating in the buck-boost mode, Having a second slope during the second period (Tb) that is continuous with the first period (Ta) during the switching period (Ts) operating in the buck-boost mode, It has a third slope that is a negative (-) value during the third section (Tc) that is continuous with the second section during the switching period (Ts) operating in the buck-boost mode, An electronic device wherein the second slope has any one of a zero level, a positive (+) value having a smaller change amount than the first slope, or a negative (-) value having a smaller change amount than the third slope.

15. In claim 13, The above-mentioned first on-time (TON1) corresponds to the length of the first section (Ta) and the second section (Tb), An electronic device in which the above-mentioned second on-time (TON2) corresponds to the length of the first section (Ta).

Images