Data processing method and related device

Abstract

The present application relates to the field of communications, and provides a data processing method and a related device, which are capable of reducing data transmission bandwidth. The method comprises: a first apparatus acquiring first information, wherein the first information indicates to send a first sequence, the first sequence comprises an inter-frame gap, a first subsequence, and a start of frame delimiter, a length of the first sequence is less than a first threshold, a first byte of the first subsequence is used for indicating a start of a data sequence, and the data sequence comprises the first subsequence and the start of frame delimiter; and sending the sequence.

Description

Data processing method and related device

[0001] The present application claims priority from the Chinese patent application No. 202411175472.0 filed on August 23, 2024, and entitled "A data processing method and related device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the field of communication, in particular to a data processing method and related device. BACKGROUND

[0003] At present, the proportion of industrial Ethernet in the industrial network market is increasing. Since industrial Ethernet has a strong demand for high reliability, the requirement for fault recovery is very high. For example, when using Ethernet control automation technology, the time for fault recovery may be required to be controlled within 60us. Fault recovery, also known as fault switching, refers to switching data packets from a fault link to an available path through automatic protection switching (APS) and other ways to avoid fault points, thereby reducing the impact of faults on data packet transmission.

[0004] In order to realize fault recovery, fault detection is needed first, which refers to detecting whether there is a fault in the link within the network system. The performance of fault recovery mainly depends on the performance of fault detection. Taking a network system using Ethernet multi-ring protection technology (ERPS) as an example, when a link in the network system fails, the time for fault detection accounts for more than 50% of the time for fault recovery. However, in Ethernet, a large bandwidth is needed for data transmission. Since the bandwidth is limited, the time interval for sending fault detection cannot be too short, resulting in low efficiency of fault detection.

[0005] Therefore, how to reduce the bandwidth overhead in the data transmission process is a technical problem to be solved. SUMMARY

[0006] The embodiments of the present application provide a data processing method and related device, which can reduce the bandwidth overhead in the data transmission process.

[0007] The first aspect of the present application provides a data processing method, which is executed by a first device, or executed by some components (such as a processor, a chip or a chip system, etc.) in the first device, or can also be implemented by a logic module or software which can realize all or part of the functions of the first device. In the first aspect and its possible implementation manners, the data processing method is taken as an example which is executed by the first device. The first device acquires first information, the first information indicating a first sequence, the first sequence including a frame gap, a first sub-sequence and a frame start symbol, the length of the first sequence being less than a first threshold, the first byte of the first sub-sequence being used to indicate the start of a data sequence, the data sequence including the first sub-sequence and the frame start symbol; and the first device sends the first sequence.

[0008] In the first aspect, the first sequence is defined. Since the first sequence includes the frame gap, the first sub-sequence and the frame start symbol, and the first byte of the first sub-sequence is used to indicate the start of the data sequence, the first sequence is compatible with the Institute of Electrical and Electronics Engineers (IEEE) 802.3, that is, can be transmitted on the physical layer (PHY) of the Ethernet, and is compatible with the first sequence being less than the first threshold. That is, the first aspect defines a new sequence which can be used to transmit data on the PHY, and the size of the sequence is small enough, so that the bandwidth occupied by the sequence is small, thereby reducing the bandwidth overhead in the data transmission process.

[0009] In an optional implementation manner of the first aspect, the first device sends the first sequence through a reconciliation sublayer (RS).

[0010] In the above implementation manner, the first sequence is sent through the reconciliation sublayer, so that the information to be carried in the first sequence is small, and only the frame gap, the first sub-sequence or the frame start symbol is needed. When some configuration information, such as a fault type, needs to be carried, the configuration information can be carried through the addition of a second sub-sequence, or carried through the first sub-sequence. The first sequence sent through the reconciliation sublayer can reduce the length of the sequence, and has no requirement on the message queue, so that the requirement on the bandwidth is low, and the sequence can be sent multiple times in a unit of time, thereby improving the efficiency of fault detection and shortening the time for fault detection.

[0011] In addition, since the first sequence can be generated by the RS, the first sequence is not limited by the minimum of 64 bytes of the Ethernet frame generated by the MAC in the IEEE 802.3.

[0012] In an optional implementation of the first aspect, the first sub-sequence further comprises a first byte, and the first byte comprises information indicating a type of the first sequence, information used for verifying transmission of the first sequence, information indicating whether a link has a fault, information indicating a fault distance, information indicating a fault type, information indicating a port capability, or information used for identifying the first sequence.

[0013] Based on the above implementation, the first sub-sequence further carries related configuration information or information related to a fault, such as information indicating a type of the first sequence or information used for verifying transmission of the first sequence. Therefore, the first sequence can be used in more information interaction scenarios, for example, when the first sequence is information indicating a port capability, the first device can perform port capability negotiation with a receiving end of the first sequence by sending the first sequence. Moreover, since the first sub-sequence can carry configuration information, subsequent data fields used for carrying information, such as the second sub-sequence, can be added or expanded, thereby shortening a length of the first sequence.

[0014] In an optional implementation of the first aspect, in each of the first sequences, the interframe gap is before the first sub-sequence and the first sub-sequence is before the start-of-frame symbol, or the first sub-sequence is before the start-of-frame symbol and the start-of-frame symbol is before the interframe gap.

[0015] Based on the above implementation, the order of the start-of-frame symbol, the interframe gap, and the first sub-sequence meets the order requirement of the start-of-frame symbol, the interframe gap, and the preamble in IEEE 802.3, so the first sequence is compatible with IEEE 802.3 and thus has PHY universality.

[0016] In an optional implementation of the first aspect, the first sequence further comprises a second sub-sequence, and the second sub-sequence comprises information indicating a type of the first sequence, information used for verifying transmission of the first sequence, information indicating whether a link has a fault, information indicating a fault distance, information indicating a fault type, information indicating a port capability, or information used for identifying the first sequence.

[0017] Based on the above implementation, the first sequence introduces a second sub-sequence used for carrying information indicating a type of the first sequence, so that the first sequence can carry more information and can be used in more information interaction processes and interaction scenarios.

[0018] In an optional implementation of the first aspect, in each of the first sequences, the start-of-frame symbol is before the second sub-sequence.

[0019] Based on the above implementation, the frame start symbol and the second subsequence satisfy the ordering requirement of IEEE 802.3, and thus the first sequence is compatible with IEEE 802.3, and thus has PHY universality.

[0020] In an optional implementation of the first aspect, the first threshold is less than or equal to 64 bytes.

[0021] Based on the above implementation, the length of the first sequence defined in the present application is small, and the length of the sequence can be less than 64 bytes, so that when the first device interacts with other devices through the first sequence, the bandwidth consumed by the information interaction can be reduced. And the time required to transmit the sequence can be shortened, thereby improving the efficiency of information interaction.

[0022] In an optional implementation of the first aspect, the length of the first subsequence is 7 bytes or less than 7 bytes.

[0023] Based on the above implementation, the length of the first subsequence can satisfy the length requirement of the preamble of IEEE 802.3, so that the first sequence is compatible with IEEE 802.3, and thus has PHY universality.

[0024] Optionally, one or more bits in the first subsequence are used to identify whether the second subsequence exists in the first sequence.

[0025] In an optional implementation of the first aspect, the first sequence determines whether the first link has a fault.

[0026] Based on the above implementation, since the length of the sequence for determining whether the link has a fault is small, the interval of sending the sequence can be short, so that the sequence is sent multiple times in a unit of time, improving the efficiency of link detection, and meeting the microsecond-level requirement of fault recovery of industrial Ethernet.

[0027] In an optional implementation of the first aspect, when the time difference between the current time and the time of sending the first sequence is a first value, a second sequence is sent, the second sequence is used to determine whether the first link has a fault, the length of the second sequence is less than the first threshold, and the first value is related to the state of the first link.

[0028] Based on the above implementation, by sending multiple sequences for detecting the link, such as the first sequence and the second sequence, the receiving end of the sequence can determine whether the first link has a fault according to the number of received sequences and other indicators. And the time interval between different sequences is related to the state of the first link, so that the time of sending the sequence can avoid the busy time of the first link, and the sequence for detecting the link is sent in the relatively idle state of the link.

[0029] In an optional implementation of the first aspect, when the first link is in a first state, the first value is a minimum transmission interval between the first sequence and the second sequence, the first state indicating that there is no packet being transmitted in the first link at the current time; when the first link is in a second state, the first value is greater than the minimum transmission interval, the first value being less than a sum of the minimum transmission interval and a second value, the second value being related to a maximum transmission unit of the first link, the second state indicating that there is a packet being transmitted in the first link and there is no packet of a preset length capable of occupying a full bandwidth of the first link; when the first link is in a third state, the first value is the second value, the third state indicating that there is a packet of the preset length capable of occupying the full bandwidth of the first link in the first link.

[0030] Based on the above implementation, by classifying the link states and setting different sequence transmission strategies for different types of link states, the first device can flexibly adjust the time interval of transmitting different sequences according to the state of the link, thereby improving the effect of link fault detection.

[0031] In an optional implementation of the first aspect, the second value is a serialization time of the maximum transmission unit of the first link.

[0032] Based on the above implementation, when the link is in the third state, i.e., the transmission rate of the packet of the preset length in the first link is equal to the second threshold, i.e., the line speed state is reached, the time interval between the sequences is set to the serialization time of the maximum transmission unit of the first link, which can ensure that the first sequence or the second sequence is transmitted when the packet transmission in the first link is completed, thereby improving the effect of determining whether there is a fault.

[0033] In an optional implementation of the first aspect, the first link is a link in an Ethernet.

[0034] The above implementation is an example of the first aspect applied to an Ethernet, and the method of the first aspect can shorten the time of fault detection, thereby shortening the time of fault recovery, and further improving the reliability of the Ethernet. For an industrial Ethernet, the method can meet the microsecond-level requirement of the industrial Ethernet on fault recovery.

[0035] The second aspect of the present application provides a data processing method, which is executed by a first device, or executed by some components (for example, a processor, a chip or a chip system, etc.) in a second device, or can also be implemented by a logic module or software which can realize all or part of the functions of the second device. In the first aspect and its possible implementation manners, the data processing method is taken as an example which is executed by the second device, the second device receives a third sequence, the third sequence includes: a frame gap, a third sub-sequence and a frame start symbol, the length of the third sequence is less than a second threshold, and the first byte of the third sub-sequence is used to indicate the start of a data sequence, the data sequence includes: the third sub-sequence and the frame start symbol.

[0036] In an optional implementation manner of the second aspect, the second harmonious sub-layer of the second device does not send the third sequence to a medium access control (MAC).

[0037] In an optional implementation manner of the second aspect, the third sub-sequence further includes a second byte, the second byte includes: information indicating the type of the third sequence, information used to verify the transmission of the third sequence, information indicating whether the fault exists in the second link, information indicating the distance of the fault, information indicating the type of the fault, information indicating the port capability, or information used to identify the third sequence.

[0038] In an optional implementation manner of the second aspect, in each third sequence, the third sub-sequence is before the frame start symbol and the frame gap is before the third sub-sequence, or the third sub-sequence is before the frame start symbol and the frame start symbol is before the frame gap.

[0039] In an optional implementation manner of the second aspect, the third sequence further includes: a fourth sub-sequence, the fourth sub-sequence includes: information indicating the type of the third sequence, information used to verify the transmission of the third sequence, information indicating whether the fault exists in the second link, information indicating the distance of the fault, information indicating the type of the fault, information indicating the port capability, or information used to identify the third sequence.

[0040] In an optional implementation manner of the second aspect, in each third sequence, the frame start symbol is before the fourth sub-sequence.

[0041] In an optional implementation manner of the second aspect, the second threshold is less than or equal to 64 bytes.

[0042] In an optional implementation manner of the second aspect, the length of the third sub-sequence is 7 bytes or less than 7 bytes.

[0043] In an optional implementation manner of the second aspect, whether the fault exists in the second link is determined based on the third sequence.

[0044] In an optional implementation of the second aspect, the second device receives a fourth sequence when a time difference between the current time and a time when the third sequence is sent is a third value, the fourth sequence being used to determine whether the second link is faulty, the fourth sequence having a length less than the third threshold, the third value being related to a state of the second link.

[0045] In an optional implementation of the second aspect, when the second link is in a fourth state, the third value is a minimum sending interval between the third sequence and the fourth sequence, the fourth state indicating that there is no packet being transmitted in the second link at the current time; when the second link is in a fifth state, the third value is greater than the minimum sending interval, the third value being less than a sum of the minimum sending interval and a fourth value, the fourth value being related to a maximum transmission unit of the second link, the fifth state indicating that there is a packet being transmitted in the second link and there is no packet of a preset length capable of occupying a full bandwidth of the second link; when the second link is in a sixth state, the third value is the fourth value, the sixth state indicating that there is a packet of a preset length capable of occupying a full bandwidth of the second link in the second link.

[0046] In an optional implementation of the second aspect, the second value is a serialization time of the maximum transmission unit of the second link.

[0047] The third aspect of the present application provides a communication device, which comprises a transceiver unit and a processing unit, and is configured to perform all or part of the operations of the first aspect or the second aspect. The communication device can be a router, a switch or other network device, or a component such as a line card or an interface board in a network device, or a chip system configured to perform the related operations. When the communication device is a chip system, the receiving module and the sending module can be interface circuits of the chip, and the processing module can be a processing circuit of the chip.

[0048] For example, when the method of the first aspect is performed, the transceiver unit is configured to obtain first information indicating that a first sequence is to be sent, the first sequence comprising a frame gap, a first sub-sequence and a frame start symbol, the first sequence having a length less than a first threshold, a first byte of the first sub-sequence being used to indicate a start of a data sequence, the data sequence comprising the first sub-sequence and the frame start symbol; and send the first sequence.

[0049] In an optional implementation of the third aspect, the first sequence is generated by a first reconciliation sub-layer RS.

[0050] In an optional implementation of the third aspect, the first sub-sequence further comprises a first byte, the first byte comprising: information indicating a type of the first sequence, information used for verifying transmission of the first sequence, information indicating whether a link has a fault, information indicating a fault distance, information indicating a fault type, information indicating a port capability, or information used for identifying the first sequence.

[0051] In an optional implementation of the third aspect, in each of the first sequences, the frame gap is before the first sub-sequence and the first sub-sequence is before the frame start symbol, or the first sub-sequence is before the frame start symbol and the frame start symbol is before the frame gap.

[0052] In an optional implementation of the third aspect, the first sequence further comprises a second sub-sequence, the second sub-sequence comprising: information indicating a type of the first sequence, information used for verifying transmission of the first sequence, information indicating whether a link has a fault, information indicating a fault distance, information indicating a fault type, information indicating a port capability, or information used for identifying the first sequence.

[0053] In an optional implementation of the third aspect, in each of the first sequences, the frame start symbol is before the second sub-sequence.

[0054] In an optional implementation of the third aspect, the first threshold is less than or equal to 64 bytes.

[0055] In an optional implementation of the third aspect, a length of the first sub-sequence is 7 bytes or less than 7 bytes.

[0056] In an optional implementation of the third aspect, the first sequence determines whether the first link has a fault.

[0057] In an optional implementation of the third aspect, the transceiver is further configured to: when a time difference between a current time and a time of sending the first sequence is a first value, send a second sequence, the second sequence being used for determining whether the first link has a fault, a length of the second sequence being less than the first threshold, the first value being related to a state of the first link.

[0058] In an optional implementation of the third aspect, when the first link is in a first state, the first value is a minimum transmission interval between the first sequence and the second sequence, the first state indicating that there is no packet being transmitted in the first link at a current time; when the first link is in a second state, the first value is greater than the minimum transmission interval, the first value being less than a sum of the minimum transmission interval and a second value, the second value being related to a maximum transmission unit of the first link, the second state indicating that there is a packet being transmitted in the first link and there is no packet of a preset length capable of occupying a full bandwidth of the first link; when the first link is in a third state, the first value is the second value, the third state indicating that there is a packet of the preset length capable of occupying the full bandwidth of the first link.

[0059] In an optional implementation of the third aspect, the second value is a serialization time of the maximum transmission unit of the first link.

[0060] For example, when the method of the second aspect is performed, the transceiver receives a third sequence, the third sequence comprising: a frame gap, a third sub-sequence, and a start-of-frame delimiter, a size of the third sequence being less than a second threshold, a first byte of the third sub-sequence being used to indicate a start of a data sequence, the data sequence comprising: the third sub-sequence and the start-of-frame delimiter.

[0061] In an optional implementation of the third aspect, the processing unit is further configured to control the second harmonization sub-layer of the second device to not send the third sequence to a medium access control (MAC).

[0062] In an optional implementation of the third aspect, the third sub-sequence further comprises a second byte, the second byte comprising: information indicating a type of the third sequence, information used to verify transmission of the third sequence, information indicating whether the link has the fault, information indicating a distance of the fault, information indicating a type of the fault, information indicating a port capability, or information used to identify the third sequence.

[0063] In an optional implementation of the third aspect, in each of the third sequences, the third sub-sequence is before the start-of-frame delimiter and the frame gap is before the third sub-sequence, or the third sub-sequence is before the start-of-frame delimiter and the start-of-frame delimiter is before the frame gap.

[0064] In an optional implementation of the third aspect, the third sequence further comprises: a fourth sub-sequence, the fourth sub-sequence comprising: information indicating a type of the third sequence, information used to verify transmission of the third sequence, information indicating whether the second link has the fault, information indicating a distance of the fault, information indicating a type of the fault, information indicating a port capability, or information used to identify the third sequence.

[0065] In a possible implementation form of the third aspect, the start-of-frame is before the fourth sub-sequence in each of the third sequences.

[0066] In a possible implementation form of the third aspect, the second threshold is less than or equal to 64 bytes.

[0067] In a possible implementation form of the third aspect, the third sub-sequence has a length of 7 bytes or less.

[0068] In a possible implementation form of the third aspect, the processing unit is further configured to determine whether the second link is faulty based on the third sequence.

[0069] In a possible implementation form of the third aspect, the transceiving unit is further configured to receive a fourth sequence when a time difference between a current time and a time when the third sequence is transmitted is a third value, the fourth sequence being used to determine whether the second link is faulty, the fourth sequence having a length less than the third threshold, the third value being related to a state of the second link.

[0070] In a possible implementation form of the third aspect, when the second link is in a fourth state, the third value is a minimum transmission interval between the third sequence and the fourth sequence, the fourth state indicating that there is no packet being transmitted in the second link at a current time; when the second link is in a fifth state, the third value is greater than the minimum transmission interval, the third value being less than a sum of the minimum transmission interval and a fourth value, the fourth value being related to a maximum transmission unit of the second link, the fifth state indicating that there is a packet being transmitted in the second link and there is no packet of a preset length occupying a full bandwidth of the second link; when the second link is in a sixth state, the third value is the fourth value, the sixth state indicating that there is a packet of the preset length occupying the full bandwidth of the second link.

[0071] In a possible implementation form of the third aspect, the second value is a serialization time of a maximum transmission unit of the second link.

[0072] The fourth aspect of the present application provides a communication system, the communication system comprising a first device and a second device, the first device being configured to perform the method of the first aspect and any possible implementation form or design form thereof, and the second device being configured to perform the method of the second aspect and any possible implementation form or design form thereof.

[0073] The fifth aspect of the present application provides a communication device, comprising a processor and a communication interface. The processor and the communication interface are configured to perform the method of the first aspect or the second aspect and any possible implementation form or design form thereof.

[0074] Optionally, the processor is coupled with a memory, for example, the memory is used to store programs or instructions. The at least one processor is configured to execute the programs or instructions, so that the apparatus implements all or part of operations in the first aspect or the second aspect and any possible implementation or design manner thereof.

[0075] The sixth aspect of the present application provides a computer readable storage medium, which stores programs or instructions. When the programs or instructions are executed on a processor, the method in the first aspect or the second aspect and any possible implementation or design manner thereof is executed.

[0076] The seventh aspect of the present application provides a computer program product, which includes programs or instructions. When the programs or instructions are executed on a processor, all or part of operations in the first aspect or the second aspect and any possible implementation or design manner thereof are implemented.

[0077] In a specific design, the computer program product can be the computer readable storage medium mentioned in the eighth aspect.

[0078] The eighth aspect of the present application provides a chip system, which includes at least one processor, and is configured to support all or part of functions of the method in the first aspect or the second aspect and any possible implementation or design manner thereof.

[0079] Optionally, the chip system includes an RS, which is configured to support all or part of functions of the method in the first aspect or the second aspect and any possible implementation or design manner thereof.

[0080] The technical effects brought by any one of the third aspect to the eighth aspect can refer to the technical effects brought by the first aspect or the second aspect and any possible implementation or design manner thereof, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0081] FIG. 1 is a schematic diagram of a system architecture provided by an embodiment of the present application;

[0082] FIG. 2 is another schematic diagram of a system architecture provided by an embodiment of the present application;

[0083] FIG. 3a is a schematic diagram of a system architecture of an electrical port interconnection provided by an embodiment of the present application;

[0084] FIG. 3b is a schematic diagram of a system architecture of an optical port interconnection provided by an embodiment of the present application;

[0085] FIG. 4 is a flowchart of a data processing method provided by an embodiment of the present application;

[0086] FIG. 5 is a schematic diagram of a first sequence according to an embodiment of the present application;

[0087] FIG. 6 is another schematic diagram of the first sequence according to an embodiment of the present application;

[0088] FIG. 7 is a schematic diagram of the first sequence in Example 1 and Example 2 according to an embodiment of the present application;

[0089] FIG. 8 is a schematic diagram of the first sequence in Example 3 according to an embodiment of the present application;

[0090] FIG. 9 is a schematic diagram of the first sequence in Example 4 according to an embodiment of the present application;

[0091] FIG. 10 is a state transition diagram of RS sending sequence of a first device according to an embodiment of the present application;

[0092] FIG. 11 is a schematic diagram of sequence sending process in different states according to an embodiment of the present application;

[0093] FIG. 12 is a schematic diagram of sequence detection by multiple windows according to an embodiment of the present application;

[0094] FIG. 13 is another flowchart of a data processing method according to an embodiment of the present application;

[0095] FIG. 14 is a sequence receiving control block diagram according to an embodiment of the present application;

[0096] FIG. 15 is a schematic diagram of sequence receiving process of multiple windows according to an embodiment of the present application;

[0097] FIG. 16 is a state transition diagram of RS receiving side according to an embodiment of the present application;

[0098] FIG. 17 is an overall flow state machine according to an embodiment of the present application;

[0099] FIG. 18 is a structural schematic diagram of a communication device according to an embodiment of the present application;

[0100] FIG. 19 is another structural schematic diagram of a communication device according to an embodiment of the present application. DETAILED DESCRIPTION

[0101] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the embodiments of the present application will be further described in detail below with reference to the drawings.

[0102] Some terms related to the embodiments of the present application will be explained below.

[0103] 1. Industrial Ethernet

[0104] Industrial Ethernet is a special network based on Ethernet technology, used for data communication and transmission in industrial automation and control systems. It realizes the interconnection and information exchange between devices through standardized communication protocols and hardware interfaces. Compared with traditional Ethernet, industrial Ethernet has higher reliability, real-time performance, flexibility, scalability and security. Among them, high reliability refers to the use of reliable communication protocols and redundancy mechanisms to ensure the stability and reliability of the network. For example, link redundancy technology can automatically switch to a backup link in the event of network failure, maintaining the continuity of communication; real-time performance refers to the ability of industrial Ethernet to achieve high-speed, real-time data transmission and communication. Through time synchronization technology and closed-loop control, industrial Ethernet can meet the requirements of time-critical applications such as robot control and precision machining; flexibility and scalability refer to the good flexibility and scalability of industrial Ethernet, which can adapt to different scales and complexities of industrial networks. It supports multiple topologies and device connection methods, and can be flexibly configured and expanded according to needs. Security refers to the focus on data security and network protection of industrial Ethernet. Through encryption technology, identity authentication and access control, the security of industrial networks can be ensured. Industrial Ethernet is widely used in various industrial fields, including manufacturing, energy and power, transportation, logistics, etc. It is used in industrial automation control systems, robot control, monitoring and diagnosis, cost management, etc., promoting the intelligentization of industry and the improvement of production efficiency.

[0105] 2. In this application, information, data and data flow can be replaced with each other, and information, data and data flow are an exemplary naming, which can also be replaced with any possible naming, for example, it can also be named as message, signaling, data packet, protocol data unit (PDU) or information flow, etc.

[0106] 3.The terms "system" and "network" in the embodiments of the present application can be used interchangeably. "Include" means "include but not limited to", when A includes multiple elements or cases, A can be one or more of the elements or cases, for example, A includes: B or C, A can be B, A can be C, A can also be B and C. "At least one" means one or more, "multiple" means two or more. "And / or" describes the association between the associated objects, which means that there can be three kinds of relationships, for example, A and / or B, which can represent: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects. "At least one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items. For example, "at least one of A, B and C" includes A, B, C, AB, AC, BC or ABC. In addition, unless otherwise specified, the ordinal numbers "first", "second" and the like mentioned in the embodiments of the present application are used to distinguish multiple objects, and are not used to limit the order, time sequence, priority or importance of the multiple objects.

[0107] The system architecture based on the embodiments of the present application is illustrated below.

[0108] In order to facilitate understanding of the embodiments of the present application, FIG. 1 shows a possible, non-limiting system schematic diagram. The communication system shown in FIG. 1 includes a sending end 101 and a receiving end 102. Wherein, the sending end 101 and the receiving end 102 can send sequences to each other, and optionally, the sequence can carry information, for example, it can be used to carry information that needs to be exchanged between the sending end 101 and the receiving end 102, such as information indicating that the link is faulty, information indicating the port capability, information indicating the fault distance, etc., and the sequence can also be used to determine whether the link is faulty.

[0109] In order to facilitate understanding of the embodiments of the present application, FIG. 2 shows a possible, non-limiting application scenario schematic diagram. In this scenario, the system includes a sending end 201 and a receiving end 202. The application in the present application can be used in electrical port and optical port interconnection scenarios, for example, in the scenario of electrical port interconnection, the MAC of the sending end 201 and the MAC of the receiving end 202 can be interconnected through a cable, and the MAC of the sending end 201 and the MAC of the receiving end 202 can be interconnected through an optical fiber.

[0110] For the convenience of understanding the embodiments of the present application, FIG. 3a and FIG. 3b respectively show a possible, non-limiting system schematic diagram. FIG. 3a is a system schematic diagram of electrical port interconnection, and FIG. 3b is a system schematic diagram of optical port interconnection. The system shown in FIG. 3a and FIG. 3b both include a sending end 301 and a receiving end 302. In FIG. 3a, the sending end 301 includes a media access control sublayer protocol layer (MAC) 301a, a RS 301b, a media independent interface (MII) 301c, a serial media independent interface (SMII) 301d or a PHY (physical layer) 301e, and the receiving end 302 includes a MAC 302a, a RS 302b, a MII 302c, a SMII 302d or a PHY 302e. In FIG. 3a, the sending end 301 includes a MAC 301a, a RS 301b or a SMII 301d, and the receiving end 302 includes a MAC 302a, a RS 302b or a SMII 302d.

[0111] For example, the sending end 301 can also be referred to as a source end 301, and the receiving end 302 can also be referred to as a destination end 302. The sending end 301 and the receiving end 302 can transmit data or information, or can transmit signaling, messages or signals. The transmission of information between the sending end 301 and the receiving end 302 is described below as an example.

[0112] Optionally, the MAC, for example, the MAC 301a and the MAC 302a, can be regarded as a chip, wherein the Ethernet data link layer includes a MAC and a logical link control layer (LLC layer), one end of an Ethernet MAC chip is connected with a peripheral component interconnect (PCI) bus, and the other end is connected with a PHY. The function of a piece of Ethernet card MAC chip is not only to realize the functions of the MAC sublayer and the LLC sublayer, but also to provide a PCI interface conforming to the specification to realize data exchange with a host. For example, after the MAC receives an IP data packet (or a data packet of other network layer protocol) from the PCI bus, the MAC splits and repackages the data packet into a frame with a maximum size of 1518 bytes and a minimum size of 64 bytes.

[0113] Optionally, RS, such as RS 301b or RS 302b, can be used to connect MAC and PHY. The interface between RS and physical layer is MII interface, so that the data transmission of MAC is not affected by the implementation of physical layer. Optionally, RS can perform the following functions: RS can transmit the data of MAC, for example, RS converts the serial data outputted by MAC into parallel data and then sends the parallel data to physical layer; RS can check the link state and timely report the link error, for example, RS can report local fault, remote fault or link interruption; or RS can provide the signal mapping mechanism between MII and MAC / PLS.

[0114] Optionally, MII, such as MII 301c or MII 302c, is a standard interface for the connection between MAC and PHY. It is the Ethernet industry standard defined by IEEE-802.3. It includes a data interface and a management interface between MAC and PHY. The data interface includes two independent channels for the transmitter and the receiver respectively. Each channel has its own data, clock and control signals. MII interface is a standard interface for the connection between MAC and PHY, and provides the interconnection technology between MAC and PHY, and between PHY and STA (Station Management).

[0115] Optionally, the SMII, such as the SMII 301d or the SMII 302d, has 6 signal lines, and the SMII mainly includes five parts. One is a transmitting data interface from the MAC to the physical layer, two is a receiving data interface from the MAC to the physical layer, three is a clock interface between the physical layer and the MAC, four is a data transceiver interface from the MAC to the physical layer, and five is an MDIO / MDC interface for data management between the MAC and the physical layer. The above-mentioned SMII can also be replaced by: Reduced Media Independent Interface (RMII), penta serial gigabit media independent interface (QSGMII), Universal Serial 30Gigabit Media Independent Interface (USXGII), Serial Sync Media Independent Interface (SSMII), Source Sync Serial Media Independent Interface (SSSMII), or Penta-Serial Gigabit Media Independent Interface (PSGMII).

[0116] Optionally, the PHY, such as the PHY 301e or the PHY 302e, is a physical interface transceiver. The PHY connects a device (MAC) of a data link layer to a physical medium, such as an optical fiber or a copper cable. A typical PHY includes a PCS (Physical Coding Sublayer) and a PMA (Physical Media attachment) sublayer PMD (Physical Media Dependent). The PCS codes and decodes the information being transmitted and received, with the purpose of making it easier for the receiver to recover the signal.

[0117] Based on the above communication system, the application provides a possible and non-limiting application scenario, in which the RS 301b of the sending end 301 in FIG. 3a sends a sequence, which can carry information, for example, can be used to carry information that needs to be exchanged between the sending end 101 and the receiving end 102, such as information indicating that the link is faulty, information indicating the port capability, information indicating the fault distance, etc., and can also be used to determine whether the link is faulty. The sequence is processed by the MII 302c and the SMII 302d and then transmitted, and then transmitted to the PHY 302e of the receiving end 302 through a PHY chip via a cable, for example, the cable can be an unshielded twisted pair (UTP) or a shielded twisted pair (STP), etc., for example, the PHY chip can be an externally mounted chip, and then transmitted to the RS 302b of the receiving end 302 through the MII 302c and the SMII 302d of the receiving end 302; the RS 301b of the sending end 301 in FIG. 3b sends a sequence, which can carry information, for example, can be used to carry information that needs to be exchanged between the sending end 101 and the receiving end 102, such as information indicating that the link is faulty, information indicating the port capability, information indicating the fault distance, etc., and can also be used to determine whether the link is faulty, the sequence is processed by the MII 302c and the SMII 302d and then transmitted, and then transmitted to the PHY 302e of the receiving end 302 through a PHY chip via a fibre, for example, the PHY chip can be externally mounted, and then transmitted to the RS 302b of the receiving end 302 through the MII 302c and the SMII 302d of the receiving end 302.

[0118] Optionally, in the above application scenario, the sending of the sequence is bidirectional, that is, the RS 301b of the sending end 301 can send a sequence, and the RS 302b of the receiving end 302 can also send a sequence, which is finally transmitted to the RS 302b of the sending end 301 through the MII 302c and the SMII 302d. The specific transmission process can refer to the transmission process of the sequence sent by the RS 301b of the sending end 301, which will not be described here.

[0119] At present, the proportion of industrial Ethernet in the industrial network market is increasing. Since industrial Ethernet has a strong demand for high reliability, the requirement for fault recovery is very high. For example, when using Ethernet to control automation technology, the time control of fault recovery may be required to be within 60us. Fault recovery, also known as fault switching, refers to switching data packets from a fault link to an available path through automatic protection switching (Automatic Protection System, APS) and other ways to avoid fault points, thereby reducing the impact of faults on data packet transmission.

[0120] In order to realize fault recovery, fault detection is needed first, which refers to detecting whether there is a fault in the link in the network system. The performance of fault recovery mainly depends on the performance of fault detection. Taking a network system using Ethernet ring protection switching (ERPS) technology as an example, when a link in the network system fails, the time used for fault detection accounts for more than 50% of the time of fault recovery. However, in Ethernet, a large bandwidth is needed for data transmission. Since the bandwidth is limited, the time interval for sending fault detection cannot be too short, resulting in low fault detection efficiency.

[0121] Therefore, how to reduce the bandwidth overhead in the data transmission process is a technical problem to be solved.

[0122] To solve the above technical problems, the present application provides a data processing method, in which a first sequence is defined. Since the first sequence includes an interframe gap, a first sub-sequence and a frame start symbol, and the first byte of the first sub-sequence is used to indicate the start of the data sequence, the first sequence can be compatible with IEEE802.3, that is, it can be transmitted on the physical layer (physical, PHY) of Ethernet, and the size of the first sequence is less than a first threshold. That is, the first aspect defines a new sequence that can be used to transmit data on the PHY, and the size of the sequence is small enough, so the bandwidth occupied by the sequence is small, thereby reducing the bandwidth overhead in the data transmission process.

[0123] Optionally, the network system to which the present application can be applied includes industrial Ethernet, standard Ethernet, fast Ethernet, gigabit Ethernet, terabit Ethernet, Ethernet passive optical network or Ethernet all-optical network or flexible Ethernet.

[0124] The data processing method provided by the embodiments of the present application will be described in detail below with reference to FIG. 4. Optionally, the first device in FIG. 4 is taken as an example to illustrate the execution subject of the interaction, but the present application does not limit the execution subject of the interaction. For example, when the method shown in FIG. 4 is applied to the system shown in FIG. 1, the first device in FIG. 4 can be the sending end 101 or the receiving end 102; when the method shown in FIG. 4 is applied to the system shown in FIG. 2, the first device in FIG. 4 can be the sending end 201 or the receiving end 202; when the method shown in FIG. 4 is applied to the system shown in FIG. 3, the first device in FIG. 4 can be the sending end 301 or the receiving end 302. The execution subject of S401-S402 and the related implementation manners can be the first device, which optionally includes a switch, a router, a network card, a firewall, a repeater, a hub, a bridge, a gateway, an industrial Ethernet electrical switch, an industrial Ethernet electrical switch or an industrial Ethernet optical switch. The execution subject of S401-S402 and the related implementation manners can also be a chip, a chip system or a processor supporting the first device to implement the method, and can also be a logic module or software capable of implementing all or part of the functions of the first device. The first device in S401-S402 and the related implementation manners can also be replaced by a chip, a chip system or a processor supporting the first device to implement the method, and can also be replaced by a logic module or software capable of implementing all or part of the functions of the controller.

[0125] As shown in FIG. 4, the data processing method provided by the embodiments of the present application includes the following steps:

[0126] S401, the first device acquires first information,

[0127] The first information indicates a first sequence, and the first sequence includes an interframe gap, a first sub-sequence and a frame start symbol, the length of the first sequence is less than a first threshold, and the first byte of the first sub-sequence is used to indicate the start of a data sequence, and the data sequence includes the first sub-sequence and the frame start symbol.

[0128] The first sequence of the present application will be described below:

[0129] It should be noted that the "sequence" in the present application is an exemplary name, which can also be replaced by any possible name, such as a byte stream, a bit stream, a byte group, a bit group, a byte set or a bit set, etc. Optionally, the first sequence in the present application can be an integral whole composed of one or more continuous bytes, or can be an integral whole composed of a plurality of continuous bits. Optionally, in the sequence, the bytes or bits are combined and arranged according to certain rules.

[0130] First, the composition of the first sequence will be described in combination with several optional implementation manners:

[0131] In an alternative implementation, the first sequence comprises a frame gap, a first sub-sequence and a start-of-frame character, the first byte of the first sub-sequence is used to mark the beginning of a data sequence, the data sequence comprises the first sub-sequence and the start-of-frame character.

[0132] Optionally, the first byte can be replaced by a start control character, for example, when the sequence is transmitted to a PCS, the first byte can be encoded as a start control character at the PCS.

[0133] Based on the above implementation, since the first byte of the first sub-sequence in the first sequence is used to mark the beginning of a data sequence, the first sequence further comprises a frame gap and a start-of-frame character, the structure of the first sequence can meet the requirements of IEEE 802.3, thereby having PHY universality, i.e., the sequence can be compatible with a PHY meeting the requirements of IEEE 802.3.

[0134] Optionally, a typical example of the present application is that the first sequence is composed of a frame gap, a first sub-sequence and a start-of-frame character.

[0135] For example, in the present application, the frame gap can be the interval between two sequences, for example, the interval between the first sequence and the second sequence. Optionally, the frame gap is composed of an IDLE code.

[0136] Optionally, the first sub-sequence can be a continuous sub-sequence in the first sequence, and the first sub-sequence can be a combination of one or more continuous bytes in the first sequence.

[0137] It should be noted that, as described above, the first byte in the first sub-sequence is used to mark the beginning of a data sequence. Optionally, when the first sequence comprises a frame gap, a first sub-sequence and a start-of-frame character, the data sequence comprises the first sub-sequence and the start-of-frame character, and when the first sequence further comprises a second sub-sequence in addition to the frame gap, the first sub-sequence and the start-of-frame character, the data sequence comprises the first sub-sequence, the start-of-frame character and the second sub-sequence. Optionally, “marking the beginning of a data sequence” can mean that the first sub-sequence indicates that the receiving end of the first sequence that the data sequence is about to come, and allows the receiving end to lock the data stream before the beginning of the data sequence. Optionally, the first sub-sequence can indicate the beginning of the transmission of the first sequence.

[0138] For the composition of the first sub-sequence, the present application provides several alternative ways, which are as follows:

[0139] Way 1

[0140] Optionally, the first sub-sequence can be a 7-octet group, and the bit values of the first sub-sequence can be consistent with the bit values of a preamble defined in IEEE 802.3, i.e., 10101010, 10101010, 10101010, 10101010, 10101010, 10101010. The order of sending each bit is from left to right. Optionally, through such bit composition, for Manchester coding, it appears as a periodic waveform on the medium, which synchronizes the bits. For example, the receiving circuit realizes bit synchronization between the transmitting and receiving parties by extracting the Manchester coding self-contained clock in the first sub-sequence.

[0141] Option 2

[0142] Optionally, the first byte of the first sub-sequence is used to mark the start of the data sequence, for example, the bit value of the first byte can be 10101010. In addition to the first byte, the first sub-sequence also includes other bytes, for example: in an optional implementation, the first sub-sequence also includes a first byte, and the first byte includes: information indicating the type of the first sequence, information for verifying the transmission of the first sequence, information indicating whether the first link has the fault, information indicating the fault distance, information indicating the fault type, information indicating the port capability, or information for identifying the first sequence.

[0143] Based on the above implementation, the first sub-sequence also has the function of carrying related configuration information or information related to the fault, such as information indicating the type of the first sequence or information for verifying the transmission of the first sequence. Therefore, the first sequence can be used in more information interaction scenarios, for example, when the first sequence is information indicating the port capability, the first device can perform port capability negotiation with the receiving end of the first sequence by sending the first sequence.

[0144] It should be noted that, for the first byte, the above implementation manner lists several possible examples, but the present application does not limit that the first byte can only carry the above information. In addition to the information such as the information indicating the type of the first sequence, the first byte can be used to carry other information for interaction between the first device and the receiving end of the first sequence. For example, the first byte can also be used to identify the information of the first device, such as device identity document (device id) and the like. The first byte can also be used to carry failure recovery information, which can be used to indicate that the first link is in a failure recovery state or to indicate that the receiving end of the first sequence recovers the first link. For the convenience of description, the information that the first byte can include for checking the transmission of the first sequence, the information for checking the transmission of the first sequence, and other information that the first byte can carry for interaction between the first device and the receiving end of the first sequence are collectively referred to as bearing information. For the convenience of description, the information carried in the first byte is referred to as bearing information.

[0145] The information carried in the first byte, i.e. the bearing information, will be introduced in combination with several optional manners as follows:

[0146] Optionally, the first byte can include information indicating the type of the first sequence. According to the different functions of the first sequence, the first sequence can be divided into multiple types. For example, when the first sequence is used to detect link failure, the first sequence is type 1, then the first bit in the first byte = 1, or the first bit = true; when the first sequence is used to negotiate port capability, the first sequence is type 2, then the first bit in the first byte = 0, or the first bit = false, or the first bit is empty. In addition, the type of the first sequence can also be type 3, i.e. information indicating whether the first link exists the failure; the type of the first sequence can also be type 4, i.e. information indicating the distance of the failure; the type of the first sequence can also be type 5, i.e. information indicating the type of the failure; the type of the first sequence can also be type 6, i.e. information indicating the port capability; the type of the first sequence can also be type 7, i.e. information used to identify the first sequence.

[0147] Optionally, the first byte can include information for checking the transmission of the first sequence, wherein the information for checking the transmission of the first sequence can be a check code, and the first device can add the check code at the end of the first sequence when transmitting the first sequence; the receiving end of the sequence can obtain a check code by using the same algorithm, and can compare the check code obtained by the receiving end with the check code in the first sequence to determine whether the information is correctly received. Optionally, the check code can include Cyclic Redundancy Check (CRC) 32, CRC 16 or CRC 8.

[0148] Optionally, the first byte can include information indicating whether the first link has the fault. For example, when the second bit in the first byte is true or the second bit is 1 or the first bit is not empty, the second bit indicates that the first link has the fault; when the second bit is false or the second bit is 0 or the first bit is empty, the second bit indicates that the first link does not have the fault.

[0149] Optionally, the first byte can include information indicating the fault distance. The information indicating the fault distance can be position information of the link fault, distance information of the position of the link fault from a device or a node, or hop number information of the position of the link fault from a device or a node. For example, in a link A-B-C-D, if the link fault occurs between A and B, the fault distance D is two hops, and assuming that D is the receiving end of the first sequence, the information indicating the fault distance can be the third bit, and the third bit can be 11, which is used to indicate that the fault distance D is two hops; for example, in the link A-B-C-D, if the link fault occurs between B and C, the fault distance D is one hop, and the third bit can be 01, which is used to indicate that the fault distance D is one hop.

[0150] Optionally, the information indicating the fault distance in the first byte can indicate the fault type. For example, the fifth bit in the first byte can be used to indicate the fault type. For example, when the fault is divided into flash, high error code or on-off, the fifth bit = 00, which represents that the fault type is flash; the fifth bit = 10, which represents that the fault type is long-time fault; and the fifth bit = 11, which represents that the fault type is on-off. For example, when the fault is divided into local fault and remote fault, the fifth bit = true, which represents that the fault type is local fault; and the fifth bit = false, which represents that the fault type is remote fault.

[0151] Optionally, the first byte can include information for indicating port capability, by sending the information for indicating port capability, the receiving end of the first sequence can automatically determine the optimal communication parameters. For example, the information for indicating port capability can be connection rate, duplex mode, etc. The first sequence can carry information for indicating port capability as 100M full duplex.

[0152] It should be noted that the frame start delimiter (SFD) in the present application is an exemplary name, which is also referred to as frame data delimiter, frame start delimiter, frame start delimiter, frame start delimiter, or frame delimiter. Optionally, the frame start delimiter is used to identify the start of a frame. It should be noted that the SFD can also be considered as part of the first sub-sequence, at this time the length of the first sub-sequence is 8 bytes or less than or equal to 8 bytes.

[0153] Optionally, the bit value of the SFD can be: 10101011.

[0154] In addition to including the above interframe gap, the first sub-sequence, and the frame start delimiter, the first sequence can also include other parts, which are as follows:

[0155] In an optional implementation, the first sequence further includes: a second sub-sequence, the second sub-sequence includes: information for indicating the type of the first sequence, information for verifying the transmission of the first sequence, information for indicating whether the first link exists the fault, information for indicating the fault distance, information for indicating the fault type, information for negotiating port capability, or information for identifying the first sequence.

[0156] Based on the above implementation, a second sub-sequence for carrying information for indicating the type of the first sequence is introduced in the first sequence, so that the first sequence can carry more information, and the first sequence can be used in more information interaction processes and interaction scenarios.

[0157] Optionally, another typical example of the present application is that the first sequence is composed of an interframe gap, a first sub-sequence, a frame start delimiter, and a second sub-sequence.

[0158] It should be noted that for the information included in the second sub-sequence, reference can be made to the description of the information included in the first byte.

[0159] Optionally, when the first sub-sequence does not include the first byte, i.e., does not include the carried information, the second sub-sequence can be set in the first sequence to carry all the carried information, i.e., information for indicating the type of the first sequence, information for checking the transmission of the first sequence, information for indicating whether the first link exists the failure, etc.; when the first sub-sequence includes the first byte, i.e., includes the carried information, the second sub-sequence can be set in the first sequence to carry part of the carried information that is not included in the first byte, for example, when the carried information is too large, such as 10 bytes, since the first byte of the first byte needs to be used to indicate the start of the data sequence, at most 6 bytes of the carried information can be carried in the first byte, and the second sub-sequence can carry the remaining 4 bytes of information.

[0160] Then the length of the first sequence and the lengths of the interframe gap, the first sub-sequence and the SFD constituting the first sequence are introduced in combination with several optional implementation manners:

[0161] As described above, the length of the first sequence needs to be less than the first threshold, which can be 64B or less than 64B, i.e., since the first sequence in the present application is generated by RS, the first sequence in the present application can not be subject to the limitation in IEEE 802.3 that the Ethernet frame is not less than 64B, and as described above, the first sequence in the present application can not include the destination address source address and the like, so the length of the first sequence can be smaller relative to the Ethernet frame.

[0162] Optionally, the length of the smallest interframe gap in the first sequence is less than or equal to 12 bytes. The smallest interframe gap is usually 12 bytes, but when the interframe gap is compressed, the smallest interframe gap can be less than 12 bytes. For example, the smallest interframe gap can also be 8 bytes, etc.

[0163] In an optional implementation manner, the length of the first sub-sequence in the first sequence is 7 bytes or less than 7 bytes.

[0164] Based on the above implementation manner, the length of the first sub-sequence can meet the requirement of IEEE 802.3 for the length of the preamble, so that the first sequence can be compatible with IEEE 802.3, thereby having PHY universality.

[0165] Optionally, the standard length of the first sub-sequence is 7 bytes, and the first sub-sequence can also be compressed to less than 7 bytes based on 7 bytes. For example, the inter-frame gap can be compressed to 6 bytes, 5 bytes, or 4 bytes, etc. Optionally, whether to compress the first sub-sequence can be determined according to the current requirement of link speed or data transmission speed. For example, when the speed of transmitting the first sequence is required to be less than or equal to a preset speed, the first sub-sequence can not be compressed; when the speed of transmitting the first sequence is required to be greater than the preset speed, the first sub-sequence can be compressed. It should be noted that the SFD can also be considered as part of the first sub-sequence, and thus the length of the first sub-sequence is 8 bytes or less than 8 bytes.

[0166] Optionally, the SFD in the first sequence can be 1 byte.

[0167] Optionally, the length of the second sub-sequence in the first sequence depends on the length of the carried information, that is, whether the first sequence needs to include the second sub-sequence and the number of bytes of the second sub-sequence can be determined according to the carried information. When the first byte is included in the first sub-sequence, that is, the first byte in the first sub-sequence carries the carried information, the length of the second sub-sequence also depends on the length of the first byte. For example, when the length of the carried information is 8 bytes and the first sub-sequence does not carry the carried information, the length of the second sub-sequence is 8 bytes; for example, when the length of the carried information is 9 bytes and the first byte in the first sub-sequence carries the carried information, the length of the first byte is 3 bytes, and the length of the second sub-sequence is 9-3=6 bytes.

[0168] The above introduces the composition of the first sequence and the length of each part of the first sequence. The following introduces how each part of the first sequence is arranged in combination with several optional implementation manners:

[0169] In an optional implementation manner, in each of the first sequences, the inter-frame gap is before the first sub-sequence and the first sub-sequence is before the start-of-frame symbol, or the first sub-sequence is before the start-of-frame symbol and the start-of-frame symbol is before the inter-frame gap.

[0170] Based on the above implementation manner, the order of the start-of-frame symbol, the inter-frame gap, and the first sub-sequence meets the order requirement of the start-of-frame symbol, the inter-frame gap, and the preamble in IEEE 802.3, so the first sequence is compatible with IEEE 802.3, and thus has PHY universality.

[0171] It should be noted that when the first sub-sequence is the first sequence, the first sequence can be composed of multiple sequences, or there are other sequences before or after the first sequence, for example, the first sequence includes adjacent sequence A and sequence B, and sequence A is before sequence B. For sequence A, the frame gap between sequence A and sequence B is located before the frame start symbol of sequence A. For sequence B, the frame gap between sequence A and sequence B is located before the first sub-sequence of sequence B. For example, the first sequence is adjacent to the second sequence, and the second sequence is after the first sequence. For the first sequence, the frame gap between the first sequence and the second sequence is located before the frame start symbol of the first sequence. For example, the third sequence is adjacent to the second sequence, and the third sequence is before the first sequence. For the first sequence, the frame gap between the first sequence and the second sequence is located before the first sub-sequence of the first sequence.

[0172] Optionally, the first sequence is composed of a frame gap, the first sub-sequence, and the SFD, and the parts constituting the first sequence are sorted in the following order: order 1: frame gap-first sub-sequence-SFD, or order 2: first sub-sequence-SFD-frame gap. Wherein, the SFD is immediately after the first sub-sequence.

[0173] In an optional implementation, in each of the first sequence, the frame start symbol is before the second sub-sequence.

[0174] Based on the above implementation, the frame start symbol and the second sub-sequence meet the sorting requirements of IEEE802.3, so the first sequence can be compatible with IEEE802.3, thus having PHY universality.

[0175] Optionally, the first sequence is composed of a frame gap, the first sub-sequence, the SFD, and the second sub-sequence, and the parts constituting the first sequence are sorted in the following order: order 1: frame gap-first sub-sequence-SFD-second sub-sequence, or order 2: first sub-sequence-SFD-second sub-sequence-frame gap. Wherein, the SFD is immediately after the first sub-sequence, and the second sub-sequence is immediately after the SFD.

[0176] The composition and structure of the first sequence are described below with the examples of FIG. 5 and FIG. 6:

[0177] As shown in FIG. 5, frame represents a data frame to be sent, P represents a sequence in the present application, which includes the first sequence, the first sequence is sent after the data frame is sent, and IDLE represents a time interval between two sequences, that is, a time interval is needed between the sending of one sequence and the sending of another sequence. In FIG. 5, SEQ is the second sub-sequence, SEQ1 represents that the second sub-sequence is used to identify the sequence in which the second sub-sequence is located, and the identification of the sequence is 1, that is, the sequence is sequence 1 (Pattern 1).

[0178] According to the composition of the first sequence and the length of the parts that make up the first sequence, Figure 6 shows several alternatives for the first sequence:

[0179] Alternatively, as shown in Figure 6, the interframe gap and the first sub-sequence in the first sequence can be of standard length, i.e. not compressed, i.e. the first sequence consists of a 12 byte interframe gap, a 7 byte first sub-sequence and a 1 byte SFD.

[0180] Alternatively, as shown in Figure 6, the interframe gap and the first sub-sequence in the first sequence can be of standard length, i.e. not compressed, and the first sequence includes a second sub-sequence, i.e. the first sequence consists of a 12 byte interframe gap, a 7 byte first sub-sequence, a 1 byte SFD and a 1 byte or more second sub-sequence.

[0181] Alternatively, as shown in Figure 6, the interframe gap in the first sequence can be compressed and the first sub-sequence is of standard length, i.e. the first sequence consists of an 8 byte interframe gap, a 7 byte first sub-sequence and a 1 byte SFD.

[0182] Alternatively, as shown in Figure 6, the interframe gap in the first sequence can be compressed and the first sub-sequence is of standard length, and the first sequence includes a second sub-sequence, i.e. the first sequence consists of an 8 byte interframe gap, a 7 byte first sub-sequence, a 1 byte SFD and a 1 byte or more second sub-sequence.

[0183] Alternatively, as shown in Figure 6, the interframe gap in the first sequence can be compressed and the first sub-sequence can also be compressed, i.e. the first sequence consists of an 8 byte interframe gap, a 3 byte first sub-sequence and a 1 byte SFD.

[0184] Alternatively, as shown in Figure 6, the interframe gap in the first sequence can be compressed and the first sub-sequence can also be compressed, and the first sequence includes a second sub-sequence, i.e. the first sequence consists of an 8 byte interframe gap, a 3 byte first sub-sequence, a 1 byte SFD and a 1 byte or more second sub-sequence.

[0185] Alternatively, there are two more cases not shown in Figure 6, for example, the interframe gap in the first sequence is of standard length and the first sub-sequence is compressed, i.e. the first sequence consists of a 12 byte interframe gap, a 3 byte first sub-sequence and a 1 byte SFD. For example, the interframe gap in the first sequence is of standard length and the first sub-sequence is compressed, and the first sequence includes a second sub-sequence, i.e. the first sequence consists of a 12 byte interframe gap, a 3 byte first sub-sequence, a 1 byte SFD and a 1 byte or more second sub-sequence.

[0186] It should be noted that the length of the inter-frame gap can be compressed into any one byte less than 12 bytes, and FIG. 6 is an example in which the inter-frame gap is compressed into 8 bytes, and the length of the first sub-sequence can be compressed into any one byte less than 7 bytes, and FIG. 6 is an example in which the first sub-sequence is compressed into 3 bytes.

[0187] According to the information carried in the first sequence, FIG. 7, FIG. 8 and FIG. 9 give several optional examples of the first sequence:

[0188] Example 1

[0189] Optionally, as shown in the first example of FIG. 7, the first sequence does not include the second sub-sequence, and the first sub-sequence does not carry configuration information.

[0190] Optionally, all bytes in the first sub-sequence are used to indicate the start of the data sequence, and the bit values of the first sub-sequence are consistent with the bit values of the preamble defined by IEEE 802.3. That is, the bit values constituting the first sub-sequence are: 10101010, 10101010, 10101010, 10101010, 10101010, 10101010.

[0191] Example 2

[0192] Optionally, the first sequence does not include the second sub-sequence, and the first sub-sequence can carry configuration information.

[0193] For example, in the second example of FIG. 7, the first byte in the first sub-sequence can indicate the start of the data sequence, the first byte in the first sub-sequence is used to carry information indicating the type of the first sequence, and the first byte is located in the second byte of the first sub-sequence. Optionally, the third byte to the seventh byte in the first sub-sequence can also be used to indicate the start of the data sequence, and the bit values of the third byte to the seventh byte are all 10101010.

[0194] For example, in the second example of FIG. 7, the first byte in the first sub-sequence can indicate the start of the data sequence, the first byte in the first sub-sequence is used to carry information indicating the type of the first sequence, and the first byte is located in the second byte of the first sub-sequence. Optionally, the third byte to the seventh byte in the first sub-sequence can also be used to indicate the start of the data sequence, and the bit values of the third byte to the seventh byte are all 10101010.

[0195] Example 3

[0196] Optionally, the first sequence includes the second sub-sequence, and the first sub-sequence does not carry configuration information.

[0197] The first byte in the first sub-sequence can indicate the start of the data sequence, and the other bytes in the first sub-sequence can be used to carry information for synchronizing the clock, for example, the bits constituting the first sub-sequence are: 10101010, 10101010, 1010101010101010, 10101010, 10101010. The second sub-sequence is used to carry configuration information, and the specific constitution of the second sub-sequence is as follows:

[0198] For example, the second sub-sequence includes one byte, which is information for identifying the first sequence.

[0199] For example, the second sub-sequence includes two bytes, wherein the first byte is information for identifying the first sequence, and the second byte is information for indicating the type of the first sequence.

[0200] For example, the second sub-sequence includes three bytes, wherein the first byte is information for identifying the first sequence, the second byte is information for indicating the type of the first sequence, and the third byte is CRC.

[0201] Example 4

[0202] Optionally, the first sequence includes a second sub-sequence, and the first sub-sequence carries configuration information.

[0203] The first byte in the first sub-sequence can indicate the start of the data sequence. The other bytes in the first sub-sequence can be used to carry configuration information or for synchronization of the clock, and the second sub-sequence is used to carry configuration information. The specific constitution of the bytes in the first sub-sequence except the first byte and the second sub-sequence is as follows:

[0204] For example, the second byte to the sixth byte in the first sub-sequence can be used to carry information for synchronizing the clock, for example, the bits constituting the first six bytes of the first sub-sequence can be set as: 10101010, 10101010, 1010101010101010, 10101010, 10101010, 10101010. The seventh byte in the first sub-sequence is information for indicating the type of the first sequence, and the second sub-sequence includes one byte, which is used to carry information for verifying the transmission of the first sequence.

[0205] For example, the second byte to the fifth byte in the first sub-sequence can be used to carry information for synchronizing clock, for example, the bits constituting the first five bytes of the first sub-sequence can be set as: 10101010, 10101010, 10101010 10101010, 10101010. The sixth byte in the first sub-sequence is information indicating the type of the first sequence, the seventh byte in the first sub-sequence is information indicating whether the first link exists the fault, the second sub-sequence includes two bytes, the first byte is information for identifying the first sequence, and the second byte is information for carrying a check on the transmission of the first sequence.

[0206] For example, the second byte to the seventh byte in the first sub-sequence are used to carry configuration information. The second byte in the first sub-sequence is information for indicating the type of the first sequence, the third byte is information for identifying the first sequence, the fourth byte is information for carrying information indicating whether the first link exists the fault, the fifth byte is information for carrying information indicating the fault distance, the sixth byte is information for carrying information indicating port capability, and the seventh byte is information for identifying the first sequence. The second sub-sequence includes one byte, which is information for checking the transmission of the first sequence.

[0207] It should be noted that FIG. 7, FIG. 8 to FIG. 9 do not show the interframe gap, but the first sequence can include the interframe gap, for example, in FIG. 7, the interframe gap can be before the first sub-sequence, in FIG. 8, the interframe gap can be before the first sub-sequence or after the second sub-sequence, and in FIG. 9, the interframe gap can be before the first sub-sequence or after the second sub-sequence.

[0208] Optionally, after receiving the first information, the first device can generate the first sequence or obtain the first sequence. A typical application example of the present application is that the RS of the first device generates the first sequence, and then transmits the first sequence to the PHY chip of the first device through MII, and then transmits to the PHY chip of the receiving end.

[0209] S402, the first device transmits the first sequence.

[0210] Optionally, the first sequence can be generated by the RS of the first device, so as to not be limited by the minimum 64 bytes of the Ethernet frame generated by the MAC in IEEE 802.3.

[0211] Optionally, the first sequence can be transmitted by the RS of the first device, and then transmitted to the PHY of the first device through MII or SMII, and then transmitted to the PHY of the second device through cable or optical fiber, and then transmitted to the RS of the second device through MII or SMII, at this time, the transmission is terminated, that is, it will not be further transmitted to the MAC of the second device.

[0212] The steps S401-S402 are introduced above, and the following takes the first sequence applied to determine whether the link has a fault as an example to introduce how the first sequence is applied in the present application. It should be noted that the present application does not limit the use of the first sequence, for example, the first sequence can also carry information exchanged between the first device and other devices, such as information notifying that the link has a fault, information indicating port capability, information indicating fault distance, and the like.

[0213] In an optional implementation, the first sequence is used to determine whether the first link has a fault.

[0214] Based on the above implementation, since the length of the sequence used to determine whether the link has a fault is small, the interval of sending the sequence can be short, so that the sequence is sent multiple times in a unit of time, improving the efficiency of link detection and meeting the microsecond-level requirement of industrial Ethernet for fault recovery.

[0215] It should be noted that the "link" in the present application is an exemplary name, which can also be replaced by any possible name, such as channel, path, line, interface, or transmission path, and the like. For example, in FIGS. 3a and 3b, the first link can be all or part of the link between the RS 301b or the RS 302b. When there are other devices between the sending end 301 or the receiving end 302, such as a relay node 1, the link can be the link from the sending end 301 to the relay node 1, or the link from the relay node 1 to the receiving end 302, or the entire link from the sending end 301 to the relay node 1 and the relay node 1 to the receiving end 302.

[0216] Optionally, in the present application, the link can include an interface for transmitting data or information, such as the PHY 301e or the PHY 302e, and the link can also include an optical fiber, a cable, or a logical link for transmitting data or information.

[0217] It should be noted that the "fault" in the present application is an exemplary name, which can also be replaced by any possible name, such as error, exception, interruption, link down, disconnection, or connection disconnection, and the like. For example, the fault in the present application can be a partial fault of the link. For example, in FIG. 3a, the fault can be a cable fault, or a whole fault of the link between the RS 301b or the RS 302b. For example, the fault of the first link in the present application can be due to a fault of an interface, a chip, a logic module, or a device related to the first link, or due to a fault of a network environment, which causes the first link to be unable to normally transmit information or data, or causes a task performed on the first link to be unable to normally run.

[0218] Optionally, according to the duration of the fault, the fault in the present application can be divided into flashover and long-time fault, according to whether the fault occurs at the local or the opposite end; the fault in the present application can be divided into local fault and remote fault, for example, when the first device receives the local fault, it means that the local link does not normally establish the link, when the first device receives the remote fault, it means that the opposite end does not normally establish the link.

[0219] Optionally, after the first device sends the first sequence, the first sequence is transmitted in parallel between the RS and the MII.

[0220] In addition to sending the first sequence, the first device can also send a plurality of sequences for determining whether the first link has a fault, for example, a second sequence and the like, and the sending time of different sequences should have a certain time difference, which is as follows:

[0221] In an optional implementation, after the first sequence is sent, at a time difference between the current time and the time when the first sequence is sent being a first value, a second sequence is sent, the second sequence being used for determining whether the first link has a fault, the length of the second sequence being less than the first threshold, and the first value being related to the state of the first link.

[0222] Based on the above implementation, by sending a plurality of sequences for detecting the link, for example, the first sequence and the second sequence, the receiving end of the sequence can determine whether the first link has a fault according to the packet loss rate and other indicators of the sequence. And the time interval between different sequences is related to the state of the first link, so that the time of sending the sequence can avoid the busy time of the first link, and the sequence for detection is sent in the relatively idle state of the link.

[0223] Optionally, the structure and composition of the second sequence are the same as those of the first sequence, and the structure and composition of the second sequence can be referred to the description of the structure and composition of the first sequence. It should be noted that part of the information carried by the first sequence and the second sequence may be different, for example, when the first sequence carries information for identifying the first sequence, and the second sequence carries information for identifying the second sequence, for example, the sequence number, the sequence number of the first sequence and the first sequence is different, for example, when the first sequence and the second sequence carry timestamp information, since the sending time of the first sequence and the second sequence is different, the timestamp information of the two is different.

[0224] Optionally, the first device can send the first sequence or the second sequence when there is no packet transmission on the first link. Taking FIG. 10 as an example, FIG. 10 is a state transition diagram of the RS sending sequence of the first device. When the link is in an idle state, a manual configuration can be performed to trigger the detection function of the first device to enter an enabled state, i.e., to trigger the function of detecting the link fault of the first device. In FIG. 10, detect_enable=1 represents that the detection function enters the enabled state. After the detection of the first link is enabled, if the time interval from the sending time of the last sequence is less than the minimum time interval, or there is a packet being transmitted on the link, the state of the RS sending sequence enters a waiting state. If the time interval from the sending time of the last sequence is greater than the minimum time interval and there is no packet being transmitted on the link, the state of the RS sending sequence enters a sequence sending state. After the sequence sending is completed, the state of the RS sending sequence enters the waiting state, and then the waiting state and the sequence sending state are repeatedly entered.

[0225] Optionally, according to the different packet transmission conditions of the first link, the application divides the first link into three states, which are as follows:

[0226] In an optional implementation, when the first link is in a first state, the first value is a minimum sending interval between the first sequence and the second sequence, and the first state indicates that there is no packet being transmitted on the first link at the current time. When the first link is in a second state, the first value is greater than the minimum sending interval, and the first value is less than the sum of the minimum sending interval and a second value, and the second value is related to the maximum transmission unit. The second state indicates that there is a packet being transmitted on the first link, and there is no specific length packet that can occupy the entire bandwidth of the first link. When the first link is in a third state, the first value is the second value, and the third state indicates that there is a specific length packet that can occupy the entire bandwidth of the first link.

[0227] Based on the above implementation, by classifying the link states and setting different sequence sending strategies for different types of link states, the first device can flexibly adjust the time interval of sending different sequences according to the state of the link, thereby improving the effect of link fault detection.

[0228] It should be noted that the first state is an example of naming, and the first state can be replaced by an idle state (IDLE) or the like. The second state is an example of naming, and the first state can be replaced by a non-wire speed state or a normal state (normal) or the like. The third state is an example of naming, and the first state can be replaced by a wire speed state (wire speed), a congestion state or the like.

[0229] Optionally, the minimum sending interval can be preset by the system, for example, can be set to 1 microsecond, or can be the serialization time of the maximum transmission unit of the first link, i.e., the minimum sending interval = the ratio of the minimum transmission unit to the rate of the port, for example, the minimum transmission unit in the Ethernet is usually 64B, assuming that the Ethernet interface rate is 1Gbps, then the minimum sending interval = 64*8 ÷ 1*10-3≈0.5 microsecond.

[0230] In an optional implementation, the second value is the serialization time of the maximum transmission unit of the first link.

[0231] Based on the above implementation, when the link is in the third state, i.e., the transmission rate of the preset length of the message in the first link is equal to the second threshold, i.e., reaches the line speed state, the time interval between the sequences is set to the serialization time of the maximum transmission unit of the first link, which can ensure that the first sequence or the second sequence is sent after the message transmission in the first link is completed, and improves the effect of determining whether there is a fault.

[0232] Optionally, the minimum sending interval is the serialization time of the minimum transmission unit.

[0233] Taking FIG. 11 as an example, T1, i.e., the minimum sending interval, for example, can be the serialization time of the minimum transmission unit, T1+T2 is the maximum sending interval, wherein T2 is the serialization time of the preset size of the transmission unit, for example, when the preset size of the transmission unit can be the maximum transmission unit, after the start of the probe, if the link is in the first state, the time interval for sending any two adjacent sequences is T1, for example, the time interval for sending the first sequence and the second sequence is T1; if the link is in the second state, the time interval for sending any two adjacent sequences is between T1 and (T1+T2), wherein if the link is in the third state, the time interval for sending any two adjacent sequences is T2.

[0234] For example, assuming that the maximum transmission unit is 1500B, the Ethernet interface rate is 1Gbps, and the minimum transmission unit is 64B, then T2 = 1500*8*10-3=12 microseconds, T1 = 64*8*10-3≈0.5 microsecond.

[0235] Optionally, multiple windows can be set, and the windows can cut the infinite data into limited "data blocks" for processing. Multiple sequences are sent in each window time. Taking FIG. 12 as an example, cnt1 is used to count the time interval between the current time and the last time of sending a sequence, for example, the time of sending the first sequence is m, and before sending the next sequence adjacent to the first sequence, i.e., the second sequence, the difference between the current time and m needs to be counted by cnt1, i.e., cnt1 = current time - m, as described above, T1 is the minimum sending interval. When cnt1 < T1, the waiting state is entered, and the time when cnt1 ≥ T1 is waited for; when cnt1 ≥ T1, if the link is in an idle state or the messages in the link are sent, the sequence is sent, for example, the first sequence or the second sequence can be sent, otherwise, the messages are waited to be sent. At this time, one round of detection is completed, and the next round of detection can be entered, and the process of the next round of detection can be referred to FIG. 12.

[0236] Optionally, a typical application scenario of the present application is that the RS of the first device sends the first sequence, the first sequence is transmitted through the MII and the SMII of the first device, and then the sequence is transmitted to the PHY chip of the receiving end through the cable. The following takes the receiving end as the second device as an example, and the first sequence is transmitted to the RS of the second device through the SMII and the MII of the second device, or the detection information column is transmitted through the MII and the SMII of the first device, and then can be transmitted to the SMII of the second device through the optical fiber, and then the first sequence is transmitted to the RS of the second device through the SMII and the MII of the second device. Then the second device determines whether the link between the first device and the second device exists based on the first sequence. If a fault exists, the first device sends information indicating that the link exists to the first device, i.e., the first information, i.e., the second device sends the first information to the first device through the relay node. Correspondingly, the first device performs step S402.

[0237] Optionally, the first information can also be a sequence, and the following takes the first information as the fourth sequence as an example for description, the composition and structure of the fourth sequence can be referred to the description of the composition and structure of the first sequence above, if the first sequence includes information indicating the type of the sequence, the information can indicate that the first sequence is a sequence for determining whether the link exists; if the fourth sequence includes information indicating the type of the sequence, the information can indicate that the fourth sequence is a sequence for notifying that the link exists.

[0238] Optionally, the first information related to the first sequence comprises: the first information is feedback information of the first sequence, the first information is returned based on the first sequence, or the first information is used to indicate a detection result of the first sequence, for example, when the second device receives the first sequence and determines that the first link is faulty according to the first sequence, the second device feeds back the result by sending the first information, that is, indicates that the link is faulty by the first information.

[0239] The data processing method provided by the application is introduced from the sending end of the sequence, that is, the first device, and the data processing method provided by the application is introduced from the receiving end of the sequence, that is, the second device.

[0240] As shown in FIG. 13, the data processing method provided by the embodiment of the application comprises the following steps:

[0241] S1301, the second device receives a third sequence;

[0242] The third sequence comprises: an interframe gap, a third sub-sequence and a frame start symbol, the size of the third sequence is less than a second threshold, and the first byte of the third sub-sequence is used to indicate the start of a data sequence, the data sequence comprising: the third sub-sequence and the frame start symbol.

[0243] It should be noted that the third sequence described above can be the same sequence as the first sequence, or can be a different sequence, that is, the second device can receive a sequence sent by a device other than the first device, or can receive a sequence other than the first sequence sent by the first device.

[0244] Optionally, the third threshold described above can be 64B or less than 64B.

[0245] The application of the third sequence to determine whether the link is faulty is taken as an example below to introduce how the first sequence is applied in the application. It should be noted that the application does not limit the use of the third sequence, for example, the third sequence can also carry information for interaction between the second device and other devices, such as information notifying that the link is faulty, information indicating the port capability, information indicating the fault distance, etc.

[0246] Optionally, the second device determines whether the second link is faulty based on the third sequence;

[0247] It should be noted that the second link can be the same as the first link, or can be different. The composition and structure of the third sequence can refer to the composition and structure of the first sequence described above, which will not be described here. The second link can refer to the description of the first link above, which will not be described here.

[0248] Optionally, the second device can count the number of third sequences received in a certain time W, and compare with a configured sequence threshold TH, when the threshold is exceeded, it is considered that the second link in W can exist failure, when the threshold TH is exceeded, it is considered that the second link in W can not exist failure. Please refer to FIG. 14, which is a sequence receiving control block diagram provided by the present application, in which t1 is used to count whether the window time is reached, T3 is the window time, and cnt2 is used to count the number of received sequences. At the beginning of a window, t1 and cnt2 are initialized to 0, first it is judged whether a sequence is received, if a sequence is received, cnt2 is added by 1, then it is judged whether t1 reaches the window time, i.e. whether t1 is greater than T4; if a sequence is not received, it is directly judged whether t1 reaches the window time, when the time reaches the window time, it is judged whether cnt2 reaches the threshold, if it is reached, it is considered that the link does not exist failure in the window, if it is not reached, it is considered that the link exists failure in the window. Then the detection of the window is ended, at this time, the next window can be entered, then the results of multiple windows are comprehensively determined to determine whether the link exists failure.

[0249] Optionally, the second device can set multiple windows, for example, four windows in Figure 15, W is the window time, wherein W1 represents the time of the first window, W2 represents the time of the second window, W3 represents the time of the third window, and W4 represents the time of the fourth window. W_cnt is used to count whether the window time is reached, fault_cnt is used to count the number of times indicating the existence of link failure within the four windows, T_cnt is used to count whether the minimum sending interval is reached, and cnt is used to count the number of received sequences. In W1, the cnt is initialized to 0, when T_cnt=T, i.e. the time interval from the current time to the last sending sequence reaches the minimum sending interval, at this time it is assumed that there is a 1500B length message being sent in the link, then the message is sent after waiting for the message to be sent, and in W1, a total of one sequence is sent, and the cnt is changed from cnt=0 to cnt=1, indicating that there is no sequence packet loss, so it is considered that there is no link failure in W1, and fault_cnt=0; In W2, the cnt is the final state of W1, i.e. the cnt=1, when T_cnt=T, i.e. the time interval from the current time to the last sending sequence reaches the minimum sending interval, at this time the sequence is sent after waiting for the message in the link to be sent, in W2, a total of two sequences are sent, and the cnt is changed from cnt=1 to cnt=2, indicating that one sequence is lost, so it is considered that there is a link failure in W1, and fault_cnt=1; In W2, the cnt is the final state of W1, i.e. the cnt=1, when T_cnt=T, i.e. the time interval from the current time to the last sending sequence reaches the minimum sending interval, at this time the sequence is sent after waiting for the message in the link to be sent, in W2, a total of two sequences are sent, and the cnt is changed from cnt=1 to cnt=2, indicating that one sequence is lost, so it is considered that there is a link failure in W1, and fault_cnt=1; At this time, due to the existence of link failure, in subsequent W3 and W4, fail_detect=1, i.e. the detection of link failure fails, so in W3 and W4, it is indicated that there is a link failure, so in W3, fault_cnt=2; Therefore, in W3, fault_cnt=3. At this time, the results of the four windows are integrated, and it can be considered that the link exists failure.

[0250] Optionally, referring to FIG. 16, W_cnt in FIG. 16 is used to count whether the time reaches the window time W, if yes, the detection of the window ends, or P_cnt is used to count whether the sequence received by the second device reaches the threshold TH, if yes, it means that the link is not faulty, or it can become normal, if no, it means that the detection result of the window is that the link is faulty; then the next round of detection is continued, i.e., detect 1 is performed in the next window, and the detection of the link fault can be performed through three windows in turn, and finally the detection results of the three windows are summarized, if the detection result of any one of the three windows is that the link is faulty, it is finally determined that the link is faulty, or if the detection results of any last two windows of the three windows, or the detection results of the three windows are all that the link is faulty, it is finally determined that the link is faulty. If the results of the three windows are all that P_cnt≥TH, the link is faulty, and the recovery can be manually triggered or automatically performed, so as to start the detection of the link fault again.

[0251] Optionally, when the third device determines that the second link is not faulty, the third device can notify the sender of the third sequence that the second link is not faulty, or the third device can not notify the sender of the third sequence that the second link is not faulty.

[0252] Optionally, when the first link is faulty and the RX direction is not faulty, the second device sends the second information indicating that the second link is faulty.

[0253] Optionally, the second information can also be a sequence, which is described below by taking the second information as a fifth sequence as an example. The composition and structure of the fifth sequence can refer to the composition and structure of the first sequence described above. If the fifth sequence includes information indicating the type of the sequence, the information can indicate that the fourth sequence is a sequence for notifying that the link is faulty.

[0254] As described above, in the present scheme, the sending end (e.g., the first device) and the receiving end (e.g., the second device) can send sequences for determining whether the link is faulty to each other, i.e., the second device can also send a sequence for determining whether the link is faulty. The first device can determine whether the link is faulty according to the sequence sent by the first device, and if yes, send information for indicating that the link is faulty.

[0255] Referring to Fig. 17, Fig. 17 is a schematic diagram of a state machine provided in the present application. As mentioned above, in the present application, the sequence can be used to detect the fault, and the sequence can also be used to inform that the link has a fault. The sequence used to detect the fault is referred to as pattern 1, and the sequence used to inform that the link has a fault is referred to as pattern 2. If the first device sends the sequence used to detect to the second device, the second device counts the number of the detection sequence. If the number of the sequence is greater than TH, it is considered that the state of the link is Local fault. Correspondingly, the value of Local fault can be adjusted from 0 to 1. Once Local fault = 1, the second device sends pattern 2 to the first device. When the first device receives pattern 2, for the second device, since the fault occurs at the opposite end, i.e., the first device, the second device considers that the state of the link is remote fault. If the number of the sequence is less than TH, it is considered that the state of the link is normal.

[0256] The above describes the embodiments of the present application from the perspective of the method. The following introduces the communication device in the embodiments of the present application from the perspective of the specific device implementation.

[0257] Referring to Fig. 18, the present application provides a schematic diagram of a communication device 1800. Optionally, the communication device 1800 can be the receiving end 102 or the sending end 101 in Fig. 1. The communication device 1800 can be the sending end 101 or the receiving end 102 in Fig. 1, the sending end 201 or the receiving end 202 in Fig. 2, or the sending end 301 or the receiving end 302 in Fig. 3a or Fig. 3b. The communication device 1800 at least includes a processing unit 1801 and a transceiver unit 1802.

[0258] As an example, the communication device 1800 can implement the function of the first device in the method shown in Fig. 4, and thus can also implement the beneficial effects possessed by the method shown in Fig. 4.

[0259] The transceiver unit 1802 is configured to acquire first information, the first information indicating that a first sequence is sent, the first sequence including an interframe gap, a first sub-sequence and a start-of-frame character, a length of the first sequence being less than a first threshold, a first byte of the first sub-sequence being used to indicate a start of a data sequence, the data sequence including the first sub-sequence and the start-of-frame character; and send the first sequence.

[0260] In an optional implementation, the first sequence is generated by a first reconciliation sub-layer RS.

[0261] In an optional implementation, the first sub-sequence further comprises a first byte, the first byte comprising: information indicating a type of the first sequence, information used for verifying transmission of the first sequence, information indicating whether a link has a fault, information indicating a fault distance, information indicating a fault type, information indicating a port capability, or information used for identifying the first sequence.

[0262] In an optional implementation, in each of the first sequences, the frame gap is before the first sub-sequence and the first sub-sequence is before the frame start symbol, or the first sub-sequence is before the frame start symbol and the frame start symbol is before the frame gap.

[0263] In an optional implementation, the first sequence further comprises a second sub-sequence, the second sub-sequence comprising: information indicating a type of the first sequence, information used for verifying transmission of the first sequence, information indicating whether a link has a fault, information indicating a fault distance, information indicating a fault type, information indicating a port capability, or information used for identifying the first sequence.

[0264] In an optional implementation, in each of the first sequences, the frame start symbol is before the second sub-sequence.

[0265] In an optional implementation, the first threshold value is less than or equal to 64 bytes.

[0266] In an optional implementation, a length of the first sub-sequence is 7 bytes or less than 7 bytes.

[0267] In an optional implementation, the first sequence determines whether a first link has a fault.

[0268] In an optional implementation, the transceiver 1802 is further configured to: when a time difference between a current time and a time of sending the first sequence is a first value, send a second sequence, the second sequence being used for determining whether the first link has a fault, a length of the second sequence being less than the first threshold value, the first value being related to a state of the first link.

[0269] In an optional implementation, when the first link is in a first state, the first value is a minimum transmission interval between the first sequence and the second sequence, the first state indicating that there is no packet being transmitted in the first link at a current time; when the first link is in a second state, the first value is greater than the minimum transmission interval, the first value being less than a sum of the minimum transmission interval and a second value, the second value being related to a maximum transmission unit of the first link, the second state indicating that there is a packet being transmitted in the first link and there is no packet of a preset length capable of occupying a full bandwidth of the first link; when the first link is in a third state, the first value is the second value, the third state indicating that there is a packet of the preset length capable of occupying the full bandwidth of the first link in the first link.

[0270] In an optional implementation, the second value is a serialization time of the maximum transmission unit of the first link.

[0271] As an example, the communication apparatus 1800 can implement the function of the second device in the method shown in FIG. 13, and thus can also implement the beneficial effects of the method shown in FIG. 13.

[0272] The transceiver 1802 is configured to receive a third sequence, the third sequence including a frame gap, a third sub-sequence and a frame start symbol, a size of the third sequence being less than a second threshold, a first byte of the third sub-sequence being configured to indicate a start of a data sequence, the data sequence including the third sub-sequence and the frame start symbol.

[0273] In an optional implementation, the processing unit 1801 is further configured to control a second harmonization sub-layer of the second device not to send the third sequence to a medium access control (MAC).

[0274] In an optional implementation, the third sub-sequence further includes a second byte, the second byte including information indicating a type of the third sequence, information used for verifying transmission of the third sequence, information indicating whether a link has the fault, information indicating a fault distance, information indicating a fault type, information indicating a port capability, or information used for identifying the third sequence.

[0275] In an optional implementation, in each of the third sequences, the third sub-sequence is before the frame start symbol and the frame gap is before the third sub-sequence, or the third sub-sequence is before the frame start symbol and the frame start symbol is before the frame gap.

[0276] In an optional implementation, the third sequence further comprises: a fourth sub-sequence comprising: information indicating a type of the third sequence, information used for checking transmission of the third sequence, information indicating whether the second link has the fault, information indicating a distance of the fault, information indicating a type of the fault, information indicating a port capability, or information used for identifying the third sequence.

[0277] In an optional implementation, in each of the third sequence, the frame start symbol is before the fourth sub-sequence.

[0278] In an optional implementation, the second threshold is less than or equal to 64 bytes.

[0279] In an optional implementation, a length of the third sub-sequence is 7 bytes or less than 7 bytes.

[0280] In an optional implementation, the processing unit 1801 is further configured to: determine whether the second link has the fault based on the third sequence.

[0281] In an optional implementation, the transceiver unit 1802 is further configured to: receive a fourth sequence when a time difference between a current time and a time of transmitting the third sequence is a third value, the fourth sequence being used for determining whether the second link has the fault, a length of the fourth sequence being less than the third threshold, the third value being related to a state of the second link.

[0282] In an optional implementation, when the second link is in a fourth state, the third value is a minimum transmission interval between the third sequence and the fourth sequence, the fourth state indicating that there is no packet being transmitted in the second link at a current time; when the second link is in a fifth state, the third value is greater than the minimum transmission interval, the third value being less than a sum of the minimum transmission interval and a fourth value, the fourth value being related to a maximum transmission unit of the second link, the fifth state indicating that there is a packet being transmitted in the second link, and there is no packet of a preset length capable of occupying a full bandwidth of the second link; when the second link is in a sixth state, the third value is the fourth value, the sixth state indicating that there is a packet of a preset length capable of occupying a full bandwidth of the second link in the second link.

[0283] In an optional implementation, the second value is a serialization time of a maximum transmission unit of the second link.

[0284] It should be noted that the information execution process and the like of the units of the communication apparatus 1800 described above can be specifically refer to the descriptions in the method embodiments described above, and will not be described herein.

[0285] Please refer to FIG. 19, which is a structural diagram of a communication apparatus involved in the above embodiment, provided by the embodiment of the present application. Optionally, the communication apparatus 1900 can be the sending end 101 or the receiving end 102 in FIG. 1, the sending end 201 or the receiving end 202 in FIG. 2, or the sending end 301 or the receiving end 302 in FIG. 3a or FIG. 3b. The communication apparatus 1900 at least includes a processing unit 1801 and a transceiver unit 1802. The structure of the communication apparatus 1900 can refer to the structure shown in FIG. 19.

[0286] The communication apparatus includes at least one processor 1901, at least one communication port 1902, at least one memory 1903, and one or more buses 1904. The processor 1901, the memory 1903 and the communication port 1902 are connected, for example, through the bus. In the embodiment of the present application, the connection can include various interfaces, transmission lines or buses, etc., and the embodiment does not limit this. The bus 1904 is connected with the communication port 1902.

[0287] As an implementation example, when the communication apparatus shown in FIG. 19 is the first apparatus in the foregoing FIG. 4 and related embodiments, the communication port 1902 acquires first information, the first information indicating that a first sequence is sent, the first sequence including a frame gap, a first sub-sequence and a frame start symbol, a length of the first sequence being less than a first threshold, a first byte of the first sub-sequence being used to indicate a start of a data sequence, the data sequence including the first sub-sequence and the frame start symbol; and the first sequence is sent.

[0288] As another implementation example, when the communication apparatus shown in FIG. 19 is the second apparatus in the foregoing FIG. 7 and related embodiments, the communication port 1902 receives a third sequence, the third sequence including a frame gap, a third sub-sequence and a frame start symbol, a size of the third sequence being less than a second threshold, a first byte of the third sub-sequence being used to indicate a start of a data sequence, the data sequence including the third sub-sequence and the frame start symbol.

[0289] It should be noted that the execution process of each device in the communication apparatus shown in FIG. 19 and the like can refer to the description in the foregoing method embodiments of the present application, which will not be repeated here.

[0290] The processor 1901 is mainly configured to process communication protocols and communication data, control the whole communication device, execute software programs, and process data of the software programs, for example, to support the communication device to perform actions described in the embodiments. The communication device can include a baseband processor and a central processor. The baseband processor is mainly configured to process communication protocols and communication data, and the central processor is mainly configured to control the whole first device or second device, execute software programs, and process data of the software programs. The processor 1901 in FIG. 19 can integrate the functions of the baseband processor and the central processor. Those skilled in the art can understand that the baseband processor and the central processor can also be independent processors and are interconnected through a bus or the like. Those skilled in the art can understand that the first device or the second device can include a plurality of baseband processors to adapt to different network modes, and the first device or the second device can include a plurality of central processors to enhance the processing capability. The components of the first device or the second device can be connected through various buses. The baseband processor can also be referred to as a baseband processing circuit or a baseband processing chip. The central processor can also be referred to as a central processing circuit or a central processing chip. The function of processing communication protocols and communication data can be built in the processor or stored in the memory in the form of software programs, and the processor executes the software programs to realize the baseband processing function.

[0291] The memory 1903 is mainly configured to store software programs and data. The memory 1903 can exist independently and be connected with the processor 1901. Alternatively, the memory 1903 can be integrated with the processor 1901, for example, integrated in a chip. The memory 1903 can store program codes for executing the technical solutions of the embodiments of the present application, and the processor 1901 controls the execution. Various computer programs executed can also be regarded as a driver of the processor 1901.

[0292] FIG. 19 only shows one memory and one processor. In actual first devices or second devices, there can be multiple processors and multiple memories. The memory can also be referred to as a storage medium or a storage device. The memory can be a storage element on the same chip as the processor, that is, an on-chip storage element, or an independent storage element, and the embodiments of the present application do not make any limitation.

[0293] The communication port 1902 can be configured to support the receiving or transmitting of radio frequency signals between the communication device and a terminal. The communication port 1902 can be connected to the bus 1904. The communication port 1902 includes a transmitter Tx and a receiver Rx. Specifically, the one or more buses 1904 can receive radio frequency signals, the receiver Rx of the communication port 1902 is configured to receive the radio frequency signals from the bus 1904, and convert the radio frequency signals into digital baseband signals or digital intermediate frequency signals, and provide the digital baseband signals or the digital intermediate frequency signals to the processor 1901, so that the processor 1901 further processes the digital baseband signals or the digital intermediate frequency signals, such as demodulation processing and decoding processing. In addition, the transmitter Tx in the communication port 1902 is also configured to receive modulated digital baseband signals or digital intermediate frequency signals from the processor 1901, and convert the modulated digital baseband signals or the digital intermediate frequency signals into radio frequency signals, and transmit the radio frequency signals through the one or more buses 1904. Specifically, the receiver Rx can selectively perform one or more levels of down-mixing processing and analog-to-digital conversion processing on the radio frequency signals to obtain the digital baseband signals or the digital intermediate frequency signals, and the order of the down-mixing processing and the analog-to-digital conversion processing is adjustable. The transmitter Tx can selectively perform one or more levels of up-mixing processing and digital-to-analog conversion processing on the modulated digital baseband signals or the digital intermediate frequency signals to obtain the radio frequency signals, and the order of the up-mixing processing and the digital-to-analog conversion processing is adjustable. The digital baseband signals and the digital intermediate frequency signals can be collectively referred to as digital signals.

[0294] The transceiver can also be referred to as a transceiving unit, a transceiver, a transceiving device, etc. Optionally, the devices in the transceiving unit for implementing the receiving function can be regarded as a receiving unit, and the devices in the transceiving unit for implementing the transmitting function can be regarded as a transmitting unit, that is, the transceiving unit includes the receiving unit and the transmitting unit, the receiving unit can also be referred to as a receiver, an input port, a receiving circuit, etc., and the transmitting unit can be referred to as a transmitter, a transmitter, or a transmitting circuit, etc.

[0295] It should be noted that the communication device shown in FIG. 19 can be specifically configured to implement the steps implemented by the first device or the second device in any of the preceding method embodiments, and achieve the corresponding technical effects of the first device or the second device. The specific implementation of the communication device shown in FIG. 19 can be referred to the description in any of the preceding method embodiments, which will not be repeated here.

[0296] The embodiment of the present application also provides a computer readable storage medium storing one or more computer execution instructions, when the computer execution instructions are executed by a processor, the processor executes the method described in the possible implementation manner of the communication device in the preceding embodiment, wherein the communication device can be specifically the first device or the second device in the preceding embodiment.

[0297] The embodiment of the present application further provides a computer program product (or computer program) for storing one or more computers, when the computer program product is executed by the processor, the processor executes the method of the possible implementation manners of the communication device, wherein the communication device can be the first device or the second device in the foregoing embodiments.

[0298] The embodiment of the present application further provides a chip system, which comprises a processor and is used for supporting the communication device to implement the functions involved in the possible implementation manners of the communication device. In a possible design, the chip system can further comprise a memory, which is used for storing necessary program instructions and data of the communication device. The chip system can be composed of a chip, or can comprise the chip and other discrete devices, and the communication device can be the first device or the second device in the foregoing embodiments.

[0299] Optionally, the chip system comprises the RS. For example, the RS is used for supporting the first device in FIG. 4 to execute the method shown in FIG. 4 and the method described in any of the possible implementation manners or design manners of the method shown in FIG. 4, or the RS is used for supporting the second device in FIG. 13 to execute the method shown in FIG. 13 and the method described in any of the possible implementation manners or design manners of the method shown in FIG. 13.

[0300] The embodiment of the present application provides a communication system, which comprises the first device in FIG. 4 and the second device in FIG. 13, the first device is used for executing the method shown in FIG. 4 and the method described in any of the possible implementation manners or design manners of the method shown in FIG. 4, and the second device is used for executing the method shown in FIG. 13 and the method described in any of the possible implementation manners or design manners of the method shown in FIG. 13.

[0301] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented by other manners. For example, the device embodiments described above are only schematic, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interfaces, devices or units, and can be electrical, mechanical or other forms.

[0302] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, that is, can be located in one place, or can be distributed on a plurality of network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0303] In addition, each of the functional units in the various embodiments of the present application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0304] When the integrated unit is realized in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium. Based on such an understanding, the technical solutions of the present application essentially make contributions to the part or the whole or part of the technical solutions, which can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a number of instructions for causing a computer device (which can be a personal computer, a server, or a first device or a second device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.

[0305] The above-described embodiments are merely used to illustrate the technical solutions of the present application, rather than limit the technical solutions thereof; even though the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still make modifications to the technical solutions recorded in the foregoing embodiments, or make equivalent replacements to some of the technical features thereof; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A data processing method, characterized by, The method comprises: obtaining first information, the first information indicating sending a first sequence, the first sequence comprising: a frame gap, a first sub-sequence and a frame start symbol, a length of the first sequence being less than a first threshold, a first byte of the first sub-sequence being used to indicate a start of a data sequence, the data sequence comprising: the first sub-sequence and the frame start symbol; sending the first sequence.

2. The data processing method according to claim 1, characterized in that, The first sequence is generated by a first reconciliation sub-layer RS.

3. The data processing method according to claim 1 or 2, characterized in that, The first sub-sequence further comprises a first byte, the first byte comprising: information indicating a type of the first sequence, information used to verify transmission of the first sequence, information indicating whether a link has a fault, information indicating a fault distance, information indicating a fault type, information indicating a port capability, or information used to identify the first sequence.

4. The data processing method according to claims 1 to 3, characterized in that, In each of the first sequences, the frame gap is before the first sub-sequence and the first sub-sequence is before the frame start symbol, or the first sub-sequence is before the frame start symbol and the frame start symbol is before the frame gap.

5. The data processing method according to any one of claims 1 to 4, characterized in that, The first sequence further comprises: a second sub-sequence, the second sub-sequence comprising: information indicating a type of the first sequence, information used to verify transmission of the first sequence, information indicating whether a link has a fault, information indicating a fault distance, information indicating a fault type, information indicating a port capability, or information used to identify the first sequence.

6. The data processing method according to any one of claims 1 to 5, characterized in that, In each of the first sequences, the frame start symbol is before the second sub-sequence.

7. The data processing method according to any one of claims 1 to 6, characterized in that, The first threshold is less than or equal to 64 bytes.

8. The data processing method according to any one of claims 1 to 7, characterized in that, A length of the first sub-sequence is 7 bytes or less than 7 bytes.

9. The data processing method according to any one of claims 1 to 8, characterized in that, The first sequence determines whether a first link has a fault.

10. The data processing method according to claim 9, characterized in that, After the sending the first sequence, the method further comprises: when a time difference between a current time and a time of sending the first sequence is a first value, sending a second sequence, the second sequence being used to determine whether the first link has a fault, a length of the second sequence being less than the first threshold, the first value being related to a state of the first link.

11. The data processing method according to claim 10, characterized in that, When the first link is in a first state, the first value is a minimum sending interval between the first sequence and the second sequence, the first state indicating that there is no packet being transmitted in the first link at the current time; When the first link is in a second state, the first value is greater than the minimum sending interval, the first value being less than a sum of the minimum sending interval and a second value, the second value being related to a maximum transmission unit of the first link, the second state indicating that there is a packet being transmitted in the first link and there is no packet of a preset length capable of occupying a full bandwidth of the first link; When the first link is in a third state, the first value is the second value, the third state indicating that there is a packet of a preset length capable of occupying a full bandwidth of the first link in the first link.

12. The data processing method according to claim 11, characterized in that, The second value is a serialization time of the maximum transmission unit of the first link.

13. A data processing method, characterized by, The method comprises: receiving a third sequence, the third sequence comprising: a frame gap, a third sub-sequence and a frame start symbol, a length of the third sequence being less than a second threshold, a first byte of the third sub-sequence being used to indicate a start of a data sequence, the data sequence comprising: the third sub-sequence and the frame start symbol.

14. The data processing method according to claim 13, characterized in that, after the receiving the third sequence, the method further comprising: the second harmonization sub-layer not sending the third sequence to a medium access control (MAC).

15. The data processing method according to claim 13 or 14, characterized in that, the third sub-sequence further comprising a second byte, the second byte comprising: information indicating a type of the third sequence, information used to verify a transmission of the third sequence, information indicating whether the failure exists in the second link, information indicating a distance of the failure, information indicating a type of the failure, information indicating a port capability, or information used to identify the third sequence.

16. The data processing method according to any one of claims 13 to 15, characterized in that, in each of the third sequences, the third sub-sequence is before the frame start symbol and the frame gap is before the third sub-sequence, or the third sub-sequence is before the frame start symbol and the frame start symbol is before the frame gap.

17. The data processing method according to any one of claims 13 to 16, characterized in that, the third sequence further comprising: a fourth sub-sequence, the fourth sub-sequence comprising: information indicating a type of the third sequence, information used to verify a transmission of the third sequence, information indicating whether the failure exists in the second link, information indicating a distance of the failure, information indicating a type of the failure, information indicating a port capability, or information used to identify the third sequence.

18. The data processing method according to any one of claims 13 to 17, characterized in that, in each of the third sequences, the frame start symbol is before the fourth sub-sequence.

19. The data processing method according to any one of claims 13 to 18, characterized in that, the second threshold is less than or equal to 64 bytes.

20. The data processing method according to any one of claims 13 to 19, characterized in that, a length of the third sub-sequence is 7 bytes or less than 7 bytes.

21. The data processing method according to any one of claims 13 to 20, characterized in that, the method further comprising: determining, based on the third sequence, whether a failure exists in a second link.

22. The data processing method according to claim 21, characterized in that, after the receiving the third sequence, the method further comprising: receiving a fourth sequence when a time difference between a current time and a time when the third sequence is sent is a third value, the fourth sequence being used to determine whether the failure exists in the second link, a length of the fourth sequence being less than a third threshold, the third value being related to a state of the second link.

23. The data processing method according to claim 22, characterized in that, when the second link is in a fourth state, the third value being a minimum transmission interval between the third sequence and the fourth sequence, the fourth state indicating that there is no packet being transmitted in the second link at the current time; when the second link is in a fifth state, the third value being greater than the minimum transmission interval, the third value being less than a sum of the minimum transmission interval and a fourth value, the fourth value being related to a maximum transmission unit of the second link, the fifth state indicating that there is a packet being transmitted in the second link, and there is no packet of a preset length capable of occupying a full bandwidth of the second link; when the second link is in a sixth state, the third value being the fourth value, the sixth state indicating that there is a packet of a preset length capable of occupying a full bandwidth of the second link.

24. The data processing method according to claim 23, characterized in that, the second value being a serialization time of the maximum transmission unit of the second link.

25. A communications device, characterized by comprising: a communication interface and a processor; The communication interface and the processor perform the method of any of claims 1 to 24.

26. A communication system including a first device and a second device, the first device performing the method of any of claims 1 to 12; and the second device performing the method of any of claims 13 to 24.

26. A communication system including a first device and a second device, the first device performing the method of any of claims 1 to 12; and the second device performing the method of any of claims 13 to 24.

26. A communication system including a first device and a second device, the first device performing the method of any of claims 1 to 12; and the second device performing the method of any of claims 13 to 24.

27. A computer readable storage medium, characterized in that, The medium stores instructions that, when executed by a processor, implement the method of any of claims 1 to 24.

28. A computer program product, characterised in that, The medium stores instructions that, when executed by a processor, implement the method of any of claims 1 to 24.

29. A chip, characterized by The medium stores instructions that, when executed by a processor, implement the method of any of claims 1 to 24. The medium stores instructions that, when executed by a processor, implement the method of any of claims 1 to 24.

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