Touch display panel and touch display apparatus

Abstract

A touch display panel, the touch display panel being provided with an opening, and the touch display panel having a transition region, a display region and a peripheral region which are sequentially distributed in a direction away from the opening. The touch display panel comprises: a drive backplane; an isolation column, arranged on one side of the drive backplane and located in the transition region; a light-emitting device, arranged on one side of the drive backplane and located in the display region; an encapsulation layer, covering the light-emitting device and the isolation column; and a touch layer, arranged on the surface of the encapsulation layer away from the drive backplane and comprising at least one electrode layer, the electrode layer comprising a blocking structure located in the transition region, and the blocking structure at least overlapping part of the isolation column.

Description

Touch display panel and touch display device Technical Field

[0001] This disclosure relates to the field of display technology, and more specifically, to a touch display panel and a touch display device. Background Technology

[0002] In electronic devices such as mobile phones and tablets, display panels using Organic Light-Emitting Displays (OLEDs) as the light-emitting devices are quite common. To achieve front-facing camera functionality while minimizing bezels, holes are typically made in the touch display panel for shooting. However, external moisture and oxygen can seep into the touch display panel through these holes, causing encapsulation failure around the holes, leading to corrosion of the light-emitting devices and affecting their light-emitting performance.

[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art.

[0004] Summary of the Invention

[0005] This disclosure provides a touch display panel and a touch display device.

[0006] According to one aspect of this disclosure, a touch display panel is provided, the touch display panel having an opening, and the touch display panel having a transition area, a display area, and a peripheral area sequentially distributed along a direction away from the opening; the touch display panel includes:

[0007] Drive backplane;

[0008] An isolation column is provided on one side of the drive backplate and located in the transition area;

[0009] The light-emitting device is disposed on one side of the driving back plate and located in the display area;

[0010] An encapsulation layer covers the light-emitting device and the isolation pillar;

[0011] A touch layer is disposed on the surface of the encapsulation layer away from the driving backplane, and includes at least one electrode layer, the electrode layer including a blocking structure located in the transition region, the blocking structure overlapping at least a portion of the isolation pillar in a direction perpendicular to the driving backplane.

[0012] In one exemplary embodiment of this disclosure, the touch display panel further includes:

[0013] The inner blocking dam is located on the same side of the drive back plate as the isolation column and is situated in the transition zone;

[0014] The isolation pillars include inner isolation pillars and outer isolation pillars distributed sequentially along a direction away from the opening; the outer isolation pillars are located between the display area and the inner barrier, and the inner isolation pillars are located between the inner barrier and the opening.

[0015] In one exemplary embodiment of this disclosure, the blocking structure is provided with a cut-off groove, which divides the blocking structure into a plurality of blocking portions spaced apart along a direction away from the opening.

[0016] In one exemplary embodiment of this disclosure, the orthographic projection of at least one of the cut-off slots on the drive backplate is located between the orthographic projections of two adjacent isolation columns on the drive backplate.

[0017] In one exemplary embodiment of this disclosure, at least one of the cut-off slots overlaps with the isolation post in a direction perpendicular to the drive backplate.

[0018] In one exemplary embodiment of this disclosure, the cut-off groove includes a first cut-off groove and a plurality of second cut-off grooves. The first cut-off groove divides the blocking structure into an inner blocking portion and an outer blocking portion. The orthographic projection of the inner blocking portion on the drive back plate is located between the orthographic projection of the inner blocking dam on the drive back plate and the opening. The orthographic projection of the outer blocking portion on the drive back plate is located on the side of the orthographic projection of the inner blocking dam on the drive back plate away from the opening.

[0019] The outer blocking portion overlaps with the outer isolation post in a direction perpendicular to the drive back plate; the inner blocking portion overlaps with the inner isolation post in a direction perpendicular to the drive back plate.

[0020] Each of the second cut-off grooves is provided in the inner blocking portion, dividing the inner blocking portion into multiple blocking units, and at least one of the blocking units overlaps with one of the inner isolation columns in a direction perpendicular to the drive back plate.

[0021] In one exemplary embodiment of this disclosure, the orthographic projection of the blocking structure on the drive back plate is located near the boundary of the opening between the orthographic projections of two adjacent outer isolation pillars on the drive back plate or between the orthographic projection of the inner isolation pillar and the opening on the drive back plate.

[0022] In one exemplary embodiment of this disclosure, the electrode layer includes a first electrode layer and a second electrode layer distributed along a direction away from the drive backplate;

[0023] At least one of the first electrode layer and the second electrode layer includes the blocking structure.

[0024] In one exemplary embodiment of this disclosure, the touch layer further includes:

[0025] An insulating layer covers the first electrode layer; the second electrode layer is disposed on the surface of the insulating layer away from the drive backplate.

[0026] A touch-sensitive planarization layer covers the second electrode layer.

[0027] In one exemplary embodiment of this disclosure, the materials of the insulating layer and the touch planarization layer are organic materials.

[0028] In one exemplary embodiment of this disclosure, the touch layer further includes:

[0029] A touch buffer layer covers the encapsulation layer; the first electrode layer is disposed on the surface of the touch buffer layer away from the driving backplate; the material of the touch buffer layer is an organic material.

[0030] In one exemplary embodiment of this disclosure, the surface of the touch buffer layer away from the driving backplate is planar, the blocking structure extends continuously, and overlaps with the inner isolation post and the outer isolation post in a direction perpendicular to the driving backplate.

[0031] In one exemplary embodiment of this disclosure, the driving backplane includes a source / drain layer located in the display area, and the isolation pillar is disposed in the same layer as the source / drain layer.

[0032] In one exemplary embodiment of this disclosure, the source / drain layer includes a first source / drain layer and a second source / drain layer, wherein one of the first source / drain layer and the second source / drain layer is disposed in the same layer as the isolation pillar.

[0033] In one exemplary embodiment of this disclosure, both the source / drain layer and the isolation pillar include a plurality of conductive layers stacked sequentially in a direction away from the drive backplane, and each conductive layer of the source / drain layer is disposed on the same layer as each conductive layer of the isolation pillar.

[0034] The conductive layer includes a first conductive layer, a second conductive layer, and a third conductive layer, and the boundaries of the orthographic projections of the first conductive layer and the third conductive layer of the isolation pillar on the drive backplate are located outside the boundaries of the orthographic projections of the second conductive layer on the drive backplate.

[0035] In one exemplary embodiment of this disclosure, the drive backplate has a raised structure located in the transition region, and the isolation pillars are stacked on the raised structure.

[0036] In one exemplary embodiment of this disclosure, the drive backplane includes:

[0037] Substrate;

[0038] A semiconductor layer is disposed on one side of the substrate;

[0039] A first gate insulating layer covers the semiconductor layer;

[0040] At least one gate layer is disposed on the side of the first gate insulating layer away from the substrate; at least one of the gate layers has a support located in the transition region;

[0041] An interlayer dielectric layer covers the gate layer and forms the protrusion structure in a region corresponding to the support; the source / drain layer is disposed on the surface of the interlayer dielectric layer away from the substrate, and the isolation pillar is disposed on the surface of the protrusion structure away from the substrate;

[0042] A planarization layer covers the source / drain layer.

[0043] In one exemplary embodiment of this disclosure, the gate layer includes a first gate layer and a second gate layer; the first gate layer is disposed on the surface of the first gate insulating layer away from the substrate;

[0044] The drive backplate also includes:

[0045] A second gate insulating layer covers the first gate layer;

[0046] The second gate layer is disposed on the surface of the second gate insulating layer away from the substrate;

[0047] The support is located in one of the first gate layer and the second gate layer; the interlayer dielectric layer covers the second gate layer.

[0048] In one exemplary embodiment of this disclosure, the gate layer includes a first gate layer and a second gate layer, the support includes a first support and a second support, the second support and the first support overlap in a direction perpendicular to the driving backplate; the first gate layer is disposed on the surface of the first gate insulating layer away from the substrate, and includes the first support;

[0049] The drive backplate also includes:

[0050] A second gate insulating layer covers the first gate layer and protrudes in the region corresponding to the first support.

[0051] The second gate layer is disposed on the surface of the second gate insulating layer away from the substrate, and includes the second support;

[0052] The interlayer dielectric layer covers the second gate layer and forms the protrusion structure in the region corresponding to the second support.

[0053] In one exemplary embodiment of this disclosure, the number of inner isolation pillars is plurality, and they are spaced apart along a direction away from the opening; the touch display panel further includes:

[0054] An insulating filler is disposed on the same surface as the isolation pillar and at least fills the space between two adjacent inner isolation pillars;

[0055] The light-emitting device includes a first electrode, a light-emitting layer, and a second electrode stacked sequentially in a direction away from the driving backplate; the light-emitting layer of each light-emitting device is a whole-layer structure and includes multiple light-emitting sub-layers, and at least some of the light-emitting sub-layers are broken on the sidewall of the isolation pillar; the light-emitting layer covers the insulating filler.

[0056] In one exemplary embodiment of this disclosure, the insulating filler is filled between the two inner isolation columns closest to the inner barrier dam.

[0057] In one exemplary embodiment of this disclosure, the touch display panel further includes:

[0058] A pixel definition layer is disposed on the same surface as the first electrode on the driving back plate, and each of the first electrodes is exposed.

[0059] The insulating filler is disposed on the same layer as the pixel definition layer.

[0060] In one exemplary embodiment of this disclosure, the number of the outer isolation pillars is at least two, the blocking structure extends continuously at least locally, and at least two of the outer isolation pillars overlap with the area where the blocking structure extends continuously in a direction perpendicular to the drive back plate.

[0061] The encapsulation layer includes a first inorganic layer, an organic layer, and a second inorganic layer. The first inorganic layer covers the light-emitting device, the isolation pillar, and the inner barrier dam. The organic layer is disposed on the surface of the first inorganic layer away from the driving backplate and is defined on the side of the inner barrier dam away from the opening. The orthographic projection of the outer isolation pillar on the driving backplate is located within the orthographic projection of the organic layer on the driving backplate. The second inorganic layer covers the organic layer and the first inorganic layer.

[0062] In one exemplary embodiment of this disclosure, the distance between the orthographic projection of the blocking structure on the drive backplate and the boundary of the opening is not less than 30 μm.

[0063] In one exemplary embodiment of this disclosure, the width of the cut-off groove is not less than 2 μm;

[0064] The distance between the boundary of the blocking unit's orthographic projection on the drive back plate and the boundary of the inner isolation column's orthographic projection on the drive back plate that overlaps with it is ≥1μm.

[0065] According to one aspect of this disclosure, a touch display device is provided, comprising the touch display panel described in any one of the preceding claims.

[0066] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0067] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0068] Figure 1 is a top view of one embodiment of the touch display panel of this disclosure.

[0069] Figure 2 is a cross-sectional view of Figure 1 (AA section).

[0070] Figure 3 is a cross-sectional view of Figure 1 of the first embodiment based on a touch display panel.

[0071] Figure 4 is a cross-sectional view of Figure 1 of the first embodiment based on a touch display panel.

[0072] Figure 5 is a schematic diagram of some of the films in Figures 3 and 4.

[0073] Figure 6 is a cross-sectional view of Figure 1 of the second embodiment based on a touch display panel.

[0074] Figure 7 is a cross-sectional view of Figure 1 of the second type of implementation based on a touch display panel.

[0075] Figure 8 is a cross-sectional view of Figure 1 by BB of the third embodiment based on a touch display panel.

[0076] Figure 9 is a cross-sectional view of Figure 1 from the third embodiment based on a touch display panel.

[0077] Figure 10 is a cross-sectional view of Figure 1 by BB of the fourth embodiment based on a touch display panel.

[0078] Figure 11 is a cross-sectional view of Figure 1 by BB of the fourth embodiment based on a touch display panel.

[0079] Figure 12 is a cross-sectional view of Figure 1 by BB of the fifth embodiment based on a touch display panel.

[0080] Figure 13 is a cross-sectional view of Figure 1 by BB of the fifth embodiment based on a touch display panel.

[0081] Figure 14 is a cross-sectional view of Figure 1 by BB of the sixth embodiment based on a touch display panel.

[0082] Figure 15 is a cross-sectional view of Figure 1 of the sixth embodiment based on a touch display panel.

[0083] Figure 16 is a cross-sectional view of Figure 1 by BB of the seventh embodiment based on a touch display panel.

[0084] Figure 17 is a cross-sectional view of Figure 1 by BB of the seventh embodiment based on a touch display panel.

[0085] Figure 18 is a cross-sectional view of Figure 1 by BB of the seventh embodiment based on a touch display panel.

[0086] Figure 19 is a partial top view of the touch display panel in Figure 3.

[0087] Figure 20 is a top view of part of the film layer in Figure 19. Detailed Implementation

[0088] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore detailed descriptions of them will be omitted. Furthermore, the drawings are merely illustrative of this disclosure and are not necessarily drawn to scale.

[0089] The terms “a,” “one,” “the,” “the,” and “at least one” are used to indicate the presence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended inclusion and to mean that there may be other elements / components / etc. in addition to the listed elements / components / etc.; the terms “first,” “second,” and “third,” etc., are used only as markers and are not a limitation on the number of objects.

[0090] In this article, "overlapping" of A and B means that the orthographic projections of A and B on a plane at least partially coincide; orthographic projection refers to projection onto the plane along a direction perpendicular to the plane. The plane can be the surface of a substrate, a drive backplane, etc.

[0091] In this article, "same layer setting" means that A and B belong to different regions that are continuous or discontinuous within the same film layer, and each region can be formed simultaneously; "different layers" means that A and B belong to different film layers, and different film layers refer to film layers that are formed at different times.

[0092] This disclosure provides a touch display panel, as shown in FIG1, which may include a display area AA and a peripheral area WA located outside the display area AA. The peripheral area WA may be a continuous annular area surrounding the display area AA, or it may be a discontinuous area surrounding the display area AA, for example, the peripheral area WA may be distributed on both sides of the display area AA. The display area AA may be used to emit light to display images, while the peripheral area WA may not emit light.

[0093] The touch display panel may also have an opening Ho in the display area AA, which may penetrate or not fully penetrate the touch display panel. A camera device is positioned on the backlight side of the touch display panel, opposite the opening Ho, and the camera device can capture images through the opening Ho. The boundary of the opening Ho may be located inside the boundary of the display area AA, or the boundary of the opening Ho may partially coincide with the boundary of the display area AA.

[0094] Furthermore, a transition region CA may exist between the display area AA and the opening Ho. The transition region CA may be located outside the opening Ho and does not emit light. In some embodiments of this disclosure, the boundary of the opening Ho is at a certain distance from the boundary of the display area AA, and the transition region CA is an annular region surrounding the opening Ho, while the display area AA surrounds the transition region CA.

[0095] As shown in Figure 2, the touch display panel may include a driving backplane BP, a light-emitting device LD, an encapsulation layer TFE, and a touch layer TL. The light-emitting device LD is located on one side of the driving backplane BP and emits light under the drive of the driving backplane BP. The encapsulation layer TFE covers the light-emitting device LD to protect it from external water, oxygen, and other impurities. The touch layer TL is located on the side of the encapsulation layer TFE away from the driving backplane BP and is used to sense touch operations to realize human-computer interaction. The following is a detailed description of each part:

[0096] The driving backplane (BP) has a driving circuit that drives the light-emitting diode (LD) to emit light to display an image. In some embodiments of this disclosure, the driving backplane (BP) may include a substrate (SU) and a circuit layer located on one side of the substrate (SU). The substrate (SU) may be a flat plate structure, and its material may be a rigid material such as glass or a flexible material such as polyimide. Furthermore, the substrate (SU) may be a single-layer or multi-layer structure.

[0097] The circuit layer includes the aforementioned driving circuitry. For example, the driving circuitry may include pixel circuitry located in the display area AA and peripheral circuitry located in the peripheral area WA. The pixel circuitry can be of structures such as 3T1C, 7T1C, or 8T1C, as long as it can drive the light-emitting diodes (LDs) to emit light. No special limitations are placed on its structure here. Here, nTmC indicates that one pixel circuit includes n thin-film transistors (represented by the letter "T") and m capacitors (represented by the letter "C"). The number of pixel circuits can be the same as the number of light-emitting diodes (LDs), and they are connected one-to-one with each LD. Of course, multiple LDs can be connected to the same pixel circuit; no special limitations are placed here.

[0098] The peripheral circuit is connected to the pixel circuit and is used to input driving signals to the pixel circuit in order to control the light-emitting device (LD) to emit light. The peripheral circuit may include a gate driving circuit and a light-emitting control circuit, and of course, it may also include other circuits. The specific structure of the peripheral circuit is not specifically limited here.

[0099] The aforementioned driving circuit may include multiple thin-film transistors (TFTs) and capacitors. The TFTs may be top-gate or bottom-gate type TFTs, and each TFT may include an overlapping active layer and a gate. The active layers of each TFT are disposed on the same semiconductor layer; alternatively, they may be disposed on multiple semiconductor layers, with the active layers of each TFT distributed on different semiconductor layers. The material of the semiconductor layer may be polysilicon or metal oxide, without special limitation. Furthermore, the TFTs and capacitors of the driving circuit can be connected via wiring to form the driving circuit. Accordingly, the aforementioned circuit layers may include a transistor layer DL and a connection layer CL. The capacitor, the active layer of the TFT, and the gate are located on the transistor layer DL, and the connection layer CL includes wiring connected to the TFTs. The connection layer CL and the transistor layer DL together constitute the driving circuit.

[0100] As shown in Figure 2, taking a top-gate thin-film transistor as an example, in some embodiments of this disclosure, the circuit layer may include a semiconductor layer SE, a first gate insulating layer GI1, a first gate layer GA1, a second gate insulating layer GI2, a second gate layer GA2, an interlayer dielectric layer ILD, a source / drain layer SD, and a planarization layer PLN, wherein:

[0101] The semiconductor layer SE can be disposed on one side of the substrate SU, either directly on the substrate SU or on the buffer layer BUF stacked on the substrate SU. The material of the semiconductor layer SE can be polycrystalline silicon or metal oxide, etc. The first gate insulating layer GI1 can cover the semiconductor layer SE, and its material can include inorganic insulating materials such as silicon nitride and silicon oxide. The first gate layer GA1 can be disposed on the surface of the first gate insulating layer GI1 away from the substrate SU, and the material of the first gate layer GA1 can be a metal such as molybdenum or copper, or other conductive materials. The second gate insulating layer GI2 can cover the first gate layer GA1 and can protrude in the region corresponding to the first gate layer GA1. The material of the second gate insulating layer GI2 can include inorganic insulating materials such as silicon nitride and silicon oxide. The second gate layer GA2 can be disposed on the surface of the second gate insulating layer GI2 away from the substrate SU, and the material of the second gate layer GA2 can be a metal such as molybdenum or copper, or other conductive materials. The active layer of the thin-film transistor is located on the semiconductor layer SE, the gate is located on the first gate layer GA1, and the two plates of the capacitor are located on the first gate layer GA1 and the second gate layer GA2. The interlayer dielectric layer (ILD) covers the second gate layer (GA2) and may protrude in the region corresponding to the second gate layer (GA2). The interlayer dielectric layer (ILD) may be a single-layer or multi-layer structure, and its material may include inorganic insulating materials such as silicon nitride and silicon oxide.

[0102] The source / drain layer SD can be disposed on the surface of the interlayer dielectric layer ILD away from the substrate SU, and is used to realize the connection between at least some thin film transistors and between thin film transistors and capacitors, so as to transmit drive signals. The type of drive signal and the specific pattern of each film layer depend on the specific configuration of the drive circuit, and are not specifically limited here.

[0103] The source / drain layer SD can be a single-layer or multi-layer structure. If a multi-layer structure is used, the source / drain layer SD may include multiple conductive layers. As shown in Figure 2, in some embodiments, the source / drain layer SD includes a first conductive layer S1, a second conductive layer S2, and a third conductive layer S3 stacked sequentially along a direction away from the substrate SU. The first conductive layer S1 and the third conductive layer S3 can be made of the same material, such as a chemically stable and corrosion-resistant metal or metal oxide. The material of the second conductive layer S2 is different from that of the first and third conductive layers S1 and S3. The second conductive layer S2 can be made of a material with a lower resistivity than the first and third conductive layers S1 and S3, thus protecting the second conductive layer S2 through the first and third conductive layers S1 and S3, while the second conductive layer S2 meets the conductivity requirements. For example, the materials of the first and third conductive layers S1 and S3 are Ti (titanium), and the material of the second conductive layer S2 is Al (aluminum). A planarization layer PLN can cover the source / drain layer SD. The material of the planarization layer PLN may include organic materials such as resin to achieve planarization.

[0104] As shown in Figure 2, the transistor layer DL may include the semiconductor layer SE, the first gate insulating layer GI1, the first gate layer GA1, the second gate insulating layer GI2, the second gate layer GA2, and the interlayer dielectric layer ILD; the interconnect layer CL may include the source / drain layer SD and the planarization layer PLN.

[0105] Of course, there can be two or more source-drain layers in the circuit layer, and a driving circuit is formed by connecting multiple source-drain layers. For example, in some other embodiments of this disclosure, the transistor layer DL can be the same as the transistor layer DL in the above-described single-source-drain layer SD embodiment, the difference being that the connection layer CL has two source-drain layers and two planarization layers, namely a first source-drain layer and a second source-drain layer, and a first planarization layer and a second planarization layer; wherein:

[0106] The first source / drain layer can be located on the surface of the interlayer dielectric layer (ILD) away from the substrate (SU). A first planarization layer covers the first source / drain layer. Alternatively, a passivation layer can be used to cover the first source / drain layer first, followed by a passivation layer covering the first planarization layer. The second source / drain layer can be located on the surface of the first planarization layer away from the substrate (SU), and a second planarization layer covers the second source / drain layer. The first and second source / drain layers are used to establish connections between at least some thin-film transistors and between thin-film transistors and capacitors, and to transmit drive signals. The type of drive signal and the specific pattern of each film layer depend on the specific configuration of the drive circuit and are not specifically limited here. Both the first and second source / drain layers can be source / drain layers with multiple conductive layers as described in the above embodiments.

[0107] The inorganic insulating material film layer (e.g., the first gate insulating layer GI1, the second gate insulating layer GI2, and the inter-dielectric layer ILD) mentioned above can extend from the transition region CA, through the display region AA, to the peripheral region WA. The planarization layer PLN (which may include the first planarization layer and the second planarization layer) can be located in the display region AA and the peripheral region WA. The transition region CA may not have the planarization layer PLN, so that the thickness of the driving backplate BP in the display region AA is greater than the thickness of the transition region CA. Alternatively, the planarization layer PLN can extend to the transition region CA, but there is a certain distance between it and the opening Ho.

[0108] As shown in Figure 2, the light-emitting device (LD) can be located on one side of the driving backplane (BP). For example, the LD can be located on the surface of the planarization layer (PLN) or the second planarization layer away from the substrate (SU), and can be connected to the driving circuit. The LD can be an OLED (Organic Light-Emitting Diode) using organic light-emitting materials, or a Mini LED (sub-millimeter light-emitting diode, size 100μm-200μm), Micro LED (micro light-emitting diode, size no larger than 100μm), or LED (light-emitting diode, size larger than 200μm) using inorganic light-emitting materials. No special limitations are made here, as long as it can emit light. The LD is located within the display area (AA). Of course, to meet the uniformity requirements of the process, some LDs can be located in the peripheral area (WA), but the LDs located in the peripheral area (WA) can be floating and do not emit light. Furthermore, no LDs are located in the transition area (CA).

[0109] As shown in Figure 2, taking an OLED as an example, the light-emitting device (LD) can include a first electrode (ANO), a light-emitting layer (EL), and a second electrode (CAT) stacked sequentially along the direction away from the driving backplane (BP). Applying an electrical signal to the first electrode (ANO) and the second electrode (CAT) can excite the light-emitting layer (EL) to emit light; the specific light-emitting principle is not detailed here. The first electrode (ANO) can serve as the anode, and the second electrode (CAT) can serve as the cathode; both are made of conductive materials such as metals and metal oxides. The light-emitting layer (EL) can include multiple light-emitting sub-layers stacked sequentially along the direction away from the driving backplane (BP). Each light-emitting sub-layer includes a hole injection layer, a hole transport layer, a light-emitting material layer, an electron transport layer, and an electron injection layer. Of course, other structures can also be used, as long as they can cooperate with the first electrode (ANO) and the second electrode (CAT) to emit light. For example, the light-emitting layer (EL) can include multiple sets of light-emitting sub-layers. Each set of light-emitting sub-layers can include a hole injection layer, a hole transport layer, a light-emitting material layer, an electron transport layer, and an electron injection layer. Adjacent sets of light-emitting sub-layers can be connected through a charge generation layer or other film layers, allowing a single LD to include multiple sub-light-emitting devices connected in series. The light-emitting material layer can be distributed in an array, while the hole injection layer, hole transport layer, electron transport layer and electron injection layer can be distributed in an entire layer, or each light-emitting sub-layer can be distributed in an entire layer.

[0110] As shown in Figure 2, the touch display panel may further include a pixel definition layer (PDL) separating light-emitting devices (LDs). The PDL may be located on the same side of the driving backplane (BP) as the LDs. For example, the PDL and the first electrodes (ANOs) may be located on the surface of the planarization layer (PLN) away from the substrate (SU). Simultaneously, the thickness of the PDL is greater than the thickness of the first electrodes (ANOs), covering a portion of each first electrode (ANO). The PDL also has pixel openings that expose each first electrode (ANO), with one pixel opening exposing one first electrode (ANO).

[0111] The light-emitting layer EL and the second electrode CAT are stacked sequentially on the first electrode ANO within the pixel opening. In some embodiments, both the light-emitting layer EL and the second electrode CAT are integral layers. In some embodiments, the light-emitting devices (LDs) emit the same color. In this case, a color filter layer can be disposed on the side of the LD away from the driving backplane BP. The color filter layer, in conjunction with the LD, achieves color display by filtering the light. Simultaneously, the light-emitting layer EL and the second electrode CAT can extend into the transition region CA. Since the planarization layer PLN does not completely cover the interlayer dielectric layer ILD in the transition region CA, the light-emitting layer EL can contact the interlayer dielectric layer ILD within the transition region CA.

[0112] As shown in Figure 2, the encapsulation layer TFE can cover each light-emitting device (LD) to block external moisture and oxygen, preventing the LD from being corroded. In some embodiments of this disclosure, the encapsulation layer TFE can be a thin-film encapsulation method, which may include a first inorganic layer CVD1, an organic layer IJP, and a second inorganic layer CVD2, wherein:

[0113] The first inorganic layer CVD1 can cover each light-emitting device (LD), that is, the first inorganic layer CVD1 can cover the surface of the second electrode CAT away from the driving backplane BP. The material of the first inorganic layer CVD1 can include inorganic insulating materials such as silicon nitride and silicon oxide. The first inorganic layer CVD1 can be a monolithic structure, which can extend to the peripheral region WA and the transition region CA.

[0114] The organic layer IJP can be disposed on the surface of the first inorganic layer CVD1 away from the driving backplane BP. The boundary of the orthographic projection of the organic layer IJP on the driving backplane BP can be located in the outer region WA and the transition region CA, ensuring that the organic layer IJP can cover each light-emitting device LD.

[0115] The second inorganic layer CVD2 can cover the organic layer IJP and the first inorganic layer CVD1, which is not covered by the organic layer IJP. The second inorganic layer CVD2 can block the intrusion of water and oxygen, and planarization is achieved by the organic layer IJP, which is fluid before curing. The material of the second inorganic layer CVD2 can include inorganic insulating materials such as silicon nitride and silicon oxide.

[0116] Furthermore, as shown in Figure 3, to define the position of the organic layer IJP and prevent it from contacting the outside environment, an outer barrier dam located in the peripheral region WA and an inner barrier dam Dam located in the transition region CA can be provided on the driving backplate BP. The outer barrier dam is a ring structure surrounding the display area AA, and the inner barrier dam Dam is a ring structure surrounding the opening Ho. The outer and inner barrier dams Dam can be located on the surface of the interlayer dielectric layer ILD away from the substrate SU, and can be co-located with at least one of the planarization layer PLN and pixel definition layer PDL of the display area AA, so as to form them simultaneously and simplify the process. The first inorganic layer CVD1 can cover the outer and inner barrier dams Dam and protrude in the regions corresponding to the outer and inner barrier dams Dam. The organic layer IJP can be defined between the outer and inner barrier dams Dam. The second inorganic layer CVD2 can encapsulate the organic layer IJP with the first inorganic layer CVD1 to prevent it from contacting the outside environment, which is beneficial for preventing water and oxygen erosion. The number of outer and inner barrier dams Dam can be one or more, and they are arranged in concentric rings.

[0117] Furthermore, as shown in Figures 3-5, the luminescent layer EL using organic light-emitting materials is susceptible to erosion by water, oxygen, and other impurities. If the luminescent layer EL extends continuously to the boundary of the opening Ho, external water vapor and oxygen may erode along the luminescent layer EL towards the display area AA, affecting the light emission of the light-emitting device LD in the display area AA. Therefore, isolation pillars IP can be provided on the driving backplate BP within the peripheral area WA and the transition area CA. This paper only uses the isolation pillar IP in the transition area CA as an example. The sidewall of the isolation pillar IP is concave, causing at least a portion of the luminescent sublayer of the luminescent layer EL to break at the sidewall of the isolation pillar IP, preventing continuous extension and thus cutting off the erosion path. Of course, the sidewall of the isolation pillar IP can completely sever the luminescent layer EL. Correspondingly, the second electrode CAT can also break at the sidewall of the isolation pillar IP, preventing continuous extension.

[0118] Furthermore, as shown in Figures 3, 5, 19 and 20, the isolation post IP can be an annular structure surrounding the opening Ho, and both the inner and outer walls of the isolation post IP are concave structures.

[0119] The isolation pillar IP can be co-located with the source / drain layer SD described above, allowing them to be formed simultaneously and simplifying the process. In some embodiments, the source / drain layer SD may include a first conductive layer S1, a second conductive layer S2, and a third conductive layer S3. The isolation pillar IP also includes a first conductive layer S1, a second conductive layer S2, and a third conductive layer S3. The boundary of the second conductive layer S2 of the isolation pillar IP is recessed, meaning that the first conductive layer S1 and the third conductive layer S3 extend beyond the boundary of the second conductive layer S2. In other words, the boundary of the orthographic projection of the first conductive layer S1 and the third conductive layer S3 of the isolation pillar onto the drive backplane BP is located outside the boundary of the orthographic projection of the second conductive layer S2 onto the drive backplane BP, making the cross-section of the isolation pillar IP "I" shaped. The light-emitting layer EL and the second electrode CAT can be disconnected at the position corresponding to the second conductive layer S2.

[0120] Of course, in other embodiments of this disclosure, the isolation pillar IP may also adopt an inverted trapezoidal structure, that is, the width between the sidewalls of the isolation pillar IP decreases in the direction away from the driving backplate BP, so that the sidewall is not covered by the light-emitting layer EL and the second electrode CAT.

[0121] The encapsulation layer TFE can cover the isolation pillar IP, and due to the elevation of the light-emitting layer EL and the second electrode CAT, the encapsulation layer TFE does not break at the sidewall of the isolation pillar IP, that is, at least the second inorganic layer CVD2 does not break, and extends continuously.

[0122] As shown in Figures 3, 5, 19, and 20, in some embodiments of this disclosure, the number of isolation pillars IP can be multiple, and each isolation pillar IP can be distributed on both sides of the inner barrier dam Dam. For example, the isolation pillar IP may include an inner isolation pillar IP1 and an outer isolation pillar IP2 sequentially distributed along the direction away from the aperture Ho; the inner isolation pillar IP2 is located between the inner barrier dam Dam and the aperture Ho, and the outer isolation pillar IP2 is located between the display area AA and the inner barrier dam Dam Dam; wherein, the number of both inner isolation pillar IP1 and outer isolation pillar IP2 is multiple, and in order to ensure that the isolation pillar IP can cut off the light-emitting layer EL on the side of the inner barrier dam Dam Dam close to the aperture Ho, the number of inner isolation pillar IP1 can be greater than the number of outer isolation pillar IP2.

[0123] Furthermore, in some embodiments of this disclosure, the orthographic projection of the outer isolation pillar IP2 on the drive backplane BP is located within the orthographic projection of the organic layer IJP on the drive backplane BP, so that the organic layer IJP can cover the outer isolation pillar IP2.

[0124] Furthermore, as shown in Figures 3 and 5, a raised structure B1 located in the transition region CA can be provided on the driving backplane BP. Isolation pillars IP can be stacked on the raised structure B1, thereby raising the isolation pillars IP and increasing the step difference between them and the surface. The larger the step difference, the easier it is for the light-emitting layer EL to break off at the sidewall of the isolation pillar IP. A support can be formed in the transition region CA at a position corresponding to the isolation pillar IP using at least one of the first gate layer GA1 and the second gate layer GA2. This support raises the second gate insulating layer GI2 and the interlayer dielectric layer ILD, thus obtaining the raised structure B1. The following is an exemplary description:

[0125] The first method for setting up isolation columns for IP addresses

[0126] As shown in Figures 10 and 11, the first gate layer GA1 may include a first support GA11. The first support GA11 may be an annular structure surrounding the opening Ho, and its number may be the same as the number of isolation pillars IP. For example, there may be multiple first support GA11 and isolation pillars IP. Each first support GA11 may be distributed at intervals, and one isolation pillar IP may overlap with one first support GA11.

[0127] The second gate insulating layer GI2 protrudes in the region corresponding to the first support GA11, and the interlayer dielectric layer ILD protrudes in the region corresponding to the protrusion of the second gate insulating layer GI2 to form a protrusion structure B1; the isolation pillar IP can be stacked on the surface of the protrusion structure B1 away from the substrate SU, so that the isolation pillar IP can be raised by the first support GA11 of the first gate layer GA1.

[0128] The second method for setting up isolation columns IP addresses

[0129] As shown in Figures 3 and 4, the first gate layer GA1 may include a first support GA11. The first support GA11 may be an annular structure surrounding the opening Ho, and its number may be the same as the number of isolation pillars IP. For example, there may be multiple first support GA11 and isolation pillars IP. Each first support GA11 may be spaced apart, and one isolation pillar IP may overlap with one first support GA11.

[0130] The second gate insulating layer GI2 protrudes in the region corresponding to the first support GA11. The second gate layer GA2 may include a second support GA21, which may be a ring structure surrounding the opening Ho. The number of second supports GA21 may be the same as the number of isolation pillars IP. For example, there may be multiple second supports GA21 and multiple isolation pillars IP. The second supports GA21 may be spaced apart, and one second support GA21 may overlap with one first support GA11. Correspondingly, one second support GA21 may overlap with one isolation pillar IP. The second supports GA21 may be stacked in the region where the second gate insulating layer GI2 protrudes.

[0131] The interlayer dielectric layer ILD covers the second support GA21, and a protrusion structure B1 is formed in the region corresponding to the second support GA21. The isolation pillar IP can be stacked on the surface of the protrusion structure B1 away from the substrate SU, so that the isolation pillar IP can be raised by the first gate layer GA1 and the second gate layer GA2.

[0132] The third method for setting up isolation columns IP addresses

[0133] As shown in Figures 12 and 3, the first support GA11 and the second support GA21 mentioned above may not be provided in the transition zone CA. The first gate insulating layer GI1, the second gate insulating layer GI2 and the interlayer dielectric layer ILD remain flat in the area where the isolation pillar IP is provided, without any protruding structure.

[0134] Furthermore, the inventors discovered that in cases with multiple isolation pillar IPs, if the isolation pillar IPs are disposed on the same layer as the source / drain layer SD or are made of other conductive materials, although the isolation pillar IPs can use the recesses on their sidewalls to cut off the light-emitting layer EL and the second electrode CAT, the light-emitting layer EL and the second electrode CAT between two adjacent isolation pillar IPs may connect the light-emitting layers EL on both sides of the isolation pillar IP and connect the second electrodes CAT on both sides of the isolation pillar IP. For example, for an isolation pillar IP including a first conductive layer S1, a second conductive layer S2, and a third conductive layer S3, the first conductive layer S1 may connect the light-emitting layers EL on both sides of the isolation pillar IP and connect the second electrodes CAT on both sides of the isolation pillar IP. In this way, the first conductive layer S1 will form a new path for water vapor and oxygen to invade the display area AA, affecting the encapsulation effect.

[0135] To further improve the encapsulation effect, the inventors proposed, as shown in Figures 3 and 4, that an insulating filler BPL can be filled between at least two adjacent isolation pillars IP, and that the BPL is located on the surface where the isolation pillars IP are located. In this way, the insulating filler BPL occupies the space between the two adjacent isolation pillars IP, and the light-emitting layer EL can cover the insulating filler BPL. That is to say, the light-emitting layer EL can pass through the space between the two adjacent isolation pillars IP along the surface of the insulating filler BPL away from the driving backplane, without sinking down to contact the surface where the isolation pillars IP are located between the two adjacent isolation pillars IP, thereby blocking the isolation pillars IP as an intrusion path.

[0136] In some embodiments of this disclosure, the thickness of the insulating filler BPL can be less than the thickness of the isolation pillar IP, but the light-emitting layer EL between the two isolation pillar IPs should be kept away from the sidewall of the isolation pillar IP to ensure that the isolation pillar IP does not act as a path for water vapor and oxygen to enter the display area AA along the light-emitting layer EL; for this purpose, the thickness of the insulating filler BPL can be greater than the thickness of the first conductive layer S1 to prevent the light-emitting layer EL from contacting the first conductive layer S1.

[0137] Furthermore, in some embodiments of this disclosure, the thickness of the insulating filler BPL can be greater than the thickness of the isolation post IP, filling the remaining space between two adjacent isolation posts IP, and covering part or all of the surface of the two adjacent isolation posts IP away from the drive backplane BP.

[0138] In some embodiments of this disclosure, the insulating filler BPL may be filled between two adjacent inner isolation pillars IP1. Specifically, the insulating filler BPL may be filled between the two adjacent inner isolation pillars IP1 closest to the inner barrier dam Dam, blocking the path of intrusion through the isolation pillars IP up to the extent covered by the organic layer IJP of the encapsulation layer TFE. Further, the insulating filler BPL is filled between the two inner isolation pillars IP1 closest to the inner barrier dam Dam Dam.

[0139] Of course, in other embodiments of this disclosure, the number of insulating fillers BPL can be multiple, each filling the gap between multiple isolation pillars IP, as long as it can block the path of moisture and oxygen intrusion. The insulating fillers BPL will not completely cover any one isolation pillar IP, ensuring that the sidewalls of the isolation pillar IP can cut off the light-emitting layer EL.

[0140] In some embodiments of this disclosure, the insulating filler BPL can be disposed on the same layer as the pixel definition layer PDL, and the two can be formed simultaneously, which simplifies the process. Furthermore, both the insulating filler BPL and the pixel definition layer PDL can be made of light-absorbing insulating materials, such as black resin. Of course, the insulating filler BPL and the pixel definition layer PDL can also be formed independently.

[0141] As shown in Figure 2, the touch layer TL can be disposed on the surface of the encapsulation layer TFE away from the driving backplane BP. The touch layer TL may include at least one electrode layer TM, which may include touch electrodes located within the display area AA. Touch operations can be sensed through the touch electrodes to achieve human-computer interaction. The touch layer TL can adopt a capacitive touch structure, which can be a mutual capacitance structure, a self-capacitive structure, or a resistive touch structure.

[0142] As shown in Figures 2 and 3, in some embodiments of this disclosure, there are two electrode layers TM, namely a first electrode layer TMA and a second electrode layer TMB, through which multiple touch electrodes can be formed. Further, the touch layer TL may include a touch buffer layer TBL, a first electrode layer TMA, an insulating layer TLD, a second electrode layer TMB, and a touch planarization layer TOC, wherein:

[0143] The touch buffer layer (TBL) can cover the encapsulation layer (TFE), which can be made of inorganic insulating materials such as silicon nitride and silicon oxide, or organic insulating materials. The touch buffer layer (TBL) can be a single layer structure and extend to the transition region (CA).

[0144] The first electrode layer TMA can be located on the surface of the touch buffer layer TBL away from the driving backplane BP. Its material can be conductive materials such as metal or metal oxide. The specific pattern is not specifically limited here.

[0145] The isolation insulating layer TLD can cover the first electrode layer TMA. It can be made of inorganic insulating materials such as silicon nitride and silicon oxide, or it can be made of organic insulating materials. The isolation insulating layer TLD can be a whole layer structure and extend to the transition region CA.

[0146] The second electrode layer TMB can be located on the surface of the isolation insulating layer TLD away from the driving backplane BP. The material can be conductive materials such as metals and metal oxides, and the specific pattern is not specifically limited here.

[0147] The touch planarization layer TOC can cover the second electrode layer TMB, which can be made of organic insulating materials such as resin. The touch planarization layer TOC can be a whole layer structure and extend to the transition region CA.

[0148] In the first type of touch layer TL, the aforementioned touch buffer layer TBL and insulating layer TLD can be made of inorganic insulating materials, while the touch planarization layer TOC can be made of organic insulating materials. The inorganic insulating touch buffer layer TBL and insulating layer TLD can also prevent impurities from other films or processes above from penetrating the touch layer TL. For example, in high-temperature and high-humidity environments, they can prevent elements such as potassium and iodine in the films or other structures above the touch layer TL from penetrating downwards, thus protecting the light-emitting device LD. However, for touch display panels with openings Ho, especially for foldable display panels, if the transition area CA has a large amount of brittle inorganic material, cracking may occur, allowing moisture and oxygen to penetrate from the openings Ho along the cracks into the display area AA.

[0149] Therefore, at least a portion of the inorganic film layer in the touch layer TL can be replaced with an organic material, utilizing the flexibility of the organic material to prevent cracking. For example:

[0150] As shown in Figure 3, in the second type of touch layer TL, the aforementioned touch buffer layer TBL can be made of inorganic insulating material, while the isolation insulating layer TLD and the touch planarization layer TOC can be made of organic insulating material, but the materials of the two are not necessarily the same.

[0151] As shown in Figures 16-18, in the third type of touch layer TL, the touch buffer layer TBL, the isolation insulating layer TLD, and the touch planarization layer TOC all use organic insulating materials, but the materials of the three are not necessarily the same.

[0152] In other touch layers TL, a touch buffer layer may not be provided. Instead, the first electrode layer TMA can be placed directly on the surface of the encapsulation layer TFE away from the driving backplane BP, and then the first electrode layer TMA can be covered by the isolation insulating layer TLD. The second electrode layer TMB and the touch planarization layer TOC can be set in the same way as the above implementation method.

[0153] In addition, in other embodiments of this disclosure, the touch layer TL may also employ a single electrode layer TM or more than two electrode layers TM, which will not be listed here.

[0154] As shown in Figure 3, in order to prevent impurities on the side of the touch layer TL away from the driving backplane BP from penetrating through the touch layer TL, at least one electrode layer TM can be used to form a blocking structure BR in the transition region CA. The blocking structure BR is disconnected from the electrode layer TM in the display area AA, and the blocking structure BR overlaps with at least part of the isolation pillar IP. Since the electrode layer TM is a metal or other conductive inorganic material, rather than an organic material, it can prevent impurities on the side of the touch layer TL away from the driving backplane BP from penetrating through the touch layer TL, thereby improving the encapsulation effect.

[0155] For a touch layer TL having a first electrode layer TMA and a second electrode layer TMB, at least one of the first electrode layer TMA and the second electrode layer TMB forms a blocking structure BR in the transition region CA. Specifically, the blocking structure BR may be located in the first electrode layer TMA, while the second electrode layer TMB may not have a blocking structure BR. Alternatively, both the first electrode layer TMA and the second electrode layer TMB may include the blocking structure BR, thereby forming a double-layer blocking structure BR, but the double-layer blocking structure BR is separated by an insulating layer TLD; or, the blocking structure BR may be located in the second electrode layer TMB, while the first electrode layer TMA may not have a blocking structure BR.

[0156] In some embodiments of this disclosure, the blocking structure BR is provided with a cut-off groove BS. The cut-off groove BS penetrates the blocking structure BR in a direction perpendicular to the drive back plate BP, and the cut-off groove BS can be an annular groove surrounding the opening Ho, dividing the blocking structure BR into multiple blocking parts that are spaced apart in a direction away from the opening Ho. This can avoid the appearance of a continuous large-area conductive structure and help reduce the generation of static electricity.

[0157] In some embodiments of this disclosure, the orthographic projection of at least one cut-off slot BS on the drive backplane BP is located between the orthographic projections of two adjacent isolation pillars IP on the drive backplane BP.

[0158] In some embodiments of this disclosure, at least one cut-off slot BS overlaps with the isolation pillar IP, that is, there is an overlapping area between the orthographic projection of the cut-off slot BS on the drive backplane BP and the orthographic projection of the isolation pillar IP on the drive backplane BP.

[0159] In some embodiments of this disclosure, the width of the cut-off groove BS is not less than 2 μm, that is, greater than or equal to 2 μm.

[0160] Furthermore, as shown in Figure 3, the cut-off groove BS may include a first cut-off groove BS1, which can divide the blocking structure BR into an inner blocking part BR1 and an outer blocking part BR2. The orthographic projection of the inner blocking part BR1 on the drive back plate BP is located between the inner blocking dam Dam and the opening Ho, and the orthographic projection of the outer blocking part BR2 on the drive back plate BP is located on the side of the inner blocking dam Dam that is far away from the opening Ho. The inner blocking part BR1 may overlap with the inner isolation pillar IP1, and the outer blocking part BR2 may be a continuous structure and overlap with the outer isolation pillar IP2. The outer blocking part BR2 may overlap with the portion of the planarization layer PLN located within the transition zone CA.

[0161] The cut-off groove BS may further include multiple second cut-off grooves BS2, wherein the multiple second cut-off grooves BS2 may be provided in the inner blocking part BR1, which can divide the inner blocking part BR1 into multiple blocking units, each of which is an annular structure surrounding the opening Ho. The width of the second cut-off groove BS2 may be smaller than the width of the blocking unit and smaller than the width of the first cut-off groove BS11.

[0162] In some embodiments of this disclosure, the outer blocking portion BR2 may extend continuously at least partially, meaning there are no discontinuous areas, and this continuous area may overlap with at least two outer isolation pillars IP2, with the orthographic projections of the at least two outer isolation pillars IP2 on the drive backplate BP located within the orthographic projection of the outer blocking portion BR2 on the drive backplate BP. Furthermore, a blocking unit of an inner blocking portion BR1 may overlap with at least one inner isolation pillar IP1, and the distance between the boundary of the orthographic projection of the blocking unit on the drive backplate BP and the boundary of the orthographic projection of the overlapping inner isolation pillar IP2 on the drive backplate BP is not less than 1 μm.

[0163] In some embodiments of this disclosure, the touch buffer layer TBL is an organic material, and its surface away from the driving backplate BP is a plane. The blocking structure BR can extend continuously without any breaks. The blocking structure BR overlaps with the inner isolation pillar IP1 and the outer isolation pillar IP2 in a direction perpendicular to the driving backplate BP, such that at least the orthographic projection of each isolation pillar IP on the driving backplate BP is within the orthographic projection of the blocking structure BR on the driving backplate BP.

[0164] As shown in Figure 3, in the first type of blocking structure BR, the first cutting-off groove BS11 overlaps with the inner blocking dam Dam. The orthographic projection of any second cutting-off groove BS2 on the drive backplate BP lies between the orthographic projections of two adjacent inner isolation pillars IP1 on the drive backplate BP, and there can be at most one orthographic projection of a second cutting-off groove BS2 on the drive backplate BP between the orthographic projections of two adjacent inner isolation pillars IP1. The number of second cutting-off grooves BS2 can be less than the number of inner isolation pillars IP1. The inner blocking portion BR1 corresponding to the insulating filler BPL between two inner isolation pillars IP1 extends continuously without the second cutting-off groove BS2.

[0165] As shown in Figure 6, in the second type of blocking structure BR, the first cutting-off groove BS11 overlaps with the inner blocking dam Dam. The orthographic projection of any second cutting-off groove BS2 on the drive backplate BP lies within the orthographic projection of an inner isolation pillar IP1 on the drive backplate BP, and at most one second cutting-off groove BS2 is projected onto the drive backplate BP within the orthographic projection of an inner isolation pillar IP1. The number of second cutting-off grooves BS2 can be less than the number of inner isolation pillars IP1. The inner blocking portion BR1 corresponding to the insulating filler BPL between two inner isolation pillars IP1 extends continuously without any second cutting-off grooves BS2.

[0166] As shown in Figure 8, in the third type of blocking structure BR, the first cutting-off groove BS11 overlaps with the inner blocking dam Dam. The orthographic projection of any second cutting-off groove BS2 on the drive backplate BP lies within the orthographic projection of an inner isolation pillar IP1 on the drive backplate BP, and at most one second cutting-off groove BS2 is projected onto the drive backplate BP within the orthographic projection of an inner isolation pillar IP1. The number of second cutting-off grooves BS2 can be less than the number of inner isolation pillars IP1. The inner blocking portion BR1 corresponding to the insulating filler BPL between two inner isolation pillars IP1 is provided with a second cutting-off groove BS2.

[0167] As shown in Figure 14, in the fourth type of blocking structure BR, the blocking structure BR is only provided with the first cutting-off groove BS11, without the second cutting-off groove BS2, so that the inner blocking part BR1 and the outer blocking part BR2 are disconnected, but the two are each a continuous structure.

[0168] As shown in Figure 16, in the fifth type of blocking structure BR, the blocking structure BR does not have a cut-off groove BS, but adopts a continuous structure, but the blocking structure BR is disconnected from the electrode layer TM of the display area AA.

[0169] The opening Ho can be formed after each film layer is formed by a cutting process. However, the precision of the cutting equipment is limited. In order to avoid the blocking structure BR from affecting the cutting, it can be made to have a certain distance from the cutting boundary of the opening Ho. In some embodiments of this disclosure, the orthographic projection of the boundary of the blocking structure BR near the opening Ho on the drive back plate BP is located between two adjacent inner isolation pillars IP1, so that it will not extend to the space between the inner isolation pillars IP1 and the opening Ho. When the opening Ho is made, the blocking structure BR can be avoided from being cut.

[0170] Of course, in some embodiments of this disclosure, the orthographic projection of the boundary of the blocking structure BR near the opening Ho on the drive back plate BP may also be located between the inner isolation pillar IP1 and the opening Ho, or it may be aligned with the boundary of the opening Ho.

[0171] In some embodiments of this disclosure, the barrier structure BR can also be prevented from being cut by ensuring that the distance between the boundary of the barrier structure BR and the opening Ho is not less than 30 μm.

[0172] The following description, in conjunction with the accompanying drawings, illustrates various embodiments:

[0173] First implementation of touch display panel

[0174] As shown in Figures 3-5, the isolation pillar IP may include an inner isolation pillar IP1 and an outer isolation pillar IP2. In this embodiment, the second method of setting the isolation pillar IP, the second touch layer TL, and the first blocking structure BR described above can be used. The width a of the second cut-off groove BS2 is ≥ 2μm; the distance b between one of the first support body GA11 and the second support body GA21 and the sidewall of the second cut-off groove BS2 that overlaps with it is ≥ 1μm; the distance between the boundary of the inner isolation pillar IP1 and the boundary of the inner blocking part BR1 that overlaps with it is ≥ 1μm.

[0175] As shown in Figure 3, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located between the inner isolation pillar IP1, which is closest to the opening Ho, and the opening Ho.

[0176] As shown in Figure 4, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located on the side of the inner isolation pillar IP1 closest to the opening Ho that is far away from the opening Ho, and the distance c between this boundary and the opening Ho is 30 μm.

[0177] As shown in Figures 6 and 7, the isolation pillar IP may include an inner isolation pillar IP1 and an outer isolation pillar IP2. In this embodiment, the second method of setting the isolation pillar IP, the second touch layer TL, and the second blocking structure BR described above can be used. The width a of the second cut-off groove BS2 is ≥ 2μm; the distance d between the inner isolation pillar IP1 and the sidewall of the second cut-off groove BS2 that overlaps with it is ≥ 1μm; and the distance between the boundary of the inner isolation pillar IP1 and the boundary of the inner blocking part BR1 that overlaps with it is ≥ 1μm.

[0178] As shown in Figure 6, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located between the inner isolation pillar IP1, which is closest to the opening Ho, and the opening Ho.

[0179] As shown in Figure 7, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located on the side of the inner isolation post IP1 closest to the opening Ho that is far away from the opening Ho, and the distance c between this boundary and the opening Ho is 30 μm.

[0180] As shown in Figures 8 and 9, the isolation pillar IP may include an inner isolation pillar IP1 and an outer isolation pillar IP2. In this embodiment, the second method of setting the isolation pillar IP, the second touch layer TL, and the third blocking structure BR described above can be used. The width a of the second cut-off groove BS2 is ≥ 2μm; the distance d between the inner isolation pillar IP1 and the sidewall of the second cut-off groove BS2 that overlaps with it is ≥ 1μm; and the distance between the boundary of the inner isolation pillar IP1 and the boundary of the inner blocking part BR1 that overlaps with it is ≥ 1μm.

[0181] As shown in Figure 8, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located between the inner isolation pillar IP1, which is closest to the opening Ho, and the opening Ho.

[0182] As shown in Figure 9, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located on the side of the inner isolation pillar IP1 closest to the opening Ho that is far away from the opening Ho, and the distance c between this boundary and the opening Ho is 30 μm.

[0183] As shown in Figures 10 and 11, the isolation pillar IP may include an inner isolation pillar IP1 and an outer isolation pillar IP2. In this embodiment, the first method of setting the isolation pillar IP, the second touch layer TL, and the first blocking structure BR described above can be used. The width a of the second cut-off groove BS2 is ≥ 2μm; the distance b between one of the first support body GA11 and the second support body GA21 and the sidewall of the second cut-off groove BS2 that overlaps with it is ≥ 1μm; and the distance between the boundary of the inner isolation pillar IP1 and the boundary of the inner blocking part BR1 that overlaps with it is ≥ 1μm.

[0184] As shown in Figure 10, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located between the inner isolation pillar IP1, which is closest to the opening Ho, and the opening Ho.

[0185] As shown in Figure 11, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located on the side of the inner isolation post IP1 closest to the opening Ho that is far away from the opening Ho, and the distance c between this boundary and the opening Ho is 30 μm.

[0186] As shown in Figures 12 and 13, the isolation pillar IP may include an inner isolation pillar IP1 and an outer isolation pillar IP2. In this embodiment, the third method of setting the isolation pillar IP, the second touch layer TL, and the first blocking structure BR can be adopted. The width a of the second cut-off groove BS2 is ≥ 2μm; the distance d between the inner isolation pillar IP1 and the sidewall of the second cut-off groove BS2 that overlaps with it is ≥ 1μm; and the distance between the boundary of the inner isolation pillar IP1 and the boundary of the inner blocking part BR1 that overlaps with it is ≥ 1μm.

[0187] As shown in Figure 12, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located between the inner isolation pillar IP1, which is closest to the opening Ho, and the opening Ho.

[0188] As shown in Figure 13, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located on the side of the inner isolation post IP1 closest to the opening Ho that is far away from the opening Ho, and the distance c between this boundary and the opening Ho is 30 μm.

[0189] As shown in Figures 14 and 15, the isolation pillar IP may include an inner isolation pillar IP1 and an outer isolation pillar IP2. In this embodiment, the third method of setting the isolation pillar IP, the third touch layer TL, and the fourth blocking structure BR can be adopted.

[0190] As shown in Figure 14, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located between the inner isolation pillar IP1, which is closest to the opening Ho, and the opening Ho.

[0191] As shown in Figure 15, in one embodiment, the boundary of the orthographic projection of the inner blocking portion BR1 on the drive back plate BP is located on the side of the inner isolation pillar IP1 closest to the opening Ho that is far away from the opening Ho, and the distance c between this boundary and the opening Ho is 30 μm.

[0192] As shown in Figure 16, the isolation pillar IP may include an inner isolation pillar IP1 and an outer isolation pillar IP2. In this embodiment, the third way of setting the isolation pillar IP, the third touch layer TL and the fifth blocking structure BR can be used. The blocking structure BR is located in the first electrode layer TMA.

[0193] As shown in Figure 17, the isolation pillar IP may include an inner isolation pillar IP1 and an outer isolation pillar IP2. In this embodiment, the third way of setting the isolation pillar IP, the third touch layer TL and the fifth blocking structure BR can be used. The blocking structure BR is located in the second electrode layer TMB.

[0194] As shown in Figure 18, the isolation pillar IP may include an inner isolation pillar IP1 and an outer isolation pillar IP2. In this embodiment, the third way of setting the isolation pillar IP, the third touch layer TL and the fifth blocking structure BR can be adopted. The first electrode layer TMA and the second electrode layer TMB are both provided with blocking structure BR, that is, a double-layer blocking structure BR is adopted.

[0195] This disclosure also provides a touch display device, which may include the touch display panel of any of the above embodiments. The specific structure and beneficial effects of the touch display panel can be referred to the above embodiments of the touch display panel, and will not be described in detail here.

[0196] Furthermore, the touch display device may also include a camera device, which may be located on the side of the drive backplate BP away from the light-emitting device LD and overlap with the opening Ho, and can capture images through the opening Ho.

[0197] The touch display device disclosed herein can be a tablet computer, a laptop computer, or a mobile phone, or other electronic devices with touch display functions, which will not be listed here.

[0198] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.

Claims

1. A touch display panel, wherein the touch display panel has an opening, and the touch display panel has a transition area, a display area and a peripheral area sequentially distributed along a direction away from the opening; The touch display panel includes: Drive backplane; An isolation column is provided on one side of the drive backplate and located in the transition area; The light-emitting device is disposed on one side of the driving back plate and located in the display area; An encapsulation layer covers the light-emitting device and the isolation pillar; A touch layer is disposed on the surface of the encapsulation layer away from the driving backplane, and includes at least one electrode layer, the electrode layer including a blocking structure located in the transition region, the blocking structure overlapping at least a portion of the isolation pillar in a direction perpendicular to the driving backplane.

2. The touch display panel according to claim 1, wherein, The touch display panel also includes: The inner blocking dam is located on the same side of the drive back plate as the isolation column and is situated in the transition zone; The isolation pillar includes an inner isolation pillar and an outer isolation pillar that are sequentially distributed in a direction away from the opening; the outer isolation pillar is located between the display area and the inner barrier, and the inner isolation pillar is located between the inner barrier and the opening.

3. The touch display panel according to claim 2, wherein, The blocking structure is provided with a cutting groove, which divides the blocking structure into a plurality of blocking parts that are spaced apart along a direction away from the opening.

4. The touch display panel according to claim 3, wherein, At least one of the cut-off slots has its orthographic projection on the drive backplate located between the orthographic projections of two adjacent isolation columns on the drive backplate.

5. The touch display panel according to claim 3, wherein, At least one of the cut-off slots overlaps with the isolation post in a direction perpendicular to the drive backplate.

6. The touch display panel according to claim 3, wherein, The cut-off groove includes a first cut-off groove and a plurality of second cut-off grooves. The first cut-off groove divides the blocking structure into an inner blocking part and an outer blocking part. The orthographic projection of the inner blocking part on the drive back plate is located between the orthographic projection of the inner blocking dam on the drive back plate and the opening. The orthographic projection of the outer blocking part on the drive back plate is located on the side of the orthographic projection of the inner blocking dam on the drive back plate away from the opening. The outer blocking portion overlaps with the outer isolation post in a direction perpendicular to the drive back plate; the inner blocking portion overlaps with the inner isolation post in a direction perpendicular to the drive back plate. Each of the second cut-off grooves is provided in the inner blocking portion, dividing the inner blocking portion into multiple blocking units, and at least one of the blocking units overlaps with one of the inner isolation columns in a direction perpendicular to the drive back plate.

7. The touch display panel according to claim 2, wherein, The orthographic projection of the blocking structure on the drive back plate is located near the boundary of the opening between the orthographic projections of two adjacent outer isolation pillars on the drive back plate, or between the orthographic projection of the inner isolation pillar and the opening on the drive back plate.

8. The touch display panel according to claim 3, wherein, The electrode layer includes a first electrode layer and a second electrode layer distributed along a direction away from the drive backplate; At least one of the first electrode layer and the second electrode layer includes the blocking structure.

9. The touch display panel according to claim 8, wherein, The touch layer also includes: An insulating layer covers the first electrode layer; the second electrode layer is disposed on the surface of the insulating layer away from the drive backplate. A touch-sensitive planarization layer covers the second electrode layer.

10. The touch display panel according to claim 9, wherein, The materials of the insulating layer and the touch planarization layer are organic materials.

11. The touch display panel according to claim 10, wherein, The touch layer also includes: A touch buffer layer covers the encapsulation layer; the first electrode layer is disposed on the surface of the touch buffer layer away from the driving backplate; the material of the touch buffer layer is an organic material.

12. The touch display panel according to claim 11, wherein, The surface of the touch buffer layer away from the drive backplate is planar, and the blocking structure extends continuously and overlaps with the inner isolation pillar and the outer isolation pillar in a direction perpendicular to the drive backplate.

13. The touch display panel according to claim 1, wherein, The driving backplate includes a source / drain layer located in the display area, and the isolation pillar is disposed in the same layer as the source / drain layer.

14. The touch display panel according to claim 13, wherein, The source / drain layer includes a first source / drain layer and a second source / drain layer, wherein one of the first source / drain layer and the second source / drain layer is disposed in the same layer as the isolation column.

15. The touch display panel according to claim 13, wherein, Both the source / drain layer and the isolation pillar include multiple conductive layers stacked sequentially in a direction away from the drive backplane, and each conductive layer of the source / drain layer is disposed on the same layer as each conductive layer of the isolation pillar. The conductive layer includes a first conductive layer, a second conductive layer, and a third conductive layer, and the boundaries of the orthographic projections of the first conductive layer and the third conductive layer of the isolation pillar on the drive backplate are located outside the boundaries of the orthographic projections of the second conductive layer on the drive backplate.

16. The touch display panel according to claim 13, wherein, The drive backplate has a raised structure located in the transition zone, and the isolation pillars are stacked on the raised structure.

17. The touch display panel according to claim 16, wherein, The drive backplate includes: Substrate; A semiconductor layer is disposed on one side of the substrate; A first gate insulating layer covers the semiconductor layer; At least one gate layer is disposed on the side of the first gate insulating layer away from the substrate; at least one of the gate layers has a support located in the transition region; An interlayer dielectric layer covers the gate layer and forms the protrusion structure in a region corresponding to the support; the source / drain layer is disposed on the surface of the interlayer dielectric layer away from the substrate, and the isolation pillar is disposed on the surface of the protrusion structure away from the substrate; A planarization layer covers the source / drain layer.

18. The touch display panel according to claim 17, wherein, The gate layer includes a first gate layer and a second gate layer; the first gate layer is disposed on the surface of the first gate insulating layer away from the substrate. The drive backplate also includes: A second gate insulating layer covers the first gate layer; The second gate layer is disposed on the surface of the second gate insulating layer away from the substrate; The support is located in one of the first gate layer and the second gate layer; the interlayer dielectric layer covers the second gate layer.

19. The touch display panel according to claim 17, wherein, The gate layer includes a first gate layer and a second gate layer, and the support includes a first support and a second support, wherein the second support overlaps with the first support in a direction perpendicular to the drive backplate. The first gate layer is disposed on the surface of the first gate insulating layer away from the substrate, and includes the first support; The drive backplate also includes: A second gate insulating layer covers the first gate layer and protrudes in the region corresponding to the first support. The second gate layer is disposed on the surface of the second gate insulating layer away from the substrate, and includes the second support; The interlayer dielectric layer covers the second gate layer and forms the protrusion structure in the region corresponding to the second support.

20. The touch display panel according to claim 2, wherein, The number of inner isolation pillars is multiple, and they are spaced apart along a direction away from the opening; the touch display panel also includes: An insulating filler is disposed on the same surface as the isolation pillar and at least fills the space between two adjacent inner isolation pillars; The light-emitting device includes a first electrode, a light-emitting layer, and a second electrode stacked sequentially in a direction away from the driving backplate; the light-emitting layer of each light-emitting device is a whole-layer structure and includes multiple light-emitting sub-layers, and at least some of the light-emitting sub-layers are broken on the sidewall of the isolation pillar; the light-emitting layer covers the insulating filler.

21. The touch display panel according to claim 20, wherein, The insulating filler is placed between the two inner isolation columns closest to the inner barrier dam.

22. The touch display panel according to claim 20, wherein, The touch display panel also includes: A pixel definition layer is disposed on the same surface as the first electrode on the driving back plate, and each of the first electrodes is exposed. The insulating filler is disposed on the same layer as the pixel definition layer.

23. The touch display panel according to claim 2, wherein, The number of the outer isolation pillars is at least two, the blocking structure extends continuously at least locally, and at least two of the outer isolation pillars overlap with the area where the blocking structure extends continuously in a direction perpendicular to the drive back plate; The encapsulation layer includes a first inorganic layer, an organic layer, and a second inorganic layer. The first inorganic layer covers the light-emitting device, the isolation pillar, and the inner barrier dam. The organic layer is disposed on the surface of the first inorganic layer away from the driving backplate and is defined on the side of the inner barrier dam away from the opening. The orthographic projection of the outer isolation post on the drive back plate is located within the orthographic projection of the organic layer on the drive back plate; the second inorganic layer covers the organic layer and the first inorganic layer.

24. The touch display panel according to any one of claims 1-23, wherein, The distance between the orthographic projection of the blocking structure on the drive back plate and the boundary of the opening is not less than 30 μm.

25. The touch display panel according to claim 6, wherein, The width of the cut-off groove is not less than 2μm; The distance between the boundary of the blocking unit's orthographic projection on the drive back plate and the boundary of the inner isolation column's orthographic projection on the drive back plate that overlaps with it is ≥1μm.

26. A touch display device comprising the touch display panel as described in any one of claims 1-25.

Images