Display panel and electronic device

Abstract

The present application relates to a display panel and an electronic device. The display panel comprises a substrate and a plurality of multiplexers located on the substrate, each multiplexer comprising a plurality of selection transistors. Each selection transistor comprises: a channel layer, a gate dielectric layer located on a side of the channel layer, and a main gate located on the side of the gate dielectric layer facing away from the channel layer. An auxiliary gate is provided on the side of the channel layer facing away from the gate dielectric layer, thereby improving the data signal transmission capability of the multiplexer. The main gates and the auxiliary gates jointly controlling current flow in channels increases the response speed of the selection transistors and reduces the threshold voltage of the selection transistors, thereby increasing currents transmitted from the selection transistors to data lines, improving the effect of the data lines charging pixel units connected thereto, and finally achieving the purpose of optimizing the display effect of the display panel. In addition, the auxiliary gates can also have the effect of electrostatic shielding to suppress the problem of characteristic drift of the selection transistors caused by static electricity.

Description

A display panel and electronic device

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411226881.9, filed on September 2, 2024, entitled “A Display Panel and Electronic Device,” the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the field of display technology, and more particularly to a display panel and an electronic device. Background Technology

[0004] With the development of display technology, display panels have been applied in various fields. A display panel includes a display area and a non-display area. The display area includes multiple data lines, while the non-display area includes multiple multiplexers. The input ports of the multiplexers are electrically connected to the data signal terminals, and the multiple output ports of the multiplexers are each connected to a data line. During the operation of the display panel, the multiplexer selects and transmits the data signal output from its data signal terminal to one of the connected data lines, thus providing data signals to the corresponding pixel units. Therefore, the data signal transmission capability of the multiplexer directly affects the display effect of the display panel.

[0005] Summary of the Invention

[0006] To address the aforementioned technical problems, this disclosure provides a display panel and an electronic device.

[0007] In a first aspect, embodiments of the present invention provide a display panel, the display panel including a substrate and a plurality of multiplexers located on the substrate, the multiplexers including a plurality of selection transistors, the source and drain of the selection transistors being electrically connected to a data signal terminal and a data line, respectively, the selection transistor including: a channel layer located on the substrate, a gate dielectric layer located on one side of the channel layer, and a main gate located on the side of the gate dielectric layer opposite to the channel layer, the main gate being connected to a selection control signal;

[0008] At least one of the channel layers includes an auxiliary gate on the side opposite to the gate dielectric layer, and an auxiliary insulating layer is included between the auxiliary gate and the channel layer. The auxiliary gate and the orthographic projection on the substrate have at least a partially overlapping region with the orthographic projection of the channel layer on the substrate. The auxiliary gate is connected to a reference voltage.

[0009] In a second aspect, embodiments of the present invention provide an electronic device including the display panel described in the first aspect.

[0010] The technical solution provided in this disclosure has the following advantages compared with the prior art:

[0011] This invention provides a display panel and an electronic device. The display panel includes a substrate and a plurality of multiplexers located on the substrate. Each multiplexer includes a plurality of selection transistors. The source and drain of each selection transistor are electrically connected to a data signal terminal and a data line, respectively. Each selection transistor includes: a channel layer on the substrate, a gate dielectric layer on one side of the channel layer, and a main gate on the side of the gate dielectric layer opposite to the channel layer. The main gate is connected to a selection control signal. At least one auxiliary gate is included on the side of the channel layer opposite to the gate dielectric layer. An auxiliary insulating layer is included between the auxiliary gate and the channel layer. The auxiliary gate and its projection onto the substrate have at least a partial overlap with the projection of the channel layer onto the substrate. The auxiliary gate is connected to a reference voltage. As can be seen from the above, the technical solution provided by this invention, by providing an auxiliary gate on the side of the channel layer opposite to the gate dielectric layer, improves the data signal transmission capability of the multiplexer. By jointly controlling the current flow in the channel through the main gate and auxiliary gate, the response speed of the selection transistor is improved, and the threshold voltage of the selection transistor is reduced. This, in turn, increases the current transmitted from the selection transistor to the data line, improving the charging effect of the data line on the connected pixel units, ultimately optimizing the display effect of the display panel. Furthermore, the auxiliary gate also acts as an electrostatic shield, suppressing the characteristic drift of the selection transistor caused by static electricity. Attached Figure Description

[0012] This application can be better understood from the following description of specific embodiments in conjunction with the accompanying drawings, wherein other features, objects and advantages of this application will become more apparent by reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings, wherein the same or similar reference numerals denote the same or similar features.

[0013] Figure 1 is a schematic diagram of a display panel structure;

[0014] Figure 2 is a circuit diagram of a pixel driving circuit;

[0015] Figure 3 is a timing diagram;

[0016] Figure 4 is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0017] Figure 5 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0018] Figure 6 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0019] Figure 7 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0020] Figure 8 is a structural schematic diagram of another display panel provided in an embodiment of the present invention;

[0021] Figure 9 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0022] Figure 10 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0023] Figure 11 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0024] Figure 12 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0025] Figure 13 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0026] Figure 14 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0027] Figure 15 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0028] Figure 16 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0029] Figure 17 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0030] Figure 18 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0031] Figure 19 is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0032] Figure 20 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0033] The features and exemplary embodiments of various aspects of this application will now be described in detail. Numerous specific details are disclosed in the following detailed description to provide a comprehensive understanding of this application. However, it will be apparent to those skilled in the art that this application can be implemented without some of these specific details. The following description of embodiments is merely intended to provide a better understanding of this application by illustrating examples. This application is by no means limited to any specific configurations and algorithms presented below, but covers any modifications, substitutions, and improvements to elements, components, and algorithms without departing from the spirit of this application. Well-known structures and techniques are not shown in the accompanying drawings and the following description in order to avoid unnecessary obfuscation of this application.

[0034] As described in the background section, during the operation of a display panel, a multiplexer selects and transmits the data signal output from its data signal terminal to one of its connected data lines. This data line then provides data signals to the corresponding pixel units. Therefore, the multiplexer's ability to transmit data signals directly affects the display effect of the display panel. Referring specifically to Figure 1, a schematic diagram of a display panel structure is shown. The display panel includes multiple pixel units arranged in an array along the row direction X and column direction Y. Each pixel unit includes a pixel driving circuit 10 and a light-emitting element DL electrically connected to the pixel driving circuit 10. The pixel driving circuit 10 is electrically connected to a data line 20, where the light-emitting element DL can be a light-emitting diode (LED). During the operation of the display panel, the pixel units are scanned row by row. While scanning the pixel units, the multiplexer selects and transmits the data signal to the corresponding data line 20, thereby providing data signals to the pixel driving circuit 10 for charging.

[0035] Further referring to Figures 2 and 4, Figure 2 is a circuit diagram of a pixel driving circuit, and Figure 3 is a timing diagram. The pixel driving circuit is described using P-type transistors as an example. The pixel driving circuit includes a driving transistor M0, a reset transistor M1, a data writing transistor M2, a threshold compensation transistor M3, a first light-emitting control transistor M4, a second light-emitting control transistor M5, and a storage capacitor C. The first terminal of the reset transistor M1 is connected to a reset signal Vref, and the second terminal of the reset transistor M1 is electrically connected to the gate of the driving transistor M0. The gate of the reset transistor M1 is connected to a reset control signal S1. The first terminal of the data writing transistor M2 is electrically connected to a data line and receives a data signal Vdata. The second terminal of the data writing transistor M2 is electrically connected to the first terminal of the driving transistor M0, and the gate of the data writing transistor M2 is connected to a data writing control signal S2. The first terminal of the threshold compensation transistor M3 is electrically connected to the second terminal of the driving transistor M0, and the second terminal of the threshold compensation transistor M3 is electrically connected to the gate of the driving transistor M0. The gate of the threshold compensation transistor M3 is connected to a threshold compensation control signal S3. The first terminal of the first light-emitting control transistor M4 is connected to the anode voltage PVDD. The second terminal of the first light-emitting control transistor M4 is electrically connected to the first terminal of the driving transistor M0. The first terminal of the second light-emitting control transistor M5 is electrically connected to the second terminal of the driving transistor M0. The second terminal of the second light-emitting control transistor M5 is electrically connected to the anode of the light-emitting element DL. The gates of both the first light-emitting control transistor M4 and the second light-emitting control transistor M5 are connected to the light-emitting control signal Emit. The cathode of the light-emitting element DL is connected to the cathode voltage PVEE. Furthermore, the first terminal of the storage capacitor C is connected to the anode voltage PVDD, and the second terminal of the storage capacitor C is electrically connected to the gate of the driving transistor M0.

[0036] The data writing transistor M2 is electrically connected to a data line to receive the data signal Vdata. The pixel driving circuit includes a reset phase T1, a compensation writing phase T2, and a light emission phase T3 performed sequentially. In the reset phase T1, the reset transistor M1 turns on in response to a low level of the reset control signal S1, and the threshold compensation transistor M3 turns on in response to a low level of the threshold compensation control signal S3, so as to transmit the reset signal Vref to the gate and the second terminal of the driving transistor M0 for reset. In the compensation writing phase T2, the data writing transistor M2 turns on in response to a low level of the data writing control signal S2, and the threshold compensation transistor M3 turns on in response to a low level of the threshold compensation control signal S3. The data writing transistor M2 transmits the data signal Vdata to the first terminal of the driving transistor M0, and then the data signal Vdata is transmitted to the gate of the driving transistor M0 through the driving transistor M0 and the threshold compensation transistor M3 to charge the storage capacitor C. During the light-emitting stage T3, the first light-emitting control transistor M4 and the second light-emitting control transistor M5 are turned on in response to the low level of the light-emitting control signal Emit, transmitting the driving current generated by the driving transistor M0 to the light-emitting element DL. The light-emitting element DL lights up in response to this driving current. It is evident that the data signal Vdata has a significant impact on the lighting of the light-emitting element DL. Therefore, the ability of the multiplexer to transmit the data signal Vdata directly affects the display effect of the display panel. In particular, with the increase in display panel resolution, the driving of existing display panels typically compresses the pulse width time of the compensation write stage T2, which correspondingly compresses the pulse width time of the multiplexer's output data signal Vdata. If the multiplexer's ability to transmit the data signal Vdata is poor, the data line 20 cannot fully transmit the data signal Vdata to the pixel driving circuit 10, greatly affecting the charging effect of the data line 20 on the pixel driving circuit 10, further deteriorating the display effect of the display panel, such as vertical lines appearing due to differences in the data signal transmission capabilities of different data lines 20.

[0037] It should be noted that the pixel driving circuit shown above is only one specific component composition and connection among all pixel driving circuits applicable to the display panel. There are no specific restrictions on it. As long as the data signal input to the pixel driving circuit is output by the multiplexer, it has the ability of the multiplexer to transmit data signals and affects the display effect of the display panel.

[0038] Based on this, embodiments of the present invention provide a display panel and an electronic device, which effectively solves the technical problems existing in the prior art, improves the ability of the multiplexer to transmit data signals, and improves the display effect of the display panel.

[0039] To achieve the above objectives, the technical solutions provided by the embodiments of the present invention are as follows, and the technical solutions provided by the embodiments of the present invention will be described in more detail with reference to Figures 4 to 20.

[0040] Referring to Figures 4 and 5, Figure 4 is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention, and Figure 5 is a schematic diagram of the structure of another display panel provided in an embodiment of the present invention. Figure 4 illustrates the circuit connections in the display panel, while Figure 5 illustrates the cross-sectional composition of the display panel. The display panel provided in this embodiment of the present invention includes a substrate 100 and data lines located on the substrate 100. The data lines include multiple multiplexers 200, multiple data lines 20, and multiple data signal terminals VD. Each multiplexer 200 includes multiple selection transistors 210, and the source and drain of each selection transistor 210 are electrically connected to the data signal terminal and the data line 20, respectively. The source of the selector transistor 210 can be electrically connected to the data signal terminal, while the drain of the selector transistor 210 can be electrically connected to the data line 20; or, the source of the selector transistor 210 can be electrically connected to the data line 20, while the drain of the selector transistor 210 can be electrically connected to the data signal terminal. This invention does not impose specific limitations on this, and specific analysis and design are required based on parameters such as the conduction type of the selector transistor 210.

[0041] The selection transistor 210 includes: a channel layer 211 located on the substrate 100, a gate dielectric layer 212 located on one side of the channel layer 211, and a main gate 213 located on the side of the gate dielectric layer 212 opposite to the channel layer 211. The main gate 213 is connected to a selection control signal MUX. At least one of the channel layers 211 on the side opposite to the gate dielectric layer 212 includes an auxiliary gate 310. An auxiliary insulating layer 320 is included between the auxiliary gate 310 and the channel layer 211. The auxiliary gate 310 and its orthographic projection on the substrate 100 have at least a partially overlapping region with the orthographic projection of the channel layer 211 on the substrate 100. The auxiliary gate 310 is connected to a reference voltage VF.

[0042] Understandably, the technical solution provided in this embodiment of the invention provides an auxiliary gate 310 on the side of the channel layer 211 away from the gate dielectric layer 212, which improves the data signal transmission capability of the multiplexer 200. Specifically, by jointly controlling the current flow in the channel through the main gate 213 and the auxiliary gate 310, the response speed of the selection transistor 210 is improved, and the threshold voltage of the selection transistor 210 is reduced. This, in turn, increases the current transmitted from the selection transistor 210 to the data line 20, improving the charging effect of the data line 20 on its connected pixel driving circuit, ultimately optimizing the display effect of the display panel. Furthermore, the auxiliary gate 310 also acts as an electrostatic shield, suppressing the characteristic drift of the selection transistor 210 caused by electrostatic discharge.

[0043] Referring specifically to Figure 4, taking a display panel comprising two multiplexers and two data signal terminals as an example, and using a P-type transistor as an example for description, the first multiplexer 201 includes two selection transistors 210, namely a first selection transistor 2101 and a second selection transistor 2102. The second multiplexer 202 includes two selection transistors 210, namely a third selection transistor 2103 and a fourth selection transistor 2104. Both the first and second selection transistors 2101 and 2102 are electrically connected to the first data signal terminal VD1, and both the third and fourth selection transistors 2103 and 2104 are electrically connected to the second data signal terminal VD2. Furthermore, the main gate 213 of both the first and third selection transistors 2101 and 2103 is connected to the first selection control signal MUX1, and the main gate 213 of both the second and fourth selection transistors 2102 and 2104 is connected to the second selection control signal MUX2. The main gate 213 of the first selection transistor 2101 is provided with a first auxiliary gate 311, the main gate 213 of the second selection transistor 2102 is provided with a second auxiliary gate 312, the main gate 213 of the third selection transistor 2103 is provided with a third auxiliary gate 313, and the main gate 213 of the fourth selection transistor 2104 is provided with a fourth auxiliary gate 314. The auxiliary gate 310 overlaps at least partially with the channel layer 211 of the selection transistor 210. The first auxiliary gate 311 is connected to a reference voltage VF1, the second auxiliary gate 312 is connected to a reference voltage VF2, the third auxiliary gate 313 is connected to a reference voltage VF3, and the fourth auxiliary gate 314 is connected to a reference voltage VF4.

[0044] During the process of the first selection control signal MUX1 controlling the first selection transistor 2101 and the third selection transistor 2103 to be turned on, the first auxiliary gate 311 and the third auxiliary gate 313 are respectively connected to the first reference voltage VF1 and the third reference voltage VF3, thereby reducing the threshold voltage of the first selection transistor 2101 and the third selection transistor 2103, increasing the current of the data signal passing through the first selection transistor 2101 and the third selection transistor 2103, thereby improving the charging effect of the data line 20 on the connected pixel driving circuit, and achieving the purpose of optimizing the display effect of the display panel. Similarly, during the process of the second selection control signal MUX2 controlling the conduction of the second selection transistor 2102 and the fourth selection transistor 2104, the second auxiliary gate 312 and the fourth auxiliary gate 314 are respectively connected to the second reference voltage VF2 and the fourth reference voltage VF4. This reduces the threshold voltage of the second selection transistor 2102 and the fourth selection transistor 2104, increases the current of the data signal passing through the second selection transistor 2102 and the fourth selection transistor 2104, and thus improves the charging effect of the data line 20 on its connected pixel driving circuit, thereby optimizing the display effect of the display panel. Furthermore, the first auxiliary gate 311 to the fourth auxiliary gate 314 can also act as electrostatic shielding, suppressing the characteristic drift of the first selection transistor 2101 to the fourth selection transistor 2104 caused by electrostatic discharge.

[0045] Referring to Figure 6, which is a schematic diagram of another display panel provided in an embodiment of the present invention, the display panel includes multiple pixel units arranged in an array along the row direction X and the column direction Y. Each pixel unit includes a pixel driving circuit 10 electrically connected to the data line 20 and a light-emitting element DL electrically connected to the pixel driving circuit 10. The light-emitting element DL is a red light-emitting element DLR, a green light-emitting element DLG, or a blue light-emitting element DLB. The selection transistor 210 corresponding to the red light-emitting element DLR is defined as a red light selection transistor 210R, the selection transistor 210 corresponding to the green light-emitting element DLG is defined as a green light selection transistor 210G, and the selection transistor 210 corresponding to the blue light-emitting element DLB is defined as a blue light selection transistor 210B. The channel layer 211 of at least one of the red light selection transistors 210R faces away from the gate dielectric layer 212. One side includes an auxiliary gate 310R, and the auxiliary gate 310R and its orthographic projection on the substrate 100 have at least a partially overlapping region with the orthographic projection of the channel layer 211 on the substrate 100; and / or, at least one of the blue light selection transistors 210B has an auxiliary gate 310B on the side of its channel layer 211 away from the gate dielectric layer 212, and the auxiliary gate 310B and its orthographic projection on the substrate 100 have at least a partially overlapping region with the orthographic projection of the channel layer 211 on the substrate 100.

[0046] It is understood that at least one red light selection transistor 210R in the display panel can be correspondingly provided with an auxiliary gate 310R; or, at least one blue light selection transistor 210B in the display panel can be correspondingly provided with an auxiliary gate 310B; or, at least one red light selection transistor 210R in the display panel can be correspondingly provided with an auxiliary gate 310R, and at least one blue light selection transistor 210B can be correspondingly provided with an auxiliary gate 310B. This invention does not impose specific limitations on these provisions. Preferably, at least one red light selection transistor 210R in the display panel can be correspondingly provided with an auxiliary gate 310R, and at least one blue light selection transistor 210B can be correspondingly provided with an auxiliary gate 310B. Since the inherent luminous efficiency of the green light-emitting element DLG is greater than that of the red light-emitting element DLR and the blue light-emitting element DLB, the red light-emitting element DLR and the blue light-emitting element DLB are more dependent on the charging effect of the data line 20 on the pixel driving circuit 10 compared to the green light-emitting element DLG. Therefore, auxiliary gates 310 are provided at the red light selection transistor 210R and the blue light selection transistor 210B, while no auxiliary gate 310 is provided at the green light selection transistor 210G. During the operation of the display panel, the threshold voltage of the red light selection transistor 210R and the blue light selection transistor 210B can be reduced, thereby improving the charging effect of the data line 20 on the corresponding pixel driving circuits of the red light emitting element DLR and the blue light emitting element DLB, improving the luminous efficiency of the red light emitting element DLR and the blue light emitting element DLB, balancing the luminous efficiency of the red light emitting element DLR, the blue light emitting element DLB and the green light emitting element DLG, thereby improving the uniformity of the display brightness of the display panel and optimizing the display effect of the display panel.

[0047] Specifically, as shown in Figure 6, the display panel includes two multiplexers and two data signal terminals, and the selection transistor 210 is a P-type transistor. The two multiplexers 200 are a third multiplexer 203 and a fourth multiplexer 204, and the two data signal terminals are a third data signal terminal VD3 and a fourth data signal terminal VD4. Both the third multiplexer 203 and the fourth multiplexer 204 include four selection transistors 210. All selection transistors 210 in the third multiplexer 203 are electrically connected to the third data signal terminal VD3, and all selection transistors 210 in the fourth multiplexer 204 are electrically connected to the fourth data signal terminal VD4. In the third multiplexer 203 and the fourth multiplexer 204, the main gate 213 of the red light selection transistor 210R is connected to the red light selection control signal MUXR. In the third multiplexer 203 and the fourth multiplexer 204, the main gate 213 of the blue light selection transistor 210B is connected to the blue light selection control signal MUXB. In the third multiplexer 203 and the fourth multiplexer 204, the main gate 213 of the green light selection transistor 210G, which scans in the same direction as the red light emitting element DLR, is connected to the first green light selection control signal MUXG1. In the third multiplexer 203 and the fourth multiplexer 204, the main gate 213 of the green light selection transistor 210G, which scans in the same direction as the blue light emitting element DLB, is connected to the second green light selection control signal MUXG2.

[0048] During the process of the red light selection control signal MUXR controlling the red light selection transistor 210R to conduct, the auxiliary gate 310R is connected to a corresponding reference voltage, which can reduce the threshold voltage of the red light selection transistor 210R, increase the current of the data signal passing through the red light selection transistor 210R, thereby improving the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the red light emitting element DLR, and improving the luminous efficiency of the red light emitting element DLR; and during the process of the blue light selection control signal MUXB controlling the blue light selection transistor 210B to conduct, the auxiliary gate 310B is connected to a corresponding reference voltage, which can reduce the threshold voltage of the blue light selection transistor 210B, increase the current of the data signal passing through the blue light selection transistor 210B, thereby improving the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the blue light emitting element DLB, and improving the luminous efficiency of the blue light emitting element DLB. During the process of the green light selection transistor 210G being turned on by the first green light selection control signal MUXG1 and the second green light selection control signal MUXG2, there is no need to improve the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the green light emitting element DLG. This balances the luminous efficiency of the red light emitting element DLR, the blue light emitting element DLB and the green light emitting element DLG, thereby improving the uniformity of the display brightness of the display panel and optimizing the display effect of the display panel.

[0049] The reference voltage connected to the auxiliary gate directly affects the degree of threshold voltage reduction of the selection transistor 210. Specifically, the reference voltage corresponding to the red light selection transistor 210R is defined as the red light reference voltage, and the reference voltage corresponding to the blue light selection transistor 210B is defined as the blue light reference voltage. That is, the reference voltage connected to the auxiliary gate 310R is the red light reference voltage, while the reference voltage connected to the auxiliary gate 310G is the green light reference voltage. The red light reference voltage and the blue light reference voltage are different fixed voltages. Since the luminous efficiency of the red light emitting element DLR and the blue light emitting element DLB is different, optimizing the red light reference voltage and the blue light reference voltage to be different fixed voltages allows for targeted optimization of the threshold voltage reduction of the red light selection transistor 210R and the blue light selection transistor 210B. This targeted optimization of the charging effect on the pixel driving circuit 10 corresponding to the red light emitting element DLR and the pixel driving circuit 10 corresponding to the blue light emitting element DLB further balances the luminous efficiency of the red light emitting element DLR, the blue light emitting element DLB, and the green light emitting element DLG, thereby further improving the display effect of the display panel. Alternatively, the reference voltage corresponding to the red light selection transistor 210R can be defined as the red light reference voltage, and the reference voltage corresponding to the blue light selection transistor 210B can be defined as the blue light reference voltage. That is, the reference voltage connected to the auxiliary gate 310R is the red light reference voltage, while the reference voltage connected to the auxiliary gate 310G is the green light reference voltage; the red light reference voltage and the blue light reference voltage are the same fixed voltage. Thus, while balancing and adjusting the luminous efficiency of the red light-emitting element DLR, the blue light-emitting element DLB, and the green light-emitting element DLG, providing the same fixed voltage through a single reference voltage terminal can reduce the number of reference voltage terminals and corresponding transmission lines, simplifying the wiring of the display panel.

[0050] Figure 7 shows a schematic diagram of another display panel provided in an embodiment of the present invention. When the red light reference voltage and the blue light reference voltage are the same fixed voltage, the auxiliary gate 310R corresponding to the adjacent red light selection transistor 210R and the auxiliary gate 310B corresponding to the blue light selection transistor 210B can also extend to contact the same auxiliary gate 310R (310B), thereby expanding the electrostatic shielding area of ​​the auxiliary gate 310R (310B) and improving the electrostatic shielding effect of the auxiliary gate 310. Alternatively, continuing as shown in Figure 7, when the red light reference voltage and the blue light reference voltage are different fixed voltages, since the red light selection control signal MUXR and the blue light selection control signal MUXB are time-divisionally effective, the auxiliary gates 310R and 310B corresponding to adjacent red light selection transistors 210R and 210B can also extend to the same auxiliary gate 310R (310B). In this case, the reference voltage terminal electrically connected to the auxiliary gate 310R (310B) is a port that outputs different reference voltages in a time-division manner. That is, during the process of the red light selection control signal MUXR controlling the red light selection transistor 210R to conduct, the reference voltage... The voltage terminal outputs a corresponding reference voltage to the auxiliary gate 310R (310B) to specifically reduce the threshold voltage of the red light selection transistor 210R; while during the process of the blue light selection control signal MUXB controlling the blue light selection transistor 210B to conduct, the reference voltage terminal outputs a reference voltage of other voltage values ​​to the auxiliary gate 310R (310B) to specifically reduce the threshold voltage of the blue light selection transistor 210B. In this way, the electrostatic shielding area of ​​the auxiliary gate 310R (310B) is expanded, and the electrostatic shielding effect of the auxiliary gate 310R (310B) is improved, based on the adjustment of the charging effect of the data line 20 on the pixel driving circuit 10.

[0051] Referring to Figure 8, which is a schematic diagram of another display panel provided in an embodiment of the present invention, the display panel includes multiple pixel units arranged in an array along the row direction X and the column direction Y. Each pixel unit includes a pixel driving circuit 10 electrically connected to the data line 20 and a light-emitting element DL electrically connected to the pixel driving circuit 10. The light-emitting element DL is a red light-emitting element DLR, a green light-emitting element DLG, or a blue light-emitting element DLB. Specifically, the selection transistor 210 corresponding to the red light-emitting element DLR is defined as a red light selection transistor 210R, the selection transistor 210 corresponding to the green light-emitting element DLG is defined as a green light selection transistor 210G, and the selection transistor 210 corresponding to the blue light-emitting element DLB is defined as a blue light selection transistor 210B. The channel layer 211 of at least one of the red light selection transistors 210R faces away from the gate dielectric layer 212. One side includes an auxiliary gate 310R, and the auxiliary gate 310R and its orthographic projection on the substrate 100 at least partially overlap with the orthographic projection of the channel layer 211 on the substrate 100; and / or, at least one blue light selection transistor 210B has an auxiliary gate 310B on the side of its channel layer 211 away from the gate dielectric layer 212, and the auxiliary gate 310B and its orthographic projection on the substrate 100 at least partially overlap with the orthographic projection of the channel layer 211 on the substrate 100. Further, at least one green light selection transistor 210G also includes an auxiliary gate 310G on the side of its channel layer 211 away from the gate dielectric layer 212, and the auxiliary gate 310G and its orthographic projection on the substrate 100 at least partially overlap with the orthographic projection of the channel layer 211 on the substrate 100.

[0052] It is understood that at least one red light selection transistor 210R in the display panel can be correspondingly provided with an auxiliary gate 310R, and at least one green light selection transistor 210G can be correspondingly provided with an auxiliary gate 310G; or, at least one blue light selection transistor 210B in the display panel can be correspondingly provided with an auxiliary gate 310B, and at least one green light selection transistor 210G can be correspondingly provided with an auxiliary gate 310G; or, at least one red light selection transistor 210R in the display panel can be correspondingly provided with an auxiliary gate 310R, at least one blue light selection transistor 210B can be correspondingly provided with an auxiliary gate 310B, and at least one green light selection transistor 210G can be correspondingly provided with an auxiliary gate 310G. The present invention does not impose specific limitations on these provisions. Preferably, at least one red light selection transistor 210R in the display panel can be provided with an auxiliary gate 310R, at least one blue light selection transistor 210B can be provided with an auxiliary gate 310B, and at least one green light selection transistor 210G can be provided with an auxiliary gate 310G. Thus, the pixel driving circuits 10 corresponding to all colors in the display panel are optimized and improved in terms of charging effect, thereby improving the overall display effect of the display panel.

[0053] Specifically, as shown in Figure 8, during the process of the red light selection control signal MUXR controlling the red light selection transistor 210R to conduct, the auxiliary gate 310R is connected to a corresponding reference voltage, which can reduce the threshold voltage of the red light selection transistor 210R, increase the current of the data signal passing through the red light selection transistor 210R, and thus improve the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the red light emitting element DLR, thereby improving the luminous efficiency of the red light emitting element DLR; and during the process of the blue light selection control signal MUXB controlling the blue light selection transistor 210B to conduct, the auxiliary gate 310B is connected to a corresponding reference voltage, which can reduce the threshold voltage of the blue light selection transistor 210B, increase the current of the data signal passing through the blue light selection transistor 210B, and thus improve the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the blue light emitting element DLB, thereby improving the luminous efficiency of the blue light emitting element DLB. Furthermore, during the conduction of the green light selection transistor 210G controlled by the first green light selection control signal MUXG1 or the second green light selection control signal MUXG2, the auxiliary gate 310G is connected to the corresponding reference voltage, which can reduce the threshold voltage of the green light selection transistor 210G, increase the current of the data signal passing through the green light selection transistor 210G, thereby improving the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the green light emitting element DLG, and improving the luminous efficiency of the green light emitting element DLG. This improves the luminous efficiency of the red light emitting element DLR, the blue light emitting element DLB and the green light emitting element DLG in the display panel, and optimizes the overall display effect of the display panel.

[0054] The reference voltage corresponding to the red light selection transistor 210R is defined as the red light reference voltage, the reference voltage corresponding to the blue light selection transistor 210B is defined as the blue light reference voltage, and the reference voltage corresponding to the green light selection transistor 210G is defined as the green light reference voltage; that is, the reference voltage connected to the auxiliary gate 310R is the red light reference voltage, while the reference voltage connected to the auxiliary gate 310G is the green light reference voltage, wherein the red light reference voltage, the blue light reference voltage, and the green light reference voltage are different fixed voltages. Since the luminous efficiency of the red light-emitting element DLR, the blue light-emitting element DLB, and the green light-emitting element DLG are different, the red light reference voltage, blue light reference voltage, and green light reference voltage are optimized to be different fixed voltages. The threshold voltages of the red light selection transistor 210R, blue light selection transistor 210B, and green light selection transistor 210G are specifically optimized to optimize the charging effect of the pixel driving circuit 10 corresponding to each of the red light-emitting element DLR, blue light-emitting element DLB, and green light-emitting element DLG, thereby achieving the goal of optimizing the overall display effect of the display panel. Alternatively, the reference voltage corresponding to the red light selection transistor 210R can be defined as the red light reference voltage, the reference voltage corresponding to the blue light selection transistor 210B can be defined as the blue light reference voltage, and the reference voltage corresponding to the green light selection transistor 210G can be defined as the green light reference voltage; that is, the reference voltage connected to the auxiliary gate 310R is the red light reference voltage, while the reference voltage connected to the auxiliary gate 310G is the green light reference voltage, wherein the red light reference voltage and the blue light reference voltage are the same fixed voltage, and the red light reference voltage and the blue light reference voltage are different fixed voltages from the green light reference voltage. Since the luminous efficiency of red light-emitting element DLR and blue light-emitting element DLB is much smaller than that of green light-emitting element DLG, the red and blue light reference voltages are optimized to be the same fixed voltage, but set to a different fixed voltage than the green light reference voltage. This ensures that the charging effect on the pixel driving circuit 10 corresponding to the red light-emitting element DLR and blue light-emitting element DLB is different from the charging effect on the pixel driving circuit 10 corresponding to the green light-emitting element DLG, thereby optimizing the overall display effect of the display panel. At the same time, the same fixed voltage can also be provided through the same reference voltage terminal, which can further reduce the number of reference voltage terminals and corresponding transmission lines, simplifying the wiring of the display panel.

[0055] Referring to Figure 9, which is a schematic diagram of another display panel provided in an embodiment of the present invention, when the red light reference voltage and the blue light reference voltage are the same fixed voltage, the auxiliary gate 310R corresponding to the adjacent red light selection transistor 210R and the auxiliary gate 310B corresponding to the blue light selection transistor 210B can also extend to contact the same auxiliary gate 310R (310B); similarly, the auxiliary gate 310G corresponding to the adjacent green light selection transistor 210B can also extend to contact the same auxiliary gate 310G, thereby expanding the electrostatic shielding area of ​​the auxiliary gate and improving the electrostatic shielding effect of the auxiliary gate. Alternatively, as shown in Figure 9, when the red light reference voltage and the blue light reference voltage are different fixed voltages, since the red light selection control signal MUXR and the blue light selection control signal MUXB are time-divisionally effective, the auxiliary gates 310R and 310B corresponding to adjacent red light selection transistors 210R and 210B can also extend to the same auxiliary gate 310R (310B). At this time, the reference voltage terminal electrically connected to the auxiliary gate 310R (310B) is a port that outputs different reference voltages in a time-division manner. That is, when the red light selection control signal MUXR controls the red light selection transistor 210R, the auxiliary gate 310R (310B) can also extend to the same auxiliary gate 310R (310B). During the conduction of R, the reference voltage terminal outputs a corresponding reference voltage to the auxiliary gate 310R (310B) to specifically reduce the threshold voltage of the red light selection transistor 210R; while during the conduction of the blue light selection transistor 210B controlled by the blue light selection control signal MUXB, the reference voltage terminal outputs a reference voltage of other voltage values ​​to the auxiliary gate 310R (310B) to specifically reduce the threshold voltage of the blue light selection transistor 210B. In this way, the electrostatic shielding area of ​​the auxiliary gate is expanded and the electrostatic shielding effect of the auxiliary gate is improved, thereby adjusting the charging effect of the data line 20 on the pixel driving circuit 10.

[0056] Referring further to Figure 10, which is a schematic diagram of another display panel structure provided in an embodiment of the present invention, regardless of whether the red light reference voltage and the blue light reference voltage are the same fixed voltage or different fixed voltages, since the red light selection control signal MUXR, the blue light selection control signal MUXB, the first green light selection control signal MUXG1, and the second green light selection control signal MUXG2 are time-divisionally effective, the auxiliary gate 310R corresponding to the red light selection transistor 210R, the auxiliary gate 310B corresponding to the blue light selection transistor 210B, and the auxiliary gate 310G corresponding to the green light selection transistor 210B can extend to contact the same auxiliary gate 310RBG. At this time, the reference voltage terminal electrically connected to the auxiliary gate 310RBG is a port that outputs different reference voltages in a time-division manner. That is, during the process of the red light selection control signal MUXR controlling the red light selection transistor 210R to be turned on, the reference voltage terminal outputs the corresponding... A reference voltage is applied to the auxiliary gate 310RBG to specifically reduce the threshold voltage of the red light selection transistor 210R. During the blue light selection control signal MUXB controlling the blue light selection transistor 210B to conduct, a reference voltage of a different value is output to the auxiliary gate 310RBG to specifically reduce the threshold voltage of the blue light selection transistor 210B. Furthermore, during the green light selection control signal MUXG1 or the second green light selection control signal MUXG2 controlling the green light selection transistor 210G to conduct, a reference voltage of a different value is output to the auxiliary gate 310RBG to specifically reduce the threshold voltage of the green light selection transistor 210G. This, in addition to adjusting the charging effect of the data line 20 on the pixel driving circuit 10, expands the electrostatic shielding area of ​​the auxiliary gate 310RBG, improving its electrostatic shielding effect.

[0057] It should be noted that the above embodiments are all described using a 1:4 selector, with a multiplexer 200 including four selection transistors 210 and a data signal terminal VD, as an example. Furthermore, based on the arrangement of the pixel units, the red light selection transistor 210R and the blue light selection transistor 210B can be two independent selection transistors. In other embodiments of the present invention, the multiplexer 200 provided by the present invention may also include other numbers of selection transistors 210 and other pixel unit arrangements. Moreover, based on the pixel unit arrangement, the red light selection transistor 210R and the blue light selection transistor 210B may also be the same selection transistor; the present invention does not impose specific limitations on this. Specifically, please refer to Figure 11, which is a schematic diagram of another display panel structure provided by an embodiment of the present invention. The multiplexer 200 is a 1:2 selector including two selection transistors 210 and a data signal terminal. Specifically, the display panel includes multiple pixel units, which are arranged in an array along the row direction X and the column direction Y. The pixel unit includes a pixel driving circuit 10 electrically connected to the data line 20 and a light-emitting element DL electrically connected to the pixel driving circuit 10. The light-emitting element DL is a red light-emitting element DLR, a green light-emitting element DLG, or a blue light-emitting element DLB. Specifically, the selection transistor 210 corresponding to the red light-emitting element DLR is defined as a red light selection transistor, the selection transistor 210 corresponding to the green light-emitting element DLG is defined as a green light selection transistor 210G, and the selection transistor 210 corresponding to the blue light-emitting element DLB is defined as a blue light selection transistor. Based on the arrangement of the pixel units, the driving circuits 10 of the red light-emitting elements DLR and blue light-emitting elements DLB in the same column transmit data signals through the same data line 20. Therefore, the selection transistor 210RB electrically connected to the data line 20 is a collection of red light selection transistors and blue light selection transistors. At least one select transistor 210RB includes an auxiliary gate 310RB on the side of its channel layer 211 facing away from the gate dielectric layer 212, and the auxiliary gate 310RB and its orthographic projection on the substrate 100 have at least a partially overlapping region with the orthographic projection of the channel layer 211 on the substrate 100. Furthermore, at least one green light select transistor 210G also includes an auxiliary gate 310G on the side of its channel layer 211 facing away from the gate dielectric layer 212, and the auxiliary gate 310G and its orthographic projection on the substrate 100 have at least a partially overlapping region with the orthographic projection of the channel layer 211 on the substrate 100.

[0058] Figure 11 illustrates a display panel comprising two multiplexers and two data signal terminals, with the selection transistor 210 being a P-type transistor. The two multiplexers 200 are a fifth multiplexer 205 and a sixth multiplexer 206, respectively, and the two data signal terminals are a fifth data signal terminal VD5 and a sixth data signal terminal VD6, respectively. Both the fifth multiplexer 205 and the sixth multiplexer 206 include two selection transistors 210. All selection transistors 210 in the fifth multiplexer 205 are electrically connected to the fifth data signal terminal VD5, and all selection transistors 210 in the sixth multiplexer 206 are electrically connected to the sixth data signal terminal VD6. In the fifth multiplexer 205 and the sixth multiplexer 206, the main gate 213 of the selection transistor 210RB is connected to the red and blue light selection control signal MUXRB, and the main gate 213 of the green light selection transistor 210G in the fifth multiplexer 205 and the sixth multiplexer 206 is connected to the green light selection control signal MUXG.

[0059] The reference voltage corresponding to the red light selection transistor is defined as the red light reference voltage, the reference voltage corresponding to the blue light selection transistor is defined as the blue light reference voltage, and the reference voltage corresponding to the green light selection transistor 210G is defined as the green light reference voltage. The red light reference voltage, the blue light reference voltage, and the green light reference voltage can be different fixed voltages. Therefore, during the process of the red-blue light selection control signal MUXRB controlling the selection transistor 210RB to be turned on, and at this time when the data line 20 is charging the pixel driving circuit 10 connected to the red light emitting element DLR, the auxiliary gate 310RB is connected to the red light reference voltage, thereby reducing the threshold voltage of the selection transistor 210RB, increasing the current of the data signal passing through the selection transistor 210RB, thereby improving the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the red light emitting element DLR, and improving the luminous efficiency of the red light emitting element DLR; and during the process of the red-blue light selection control signal MUXRB controlling the selection transistor 210RB to be turned on, and at this time when the data line 20 is charging the pixel driving circuit 10 connected to the blue light emitting element DLB, the auxiliary gate 310RB is connected to the corresponding blue light reference voltage, thereby reducing the threshold voltage of the selection transistor 210RB, increasing the current of the data signal passing through the selection transistor 210RB, thereby improving the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the blue light emitting element DLB, and improving the luminous efficiency of the blue light emitting element DLB. Furthermore, during the conduction of the green light selection transistor 210G controlled by the green light selection control signal MUXG, the auxiliary gate 310G is connected to the corresponding green light reference voltage, which can reduce the threshold voltage of the green light selection transistor 210G, increase the current of the data signal passing through the green light selection transistor 210G, thereby improving the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the green light emitting element DLG, and improving the luminous efficiency of the green light emitting element DLG. This improves the luminous efficiency of the red light emitting element DLR, the blue light emitting element DLB and the green light emitting element DLG in the display panel, and optimizes the overall display effect of the display panel.

[0060] Alternatively, as shown in Figure 11, the reference voltage corresponding to the red light selection transistor can be defined as the red light reference voltage, the reference voltage corresponding to the blue light selection transistor can be defined as the blue light reference voltage, and the reference voltage corresponding to the green light selection transistor 210G can be defined as the green light reference voltage. The red light reference voltage and the blue light reference voltage are the same fixed voltage, and the red light reference voltage and the blue light reference voltage are different fixed voltages from the green light reference voltage. Therefore, during the process of the red and blue light selection control signal MUXRB controlling the selection transistor 210RB to be turned on, regardless of whether the data line 20 is charging the pixel driving circuit 10 connected to the red light emitting element DLR or the pixel driving circuit 10 connected to the blue light emitting element DLB, the auxiliary gate 310RB is connected to the same fixed reference voltage. This reduces the threshold voltage of the selection transistor 210RB, increases the current of the data signal passing through the selection transistor 210RB, and thus improves the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the red light emitting element DLR or the blue light emitting element DLB, thereby improving the efficiency of the red light emitting element DLR or the blue light emitting element DLB. The luminous efficiency of the element DLB; and, during the process of the green light selection transistor 210G being turned on by the green light selection control signal MUXG, the auxiliary gate 310G is connected to the corresponding green light reference voltage, thereby reducing the threshold voltage of the green light selection transistor 210G, increasing the current of the data signal through the green light selection transistor 210G, thereby improving the charging effect of the data line 20 on the corresponding pixel driving circuit 10 of the green light emitting element DLG, improving the luminous efficiency of the green light emitting element DLG, thereby improving the luminous efficiency of the red light emitting element DLR, the blue light emitting element DLB and the green light emitting element DLG in the display panel, and optimizing the overall display effect of the display panel.

[0061] Referring further to Figure 12, which is a schematic diagram of another display panel structure provided in an embodiment of the present invention, regardless of whether the red light reference voltage and the blue light reference voltage are the same fixed voltage or different fixed voltages, since the red-blue light selection control signal MUXRB and the green light selection control signal MUXG are time-divisionally effective, the auxiliary gate 310RB corresponding to the selection transistor 210RB and the auxiliary gate 310G corresponding to the green light selection transistor 210B can extend to the same auxiliary gate 310RBG. At this time, the reference voltage terminal electrically connected to the auxiliary gate 310RBG is a port that outputs different reference voltages in a time-division manner. That is, when the red-blue light selection control signal MUXRB... During the conduction of the control selection transistor 210RB, a corresponding reference voltage is output from the reference voltage terminal to the auxiliary gate 310RBG to specifically reduce the threshold voltage of the selection transistor 210RB. During the conduction of the green light selection transistor 210G controlled by the green light selection control signal MUXG, a reference voltage of other voltage values ​​is output from the reference voltage terminal to the auxiliary gate 310RBG to specifically reduce the threshold voltage of the green light selection transistor 210G. In addition to adjusting the charging effect of the data line 20 on the pixel driving circuit 10, the electrostatic shielding area of ​​the auxiliary gate 310RBG is expanded, and the electrostatic shielding effect of the auxiliary gate 310RBG is improved.

[0062] Referring to Figure 13, which is a schematic diagram of another display panel provided in an embodiment of the present invention, the display panel includes a display area AA and a non-display area NA located outside the display area AA; the data line 20 is located in the non-display area NA and extends along a first direction Y; the plurality of multiplexers 200 are located in the non-display area NA, and the plurality of multiplexers 200 are located on the same side of the display area AA in the first direction Y; the display area is divided into a plurality of sub-display areas AA1 along the first direction Y of AA, wherein when the data line 20 transmits data signals to the pixel units corresponding to the light-emitting elements DL of the same light-emitting color in different sub-display areas AA1, the reference voltage is a different fixed voltage. The data line 20 transmits data signals with a delay. In the first direction Y, the delay when the data line 20 transmits data signals to pixel units farther from the multiplexer 200 is greater than the delay when transmitting to pixel units closer to the multiplexer 200. Therefore, when the data line 20 transmits data signals to pixel units corresponding to the same light-emitting element DL of different sub-display areas AA1, setting the reference voltage to different fixed voltages will cause the threshold voltage of the selection transistor to differ when the data line transmits signals to different sub-display areas. Furthermore, by optimizing the reference voltage, the threshold voltage of the selection transistor during signal transmission on the data line increases from the display area AA1 to the multiplexer 200, thereby achieving higher consistency in the delay of signal transmission from the data line to pixel units of different sub-display areas AA1 and improving the display effect of the display panel.

[0063] Specifically, the selection transistor 210 can be an N-type transistor. When the data line 20 sequentially transmits data signals to the pixel units corresponding to the light-emitting elements DL of the same emitting color in the sub-display area AA1 from the display area AA to the multiplexer 200, the reference voltage tends to decrease. Since the N-type transistor is a transistor controlled by a high level, a lower reference voltage is equivalent to increasing the threshold voltage of the selection transistor 210, while a higher reference voltage is equivalent to decreasing the threshold voltage of the selection transistor 210. Therefore, when the selection transistor 210 is an N-type transistor, the reference voltage when transmitting data signals to the pixel units corresponding to the light-emitting elements DL of the previous sub-display area AA1 in the direction from the display area AA to the multiplexer 200 is greater than the reference voltage when transmitting data signals to the pixel units corresponding to the light-emitting elements DL of the same emitting color in the next display area AA1. This is equivalent to increasing the threshold voltage of the selection transistor 210, improving the delay difference when the data line 20 transmits data signals to different sub-display areas, and improving the display effect of the display panel.

[0064] Alternatively, the selection transistor 210 can be a P-type transistor, wherein, in the direction from the display area AA to the multiplexer 200, when the data line 20 sequentially transmits data signals to the pixel units of the sub-display area AA1, the reference voltage tends to increase. Unlike N-type transistors, P-type transistors are transistors controlled to turn on at low levels. Therefore, a higher reference voltage is equivalent to increasing the threshold voltage of the selection transistor 210, while a lower reference voltage is equivalent to decreasing the threshold voltage of the selection transistor 210. Thus, when the selection transistor 210 is a P-type transistor, in the direction from the display area AA to the multiplexer 200, the reference voltage when transmitting data signals to the pixel units corresponding to the light-emitting element DL of the previous sub-display area AA1 is less than the reference voltage when transmitting data signals to the pixel units corresponding to the light-emitting element DL of the same light-emitting color in the next display area AA1. This is equivalent to increasing the threshold voltage of the selection transistor 210, improving the delay difference when the data line 20 transmits data signals to different sub-display areas, and improving the display effect of the display panel.

[0065] Referring to Figure 14, which is a schematic diagram of another display panel provided in an embodiment of the present invention, the selection transistor 210 can be a top-gate transistor, wherein the auxiliary gate 310 is located between the substrate 100 and the channel layer 211, and the selection transistor 210 includes: an interlayer insulating layer 214 located on the side of the main gate 213 away from the channel layer 211, and a source 215 and a drain 216 located on the side of the interlayer insulating layer 214 away from the channel layer 211. The source 215 and the drain 216 are both in contact with the channel layer 211 through the interlayer insulating layer 214 and the gate dielectric layer 212. That is, the display panel includes a substrate 100; an auxiliary metal layer on the substrate 100, the auxiliary metal layer including an auxiliary gate 310; an auxiliary insulating layer 320 on the side of the auxiliary metal layer away from the substrate 100; a semiconductor layer on the side of the auxiliary insulating layer 320 away from the substrate 100, the semiconductor layer including a channel layer 211; a gate dielectric layer 212 on the side of the semiconductor layer away from the substrate 100; a gate metal layer on the side of the gate dielectric layer 212 away from the substrate 100, the gate metal layer including a main gate 213; an interlayer insulating layer 214 on the side of the gate metal layer away from the substrate 100; and a source / drain metal layer on the side of the interlayer insulating layer 214 away from the substrate 100, the source / drain metal layer including a source 215 and a drain 216.

[0066] To improve the electrostatic shielding effect of the auxiliary gate 310, the orthographic projection of the auxiliary gate 310 on the substrate 100 at least covers the orthographic projection of the channel layer 211 on the substrate 100. Furthermore, referring to FIG15, at least two adjacent auxiliary gates 310 extend and connect, which not only expands the electrostatic shielding area of ​​the auxiliary gate 310 but also reduces the etching and segmentation process of the auxiliary gate 310, simplifying the fabrication process. In addition, the reference voltage applied after the auxiliary gates 310 are extended and connected can be the same fixed voltage or different fixed voltages; this is described above with reference to the corresponding descriptions of different color light-emitting elements, and will not be elaborated further here.

[0067] The auxiliary gate 310 needs to be connected to a reference voltage. The line connecting to the reference voltage can be of the same metal layer as the auxiliary gate 310. Alternatively, referring to the dashed line structure shown in FIG16, the line connecting to the reference voltage can be of the same metal layer as the main gate 213, and the line connecting to the reference voltage is connected to the auxiliary gate 310 through the auxiliary insulating layer 320. Alternatively, continuing to refer to the solid line structure shown in FIG16, the line connecting to the reference voltage can be of the same metal layer as the source 215 and drain 216, and the line connecting to the reference voltage is connected to the auxiliary gate 310 through the interlayer insulating layer 214, the gate dielectric layer 212, and the auxiliary insulating layer 320. This invention does not impose specific limitations on these aspects.

[0068] Referring to Figure 17, which is a schematic diagram of another display panel provided in an embodiment of the present invention, the selection transistor 210 can be a bottom-gate transistor, wherein the main gate 213 is located between the substrate 100 and the channel layer 211, and the selection transistor 210 includes: an interlayer insulating layer 214 located on the side of the auxiliary gate 310 away from the channel layer 211, and a source 215 and a drain 216 located on the side of the interlayer insulating layer 214 away from the channel layer 211. The source 215 and the drain 216 are both in contact with the channel layer 211 through the interlayer insulating layer 214 and the auxiliary insulating layer 320. That is, the display panel includes a substrate 100; a gate metal layer on the substrate 100, the gate metal layer including a main gate 213; a gate dielectric layer 212 on the side of the gate metal layer away from the substrate 100; a semiconductor layer on the side of the gate dielectric layer 212 away from the substrate 100, the semiconductor layer including a channel layer 211; an auxiliary insulating layer 320 on the side of the semiconductor layer away from the substrate 100; an auxiliary metal layer on the side of the auxiliary insulating layer 320 away from the substrate 100, the auxiliary metal layer including an auxiliary gate 310; an interlayer insulating layer 214 on the side of the auxiliary metal layer away from the substrate 100; and a source / drain metal layer on the side of the interlayer insulating layer 214 away from the substrate 100, the source / drain metal layer including a source 215 and a drain 216.

[0069] The auxiliary gate 310 needs to be connected to a reference voltage. The line connecting to the reference voltage can be a metal layer of the same layer as the auxiliary gate 310. Alternatively, referring to Figure 18, the line connecting to the reference voltage can be a metal layer of the same layer as the source 215 and drain 216, and the line connecting to the reference voltage is connected to the auxiliary gate 310 through the interlayer insulating layer 214, the gate dielectric layer 212, and the auxiliary insulating layer 320. This invention does not impose specific limitations on this. Referring to Figure 19, which is a schematic diagram of another display panel structure provided by an embodiment of the present invention, the display panel may further include a buffer layer 300 located on the substrate 100. After the buffer layer 300 is formed on the substrate 100, subsequent structural layers are fabricated, thereby preventing impurities on the substrate 100 from entering the channel layer 211 and affecting device performance.

[0070] Based on the same inventive concept, embodiments of the present invention also provide an electronic device, which includes the display panel provided in any of the above embodiments. Referring to FIG20, a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention is shown, wherein the electronic device 1000 can be a mobile terminal, and the electronic device 1000 includes the display panel provided in any of the above embodiments.

[0071] It should be noted that the electronic device can also be a laptop, tablet, computer, wearable device, etc., and the present invention does not impose specific limitations on it.

[0072] This invention provides a display panel and an electronic device. The display panel includes a substrate and a plurality of multiplexers located on the substrate. Each multiplexer includes a plurality of selection transistors. The source and drain of each selection transistor are electrically connected to a data signal terminal and a data line, respectively. Each selection transistor includes: a channel layer located on the substrate; a gate dielectric layer located on one side of the channel layer; and a main gate located on the side of the gate dielectric layer opposite to the channel layer. The main gate is connected to a selection control signal. At least one auxiliary gate is included on the side of the channel layer opposite to the gate dielectric layer. An auxiliary insulating layer is included between the auxiliary gate and the channel layer. The orthographic projection of the auxiliary gate onto the substrate and the orthographic projection of the channel layer onto the substrate have at least a partially overlapping area. The auxiliary gate is connected to a reference voltage.

[0073] As described above, the technical solution provided by this invention provides an auxiliary gate on the side of the channel layer away from the gate dielectric layer, thereby improving the data signal transmission capability of the multiplexer. Specifically, by jointly controlling the current flow in the channel through the main gate and the auxiliary gate, the response speed of the selection transistor is improved, and the threshold voltage of the selection transistor is reduced. This, in turn, increases the current transmitted from the selection transistor to the data line, improving the charging effect of the data line on its connected pixel units, ultimately optimizing the display effect of the display panel. Furthermore, the auxiliary gate also acts as an electrostatic shield, suppressing the characteristic drift of the selection transistor caused by electrostatic discharge.

[0074] Those skilled in the art will understand that the above embodiments are exemplary and not restrictive. Different technical features appearing in different embodiments can be combined to achieve beneficial effects. Based on a study of the drawings, specification, and claims, those skilled in the art should be able to understand and implement other variations of the disclosed embodiments. In the claims, the term "comprising" does not exclude other means or steps; "article" without the use of a quantifier is intended to include one or more articles and can be used interchangeably with "one or more articles"; the terms "first" and "second" are used to identify names and not to indicate any particular order. Any reference numerals in the claims should not be construed as limiting the scope of protection. The functionality of multiple parts appearing in the claims can be implemented by a single hardware or software module. The appearance of certain technical features in different dependent claims does not mean that these technical features cannot be combined to achieve beneficial effects.

Claims

1. A display panel, the display panel comprising a substrate and a plurality of multiplexers located on the substrate, the multiplexers comprising a plurality of selection transistors, the source and drain of the selection transistors being electrically connected to a data signal terminal and a data line, respectively, the selection transistor comprising: A channel layer located on the substrate, a gate dielectric layer located on one side of the channel layer, and a main gate located on the side of the gate dielectric layer opposite to the channel layer, wherein the main gate is connected to a selection control signal; At least one of the channel layers includes an auxiliary gate on the side opposite to the gate dielectric layer, and an auxiliary insulating layer is included between the auxiliary gate and the channel layer. The auxiliary gate and the orthographic projection on the substrate have at least a partially overlapping region with the orthographic projection of the channel layer on the substrate. The auxiliary gate is connected to a reference voltage.

2. The display panel according to claim 1, wherein, The display panel includes a plurality of pixel units, each pixel unit including a pixel driving circuit electrically connected to the data line and a light-emitting element electrically connected to the pixel driving circuit; The light-emitting element is a red light-emitting element, a green light-emitting element, or a blue light-emitting element. The selection transistor corresponding to the red light-emitting element is defined as a red light selection transistor, the selection transistor corresponding to the green light-emitting element is defined as a green light selection transistor, and the selection transistor corresponding to the blue light-emitting element is defined as a blue light selection transistor. At least one of the red light selection transistors includes an auxiliary gate on the side of its channel layer away from the gate dielectric layer, and the auxiliary gate and its orthographic projection on the substrate have at least a partially overlapping region with the orthographic projection of the channel layer on the substrate; and / or, at least one of the blue light selection transistors includes an auxiliary gate on the side of its channel layer away from the gate dielectric layer, and the auxiliary gate and its orthographic projection on the substrate have at least a partially overlapping region with the orthographic projection of the channel layer on the substrate.

3. The display panel according to claim 2, wherein, The reference voltage corresponding to the red light selection transistor is defined as the red light reference voltage, and the reference voltage corresponding to the blue light selection transistor is defined as the blue light reference voltage; The red light reference voltage and the blue light reference voltage are the same fixed voltage.

4. The display panel according to claim 2, wherein, The reference voltage corresponding to the red light selection transistor is defined as the red light reference voltage, and the reference voltage corresponding to the blue light selection transistor is defined as the blue light reference voltage; The red light reference voltage and the blue light reference voltage are different fixed voltages.

5. The display panel according to claim 2, wherein, At least one of the green light selection transistors further includes an auxiliary gate on the side of the channel layer away from the gate dielectric layer, and the auxiliary gate and its orthographic projection on the substrate have at least a partially overlapping region with the orthographic projection of the channel layer on the substrate.

6. The display panel according to claim 5, wherein, The reference voltage corresponding to the red light selection transistor is defined as the red light reference voltage, the reference voltage corresponding to the blue light selection transistor is defined as the blue light reference voltage, and the reference voltage corresponding to the green light selection transistor is defined as the green light reference voltage; The red light reference voltage and the blue light reference voltage are the same fixed voltage, and the red light reference voltage and the blue light reference voltage are different fixed voltages from the green light reference voltage.

7. The display panel according to claim 5, wherein, The reference voltage corresponding to the red light selection transistor is defined as the red light reference voltage, the reference voltage corresponding to the blue light selection transistor is defined as the blue light reference voltage, and the reference voltage corresponding to the green light selection transistor is defined as the green light reference voltage; The red light reference voltage, the blue light reference voltage, and the green light reference voltage are different fixed voltages.

8. The display panel according to claim 1, wherein, The display panel includes a display area and a non-display area located outside the display area; the data line is located in the non-display area and extends along a first direction; the plurality of multiplexers are located in the non-display area, and the plurality of multiplexers are located on the same side of the display area in the first direction; The display area is divided into multiple sub-display areas along the first direction, wherein when the data line transmits data signals to the pixel units of different sub-display areas, the reference voltage is a different fixed voltage.

9. The display panel according to claim 8, wherein, The selection transistor is an N-type transistor, wherein, in the direction from the display area to the multiplexer, when the data lines sequentially transmit data signals to the pixel units of the sub-display area, the reference voltage shows a decreasing trend.

10. The display panel according to claim 8, wherein, The selection transistor is a P-type transistor, wherein, in the direction from the display area to the multiplexer, when the data lines sequentially transmit data signals to the pixel units of the sub-display area, the reference voltage shows an increasing trend.

11. The display panel according to claim 1, wherein, The auxiliary gate is located between the substrate and the channel layer. The selection transistor includes an interlayer insulating layer located on the side of the main gate away from the channel layer, and a source and a drain located on the side of the interlayer insulating layer away from the channel layer. The source and the drain are both in contact with the channel layer through the interlayer insulating layer.

12. The display panel according to claim 11, wherein, The orthogonal projection of the auxiliary gate onto the substrate at least covers the orthogonal projection of the channel layer onto the substrate.

13. The display panel according to claim 11, wherein, At least two adjacent auxiliary gates extend and connect to each other.

14. The display panel according to claim 1, wherein, The main gate is located between the substrate and the channel layer. The selection transistor includes: an interlayer insulating layer located on the side of the auxiliary gate away from the channel layer, and a source and a drain located on the side of the interlayer insulating layer away from the channel layer. The source and the drain are both in contact with the channel layer through the interlayer insulating layer.

15. An electronic device comprising a display panel as described in any one of claims 1-14.

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