Backplane monitoring method, computer non-volatile readable storage medium, electronic device and computer program product

By acquiring backplane status information through programmable devices and instructing the BMC to read it, the problem of the motherboard BMC design logic depending on the backplane design is solved, realizing efficient backplane monitoring and flexible design.

WO2026045506A1PCT designated stage Publication Date: 2026-03-05INSPUR SUZHOU INTELLIGENT TECH CO LTD
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-06-18
Publication Date
2026-03-05

AI Technical Summary

Technical Problem

The design logic of the motherboard BMC is highly dependent on the backplane design logic of the server, resulting in low monitoring efficiency and the need for redesign every time the backplane solution changes, which reduces development efficiency.

Method used

The backplane status information is obtained through programmable devices, and instructions are sent to the motherboard BMC through input/output interfaces to realize the monitoring of the backplane and decouple the design logic of the BMC from that of the backplane.

Benefits of technology

It improves backplane monitoring efficiency, avoids BMC directly monitoring the backplane, reduces design dependencies, and enhances development efficiency and flexibility.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiments of the present application relate to the field of computers. Provided are a backplane monitoring method, a storage medium, an electronic device and a computer program product. The backplane monitoring method is applied to a programmable device in a server. The method comprises: acquiring backplane state information of a backplane of a server, wherein target information in the backplane state information is information obtained by a programmable device by means of a controller, and the target information is information detected using a bus; and when it is determined, by means of the backplane state information, that the state of the backplane is an abnormal state, sending a target instruction to a baseboard management controller (BMC) of a motherboard by means of a first input / output interface, in order to instruct the BMC to read the backplane state information of the backplane, wherein the first input / output interface is an input / output interface for communication between the programmable device and the BMC. The solution solves the problem of the design logic of a BMC of a motherboard being highly dependent on the design logic of a backplane of a server.
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Description

Backplane monitoring methods, computer non-volatile readable storage media, electronic devices and computer program products

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411184196.4, filed on August 27, 2024, entitled “Backplane Monitoring Method, Storage Medium, Electronic Device and Computer Program Product”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of computers, and in particular to a backplane monitoring method, a computer non-volatile readable storage medium, an electronic device, and a computer program product. Background Technology

[0004] In modern data centers, servers are an indispensable component, and as business demands continue to grow, server architectures are becoming increasingly complex. The backplane is an essential part of the server architecture; its main function is to connect the motherboard and related storage devices, and it also serves as a channel for data transmission from the motherboard.

[0005] In related technologies, the Baseboard Management Controller (BMC) on the motherboard needs to monitor all the hard drives, complex programmable logic devices (CPLDs), sensors, and other devices mounted on the backplane. However, the hardware is bulky, and the BMC's monitoring efficiency is low. Furthermore, whenever the backplane design (such as the number of hard drives) changes, the motherboard's BMC needs to be redesigned to reimplement backplane monitoring. These hardware changes significantly impact the motherboard's design logic, greatly reducing development efficiency.

[0006] There is a technical issue in the related technologies where the design logic of the motherboard BMC is highly dependent on the design logic of the server's backplane. Summary of the Invention

[0007] This application provides a backplane monitoring method, a computer non-volatile readable storage medium, an electronic device, and a computer program product to at least solve the problem that the design logic of the motherboard BMC is highly dependent on the design logic of the server's backplane.

[0008] According to a first aspect of the embodiments of this application, a backplane monitoring method is provided, applied to a programmable device in a server, comprising: acquiring backplane status information of the server's backplane, wherein target information in the backplane status information is information acquired by the programmable device through a controller, and the target information is information monitored using a bus; when the backplane status is determined to be an abnormal state through the backplane status information, sending a target instruction to the baseboard management controller (BMC) of the motherboard through a first input / output interface to instruct the BMC to read the backplane status information of the backplane, wherein the first input / output interface is an input / output interface for communication between the programmable device and the BMC.

[0009] In one exemplary embodiment, the controller is a microcontroller unit (MCU).

[0010] In an exemplary embodiment, obtaining backplane status information of the server's backplane includes: obtaining specified information through an input / output interface, wherein the specified information includes: the presence status of the backplane cables connected to the backplane, the output voltage of the voltage regulator in the backplane, the presence status of the hard drive in the backplane, and the power-on / off information of the hard drive in the backplane; obtaining target information from the controller through a first bus, wherein the target information includes: backplane temperature information obtained by the controller from a temperature sensor in the backplane through a second bus, and hard drive status information obtained by the controller from the hard drive in the backplane through a third bus; the first bus is a bus for communication between the programmable device and the controller, the second bus is a bus for communication between the controller and the temperature sensor, and the third bus is a bus for communication between the controller and the hard drive; wherein the backplane status information includes the specified information and the target information.

[0011] In an exemplary embodiment, obtaining target information from the controller via the first bus includes: the controller performing filtering, verification, and packetization operations on the obtained backplane temperature information and hard disk status information to obtain the target information, and the controller sending the target information to the programmable device via the first bus.

[0012] In an exemplary embodiment, obtaining specified information through input / output interfaces includes: obtaining the connection status of pins in a target connector in the backplane through a second input / output interface to determine the presence status of the backplane cable connected to the backplane, wherein the second input / output interface is an input / output interface for communication between the programmable device and the target connector, and the target connector is configured to connect the backplane and the motherboard; obtaining the output voltage of a voltage regulator in the backplane through a third input / output interface, wherein the voltage regulator is configured to convert the voltage transmitted from the motherboard to the backplane, and the third input / output interface is an input / output interface for communication between the programmable device and the voltage regulator; obtaining the presence status of a hard disk in the backplane through a fourth input / output interface, wherein the fourth input / output interface is an input / output interface for communication between the programmable device and the hard disk; and obtaining the power-on / off information of the hard disk in the backplane from a thermal fuse in the backplane through a fifth input / output interface, wherein the fifth input / output interface is an input / output interface for communication between the programmable device and the thermal fuse.

[0013] In an exemplary embodiment, after obtaining the output voltage of the voltage regulator in the backplane through the third input / output interface, the process includes: the programmable device processing the output voltage through an internal analog-to-digital conversion module to obtain the state of the backplane; and reporting the state of the backplane to the substrate management controller.

[0014] In an exemplary embodiment, the method further includes: determining the state of the backplane by: determining the backplane state as abnormal when the backplane cable presence status in the backplane state information indicates that the backplane cable is not in place; determining the backplane state as abnormal when the voltage fluctuation of the voltage regulator output voltage in the backplane state information exceeds a first preset threshold; determining the backplane state as abnormal when the hard drive presence status in the backplane state information indicates that the hard drive is not in place; determining the backplane state as abnormal when the power-on / off information in the backplane state information indicates that the hard drive is abnormally powered on or off; determining the backplane state as abnormal when the backplane temperature information in the backplane state information indicates that the backplane temperature exceeds a second preset threshold; and determining the backplane state as abnormal when the hard drive status information in the backplane state information indicates that the hard drive is reporting an error.

[0015] In an exemplary embodiment, after obtaining the backplane status information of the server's backplane, the method further includes: sending the backplane status information to the processor of the motherboard through a target serial peripheral interface; wherein, the target serial peripheral interface is a serial peripheral interface for communication between a programmable device and the processor, and after obtaining the backplane status information, the processor stores the backplane status information in the motherboard's flash memory card.

[0016] In an exemplary embodiment, the method further includes: upon receiving a power-on / off command from the BMC via the fourth bus, sending a power-on / off signal corresponding to the power-on / off command to a thermal fuse in the backplane via a fifth input / output interface, so as to power on / off the target hard drive in the backplane via the thermal fuse; wherein the fourth bus is a bus for communication between the programmable device and the BMC, the fifth input / output interface is an input / output interface for communication between the programmable device and the thermal fuse, and the power-on / off command is used to instruct the target hard drive in the backplane to power on / off.

[0017] In an exemplary embodiment, after sending a target instruction to the baseboard management control (BMC) of the motherboard via the first input / output interface, the method further includes: if an acquisition instruction sent by the BMC is obtained via the fourth bus, sending backplane status information stored in the backplane's memory to the BMC via the fourth bus; wherein, the acquisition instruction is used to instruct the acquisition of the backplane status information, the fourth bus is a bus for communication between the programmable device and the BMC, and the backplane status information is stored in the memory when the backplane status is abnormal.

[0018] In an exemplary embodiment, the method further includes: when a lighting command sent by the BMC is obtained via the fourth bus, a control command is sent to the target status light via the sixth input / output interface to light up the target status light; wherein the fourth bus is a bus for communication between the programmable device and the BMC, the sixth input / output interface is an input / output interface for communication between the programmable device and the target status light, the lighting command is used to instruct the target status light in the backplane to be lit up, and when the target status light is lit up, the target hard disk in the backplane is in the target state.

[0019] In an exemplary embodiment, before sending the target instruction to the baseboard management control (BMC) of the motherboard through the first input / output interface, the method further includes: when the backplane is in an abnormal state and the backplane state information includes multiple types of information, determining the storage partition corresponding to each type of information in the backplane's memory; and storing each type of information in the corresponding storage partition of the memory.

[0020] In an exemplary embodiment, storing each type of information into a corresponding storage partition of the memory includes: storing information in the backplane status information indicating the connection status of pins in the target connector in the backplane and the output voltage of the voltage regulator in the backplane into a first storage partition of the memory; and storing backplane temperature information and hard disk status information in the backplane status information into a second storage partition of the memory.

[0021] In an exemplary embodiment, after obtaining the backplane status information of the server's backplane, the method further includes: if the backplane status information is the initial status information obtained by the programmable device for the first time after being connected to power, sending a target instruction to the BMC through a first input / output interface.

[0022] In an exemplary embodiment, after obtaining the backplane status information of the server's backplane, the method further includes: if the backplane status is determined to be normal through the backplane status information, determining the time interval between the current time and the target time, wherein the target time is the time when the programmable device last sent a target instruction to the BMC; if the time interval is greater than a preset time interval, sending the target instruction to the BMC through the first input / output interface.

[0023] In an exemplary embodiment, the method further includes: before sending a target instruction to the BMC through the first input / output interface, storing backplane status information in the backplane's memory if the time interval is greater than a preset time interval.

[0024] According to a second aspect of the embodiments of this application, a backplane monitoring device is also provided, applied to a programmable device in a server, comprising: an acquisition module configured to acquire backplane status information of the server's backplane, wherein target information in the backplane status information is information acquired by the programmable device through a controller, and the target information is information monitored using a bus; and a transmission module configured to, when determining that the backplane status is abnormal through the backplane status information, send a target instruction to the baseboard management controller (BMC) of the motherboard through a first input / output interface to instruct the BMC to read the backplane status information, wherein the first input / output interface is an input / output interface for communication between the programmable device and the BMC.

[0025] In an exemplary embodiment, a target instruction is sent to the baseboard management controller (BMC) of the motherboard via a first input / output interface, including controlling the voltage level of a pin of the first input / output interface to decrease to a low level, wherein the low level is 0V.

[0026] According to a third aspect of the embodiments of this application, a computer non-volatile readable storage medium is also provided, wherein a computer program is stored in the computer non-volatile readable storage medium, wherein the computer program is configured to execute the steps in any of the above method embodiments when running.

[0027] According to a fourth aspect of the embodiments of this application, an electronic device is also provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0028] According to a fifth aspect of the embodiments of this application, a computer program product is also provided, the computer program product including a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0029] This application uses a programmable device to obtain backplane status information and then instructs the BMC to read the backplane status information, thereby enabling the BMC on the motherboard to monitor the server's backplane. This avoids the BMC directly monitoring the server's backplane, achieving a decoupled design between the BMC and the backplane. It solves the problem that the design logic of the motherboard BMC is highly dependent on the design logic of the server's backplane. In addition, since the target information in the backplane status information is also obtained through the controller, the monitoring efficiency of the backplane is improved. Attached Figure Description

[0030] The accompanying drawings, which are included to provide an understanding of this application and form part of this application, illustrate exemplary embodiments of this application and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0031] Figure 1 is a hardware structure block diagram of a server device for a backplane monitoring method according to an embodiment of this application;

[0032] Figure 2 is a schematic diagram of the topology of a conventional server motherboard and backplane according to an embodiment of this application;

[0033] Figure 3 is a flowchart of a backplane monitoring method according to an embodiment of this application;

[0034] Figure 4 is a schematic diagram of the topology of a server motherboard and backplane according to an embodiment of this application;

[0035] Figure 5 is a schematic diagram of another server motherboard and backplane topology according to an embodiment of this application;

[0036] Figure 6 is a schematic diagram of a programmable device implementation logic according to an embodiment of this application;

[0037] Figure 7 is a structural block diagram of a backplane monitoring device according to an embodiment of this application;

[0038] Figure 8 is a schematic diagram of the structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0039] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0040] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0041] The backplane monitoring method embodiments provided in this application can be executed in a server device or similar computing device. Taking a server device as an example, FIG1 is a hardware structure block diagram of a server device for a backplane monitoring method according to an embodiment of this application. As shown in FIG1, the server device may include one or more (only one is shown in FIG1) processors 102 (processor 102 may include, but is not limited to, microprocessors MCU or programmable logic devices FPGA, etc.) and a memory 104 configured to store data. The server device may also include a transmission device 106 configured for communication and an input / output device 108. Those skilled in the art will understand that the structure shown in FIG1 is only illustrative and does not limit the structure of the server device. For example, the server device may also include more or fewer components than shown in FIG1, or have a different configuration than shown in FIG1.

[0042] The memory 104 may be configured to store computer programs, such as application software programs and modules, like the computer program corresponding to the backplane monitoring method in this embodiment. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, thereby implementing the aforementioned method. The memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may include memory remotely located relative to the processor 102, and these remote memories can be connected to server devices via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0043] The transmission device 106 is configured to receive or send data via a network. Optional examples of the network may include a wireless network provided by the communication provider of the server device. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module for wireless communication with the Internet.

[0044] In traditional backplane design schemes, referring to the traditional server backplane topology shown in Figure 2, the BMC on the motherboard only accesses devices such as sensors, electrically erasable programmable read-only memory (EEPROM), CPLD, and non-volatile memory host controller interface standard (NVME) hard drives on the backplane through the I2C (Inter-Integrated Circuit, serial communication) bus to obtain status information on the backplane and thus monitor the backplane. Since the number of hard drives, I2C device types, and addresses vary in different backplane designs, the BMC needs to be redesigned every time the backplane configuration is changed. In other words, the design logic of the motherboard BMC is highly dependent on the design logic of the server's backplane, thereby extending the development cycle and reducing development efficiency.

[0045] To address the aforementioned problems in related technologies, this embodiment provides a backplane monitoring method applied to programmable devices in a server, as shown in Figure 3. The process includes the following steps S302-S304:

[0046] Step S302: Obtain the backplane status information of the server's backplane, wherein the target information in the backplane status information is the information obtained by the programmable device through the controller, and the target information is the information monitored using the bus;

[0047] In some embodiments, the controller is a microcontroller unit (MCU), and the bus includes, but is not limited to, a serial communication bus.

[0048] In some embodiments, programmable devices include, but are not limited to, programmable logic devices (CPLDs) and field-programmable gate arrays (FPGAs).

[0049] In some embodiments, referring to Figure 5, the CPLD is connected to the microcontroller unit (MCU) via an I2C bus. Devices with I2C bus transmission capabilities on the backplane are mounted on the MCU's I2C bus. The MCU directly accesses the mounted field replaceable units (FRUs), thermal sensors, hard drives, and other devices through the I2C master control module. It is configured to acquire target information such as backplane temperature and hard drive status, thereby realizing the management and monitoring of the backplane.

[0050] It's important to note that the MCU, acting as the I2C master, can easily access the code of I2C devices with relatively low resource consumption. The programmable device, on the other hand, boasts abundant input / output (I / O) port resources and stable performance, enabling in-situ monitoring of various pluggable devices on the backplane, such as status indicator lights and voltage monitoring, as well as communication with the BMC. By rationally dividing the functions of the programmable device and the MCU, a decoupling design between the uplink and BMC is achieved, along with overall backplane management in the downlink direction. This improves the flexibility and versatility of the backplane design, while also increasing the efficiency of backplane monitoring.

[0051] Step S304: If the backplane status is determined to be abnormal through the backplane status information, a target instruction is sent to the baseboard management controller (BMC) of the motherboard through the first input / output interface to instruct the BMC to read the backplane status information. The first input / output interface is the input / output interface for communication between the programmable device and the BMC.

[0052] In some embodiments, the input / output interface is a general purpose input / output (GPIO) interface. Referring to Figure 5, the hardware connection between the CPLD in the backplane and the BMC of the motherboard includes, but is not limited to, one I2C bus and one GPIO interface. The I2C bus is used to realize data transmission between the CPLD in the backplane and the BMC of the motherboard. When the CPLD detects an abnormal state in the backplane, it will actively pull down the first input / output interface to promptly notify the BMC. At this time, the BMC will read the log information (such as the backplane status information) stored in the flash memory. That is to say, the BMC does not need to poll the backplane. When the backplane is abnormal, the CPLD will actively notify the BMC of the abnormality.

[0053] It should be noted that active pull-down refers to lowering the voltage level of a GPIO pin to a low level (usually 0V) under specific conditions by setting relevant control signals to achieve a specific control purpose. Pulling GPIO signals low is typically used to transmit control or status information to enable communication and cooperation between devices.

[0054] The above steps, by using programmable devices to obtain backplane status information and then instructing the BMC to read the backplane status information, enable the BMC on the motherboard to monitor the server's backplane. This avoids the BMC directly monitoring the server's backplane, thus achieving a decoupled design between the BMC and the backplane. This solves the problem that the design logic of the motherboard's BMC is highly dependent on the design logic of the server's backplane. In addition, since the target information in the backplane status information is also obtained through the controller, the monitoring efficiency of the backplane is improved.

[0055] In an exemplary embodiment, the acquisition of the backplane status information of the server can be achieved through the following steps S11-S12:

[0056] Step S11: Obtain specified information through the input / output interface, wherein the specified information includes: the presence status of the backplane cable connected to the backplane, the output voltage of the voltage regulator in the backplane, the presence status of the hard drive in the backplane, and the power-on / off information of the hard drive in the backplane.

[0057] In an exemplary embodiment, the above-mentioned acquisition of specified information through the input / output interface can be achieved through the following steps S111 to S114:

[0058] Step S111: Obtain the connection status of the pins in the target connector in the backplane through the second input / output interface to determine the presence status of the backplane cable connected to the backplane. The second input / output interface is the input / output interface for communication between the programmable device and the target connector. The target connector is configured to connect the backplane and the motherboard.

[0059] In some embodiments, referring to FIG5, the programmable device is connected to a target connector (e.g., a cable connector) in the backplane via a second input / output interface (GPIO_5 in FIG5) to determine the presence status of the backplane cable connected to the backplane. If the connection status of the pin in the target connector is high, the backplane cable connected to the backplane is connected normally; if the connection status of the pin in the target connector is low, the backplane cable connected to the backplane is not connected.

[0060] Step S112: Obtain the output voltage of the voltage regulator in the backplane through the third input / output interface, wherein the voltage regulator is configured to convert the voltage transmitted from the motherboard to the backplane, and the third input / output interface is the input / output interface for communication between the programmable device and the voltage regulator.

[0061] In some embodiments, referring to FIG5, the programmable device is connected to the voltage regulator (VR) via the third input / output interface (GPIO_4 in FIG5). The programmable device thereby obtains the output voltage information of the voltage regulator in the backplane, processes the information through the internal analog-to-digital converter (ADC) module, performs logical judgment, and reports the corresponding backplane status to the BMC.

[0062] The output voltage of a voltage regulator depends on the model and design parameters, and is generally a fixed voltage value or an adjustable voltage range.

[0063] Step S113: Obtain the presence status of the hard disk in the backplane through the fourth input / output interface, wherein the fourth input / output interface is the input / output interface for communication between the programmable device and the hard disk;

[0064] In some embodiments, referring to FIG5, the programmable device is connected to the hard disk drive (HDD) via the fourth input / output interface (GPIO_HDD_PRESENT_0~n in FIG5), thereby directly obtaining the presence status of the hard disk in the backplane.

[0065] Step S114: Obtain the power-on / off information of the hard drive in the backplane from the thermal fuse in the backplane through the fifth input / output interface, wherein the fifth input / output interface is the input / output interface for communication between the programmable device and the thermal fuse.

[0066] In some embodiments, referring to FIG5, the programmable device is connected to an electrically heated fuse (EFUSE) in the backplane via an input / output interface (GPIO_EFUSE_EN_0~n and / or GPIO_EFUSE_PG_0~n in FIG5). The EFUSE is connected to the hard disk drive via PWR_0~n. The programmable device obtains the power-on / off information of the hard disk drive in the backplane from the EFUSE via GPIO_EFUSE_PG_0~n.

[0067] It should be noted that the steps S111 to S114 described above are not executed in any particular order when implementing the embodiments of this application.

[0068] It should be noted that through the above steps, the programmable device can obtain a series of hardware information on the backplane through the input / output interface, thereby realizing the monitoring of the backplane status. Since different specified information is obtained through different input / output interfaces, the efficiency of the programmable device in obtaining specified information is improved, thereby improving the monitoring efficiency of the backplane.

[0069] Step S12: Obtain target information from the controller via the first bus, wherein the target information includes: backplane temperature information obtained by the controller from the temperature sensor in the backplane via the second bus, and hard disk status information obtained by the controller from the hard disk in the backplane via the third bus; the first bus is the bus for communication between the programmable device and the controller, the second bus is the bus for communication between the controller and the temperature sensor, and the third bus is the bus for communication between the controller and the hard disk.

[0070] The backplane status information includes specified information and target information.

[0071] In some embodiments, referring to FIG5, the MCU is connected to the programmable device via a first bus (I2C_CPLD in FIG5), thereby enabling the programmable device to communicate with the MCU to obtain target information; the MCU is connected to the temperature sensor via a second bus (I2C_Sensor in FIG5), thereby obtaining backplane temperature information through the temperature sensor; the MCU is connected to the hardware via a third bus (I2C_HDD_0~n in FIG5), thereby obtaining hard disk status information, such as hard disk capacity, current hard disk status, hard disk operating time, etc.

[0072] It should be noted that, since each hard drive transmits a large amount of information to the programmable device via the bus, the controller will perform certain processing on the acquired target information (such as filtering, verification, and packetization) before sending it to the programmable device via the I2C bus.

[0073] It should be noted that the above steps S11 and S12 are not executed in any particular order when performing the embodiments of this application.

[0074] It should be noted that through the above steps S11 and S12, the programmable device obtains the backplane status information and realizes the monitoring of the backplane. Since the programmable device and the controller are used at the same time to obtain the backplane status information, the advantages of the CPLD's large number of pins, stable operation and rich controller functions are fully utilized, thereby greatly improving the monitoring and management capabilities of the backplane's operating status.

[0075] In an exemplary embodiment, the method further includes determining the state of the backplane through steps S21 to S26:

[0076] Step S21: If the backplane cable presence status in the backplane status information is used to indicate that the backplane cable is not in place, determine that the backplane status is abnormal.

[0077] Step S22: If the voltage fluctuation of the output voltage of the voltage regulator in the backplane status information exceeds the first preset threshold, the backplane status is determined to be an abnormal state.

[0078] Step S23: If the hard drive presence status in the backplane status information is used to indicate that the hard drive is not present, determine that the backplane status is abnormal.

[0079] Step S24: If the power-on / off information in the backplane status information is used to indicate abnormal power-on / off of the hard drive, determine that the backplane status is abnormal.

[0080] Step S25: If the backplane temperature information in the backplane status information indicates that the backplane temperature exceeds the second preset threshold, determine that the backplane status is abnormal.

[0081] Step S26: If the hard disk status information in the backplane status information indicates a hard disk error, determine that the backplane status is abnormal.

[0082] It should be noted that through the above steps S21 to S26, the status of the backplane can be quickly and accurately determined, so that when the status of the backplane is abnormal, the status of the backplane can be informed to the BMC in a timely manner so that the abnormality can be handled in a timely manner.

[0083] In an exemplary embodiment, after obtaining the backplane status information of the server's backplane as described above, the method further includes the following steps: sending the backplane status information to the processor of the motherboard through a target serial peripheral interface; wherein, the target serial peripheral interface is a serial peripheral interface for communication between a programmable device and the processor, and after obtaining the backplane status information, the processor stores the backplane status information in the motherboard's flash memory card.

[0084] In some embodiments, the processor described above is a dual microprocessor unit (DMPU).

[0085] In some embodiments, referring to Figure 5, the CPLD on the backplane communicates with the DMPU on the motherboard via the Serial Peripheral Interface (SPI) bus, and can transmit backplane status information (such as hard disk status, hard disk in place, cable in place, backplane voltage, backplane temperature, etc.) to the DMPU in real time. The DMPU stores the acquired information in a Trans Flash (TF) card.

[0086] It should be noted that the above steps enable real-time and long-term recording of backplane status information, thereby providing effective data support for rapid backplane fault diagnosis.

[0087] In an exemplary embodiment, the method further includes the following steps: upon receiving a power-on / off command from the BMC via the fourth bus, sending a power-on / off signal corresponding to the power-on / off command to the thermal fuse in the backplane via the fifth input / output interface, so as to power on / off the target hard drive in the backplane via the thermal fuse; wherein, the fourth bus is a bus for communication between the programmable device and the BMC, the fifth input / output interface is an input / output interface for communication between the programmable device and the thermal fuse, and the power-on / off command is used to instruct the target hard drive in the backplane to power on / off.

[0088] In some embodiments, referring to FIG5, the programmable device in the backplane communicates with the BMC of the motherboard via the fourth bus (I2C_BMC in FIG5). The BMC sends power-on / off commands to the programmable device via this bus. After receiving the power-on / off commands, the programmable device sends power-on / off signals corresponding to the power-on / off commands to the thermal fuses on the board via the fifth input / output interface (GPIO_EFUSE_EN_0~n in FIG5). After receiving the power-on / off signals, the thermal fuses send corresponding power-on / off commands to the target hard disk via PWR_0~n according to the power-on / off signals. After receiving the power-on / off commands, the target hard disk performs the corresponding power-on / off operations.

[0089] It should be noted that through the above steps, the BMC on the motherboard controls the hard drive on the backplane. It can also control other hardware devices on the backplane through similar steps. Since the control operation of the backplane is achieved through a programmable device, there is no need to redesign the BMC when the hardware on the backplane changes, which greatly reduces development costs and improves development efficiency.

[0090] In an exemplary embodiment, after sending the target instruction to the baseboard management control (BMC) of the motherboard via the first input / output interface, the method further includes the following steps: when the acquisition instruction sent by the BMC is obtained via the fourth bus, the backplane status information stored in the backplane memory is sent to the BMC via the fourth bus; wherein, the acquisition instruction is used to instruct the acquisition of the backplane status information, the fourth bus is a bus for communication between the programmable device and the BMC, and when the backplane status is abnormal, the backplane status information is stored in the memory.

[0091] In some embodiments, the memory is flash memory.

[0092] In other words, the BMC can retrieve the backplane status information stored in the flash memory through a programmable device, thereby quickly obtaining the backplane status information.

[0093] In an exemplary embodiment, the method further includes the following steps: when a lighting command sent by the BMC is obtained through the fourth bus, a control command is sent to the target status light through the sixth input / output interface to light up the target status light; wherein, the fourth bus is a bus for communication between the programmable device and the BMC, the sixth input / output interface is an input / output interface for communication between the programmable device and the target status light, the lighting command is used to instruct the target status light in the backplane to be lit up, and when the target status light is lit up, the target hard disk in the backplane is in the target state.

[0094] In some embodiments, when the BMC determines that the backplane is in an abnormal state, it sends a lamp-on command to the programmable device via the fourth bus.

[0095] In some embodiments, referring to FIG5, the programmable device communicates with the status lights (LED0~n) through the sixth input / output interface (GPIO_LED_0~n in FIG5). Upon receiving the lighting command sent by the BMC, the programmable device lights up the status lights to indicate the status of each hard disk.

[0096] In some embodiments, a status light is illuminated, and the status light displays different colors to indicate different states of the backplane and the hard drives on the backplane. For example, when the backplane is in an abnormal state, the status light will be displayed in red to remind the user to pay attention to and handle the backplane abnormality in a timely manner.

[0097] In an exemplary embodiment, before sending the target instruction to the motherboard's Baseboard Management Control (BMC) via the first input / output interface, the method further includes the following steps S31-S32:

[0098] Step S31: When the backplane is in an abnormal state and the backplane status information includes multiple types of information, determine the storage partition corresponding to each type of information in the backplane's memory.

[0099] Step S32: Store each type of information into the corresponding storage partition of the memory.

[0100] In some embodiments, the connection status of the pins in the target connector and the output voltage of the voltage regulator are stored in a first storage partition in the memory, and the backplane temperature information and hard disk status information are stored in a second storage partition in the memory.

[0101] It should be noted that the above steps enable partitioned storage of backplane status information in the memory. When the BMC needs to access the backplane status information stored in the memory, it can quickly and accurately obtain a certain type of information, thus improving the efficiency of obtaining backplane status information.

[0102] In an exemplary embodiment, after obtaining the backplane status information of the server's backplane as described above, the method further includes the following steps: if the backplane status information is the initial status information obtained by the programmable device for the first time after being connected to power, send a target instruction to the BMC through the first input / output interface.

[0103] In other words, when the backplane status information is the initial status information, the programmable device will instruct the BMC to obtain the backplane status information, and the BMC will retrieve the initial status information to complete the initial log recording of the backplane.

[0104] In an exemplary embodiment, after obtaining the backplane status information of the server's backplane as described above, the method further includes the following steps S41-S42:

[0105] Step S41: If the backplane status is determined to be normal through the backplane status information, determine the time interval between the current time and the target time, where the target time is the time when the programmable device last sent the target instruction to the BMC.

[0106] Step S42: If the time interval is greater than the preset time interval, send the target instruction to the BMC through the first input / output interface.

[0107] In some embodiments, when the preset time interval is 3 seconds, the BMC will acquire the backplane status information every 3 seconds.

[0108] In an exemplary embodiment, the method further includes the following steps: before sending the target instruction to the BMC through the first input / output interface, if the time interval is greater than a preset time interval, storing the backplane status information in the backplane's memory.

[0109] In some embodiments, when the preset time interval is 3 seconds, the programmable device will store the backplane status information of the backplane into the backplane memory every 3 seconds to ensure that the backplane status information obtained by the BMC is the latest updated backplane status information.

[0110] Obviously, the embodiments described above are only some embodiments of this application, and not all embodiments. To better understand the above method, the following description, in conjunction with embodiments, illustrates the process, but is not intended to limit the technical solutions of the embodiments of this application. In some embodiments:

[0111] To address the aforementioned issues, this application provides a server backplane topology design. Referring to Figure 4, this design uses an MCU as the main control chip on the backplane to collect backplane information. The MCU has superior programming performance and rich user functions, and can communicate with the motherboard BMC via the I2C bus. However, due to the limitations of the MCU's I / O interface resources, using only an MCU as the main control chip is difficult to apply to server backplanes with a large number of hard drives and complex functions.

[0112] To address the aforementioned issues, this invention also provides a server backplane monitoring method based on decoupling design. When the programmable device is a CPLD, the controller is an MCU, the bus is an I2C bus, and the processor is a DMPU, Figure 5 illustrates another server motherboard and backplane topology of this solution, which will be described below:

[0113] I. Hardware Structure Design;

[0114] First, devices with I2C bus transmission capabilities on the backplane are connected to the MCU's I2C bus. The MCU, acting as the I2C Master, can easily access I2C devices with minimal resource consumption. Second, the CPLD on the backplane communicates with the BMC on the motherboard. Leveraging the CPLD's abundant I / O resources and stable performance, it can perform functions such as on-premises monitoring of various pluggable devices on the backplane, control of status indicator lights, and voltage monitoring. By rationally dividing the functions of the CPLD and MCU, a decoupling design between the uplink and BMC can be achieved, enabling overall management of the backplane in the downlink direction.

[0115] As shown in Figure 5, the CPLD obtains the output voltage of VR through the GPIO interface, performs logical judgment after processing by the internal ADC module, and reports the obtained backplane status to the BMC of the motherboard. The CPLD also obtains the presence status of each hard drive through the GPIO interface. At the same time, in order to indicate the status of each hard drive, the CPLD receives and parses the LED status information sent by the host computer (BMC) to control the LED status lights on the backplane hard drives.

[0116] The hardware connection between the backplane CPLD and the motherboard BMC includes one I2C bus and one GPIO. The I2C bus is used to realize data transmission between the backplane CPLD and the motherboard BMC. When the CPLD detects an abnormal state in the backplane, it will actively pull the GPIO low to inform the BMC of the abnormal state in a timely manner.

[0117] There is an SPI bus between the backplane CPLD and the motherboard DMPU. The CPLD can transmit the backplane status to the motherboard DMPU in real time through this SPI bus, and the DMPU chip records the relevant logs to the TF card.

[0118] The MCU obtains the status of I2C devices such as FRU, Thermal Sensor, and hard disk through the I2C bus, processes the information, and then transmits the relevant status information to the CPLD through I2C.

[0119] II. Implementation logic of MCU and CPLD;

[0120] Referring to Figure 6, fully leverage the advantages of the CPLD's numerous pins and stable operation, as well as the MCU's rich user functions, to significantly enhance the monitoring and management capabilities of the backplane's operating status:

[0121] 1. MCU manages backplane I2C devices;

[0122] The MCU directly accesses its attached FRU, Thermal Sensor, hard drive, and other devices via the I2C Master module. It is configured to acquire information such as board information, backplane temperature, and hard drive status to manage the backplane hard drives. Since each hard drive transmits a large amount of information to the CPLD via the I2C bus, the MCU processes the acquired information and then sends it to the CPLD via I2C.

[0123] 2. CPLD provides overall management of the backplane;

[0124] The CPLD accesses the MCU through the I2C Master module to obtain relevant information about the I2C devices on the backplane, thereby enabling the management of the backplane I2C devices;

[0125] CPLDs can acquire information such as the output voltage signal of the voltage conversion chip, the hard drive's presence status, and the cable's presence status through input / output interfaces.

[0126] The information obtained through I2C and the information obtained through the input / output interface are processed by the internal logic module of the CPLD and then reported to the BMC through I2C. At the same time, the backplane status information is reported to the motherboard DMPU in real time through the SPI bus and is set to be logged.

[0127] 3. Reporting of backplane status information and fault diagnosis;

[0128] The CPLD on the backplane communicates with the motherboard DMPU via the SPI bus, transmitting backplane status information to the DMPU in real time. The DMPU then stores the acquired information in a TF card. This backplane status information includes: hard drive status, hard drive presence, cable presence, backplane voltage, and backplane temperature. This function enables real-time, long-term recording of backplane status, providing data support for backplane fault diagnosis.

[0129] 4. BMC is decoupled from the backplane;

[0130] The BMC communicates with the backplane CPLD via one I2C bus and one GPIO, greatly reducing the number of I2C devices directly connected to the BMC. The I2C bus enables data transmission between the backplane CPLD and the motherboard BMC. The additional GPIO signal is used to actively pull the GPIO low when the CPLD detects an abnormal state on the backplane to notify the BMC in time. At this time, the BMC will send a command to the CPLD to read the log information stored in the CPLD's internal memory.

[0131] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the related technology, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods of the various embodiments of this application.

[0132] This embodiment also provides a backplane monitoring device, applied to a programmable device in a server, configured to implement the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the modules described in the following embodiments are preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0133] Figure 7 is a structural block diagram of a backplane monitoring device according to an embodiment of the present application. The device includes:

[0134] The acquisition module 702 is configured to acquire the backplane status information of the server's backplane, wherein the target information in the backplane status information is the information obtained by the programmable device through the controller, and the target information is the information monitored using the bus.

[0135] The sending module 704 is configured to send a target instruction to the baseboard management controller (BMC) of the motherboard through a first input / output interface when the backplane status is determined to be abnormal through the backplane status information, instructing the BMC to read the backplane status information of the backplane. The first input / output interface is the input / output interface for communication between the programmable device and the BMC.

[0136] The aforementioned device uses a programmable device to acquire backplane status information and then instructs the BMC to read the backplane status information, enabling the BMC on the motherboard to monitor the server's backplane. This avoids the BMC directly monitoring the server's backplane, thus decoupling the BMC from the backplane and solving the problem that the design logic of the motherboard's BMC is highly dependent on the design logic of the server's backplane. In addition, since the target information in the backplane status information is also acquired through the controller, the monitoring efficiency of the backplane is improved.

[0137] In an exemplary embodiment, the acquisition module 702 is further configured to acquire specified information via an input / output interface, wherein the specified information includes: the presence status of the backplane cable connected to the backplane, the output voltage of the voltage regulator in the backplane, the presence status of the hard drive in the backplane, and the power-on / off information of the hard drive in the backplane; and acquire target information from the controller via a first bus, wherein the target information includes: backplane temperature information acquired by the controller from the temperature sensor in the backplane via a second bus, and hard drive status information acquired by the controller from the hard drive in the backplane via a third bus; the first bus is a bus for communication between the programmable device and the controller, the second bus is a bus for communication between the controller and the temperature sensor, and the third bus is a bus for communication between the controller and the hard drive; wherein the backplane status information includes the specified information and the target information.

[0138] In an exemplary embodiment, the acquisition module 702 is further configured to acquire the connection status of pins in the target connector in the backplane via a second input / output interface to determine the presence status of the backplane cable connected to the backplane, wherein the second input / output interface is an input / output interface for communication between the programmable device and the target connector, and the target connector is configured to connect the backplane and the motherboard; acquire the output voltage of the voltage regulator in the backplane via a third input / output interface, wherein the voltage regulator is configured to convert the voltage transmitted from the motherboard to the backplane, and the third input / output interface is an input / output interface for communication between the programmable device and the voltage regulator; acquire the presence status of the hard drive in the backplane via a fourth input / output interface, wherein the fourth input / output interface is an input / output interface for communication between the programmable device and the hard drive; and acquire the power-on / off information of the hard drive in the backplane from the thermal fuse in the backplane via a fifth input / output interface, wherein the fifth input / output interface is an input / output interface for communication between the programmable device and the thermal fuse.

[0139] In an exemplary embodiment, the above-described apparatus further includes: a determining module configured to determine an abnormal state of the backplane when the backplane cable presence status in the backplane status information indicates that the backplane cable is not in place; to determine an abnormal state of the backplane when the voltage fluctuation of the voltage regulator output voltage in the backplane status information exceeds a first preset threshold; to determine an abnormal state of the backplane when the hard drive presence status in the backplane status information indicates that the hard drive is not in place; to determine an abnormal state of the backplane when the power-on / off information in the backplane status information indicates that the hard drive is not powered on or off; to determine an abnormal state of the backplane when the backplane temperature information in the backplane status information indicates that the backplane temperature exceeds a second preset threshold; and to determine an abnormal state of the backplane when the hard drive status information in the backplane status information indicates that the hard drive is reporting an error.

[0140] In an exemplary embodiment, the sending module 704 is further configured to send the backplane status information to the processor of the motherboard through a target serial peripheral interface after obtaining the backplane status information of the server's backplane; wherein, the target serial peripheral interface is a serial peripheral interface for communication between the programmable device and the processor, and after obtaining the backplane status information, the processor stores the backplane status information in the flash memory card of the motherboard.

[0141] In an exemplary embodiment, the sending module 704 is further configured to, upon receiving a power-on / off command from the BMC via the fourth bus, send a power-on / off signal corresponding to the power-on / off command to the thermal fuse in the backplane via the fifth input / output interface, so as to perform power-on / off operations on the target hard drive in the backplane through the thermal fuse; wherein, the fourth bus is the bus for communication between the programmable device and the BMC, the fifth input / output interface is the input / output interface for communication between the programmable device and the thermal fuse, and the power-on / off command is used to instruct the target hard drive in the backplane to be powered on or off.

[0142] In an exemplary embodiment, the sending module 704 is further configured to, after sending a target instruction to the baseboard management control (BMC) of the motherboard via the first input / output interface, and upon receiving an acquisition instruction sent by the BMC via the fourth bus, send backplane status information stored in the backplane's memory to the BMC via the fourth bus; wherein, the acquisition instruction is used to instruct the acquisition of the backplane status information, the fourth bus is a bus for communication between the programmable device and the BMC, and the backplane status information is stored in the memory when the backplane status is abnormal.

[0143] In an exemplary embodiment, the sending module 704 is further configured to send a control command to the target status light via the sixth input / output interface to light up the target status light when the light-up command sent by the BMC is obtained via the fourth bus; wherein, the fourth bus is the bus for communication between the programmable device and the BMC, the sixth input / output interface is the input / output interface for communication between the programmable device and the target status light, the light-up command is used to instruct the target status light in the backplane to be lit up, and when the target status light is lit up, the target hard disk in the backplane is in the target state.

[0144] In an exemplary embodiment, the above-described apparatus further includes: a storage module configured to, before sending a target instruction to the baseboard management control (BMC) of the motherboard via the first input / output interface, determine a storage partition corresponding to each type of information in the memory of the backplane when the backplane is in an abnormal state and the backplane state information includes multiple types of information; and store each type of information in the corresponding storage partition of the memory.

[0145] In an exemplary embodiment, the sending module 704 is further configured to send a target instruction to the BMC through the first input / output interface after acquiring the backplane status information of the server's backplane, provided that the backplane status information is the initial status information first acquired by the programmable device after being connected to power.

[0146] In an exemplary embodiment, the determining module is further configured to, after obtaining the backplane status information of the server's backplane, determine the time interval between the current time and the target time if the backplane status is determined to be normal through the backplane status information, wherein the target time is the time when the programmable device last sent a target instruction to the BMC; the sending module 704 is further configured to send the target instruction to the BMC through the first input / output interface if the time interval is greater than a preset time interval.

[0147] In an exemplary embodiment, the storage module is further configured to store backplane status information in the backplane's memory if the time interval is greater than a preset time interval, before sending the target instruction to the BMC through the first input / output interface.

[0148] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: the above modules can be located in the same processor; or, the modules can be located in different processors in any combination.

[0149] Embodiments of this application also provide a computer non-volatile readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when running.

[0150] In some embodiments, the computer program described above can be configured to perform the following steps:

[0151] S1, obtain the backplane status information of the server's backplane, wherein the target information in the backplane status information is the information obtained by the programmable device through the controller, and the target information is the information monitored using the bus.

[0152] S2, if the backplane status is determined to be abnormal through the backplane status information, a target instruction is sent to the baseboard management controller (BMC) of the motherboard through the first input / output interface to instruct the BMC to read the backplane status information. The first input / output interface is the input / output interface for communication between the programmable device and the BMC.

[0153] In one exemplary embodiment, the computer non-volatile readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0154] An embodiment of this application also provides an electronic device, as shown in FIG8, which includes a memory 802 and a processor 804. The memory 802 stores a computer program, and the processor 804 is configured to execute the steps of any of the above method embodiments through the computer program.

[0155] In some embodiments, the processor 804 described above may be configured to perform the following steps via a computer program:

[0156] S1, obtain the backplane status information of the server's backplane, wherein the target information in the backplane status information is the information obtained by the programmable device through the controller, and the target information is the information monitored using the bus.

[0157] S2, if the backplane status is determined to be abnormal through the backplane status information, a target instruction is sent to the baseboard management controller (BMC) of the motherboard through the first input / output interface to instruct the BMC to read the backplane status information. The first input / output interface is the input / output interface for communication between the programmable device and the BMC.

[0158] The optional examples in this embodiment can refer to the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0159] In some embodiments, those skilled in the art will understand that the structure shown in FIG8 is merely illustrative and does not limit the structure of the electronic device described above. For example, the electronic device may also include more or fewer components (such as network interfaces) than shown in FIG8, or have a different configuration than that shown in FIG8.

[0160] The memory 802 can be configured to store software programs and modules, such as the program instructions / modules corresponding to the backplane monitoring method and backplane monitoring device in this embodiment. The processor 804 executes various functional applications and data processing by running the software programs and modules stored in the memory 802, thereby realizing the aforementioned backplane monitoring method. The memory 802 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 802 may include memory remotely located relative to the processor 804, and these remote memories can be connected to the terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof. The memory 802 may, but is not limited to, be configured to store system configuration files and other information. As an example, as shown in FIG8, the memory 802 may, but is not limited to, include the acquisition module 702 and the transmission module 704 in the aforementioned backplane monitoring device. In addition, it may include, but is not limited to, other module units in the aforementioned backplane monitoring device, which will not be described in detail in this example.

[0161] In some embodiments, the transmission device 806 described above is configured to receive or transmit data via a network. Examples of network options include wired and wireless networks. In one example, the transmission device 806 includes a Network Interface Controller (NIC), which can be connected to other network devices and a router via a network cable to communicate with the Internet or a local area network. In another example, the transmission device 806 is a radio frequency (RF) module, configured to communicate wirelessly with the Internet.

[0162] In addition, the above-mentioned electronic device also includes: a display 808; and a connection bus 810 for connecting the various module components in the above-mentioned electronic device.

[0163] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0164] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0165] The embodiments described herein also provide a computer program that includes computer instructions stored in a computer non-volatile readable storage medium; a processor of a computer device reads the computer instructions from the computer non-volatile readable storage medium and executes the computer instructions, causing the computer device to perform the steps in any of the above method embodiments.

[0166] Obviously, those skilled in the art should understand that the modules or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented here, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0167] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A backplane monitoring method, characterized in that, Programmable devices used in servers include: Obtain the backplane status information of the server's backplane, wherein the target information in the backplane status information is the information obtained by the programmable device through the controller, and the target information is the information monitored using the bus; If the backplane status is determined to be abnormal based on the backplane status information, a target instruction is sent to the baseboard management controller (BMC) of the motherboard through the first input / output interface to instruct the BMC to read the backplane status information. The first input / output interface is the input / output interface for communication between the programmable device and the BMC.

2. The method according to claim 1, characterized in that, The controller is a microcontroller unit (MCU).

3. The method according to claim 1, characterized in that, The step of obtaining the backplane status information of the server includes: The specified information is obtained through the input / output interface, wherein the specified information includes: the presence status of the backplane cable connected to the backplane, the output voltage of the voltage regulator in the backplane, the presence status of the hard drive in the backplane, and the power-on / off information of the hard drive in the backplane. The target information is obtained from the controller via a first bus, wherein the target information includes: backplane temperature information obtained by the controller from a temperature sensor in the backplane via a second bus, and hard disk status information obtained by the controller from a hard disk in the backplane via a third bus; the first bus is the bus for communication between the programmable device and the controller, the second bus is the bus for communication between the controller and the temperature sensor, and the third bus is the bus for communication between the controller and the hard disk; The backplane status information includes the specified information and the target information.

4. The method according to claim 3, characterized in that, The step of obtaining the target information from the controller via the first bus includes: The controller performs filtering, verification, and packetization operations on the acquired backplane temperature information and hard disk status information to obtain the target information, and then sends the target information to the programmable device through the first bus.

5. The method according to claim 3, characterized in that, The process of obtaining specified information through input / output interfaces includes: The connection status of the pins in the target connector in the backplane is obtained through the second input / output interface to determine the presence status of the backplane cable connected to the backplane. The second input / output interface is the input / output interface for communication between the programmable device and the target connector, and the target connector is configured to connect the backplane and the motherboard. The output voltage of the voltage regulator in the backplane is obtained through the third input / output interface, wherein the voltage regulator is configured to convert the voltage transmitted from the motherboard to the backplane, and the third input / output interface is the input / output interface for communication between the programmable device and the voltage regulator; The presence status of the hard disk in the backplane is obtained through the fourth input / output interface, wherein the fourth input / output interface is the input / output interface for communication between the programmable device and the hard disk; The power-on / off information of the hard drive in the backplane is obtained from the thermal fuse in the backplane through the fifth input / output interface, wherein the fifth input / output interface is the input / output interface for communication between the programmable device and the thermal fuse.

6. The method according to claim 5, characterized in that, After obtaining the output voltage of the voltage regulator in the backplane through the third input / output interface, the programmable device processes the output voltage through its internal analog-to-digital conversion module to obtain the state of the backplane; and reports the state of the backplane to the substrate management controller.

7. The method according to claim 3, characterized in that, The method further includes: The state of the backplate is determined by the following methods: The presence status of the backplane cable in the backplane status information is used to indicate that the backplane status is abnormal when the backplane cable is not in place. If the voltage fluctuation of the output voltage of the voltage regulator in the backplane status information exceeds a first preset threshold, the backplane status is determined to be an abnormal state. The presence status of the hard drive in the backplane status information is used to indicate that the backplane status is abnormal when the hard drive is not present. The power-on / off information in the backplane status information is used to indicate that the backplane status is abnormal when the hard drive is abnormally powered on or off. The back panel temperature information in the back panel status information is used to indicate that if the temperature of the back panel exceeds a second preset threshold, the status of the back panel is determined to be an abnormal state. If the hard drive status information in the backplane status information is used to indicate that the hard drive is in error, the backplane status is determined to be abnormal.

8. The method according to claim 1, characterized in that, After obtaining the backplane status information of the server's backplane, the method further includes: The backplane status information is sent to the processor of the motherboard via the target serial peripheral interface; The target serial peripheral interface is a serial peripheral interface through which the programmable device communicates with the processor. After the processor obtains the backplane status information, it stores the backplane status information in the flash memory card of the motherboard.

9. The method according to claim 1, characterized in that, The method further includes: Upon receiving the power-on / off command sent by the BMC via the fourth bus, a power-on / off signal corresponding to the power-on / off command is sent to the thermal fuse in the backplane via the fifth input / output interface, so as to perform power-on / off operation on the target hard drive in the backplane through the thermal fuse. The fourth bus is the bus through which the programmable device communicates with the BMC, the fifth input / output interface is the input / output interface through which the programmable device communicates with the thermal fuse, and the power-on / off command is used to instruct the target hard disk in the backplane to be powered on or off.

10. The method according to claim 1, characterized in that, After sending the target command to the motherboard's Baseboard Management Control (BMC) via the first input / output interface, the method further includes: When an acquisition command sent by the BMC is obtained via the fourth bus, the backplane status information stored in the memory of the backplane is sent to the BMC via the fourth bus. The acquisition instruction is used to instruct the acquisition of the backplane status information. The fourth bus is the bus for communication between the programmable device and the BMC. When the backplane status is abnormal, the backplane status information is stored in the memory.

11. The method according to claim 1, characterized in that, The method further includes: When the lamp-lighting command sent by the BMC is obtained through the fourth bus, a control command is sent to the target status lamp through the sixth input / output interface to light up the target status lamp. The fourth bus is the bus through which the programmable device communicates with the BMC, the sixth input / output interface is the input / output interface through which the programmable device communicates with the target status light, and the light-up command is used to instruct the target status light on the backplane to be lit. When the target status light is lit, the target hard disk on the backplane is in the target state.

12. The method according to claim 1, characterized in that, Before sending the target command to the motherboard's Baseboard Management Control (BMC) via the first input / output interface, the method further includes: When the backplane is in an abnormal state and the backplane state information includes multiple types of information, a storage partition corresponding to each type of information is determined in the backplane's memory. Each type of information is stored in the corresponding storage partition of the memory.

13. The method according to claim 12, characterized in that, The step of storing each type of information into the corresponding storage partition of the memory includes: The information in the backplane status information used to indicate the connection status of the pins in the target connector in the backplane and the output voltage of the voltage regulator in the backplane is stored in the first storage partition of the memory. The backplane temperature information and hard disk status information in the backplane status information are stored in the second storage partition of the memory.

14. The method according to claim 1, characterized in that, After obtaining the backplane status information of the server's backplane, the method further includes: When the backplane status information is the initial status information obtained by the programmable device for the first time after being connected to power, the target instruction is sent to the BMC through the first input / output interface.

15. The method according to claim 1, characterized in that, After obtaining the backplane status information of the server's backplane, the method further includes: If the backplane status is determined to be normal based on the backplane status information, the time interval between the current time and the target time is determined, wherein the target time is the time when the programmable device last sent the target instruction to the BMC; If the time interval is greater than a preset time interval, the target instruction is sent to the BMC through the first input / output interface.

16. The method according to claim 15, characterized in that, The method further includes: Before sending the target instruction to the BMC through the first input / output interface, if the time interval is greater than a preset time interval, the backplane status information is stored in the backplane's memory.

17. The method according to claim 1, characterized in that, Sending the target command to the baseboard management controller (BMC) of the motherboard through the first input / output interface includes controlling the voltage level of the pins of the first input / output interface to decrease to a low level, wherein the low level is 0V.

18. A computer non-volatile readable storage medium, characterized in that, The computer non-volatile readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method described in any one of claims 1 to 17.

19. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in any one of claims 1 to 17.

20. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the steps of the method described in any one of claims 1 to 17.

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