Data transmission verification apparatus and related product

Abstract

A data transmission verification apparatus and a related product, which relate to the technical field of data transmission. The data transmission verification apparatus comprises a first transmission module, a second transmission module and a verification module, wherein the first transmission module is configured to send first data to a data conversion apparatus, and the transmission format of the first data is a first transmission format; the second transmission module is configured to receive second data from the data conversion apparatus, the second data comprises data which is correspondingly output after the first data is input to the data conversion apparatus, the transmission format of the second data is a second transmission format, and the first transmission format is different from the second transmission format; and the verification module is configured to verify the data transmission consistency of the data conversion apparatus at least on the basis of the second data. The data transmission verification apparatus can effectively ensure the verification of the consistency of a data transmission protocol.

Description

Data transmission verification devices and related products

[0001] This application claims priority to Chinese Patent Application No. 202411180978.0, filed on August 26, 2024, entitled “Data Transmission Verification Device and Related Products”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of data transmission technology, and in particular to a data transmission verification device and related products. Background Technology

[0003] In vehicle production and use, numerous components such as sensors, cameras, radars, audio devices, and communication equipment generate vast amounts of data, which relies on high-speed, reliable data transmission. High-speed serial data transmission technology converts data into high-speed serial signals and transmits them through transmission media (such as optical fibers or copper wires). It transmits only serial data within the channel, without transmitting clock signals, effectively avoiding the problem of high-bandwidth clock signal skew. It possesses the physical characteristics of high bandwidth, low latency, and interference resistance, meeting the requirements of large-scale data transmission.

[0004] High-speed serial data transmission technology requires the paired use of a serializer (SER) and a deserializer (DES). However, currently, all high-speed serial data transmission in automotive applications uses proprietary protocols. Testing and verification of these protocols are conducted independently by SER / DES chip manufacturers within their own development processes, lacking universal testing instruments and standard protocol analyzers for verifying data transmission protocol consistency. Furthermore, when testing the data transmission protocol consistency of paired SER / DES chips, each manufacturer relies on both ends of the chip. A problem with one end, or the replacement of that end, can lead to difficulties in troubleshooting or even prevent proper testing and verification.

[0005] Therefore, a data transmission verification scheme is urgently needed to effectively ensure the verification of the consistency of data transmission protocols. Summary of the Invention

[0006] This application provides a data transmission verification device and related products, which can effectively ensure the verification of data transmission protocol consistency.

[0007] In a first aspect, embodiments of this application provide a data transmission verification device, the data transmission verification device comprising:

[0008] First transmission module, second transmission module, verification module;

[0009] The first transmission module is used to send first data to the data conversion device, wherein the transmission format of the first data is a first transmission format;

[0010] The second transmission module is used to receive second data from the data conversion device. The second data is transmitted in a second transmission format. The second data includes the data output after the first data is input to the data conversion device. The first transmission format and the second transmission format are different.

[0011] The verification module is used to verify the data transmission consistency of the data conversion device based at least on the second data.

[0012] In this embodiment of the application, a data transmission verification device is provided. The first transmission module in the data transmission verification device acts as a data sending end to send first data to a data conversion device. After the first data is input to the data conversion device, corresponding output data is generated. Accordingly, the second transmission module in the data transmission verification device acts as a data receiving end to receive the output data. Furthermore, the verification module in the data transmission verification device is used to verify the data transmission consistency of the data conversion device based on the output data.

[0013] It is understandable that the data transmission verification device is connected to the data conversion device. Specifically, the first transmission module in the data transmission verification device is connected to the input end of the data conversion device, and the second transmission module in the data transmission verification device is connected to the output end of the data conversion device.

[0014] It is understandable that a data conversion device is used to convert the transmission format of data, which can be understood as the transmission format of the data input to the data conversion device being different from the transmission format of the data output by the data conversion device.

[0015] Optionally, the data conversion device may be a serializer, used to convert data transmitted in parallel into data transmitted in serial mode.

[0016] Alternatively, the data conversion device can also be a deserializer, used to convert serially transmitted data into data that can be transmitted in parallel.

[0017] Through the embodiments of this application, since the data conversion device can function independently as a serializer or deserializer, the data transmission verification device in this application embodiment can support independent interface with the serializer chip for data transmission consistency verification, or it can support independent interface with the deserializer chip for data transmission consistency verification. This allows for decoupling of the two chips during data transmission consistency verification, ensuring that a problem with one chip or replacement of one chip does not affect the testing and verification of the other chip. For example, the data transmission verification device in this application embodiment can implement the protocol functions of the serializer and deserializer based on the high-speed media transmission (HSMT) protocol. Therefore, it can be used as a general-purpose testing instrument to test and verify the consistency of the data transmission protocol based on the HSMT protocol, effectively ensuring the verification of HSMT protocol consistency.

[0018] In one possible implementation, the first transmission module is further configured to send the input service data as the first data;

[0019] The second transmission module is also used to deserialize the second data.

[0020] In this embodiment, the data transmission verification device can independently interface with the serializer chip to perform data transmission consistency verification. In this scenario, the first transmission module in the data transmission verification device is also used to send the input business data as first data to the data conversion device. The first transmission format corresponding to the first data can be understood as parallel transmission. The data conversion device is used to convert the transmission format of the first data and output the corresponding second data. The second transmission format corresponding to the second data can be understood as serial transmission. The second transmission module in the data transmission verification device is used to receive the second data from the data conversion device and deserialize the second data. The deserialized second data is used for data transmission consistency verification.

[0021] It is understood that, in the scenario described in this application embodiment, the data conversion device can be understood as a serializer, and the second transmission module in the data transmission verification device can be understood as a deserializer.

[0022] Through the embodiments of this application, the data transmission verification device can support independent connection between the deserializer and the serializer chip to perform data transmission consistency verification, thereby achieving decoupling of the chips at both ends of the serializer / deserializer during data transmission consistency verification, resulting in higher compatibility.

[0023] In one possible implementation, the first transmission module is further configured to serialize the input service data to obtain the first data.

[0024] In this embodiment, the data transmission verification device can independently interface with the deserializer chip to perform data transmission consistency verification. In this scenario, the first transmission module in the data transmission verification device is also used to serialize the input service data to obtain first data, and send the first data to the data conversion device. The first transmission format corresponding to the first data can be understood as serial transmission. The data conversion device is used to convert the transmission format of the first data and output the corresponding second data. The second transmission format corresponding to the second data can be understood as parallel transmission. The second transmission module in the data transmission verification device is used to receive the second data from the data conversion device, and this second data is used for data transmission consistency verification.

[0025] It is understood that, in the scenario described in this application embodiment, the data conversion device can be understood as a deserializer, and the first transmission module in the data transmission verification device can be understood as a serializer.

[0026] Through the embodiments of this application, the data transmission verification device can support independent connection between the serializer and deserializer chips to perform data transmission consistency verification, thereby achieving decoupling of the chips at both ends of the serializer / deserializer during data transmission consistency verification, resulting in higher compatibility.

[0027] In one possible implementation, the data transmission verification device further includes:

[0028] Control register;

[0029] The control register is used to configure the second transmission module to enable or disable the deserialization function, or to configure the first transmission module to enable or disable the serialization function.

[0030] In this embodiment, the data transmission verification device further includes a control register, which is used to configure the data transmission verification device to enable or disable the serialization or deserialization functions. Specifically, the second transmission module can be configured to enable or disable the deserialization function. When the second transmission module is configured to enable the deserialization function, the data transmission verification device can be understood as a deserializer. Alternatively, the first transmission module can be configured to enable or disable the serialization function. When the first transmission module is configured to enable the serialization function, the data transmission verification device can be understood as a serializer.

[0031] Through the embodiments of this application, the data transmission verification device can be configured to act as a deserializer and interface with the serializer chip to perform data transmission consistency verification. Alternatively, the data transmission verification device can be configured to act as a serializer and interface with the deserializer chip to perform data transmission consistency verification. This allows for decoupling of the chips at both ends of the serializer / deserializer during data transmission consistency verification, resulting in higher compatibility. It also enables real-time and accurate detection of state transitions between the serializer and deserializer chips, thereby effectively ensuring the verification of data transmission protocol consistency.

[0032] In one possible implementation, the data transmission verification device further includes:

[0033] Data generation module;

[0034] The data generation module is used to generate business data and input the business data into the first transmission module.

[0035] In this embodiment, the data transmission verification device further includes a data generation module, which generates business data and transmits the business data to the first transmission module. Optionally, the data generation module can also be externally connected to an audio / video data acquisition device. In this case, the data generation module does not need to generate business data; instead, the audio / video data acquisition device transmits the acquired business data to the data generation module, which then transmits it to the first transmission module. Optionally, the audio / video data acquisition device can also be directly connected to the first transmission module, transmitting the acquired business data to the first transmission module.

[0036] In one possible implementation, the business data includes data that has been fault-injected.

[0037] In this embodiment, the business data generated by the data generation module includes data that has been injected with faults. It can be understood that when the data generation module generates business data, it deliberately introduces faults into it and observes the data transmission consistency when the business data has faults. This can realize fault injection at the physical layer and application layer, and is used to construct various error scenarios for reliability verification.

[0038] In one possible implementation, the verification module is configured to verify the data transmission consistency of the data conversion device based at least on the second data, including:

[0039] The verification module is used to verify whether the unserialized first data and the deserialized second data are consistent.

[0040] In this embodiment, the verification module in the data transmission verification device specifically verifies the data transmission consistency of the data conversion device by checking whether the unserialized first data and the deserialized second data are consistent. It is understood that if the unserialized first data and the deserialized second data are consistent, the data transmission of the data conversion device is verified to be consistent; if the unserialized first data and the deserialized second data are inconsistent, the data transmission of the data conversion device is verified to be inconsistent. It is understood that the verification module's check on the unserialized first data and the deserialized second data is a verification of the functionality implemented by the transmitted data.

[0041] Optionally, the verification module can verify whether the unserialized first data and the deserialized second data are consistent based on the cyclic redundancy check (CRC) code corresponding to the unserialized first data and the CRC code corresponding to the deserialized second data. It is understood that if the CRC code corresponding to the unserialized first data is consistent with the CRC code corresponding to the deserialized second data, then the unserialized first data and the deserialized second data are consistent; if the CRC code corresponding to the unserialized first data is inconsistent with the CRC code corresponding to the deserialized second data, then the unserialized first data and the deserialized second data are inconsistent.

[0042] In one possible implementation, the verification module is further configured to perform at least one of the following based on the unserialized first data and the deserialized second data:

[0043] Error statistics, frame format verification, and time slot statistics.

[0044] In this embodiment, the verification module can also perform functions such as bit error rate statistics, frame format verification, and time slot statistics based on the unserialized first data and the deserialized second data. Bit error rate statistics statistically analyze the bit error rate of data transmission, reflecting the physical layer signal quality of data transmission, and aims to detect whether the bit error rate meets the data transmission protocol requirements. Frame format verification is a higher-layer data verification that checks the consistency of the data sender's and receiver's understanding of the frame format based on the data transmission protocol. Time slot statistics statistically analyze whether the time slot design of the data sender and receiver conforms to the data transmission protocol requirements. It can be understood that the verification module's checks on the unserialized first data and the deserialized second data here are checks on the data transmission protocol.

[0045] In one possible implementation, the data transmission verification device further includes a first interface connected to the system-on-chip (SoC):

[0046] The data transmission verification device receives a first instruction through the first interface, the first instruction being used to instruct the data transmission consistency of the data conversion device to be verified.

[0047] In this embodiment, the data transmission verification device further includes a first interface, through which it receives a first instruction from the system-on-chip (SoC), and verifies the data transmission consistency of the data conversion device under the instruction of the first instruction. Optionally, the first interface may be a high-speed serial computer bus (peripheral component interconnect express, PCIe) interface.

[0048] In one possible implementation, the data transmission verification device further includes a second interface, which is connected to at least one of the following peripherals:

[0049] Audio and video data acquisition devices, display devices, and audio playback devices.

[0050] In this embodiment, the data transmission verification device further includes a second interface, through which peripherals such as an audio / video data acquisition device, a display device, and an audio playback device are connected. The audio / video data acquisition device may be a camera, etc., used to acquire audio / video data and transmit it to the data transmission verification device. The display device may include, but is not limited to, a display tool and a regular display screen. The display tool is used for displaying images based on the camera serial interface (CSI) protocol and the mobile industry processor interface (MIPI) protocol, while the regular display screen is used for displaying images based on the display serial interface (DSI) protocol and the MIPI interface protocol.

[0051] In one possible implementation, the verification module is configured to verify the data transmission consistency of the data conversion device based at least on the second data, including:

[0052] The verification module is used to obtain the first check code corresponding to the unserialized first data and the second check code corresponding to the deserialized second data.

[0053] The verification module is further configured to instruct the storage of the deserialized second data at a first storage address when the first verification code and the second verification code are the same, wherein the first storage address is the storage address corresponding to the unserialized first data;

[0054] The verification module is further configured to instruct the storage of the deserialized second data at a second storage address, which is different from the first storage address, when the first verification code and the second verification code are different.

[0055] This embodiment provides a possible specific implementation for verifying the data transmission consistency of a data conversion device. Specifically, the verification module can obtain a first checksum corresponding to the unserialized first data and a second checksum corresponding to the deserialized second data, and verify the data transmission consistency of the data conversion device based on the first and second checksums. It is understood that if the first and second checksums match, the data transmission of the data conversion device is verified to be consistent; if the first and second checksums do not match, the data transmission of the data conversion device is verified to be inconsistent.

[0056] Optionally, the verification module may obtain the first check code corresponding to the unserialized first data, and obtain the deserialized second data and calculate the second check code corresponding to the deserialized second data, and then perform subsequent consistency verification based on the first check code and the second check code.

[0057] Alternatively, the verification module may acquire the unserialized first data and calculate the first check code corresponding to the unserialized first data, acquire the deserialized second data and calculate the second check code corresponding to the deserialized second data, and then perform subsequent consistency verification based on the first check code and the second check code.

[0058] Accordingly, the verification module provides different data storage methods for different scenarios involving the verification of the first and second checksums. When the first and second checksums are the same, the verification module instructs the storage of the deserialized second data at the first storage address. This first storage address corresponds to the storage address of the unserialized first data. Therefore, in this case, it can be understood that the verification module instructs the storage of the second data to overwrite the storage of the first data. It is understood that if the verification matches, the current frame data will be mapped to the storage address corresponding to the previous frame data. Ultimately, when the data comparison is correct, i.e., the current frame data has no errors, the effect of overwriting the previous frame data is achieved, saving storage resources. When the first and second checksums are different, the verification module instructs the storage of the deserialized second data at the second storage address, which is different from the first storage address. Therefore, in this case, it can be understood that the verification module instructs the second data to be stored separately, without overwriting the storage of the first data. Understandably, if the verification is inconsistent, a verification error interruption signal will be generated, and data storage to the corresponding address area will stop. At this time, since the CRC verification principle is an accumulation algorithm, which is calculated based on a complete frame of data, it means that the current error frame data has been received completely, and the corresponding address area stores the previous frame data. Therefore, the previous frame data can be obtained from the corresponding address and compared with the current frame data for more precise granular verification.

[0059] In one possible implementation, the data transmission verification device is connected to the data conversion device via the physical layer; or, the data transmission verification device is connected to the data conversion device via specified field-programmable gate array (FPGA) pins via the protocol layer.

[0060] In this embodiment, the modules in the data transmission verification device can be mounted on a field-programmable gate array (FPGA) board, where the data transmission verification device can be understood as an FPGA board. When the data conversion device is a chip-based serializer or deserializer, the data transmission verification device can be connected to the data conversion device at the physical layer; optionally, this physical layer can be understood as a physical circuit board. When the data conversion device is an FPGA-based serializer or deserializer, the data transmission verification device can be connected to the data conversion device at the protocol layer through designated FPGA pins. Through the embodiments of this application, the data transmission verification device has the characteristic of simultaneously interfacing with and being compatible with both chip and FPGA hardware devices, which can improve verification capabilities and solve the problem of difficult verification of FPGA devices.

[0061] In one possible implementation, the second transmission module is further configured to convert the second data in the second data format into the target data format for storage.

[0062] In this embodiment, the second data transmission module is further used to convert the second data in the second data format into the target data format for storage. It is understood that when the second data received by the data receiving end corresponds to a second data format that does not conform to the storage format, it will be converted into the target data format before storage. Through this embodiment, data transmission consistency verification compatible with all data formats can be achieved, realizing the normalization of all business data supported by the HSMT protocol, and solving the problem that different business tests rely on different verification test environments.

[0063] Optionally, the second transmission module, acting as a data receiver, can rearrange the pixels of the received second data and perform bit stuffing, converting the second data transmitted in the second bit-width data format into the target bit-width data format for storage, thereby realizing the conversion of the second data in the second data format into the target data format for storage.

[0064] In one possible implementation, the first transmission module is further configured to convert the first data stored in the target data format into a first data format for transmission.

[0065] In this embodiment, the first data transmission module is further configured to convert the first data stored in the target data format into the first data format for transmission. It is understood that when the data sender stores the first data to be transmitted in the target data format, it will convert it into the first data format before transmission. Through this embodiment, data transmission consistency verification compatible with all data formats can be achieved, normalizing all business data supported by the HSMT protocol, and resolving the problem of different business tests relying on different verification test environments.

[0066] Optionally, the first transmission module, acting as a data transmitter, can convert the first data stored in the target bit-width data format into a first bit-width data format, and then perform bit stuffing and rearrangement on the pixels of the first data after bit-width conversion before sending it, thereby realizing the conversion of the first data stored in the target data format into the first data format for transmission.

[0067] Secondly, this application provides a data transmission verification device, which includes a host computer control board and the data transmission verification apparatus described in the first aspect or any possible implementation of the first aspect.

[0068] The host computer control board includes a system-on-a-chip (SoC), and the data transmission verification device includes a first interface, which is connected to the SoC.

[0069] This application provides a data transmission verification device, which includes a host computer control board and the aforementioned data transmission verification apparatus. The host computer control board includes a System-on-a-Chip (SoC), and the data transmission verification apparatus includes a first interface. Optionally, the data transmission verification apparatus can be mounted on the host computer control board. Specifically, the data transmission verification apparatus can be connected to the SoC through the first interface. Optionally, the first interface can be a PCIe interface. Through this application embodiment, the data transmission verification apparatus can receive instructions from the SoC of the host computer control board through the first interface, and verify the data transmission consistency of the data conversion device under the instruction of the instructions. The data transmission verification device in this application embodiment can support independent interface with a serializer chip for data transmission consistency verification, or it can support independent interface with a deserializer chip for data transmission consistency verification, thereby achieving decoupling of the two chips during data transmission consistency verification. If one chip malfunctions or is replaced, it will not affect the testing and verification of the other chip. For example, the data transmission verification device in this application embodiment can implement the protocol functions of serializer and deserializer based on the HSMT protocol. Therefore, it can be used as a general testing instrument to test and verify the consistency of data transmission protocol based on the HSMT protocol, and can effectively ensure the verification of HSMT protocol consistency.

[0070] In one possible implementation, the host computer control board further includes a third interface, which is connected to the host computer.

[0071] The host computer control board receives a second instruction from the host computer through the third interface, and instructs the data transmission verification device to verify the data transmission consistency of the data conversion device under the instruction of the second instruction.

[0072] In this embodiment, the host computer control also includes a third interface connected to the host computer. The host computer control board can receive a second instruction from the host computer through this third interface, and instruct the data transmission verification device to verify the data transmission consistency of the data conversion device under the guidance of the second instruction. Optionally, the third interface can be an Ethernet interface.

[0073] Thirdly, embodiments of this application provide a data transmission verification system, which includes a data conversion device and a data transmission verification device as described in the first aspect or any possible implementation of the first aspect, or a data transmission verification device as described in the second aspect or any possible implementation of the second aspect.

[0074] Optionally, the data conversion device is used to convert the data transmission format, and the data transmission verification device or data transmission verification equipment is used to verify the data transmission consistency of the data conversion device.

[0075] Fourthly, embodiments of this application provide a mobile terminal, which includes the data transmission verification device described in the first aspect or any possible implementation of the first aspect, or includes the data transmission verification equipment described in the second aspect or any possible implementation of the second aspect, or includes the data transmission verification system described in the third aspect.

[0076] Optionally, the mobile terminal can be a means of transportation, such as a car, truck, aircraft, drone, slow transport vehicle, spacecraft, or ship, or any other possible means of transportation used in any possible scenario. This application embodiment does not limit this. Attached Figure Description

[0077] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0078] Figure 1 is a schematic diagram of a serializer chip and a deserializer chip verification.

[0079] Figure 2 is a schematic diagram of the architecture of a data transmission verification system provided in an embodiment of this application;

[0080] Figure 3 is a schematic diagram of a data transmission verification device provided in an embodiment of this application;

[0081] Figure 4 is a schematic diagram of another data transmission verification device provided in an embodiment of this application;

[0082] Figure 5A is a schematic diagram of another data transmission verification device provided in an embodiment of this application;

[0083] Figure 5B is a schematic diagram of another data transmission verification device provided in an embodiment of this application;

[0084] Figure 6 is a schematic diagram of another data transmission verification device provided in an embodiment of this application;

[0085] Figure 7 is a schematic diagram of another data transmission verification device provided in an embodiment of this application;

[0086] Figure 8 is a schematic diagram of another data transmission verification device provided in an embodiment of this application;

[0087] Figure 9 is a schematic diagram illustrating the principle of data verification provided in an embodiment of this application;

[0088] Figure 10A is a schematic diagram of a data transmission verification device docking device provided in an embodiment of this application;

[0089] Figure 10B is a schematic diagram of another data transmission verification device docking device provided in an embodiment of this application;

[0090] Figure 11 is a schematic diagram of the principle of data normalization provided in an embodiment of this application;

[0091] Figure 12 is a schematic diagram of the structure of a data transmission verification device provided in an embodiment of this application. Detailed Implementation

[0092] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described below with reference to the accompanying drawings.

[0093] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0094] The term "embodiment" as used herein means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that, unless otherwise specified or logically conflicting, the terminology and / or descriptions between the various embodiments of this application are consistent and can be mutually referenced, and technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0095] It should be understood that in this application, "at least one (item)" means one or more, "more than one" means two or more, "at least two (items)" means two or three or more, and "and / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0096] In the description of this application, the terms "center," "upper," "lower," "vertical," "horizontal," "inner," "outer," "left," and "side," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. It should be understood that the Z-direction, Y-direction, etc., mentioned in some embodiments of this application are referenced to the XYZ Cartesian coordinate system to facilitate the description of features in this solution, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation.

[0097] In the embodiments of this application, the term "end" appearing in terms such as "one end", "the other end", "end", "free end", "upper end", "lower end", and "connecting end" is not limited to end head, end point, or end face, but also includes a portion extending axially and / or radially from the end head, end point, or end face on the device or element to which the end head, end point, or end face belongs.

[0098] It should be noted that, in this application, "instruction" can include direct instruction, indirect instruction, explicit instruction, and implicit instruction. When describing a certain instruction information for the purpose of instructing A, it can be understood that the instruction information carries A, directly instructs A, or indirectly instructs A.

[0099] In this application, the information indicated by the instruction information is called the information to be instructed. In specific implementations, there are many ways to indicate the information to be instructed, such as, but not limited to, directly indicating the information to be instructed, such as the information to be instructed itself or its index. It can also indirectly indicate the information to be instructed by indicating other information, where there is a correlation between the other information and the information to be instructed. It can also indicate only a part of the information to be instructed, while the other parts are known or pre-agreed upon. For example, the instruction of specific information can be achieved by using a pre-agreed (e.g., protocol-defined) arrangement of various information, thereby reducing instruction overhead to some extent. The information to be instructed can be sent as a whole or divided into multiple sub-information units, and the sending period and / or timing of these sub-information units can be the same or different. This application does not limit the specific sending method. The sending period and / or timing of these sub-information units can be predefined, for example, according to a protocol, or configured by the transmitting device by sending configuration information to the receiving device.

[0100] It should be noted that in this application, "send" can be understood as "output" and "receive" can be understood as "input". "Send information to A", where "to A" simply indicates the direction of information transmission, and A is the destination, does not limit "send information to A" to a direct transmission over the air interface. "Send information to A" includes sending information directly to A, as well as sending information indirectly to A through a transmitter. Therefore, "send information to A" can also be understood as "outputting information destined for A". Similarly, "receive information from A" indicates that the source of the information is A, including receiving information directly from A, as well as receiving information indirectly from A through a receiver. Therefore, "receive information from A" can also be understood as "inputting information from A".

[0101] This application provides a data transmission verification device and related products, applied in the field of data transmission technology, such as data transmission consistency verification in data transmission scenarios involving serializers and deserializers. To better understand the technical solution of this application, the relevant terms and concepts that may be involved in the embodiments of this application are introduced below.

[0102] In vehicle production and use, numerous components such as sensors, cameras, radars, audio devices, and communication equipment generate vast amounts of data, which relies on high-speed, reliable data transmission. High-speed serial data transmission technology converts data into high-speed serial signals and transmits them through transmission media (such as optical fibers or copper wires). It transmits only serial data within the channel, without transmitting clock signals, effectively avoiding the problem of high-bandwidth clock signal skew. It possesses the physical characteristics of high bandwidth, low latency, and interference resistance, meeting the requirements of large-scale data transmission.

[0103] High-speed serial data transmission technology requires the paired use of a serializer (SER) and a deserializer (DES). However, currently, all high-speed serial data transmission protocols for automotive applications are proprietary. Testing and verification of these protocols are conducted independently by SER / DES chip manufacturers within their own development processes, lacking both universal testing instruments and standard protocol analyzers to verify protocol consistency. The manufactured serializer and deserializer chips possess independent ecosystem characteristics, exhibiting non-universal, non-public, and non-interoperable features. This results in a relatively closed market for automotive serializer and deserializer chips, ultimately hindering OEMs' ecosystem transitions and making it difficult for different SER / DES chip manufacturers to supply each other.

[0104] Furthermore, when testing and verifying the consistency of data transmission protocols between paired SER / DES chips, each SER / DES chip manufacturer relies on both ends of the chip. If one end of the chip has a problem or the chip is replaced, it will be difficult to locate the problem, or even the testing and verification cannot be carried out normally.

[0105] For details, please refer to Figure 1, which is a schematic diagram of a serializer chip and a deserializer chip verification.

[0106] As shown in Figure 1, the data transmission consistency verification of the serializer and deserializer chips is a black-box verification based on their peripheral interfaces. Serializer and deserializer chips create peripheral service interfaces for image or data transmission, such as the Mobile Industry Processor Interface (MIPI) used in video cameras. Currently, the data transmission consistency verification of serializer and deserializer chips is based on the stimulation of audio and video source data through audio and video service data interfaces such as MIPI. After the serializer and deserializer chips convert and transmit the data, it is finally played or displayed on the other end through a playback device. Furthermore, an oscilloscope is connected to both ends of the serializer and deserializer chips to observe whether the data transmission is consistent.

[0107] In the data transmission consistency verification shown in Figure 1, the following problems exist:

[0108] (1) When testing and verifying the consistency of data transmission protocol of paired SER / DES chips, both ends of the chip are dependent. If one end of the chip has a problem or one end of the chip is replaced, it will be difficult to locate the problem, or even the test and verification cannot be carried out normally.

[0109] (2) The bitstream format is singular. Existing audio and video injection sources cannot conveniently and effectively traverse all audio and video source formats of business data. They can often only implement one or a few audio and video source formats of business data.

[0110] (3) The results of the final test are biased towards intuitive verification methods, and cannot provide quantitative and accurate statistics on the quality of the final transmitted data. For example, the comparison of image service data is based on intuitive display methods and cannot be accurate to the pixel level.

[0111] (4) The form of the docking device is limited to the chip and cannot be docked with FPGA-shaped devices.

[0112] (5) The verification and testing capabilities of the same environment are limited. Different stimulus sources and display devices need to be constructed for different business scenarios. The reusability is poor, the degree of automation is low, and the test cases cannot be automatically traversed.

[0113] (6) It is impossible to accurately detect the state transitions of serializer and deserializer chips in real time, and it is highly dependent on the chip design's monitoring registers or interfaces.

[0114] Therefore, a data transmission verification scheme is urgently needed to effectively ensure the verification of the consistency of data transmission protocols.

[0115] In view of this, this application provides a data transmission verification system and proposes a new data transmission verification device based on the data transmission verification system. This device is applied in the field of data transmission technology, such as data transmission consistency verification in data transmission scenarios involving serializers and deserializers, and can effectively ensure the verification of data transmission protocol consistency.

[0116] Please refer to Figure 2, which is a schematic diagram of the architecture of a data transmission verification system provided in an embodiment of this application.

[0117] As shown in Figure 2, the data transmission verification system in this application includes an FPGA and a host computer control board, which can be applied to the verification and testing of SER / DES or audio / video protocol conversion and transmission chips. The upstream and downstream interfaces of the data transmission verification system are with serializer chips, deserializer chips, or other high-speed serial transmission chips, audio / video protocol conversion and transmission chips, etc.

[0118] For example, the data transmission verification system in this application can be applied to the verification test of data conversion and transmission chips that support the high-speed media transmission (HSMT) protocol. It can realize the verification test of SER / DES or audio / video protocol conversion and transmission chips based on the HSMT protocol. Therefore, it can be used as a general test instrument to test and verify the consistency of data transmission protocol based on the HSMT protocol, and can effectively ensure the verification of HSMT protocol consistency.

[0119] Understandably, HSMT technology can be referenced in the standard "Technical Requirements and Test Methods for In-Vehicle Wired High-Speed ​​Media Transmission Systems" issued by the China Automotive Technology and Research Center (CATARC), which will not be elaborated upon here.

[0120] The data transmission consistency verification logic of the data transmission verification system in this application is mainly concentrated on the FPGA board. The host computer control board controls the entire HSMT protocol data transmission consistency verification device through the PCIe interface. Finally, the host computer starts the verification test function of the verification device to complete the test verification of the transmission chip.

[0121] Please refer to Figure 3, which is a schematic diagram of the structure of a data transmission verification device provided in an embodiment of this application.

[0122] As shown in Figure 3, the data transmission verification device 30 includes, but is not limited to:

[0123] First transmission module 301, second transmission module 302, and verification module 303.

[0124] The first transmission module 301 is used to send first data to the data conversion device, and the transmission format of the first data is a first transmission format.

[0125] The second transmission module 302 is used to receive second data from the data conversion device. The second data is transmitted in a second transmission format. The second data includes the data output after the first data is input to the data conversion device. The first transmission format and the second transmission format are different.

[0126] Verification module 303 is used to verify the data transmission consistency of the data conversion device based at least on the second data.

[0127] It is understood that the data transmission verification device 30 is connected to the data conversion device. Specifically, the first transmission module 301 in the data transmission verification device 30 is connected to the input end of the data conversion device, and the second transmission module 302 in the data transmission verification device 30 is connected to the output end of the data conversion device.

[0128] It is understandable that a data conversion device is used to convert the transmission format of data, which can be understood as the transmission format of the data input to the data conversion device being different from the transmission format of the data output by the data conversion device.

[0129] Optionally, the data conversion device may be a serializer for converting parallel-transmitted data into serial-transmitted data. In this case, the first transmission format is parallel transmission and the second transmission format is serial transmission.

[0130] Optionally, the data conversion device can also be a deserializer, used to convert serially transmitted data into parallel transmitted data. In this case, the first transmission format is serial transmission and the second transmission format is parallel transmission.

[0131] Alternatively, the data conversion device may also be other high-speed serial transmission chips, audio and video protocol conversion and transmission chips, etc., and the embodiments of this application do not limit this.

[0132] Optionally, the first transmission module 301, as a data transmitter, may include a physical media attachment (PMA) layer and / or a physical coding sublayer (PCS). PMA and PCS are two sublayers in a high-speed serial transceiver. The PMA sublayer is primarily used for signal modulation and data serialization and / or deserialization, while the PCS sublayer mainly includes line coding and CRC checksum coding.

[0133] Optionally, the second transmission module 302, as a data receiving end, may include a PMA sublayer and / or a PCS sublayer.

[0134] For details, please refer to Figure 4, which is a schematic diagram of another data transmission verification device provided in the embodiment of this application.

[0135] As shown in Figure 4, the first transmission module 301 includes a PMA and a PCS. The service data first undergoes line encoding and CRC check encoding in the PCS sublayer, and then undergoes data serialization and signal modulation in the PMA sublayer before being sent in the first transmission format.

[0136] The second transmission module 302 includes a PMA and a PCS. The received second data is first modulated and deserialized by the PMA sublayer, and then encoded by the PCS sublayer for line encoding and CRC check encoding before being transmitted to the verification module 303 for subsequent data transmission consistency verification.

[0137] Optionally, the verification module 303 is used to verify the data transmission consistency of the data conversion device based at least on the second data. Specifically, the verification module 303 may obtain the first check code corresponding to the first data, and obtain the second data and calculate the second check code corresponding to the deserialized second data, and then verify the data transmission consistency of the data conversion device based on the first check code and the second check code.

[0138] Optionally, the verification module 303 is used to verify the data transmission consistency of the data conversion device based at least on the second data. Specifically, the verification module 303 may acquire the first data and calculate the first check code corresponding to the first data, and acquire the second data and calculate the second check code corresponding to the second data, and then verify the data transmission consistency of the data conversion device based on the first check code and the second check code. This application embodiment does not limit this.

[0139] It is understood that the first transmission module 301 in the data transmission verification device 30 of this application embodiment serves as a data sending end to send first data to the data conversion device. After the first data is input to the data conversion device, corresponding output data will be generated. Accordingly, the second transmission module 302 in the data transmission verification device 30 serves as a data receiving end to receive the output data. Furthermore, the verification module 303 in the data transmission verification device 30 is used to verify the data transmission consistency of the data conversion device based on the output data.

[0140] Through the embodiments of this application, since the data conversion device can be used as a serializer or a deserializer independently, the data transmission verification device 30 in the embodiments of this application can support independent connection with the serializer chip to perform data transmission consistency verification, or it can support independent connection with the deserializer chip to perform data transmission consistency verification. This can achieve decoupling of the two-end chips during data transmission consistency verification, so that when one end chip has a problem or one end chip is replaced, it will not affect the testing and verification of the other end chip.

[0141] For example, the data transmission verification device 30 in this application embodiment can implement the protocol functions of serializer and deserializer based on the HSMT protocol. Therefore, it can be used as a general testing instrument to test and verify the consistency of data transmission protocol based on the HSMT protocol, and can effectively ensure the verification of HSMT protocol consistency.

[0142] In one possible embodiment, the data transmission verification device 30 will be described in light of whether the data conversion device is a serializer or a deserializer.

[0143] Scenario 1:

[0144] The data conversion device is a serializer, as shown in Figure 5A. Figure 5A is a schematic diagram of another data transmission verification device provided in the embodiment of this application.

[0145] As shown in Figure 5A, the data conversion device can be understood as a serializer, and the second transmission module 302 in the data transmission verification device 30 can be understood as a deserializer. Wherein:

[0146] The first transmission module 301 is also used to send the input business data as the first data.

[0147] The second transmission module 302 is also used to deserialize the second data.

[0148] Optionally, the sources of the input business data may include, but are not limited to, the following:

[0149] (1) The first data includes business data input from external sensors;

[0150] (2) The first data includes the business data generated by the data generation module inside the data transmission verification device;

[0151] (3) The first data includes business data input from external sensors and business data generated by the data generation module inside the data transmission verification device.

[0152] In this scenario, the first transmission module 301 in the data transmission verification device 30 is also used to send the input service data as first data to the data conversion device. The first transmission format corresponding to the first data can be understood as parallel transmission. The data conversion device is used to convert the transmission format of the first data and output the corresponding second data. The second transmission format corresponding to the second data can be understood as serial transmission. The second transmission module 302 in the data transmission verification device 30 is used to receive the second data from the data conversion device and deserialize the second data. The deserialized second data is used for data transmission consistency verification.

[0153] Through the embodiments of this application, the data transmission verification device 30 can support being used independently as a deserializer to interface with the serializer chip for data transmission consistency verification, thereby achieving decoupling of the chips at both ends of the serializer / deserializer during data transmission consistency verification, resulting in higher compatibility.

[0154] Scenario 2:

[0155] The data conversion device is a deserializer, as shown in Figure 5B. Figure 5B is a schematic diagram of another data transmission verification device provided in the embodiment of this application.

[0156] As shown in Figure 5B, the data conversion device can be understood as a deserializer, and the first transmission module 301 in the data transmission verification device 30 can be understood as a serializer. Wherein:

[0157] The first transmission module 301 is also used to serialize the input service data to obtain the first data.

[0158] In this second scenario, the first transmission module 301 in the data transmission verification device 30 is also used to serialize the input service data to obtain first data, and send the first data to the data conversion device. In this case, the first transmission format corresponding to the first data can be understood as serial transmission. The data conversion device is used to convert the transmission format of the first data and output the corresponding second data. In this case, the second transmission format corresponding to the second data can be understood as parallel transmission. The second transmission module 302 in the data transmission verification device 30 is used to receive the second data from the data conversion device, and this second data is used for data transmission consistency verification.

[0159] Through the embodiments of this application, the data transmission verification device 30 can support independent connection between the serializer and deserializer chips to perform data transmission consistency verification, thereby achieving decoupling of the chips at both ends of the serializer / deserializer during data transmission consistency verification, resulting in higher compatibility.

[0160] It should be understood that the above-described scenarios 1 and 2 are merely two possible examples of the data transmission verification device 30 and should not be construed as limiting the embodiments of this application. Any new data transmission verification device obtained by reasonable modifications, additions, or combinations of the data transmission verification device 30 under scenarios 1 and 2 shall fall within the protection scope of this application.

[0161] In one possible embodiment, the data transmission verification device of this application may further include multiple sets of data sending ends and data receiving ends similar to the first transmission module and the second transmission module, which are respectively used to interface with the serializer and the deserializer, so that the data transmission verification device can support either interfacing with the serializer chip as a deserializer to perform data transmission consistency verification, or interfacing with the deserializer chip as a serializer to perform data transmission consistency verification, thereby improving the verification capability of the data transmission verification device.

[0162] For details, please refer to Figure 6, which is a schematic diagram of the structure of another data transmission verification device provided in the embodiment of this application.

[0163] As shown in Figure 6, the data transmission verification device 30 includes:

[0164] First transmission module 301, second transmission module 302, verification module 303, third transmission module 304, fourth transmission module 305.

[0165] The first transmission module 301 is used to send first data to the first data conversion device, and the transmission format of the first data is a first transmission format.

[0166] The second transmission module 302 is used to receive second data from the first data conversion device. The second data is transmitted in a second transmission format. The second data includes the data output after the first data is input to the first data conversion device. The first transmission format and the second transmission format are different.

[0167] The verification module 303 is used to verify the data transmission consistency of the first data conversion device based at least on the second data.

[0168] It is understood that the first transmission module 301 is similar to the first transmission module 301 in the data transmission verification device 30 shown in Figures 3 and 5A, the second transmission module 302 is similar to the second transmission module 302 in the data transmission verification device 300 shown in Figures 3 and 5A, and the verification module 303 is similar to the verification module 303 in the data transmission verification device 300 shown in Figures 3 and 5A. Therefore, the functional descriptions of the first transmission module 301, the second transmission module 302, and the verification module 303 can be found in the descriptions of the corresponding modules (first transmission module 301, second transmission module 302, and verification module 303) in the data transmission verification device 300 shown in Figures 3 and 5A, and will not be repeated here.

[0169] The third transmission module 304 is used to send third data to the second data conversion device, and the transmission format of the third data is the third transmission format.

[0170] The fourth transmission module 305 is used to receive fourth data from the second data conversion device. The transmission format of the fourth data is a fourth transmission format. The fourth data includes the data output after the third data is input to the second data conversion device. Furthermore, the third transmission format and the fourth transmission format are different.

[0171] The verification module 303 is also used to verify the data transmission consistency of the second data conversion device based at least on the fourth data.

[0172] It is understood that the third transmission module 304 is similar to the first transmission module 301 in the data transmission verification device 30 shown in Figures 3 and 5B, and the fourth transmission module 305 is similar to the second transmission module 302 in the data transmission verification device 30 shown in Figures 3 and 5B. Therefore, the functional descriptions of the third transmission module 304 and the fourth transmission module 305 can be found in the descriptions of the corresponding modules (first transmission module 301 and second transmission module 302) in the data transmission verification device 30 shown in Figures 3 and 5B, and will not be repeated here.

[0173] In this embodiment, the second transmission module 302 in the data transmission verification device 30 can be understood as a deserializer, which supports independent connection with the first data conversion device (serializer) to perform data transmission consistency verification. The third transmission module 304 in the data transmission verification device 30 can be understood as a serializer, which supports independent connection with the second data conversion device (deserializer) to perform data transmission consistency verification. Thus, it is possible to simultaneously perform data transmission consistency verification on the first data conversion device (serializer) and the second data conversion device (deserializer), thereby improving the verification capability of the data transmission verification device 30.

[0174] Optionally, the data transmission verification device 30 may also include more sets of data sending ends and data receiving ends similar to the first transmission module and the second transmission module, respectively used to connect to more serializers and deserializers, so as to realize the data transmission consistency verification of more serializers and deserializers at the same time.

[0175] It should be understood that the data transmission verification device 30 shown in Figure 6 is only an example for illustration and should not be construed as limiting the embodiments of this application. Any new data transmission verification device obtained by reasonable modification, supplementation or combination based on the data transmission verification device 30 shall fall within the protection scope of this application.

[0176] In one possible embodiment, the data transmission verification device 30 described above may also include, but is not limited to, a control register.

[0177] For details, please refer to Figure 7, which is a schematic diagram of the structure of another data transmission verification device provided in the embodiment of this application.

[0178] As shown in Figure 7, the control register 306 is used to configure the second transmission module 302 to enable or disable the deserialization function, or to configure the first transmission module 301 to enable or disable the serialization function.

[0179] For example, the control register 306 can enable the serialization function of the first transmission module 301 by configuring the value of the first field to 1, or disable the serialization function of the first transmission module 301 by configuring the value of the first field to 0.

[0180] For example, control register 306 can enable the deserialization function of the second transmission module 302 by configuring the value of the second field to 1, or disable the deserialization function of the second transmission module 302 by configuring the value of the second field to 0.

[0181] For example, control register 306 is pre-configured with two sets of control algorithm logic. If control register 306 enables one set of control algorithm logic, it triggers the serialization function of the first transmission module 301 to start. Conversely, if the control algorithm logic is not enabled, the serialization function of the first transmission module 301 is turned off. Alternatively, if control register 306 enables the other set of control algorithm logic, it triggers the deserialization function of the second transmission module 302 to start. Conversely, if the control algorithm logic is not enabled, the deserialization function of the second transmission module 302 is turned off.

[0182] It is understandable that the control register 306 can configure the second transmission module 302 to enable or disable the deserialization function. When the second transmission module 302 is configured to enable the deserialization function, the data transmission verification device 30 can be understood as a deserializer. It can also configure the first transmission module 301 to enable or disable the serialization function. When the first transmission module 301 is configured to enable the serialization function, the data transmission verification device 30 can be understood as a serializer.

[0183] Through the embodiments of this application, the data transmission verification device 30 can be configured to work alone as a deserializer and interface with the serializer chip to perform data transmission consistency verification. Alternatively, the data transmission verification device can be configured to work alone as a serializer and interface with the deserializer chip to perform data transmission consistency verification. This allows for decoupling of the chips at both ends of the serializer / deserializer during data transmission consistency verification, resulting in higher compatibility. It can solve the problem that current black-box verification methods cannot accurately detect the state transitions of the serializer and deserializer chips in real time, thereby effectively ensuring the verification of data transmission protocol consistency.

[0184] In one possible embodiment, the data transmission verification device 30 described above may also include, but is not limited to, a data generation module.

[0185] For details, please refer to Figure 8, which is a schematic diagram of the structure of another data transmission verification device provided in the embodiment of this application.

[0186] As shown in Figure 8, the data generation module 307 is used to generate business data and input the business data into the first transmission module 301.

[0187] Optionally, the data generation module 307 can also be connected to an external audio and video data acquisition device. In this case, the data generation module 307 does not need to generate business data. Instead, the audio and video data acquisition device transmits the acquired business data to the data generation module, and then the data generation module transmits it to the first transmission module 301.

[0188] Optionally, the data transmission verification device is connected to an external audio and video data acquisition device. The audio and video data acquisition device can also be directly connected to the first transmission module 301. In this case, the data generation module 307 is not required, and the audio and video data acquisition device directly transmits the acquired business data to the first transmission module 301. This application embodiment does not limit this.

[0189] Optionally, the business data generated by the data generation module 307 may also include data that has been injected through faults.

[0190] Understandably, when generating business data, the data generation module 307 deliberately introduces faults into it and observes the data transmission consistency when the business data has faults. This can achieve fault injection at the physical layer and application layer, and is used to build various error scenarios for reliability verification.

[0191] For example, when generating business data, the data generation module 307 can generate and replace random numbers for individual fields in a frame of the business data, and observe whether the replaced fields in that frame are consistent during data transmission.

[0192] For example, the data generation module 307 can generate a set of invalid false data, inject it into the serializer, and observe in the deserializer whether it affects the transmission consistency of normal business data.

[0193] In one possible embodiment, the data transmission verification device 30 described above also includes a memory.

[0194] Alternatively, the memory may be double data rate synchronous dynamic random access memory (DDR).

[0195] Understandably, this DDR is used for storing audio and video files and can enable the transmission of user-specified image, video, or audio stimuli.

[0196] Optionally, the DDR can also be used to store data transmission consistency verification information such as status indications, verification and statistical results of the data transmission verification device 30.

[0197] In one possible embodiment, the data transmission verification device 30 further includes a first interface connected to the SoC.

[0198] The data transmission verification device 30 receives a first instruction through a first interface, which is used to instruct the data transmission consistency of the data conversion device to be verified.

[0199] Optionally, the data transmission verification device 30 receives a first instruction from the SoC through the first interface, and verifies the data transmission consistency of the data conversion device under the instruction of the first instruction.

[0200] Optionally, the first interface can be a PCIe interface, which enables the SoC to manage and control the data transmission verification device 30 through the PCIe interface.

[0201] In one possible embodiment, the data transmission verification device 30 further includes a second interface, which connects to at least one of the following peripherals:

[0202] Audio and video data acquisition devices, display devices, and audio playback devices.

[0203] The audio and video data acquisition device can be a camera, etc., used to acquire audio and video data and transmit it to the data transmission verification device 30 through the CSI / DSI / integrated circuit built-in audio bus (inter-IC sound, IIS) interface. The display device can include, but is not limited to, a MIPI display tool, a regular display screen, etc. The MIPI display tool is used for displaying MIPI images based on the CSI protocol, the regular display screen is used for displaying MIPI interface images based on the DSI protocol, and the audio playback device is used for audio playback based on the IIS protocol.

[0204] In one possible embodiment, the verification module 303 described above is used to verify the data transmission consistency of the data conversion device based at least on the second data, which can be implemented in the following way:

[0205] The verification module 303 is used to verify the data transmission consistency of the data conversion device by checking whether the unserialized first data and the deserialized second data are consistent.

[0206] It is understandable that if the unserialized first data and the deserialized second data are consistent, then the data transmission of the verification data conversion device is consistent; if the unserialized first data and the deserialized second data are inconsistent, then the data transmission of the verification data conversion device is inconsistent.

[0207] It is understandable that the verification module 303 here verifies the function of transmitting data by checking the unserialized first data and the deserialized second data.

[0208] Optionally, the verification module 303 can verify whether the unserialized first data and the deserialized second data are consistent based on the CRC corresponding to the unserialized first data and the CRC corresponding to the deserialized second data.

[0209] It is understandable that if the CRC corresponding to the unserialized first data is consistent with the CRC corresponding to the deserialized second data, then the unserialized first data and the deserialized second data are verified to be consistent; if the CRC corresponding to the unserialized first data is inconsistent with the CRC corresponding to the deserialized second data, then the unserialized first data and the deserialized second data are verified to be inconsistent.

[0210] Optionally, the verification module 303 is further configured to perform at least one of the following based on the unserialized first data and the deserialized second data:

[0211] Error statistics, frame format verification, and time slot statistics.

[0212] Bit error rate statistics measure the bit error rate of data transmission, reflecting the physical layer signal quality of data transmission. Its purpose is to check whether the bit error rate meets the requirements of the data transmission protocol. Frame format verification is a higher-layer data verification process that checks the consistency of the data sender's and receiver's understanding of the frame format based on the data transmission protocol. Time slot statistics measure whether the time slot design of the data sender and receiver conforms to the requirements of the data transmission protocol.

[0213] It is understandable that the verification module 303 here verifies the first data that has not been serialized and the second data that has been deserialized, which is a verification of the data transmission protocol.

[0214] Through the embodiments of this application, statistics such as negotiation time, training time, and silence duration can be used as evidence of protocol standardization. At the same time, verification and testing functions such as state detection, frame format verification, time slot statistics, bit error statistics, and specific state timing can be added.

[0215] In one possible embodiment, the verification module 303 described above is used to verify the data transmission consistency of the data conversion device based at least on the second data, and can be implemented in the following ways:

[0216] The verification module 303 is used to obtain the first check code corresponding to the unserialized first data and the second check code corresponding to the deserialized second data.

[0217] The verification module 303 is further configured to instruct the storage of the deserialized second data at a first storage address when the first check code and the second check code are the same, wherein the first storage address is the storage address corresponding to the unserialized first data.

[0218] The verification module 303 is also used to instruct the storage of the deserialized second data at a second storage address when the first check code and the second check code are different, wherein the second storage address is different from the first storage address.

[0219] It is understandable that the verification module 303 can obtain the first check code corresponding to the unserialized first data and the second check code corresponding to the deserialized second data, and verify the data transmission consistency of the data conversion device based on the first check code and the second check code.

[0220] It is understandable that if the first check code and the second check code are the same, then the data transmission of the verification data conversion device is consistent; if the first check code and the second check code are different, then the data transmission of the verification data conversion device is not consistent.

[0221] Optionally, the verification module 303 may obtain the first check code corresponding to the unserialized first data, obtain the deserialized second data and calculate the second check code corresponding to the deserialized second data, and then perform subsequent consistency verification based on the first check code and the second check code.

[0222] Alternatively, the verification module 303 may acquire the unserialized first data and calculate the first check code corresponding to the unserialized first data, acquire the deserialized second data and calculate the second check code corresponding to the deserialized second data, and then perform subsequent consistency verification based on the first check code and the second check code.

[0223] Accordingly, the verification module also provides different data storage methods for different situations of verifying the first and second verification codes.

[0224] Scenario 1:

[0225] If the first check code and the second check code are the same, the verification module 303 instructs to store the deserialized second data at the first storage address.

[0226] The first storage address is the storage address corresponding to the first data that has not been serialized. Therefore, this situation can be understood as the verification module 303 instructing the storage of the second data to overwrite the storage of the first data.

[0227] It is understandable that if the verification is consistent, the current frame data will be mapped to the storage address corresponding to the previous frame data. Ultimately, when the data comparison is correct, that is, when the current frame data has no errors, the previous frame data is overwritten, which can save storage resources.

[0228] Scenario 2:

[0229] If the first check code and the second check code are different, in this second case, the verification module 303 instructs to store the deserialized second data at the second storage address.

[0230] Since the second storage address is different from the first storage address, this second case can be understood as the verification module 303 instructing the second data to be stored separately, without overwriting the storage of the first data.

[0231] Understandably, if the verification is inconsistent, a verification error interruption signal will be generated, and data storage to the corresponding address area will stop. At this time, since the CRC verification principle is an accumulation algorithm, which is calculated based on a complete frame of data, it means that the current error frame data has been received completely, and the corresponding address area stores the previous frame data. Therefore, the previous frame data can be obtained from the corresponding address and compared with the current frame data for more precise granular verification.

[0232] For details, please refer to Figure 9, which is a schematic diagram of the principle of data verification provided in an embodiment of this application.

[0233] As shown in Figure 9, data verification is illustrated using image data verification as an example. First, the host computer retrieves an image and simultaneously transmits it to the data transmission verification device via the Ethernet port and PCIe interface, while calculating the CRC32 checksum corresponding to the image frame.

[0234] Alternatively, the polynomial for calculating the CRC32 checksum can be represented by the following formula: x 32 +x 26 +x 23 +x 22 +x 16 +x 12 +x 11 +x 10 +x 8 +x 7 +x 5 +x 4 +x 2 +x+1

[0235] The CRC32 checksum corresponding to the image frame is then immediately stored in the receiver's register via the PCIe interface. Meanwhile, the original image data from the sending side, after logical and protocol conversion and transmission, finally arrives at the data receiver's storage location. While storing the data, the receiver calculates the CRC32 checksum of the current image frame and compares it with the corresponding CRC32 checksum from the sending side. If the verification passes, it continues storing the first pixel of the next frame image, starting at the double data rate (DDR) address from the current image frame's storage address. This means each pixel in the next frame is mapped to the DDR address corresponding to the same pixel in the previous frame. Ultimately, when the data comparison is correct, meaning the image is error-free, the previous correct image frame is overwritten, saving resources on DDR and other storage units.

[0236] Understandably, this DDR is used for storing audio and video files and can enable the transmission of user-specified image, video, or audio stimuli.

[0237] Conversely, if the logic detects a discrepancy between the CRC32 checksum generated by the data sending side and the CRC32 checksum calculated by the data receiving side based on the received image data for the same image frame, an image verification error interruption signal is generated, and the storage of image data in the current address area is stopped. At this point, since the CRC checksum is based on an additive algorithm calculated from a complete image frame, it means that the content of the current erroneous image frame has been completely received, and the corresponding address stores the first erroneous image frame. After detecting the image verification error interruption, the host computer can read and export the erroneous image frame from the corresponding address in DDR via the PCIe interface. Based on this, a pixel-level comparison and verification can be performed with the original image data.

[0238] In one possible embodiment, the data transmission verification device 30 can be connected to the data conversion device based on the physical layer; or, the data transmission verification device 30 can also be connected to the data conversion device through designated field-programmable gate array (FPGA) pins based on the protocol layer.

[0239] Optionally, each module in the data transmission verification device 30 can be set on an FPGA board, in which case the data transmission verification device 30 can be understood as an FPGA board.

[0240] It is understandable that when the data conversion device is a chip-shaped serializer or deserializer, the data transmission verification device 30 can be connected to the data conversion device based on the physical layer. Optionally, the physical layer can be understood as a physical circuit board.

[0241] It is understandable that when the data conversion device is an FPGA-based serializer or deserializer, the data transmission verification device 30 can be connected to the data conversion device through designated FPGA pins based on the protocol layer.

[0242] For details, please refer to Figures 10A and 10B, which are schematic diagrams of the docking devices of several data transmission verification devices provided in the embodiments of this application.

[0243] As shown in Figure 10A, due to the influence of scenario and development process factors, the devices used may be in chip form or in FPGA hardware form. Traditional test equipment is used for interfacing with chip form devices, while the data transmission verification device 30 in this application has the characteristic of being compatible with both chip and FPGA hardware forms. When interfacing with chip form serializers / deserializers, a coaxial cable method based on the HSMT protocol is used for interfacing. When interfacing with FPGA form serializers / deserializers, FPGA pins are used to route traces to the backplane and then lead out, ultimately achieving direct digital signal interfacing.

[0244] As shown in Figure 10B, in the logic implementation function of the physical layer, the physical coding sublayer (PCS) encoding based on the HSMT protocol is encapsulated as a whole. Users can choose to connect to the device under test (DUT) at the protocol layer, that is, after passing through the logic of the protocol layer, the DUT is directly connected to the DUT (such as a serializer) through the FPGA pins. Alternatively, users can choose to connect to the DUT at the PCS layer, that is, after passing through the encapsulation module based on the physical layer PCS encoding of the HSMT protocol, parallel 8B / 10B encoded data is connected to the DUT (such as a deserializer).

[0245] Through the embodiments of this application, the data transmission verification device 30 has the characteristic of simultaneously interfacing with two hardware forms of devices: compatible chips and FPGAs. This can improve verification capabilities, realize the independent and separable physical layer functions, and solve the problem of difficult verification of FPGA-type devices.

[0246] In one possible embodiment, the data transmission verification device 30 in this application can also convert the data format to normalize all business data supported by the HSMT protocol, so as to verify the consistency of data transmission in all data formats. It can be applied to verification tests in different environments. It does not require reconstructing the stimulus source and display device for different business scenarios. It has high reusability and high degree of automation, and can realize the automated traversal of test cases.

[0247] Specifically, this can be explained by examining how the data format is converted at the sending end and how the data format is converted at the receiving end.

[0248] Scenario 1:

[0249] The second transmission module 302 in the data transmission verification device 30 is also used to convert the second data in the second data format into the target data format for storage.

[0250] It is understandable that when the second data received by the second transmission module 302 as a data receiver does not conform to the storage format, it will be converted to the target data format before storage.

[0251] Optionally, the second transmission module 302, acting as a data receiver, can rearrange the pixels of the received second data and perform bit stuffing, converting the second data transmitted in the second bit-width data format into the target bit-width data format for storage, thereby realizing the conversion of the second data in the second data format into the target data format for storage.

[0252] For details, please refer to Figure 11, which is a schematic diagram of the principle of data normalization provided in an embodiment of this application.

[0253] As shown in Figure 11, different image source data have different arrangement rules. Due to factors such as pixel bit width and bit padding, the number of fixed pixels and the fixed data bit width required for different image conversions to the internal hardware logic vary. Different image protocol conversions require different logic implementations. Current image injection devices are based on mainstream image services, while the data transmission verification device 30 in this application performs data image normalization processing and can support all image format services specified in the HSMT protocol. Internally, the logic mainly needs to implement two functions: pixel rearrangement and bit width conversion. The implementation principle is as follows:

[0254] Image source data normalization mainly consists of two queues, xfifo and sfifo, and their corresponding control logic. Among them, xfifo is used for pixel rearrangement, and sfifo is used for data bit width conversion.

[0255] Taking the data receiver as an example, it first obtains the source data (B1, B2, ..., Bn) through the CSI interface. For example, RAW12 format image data, each pixel has only twelve bits that are valid. For example, the valid bits B1, B2, B3, B4, B5, B6 are hexadecimal 0x01, 0x23, 0x45, 0x67, 0x89, 0xab...

[0256] The acquired source data has issues with bit padding and a mismatch between the data bit width and pixel arrangement and the input requirements, making direct storage impossible. Since image files are stored with pixels arranged byte-wise according to CSI and HSMT protocols, 8 bits can be used as the smallest unit for image data bit width conversion. Based on a fixed input bit width, the source image data is first decomposed into multiple 8-bit queues: 0x01, 0x23, 0x45, 0x67, 0x89, and 0xab. These queues are then pushed into the xfifo, as shown in step ① of Figure 11.

[0257] Different image formats require different numbers of data bits for the same number of pixels. xfifo, assuming sufficient data in the queue, sends out the required number of bits (B1, B2, B3, ..., Bm) for four or multiples of four pixels, as shown in step ② of Figure 11. It's important to note that sending out the required number of bits for four pixels here refers to the four-pixel transmission mode for CSI; for other pixel modes, the corresponding multiples should be configured.

[0258] At this point, the data can be rearranged pixelally and stuffed bitwise to form the data (P1, P2, ..., Pi) required for step ③. For example, data P1, P2, P3, and P4 are 0x0102, 0x3405, 0x6708, and 0x9a0b, respectively. It's understandable that step ③ doesn't change the data, but only divides it into eight-bit data widths. The data width after pixel rearrangement and stuffing varies depending on the image data format, while the data ultimately stored in DDR is fixed. Therefore, it needs to undergo bit width conversion via an asynchronous queue (sfifo). When inputting data into queue ④, the write pointer increments by the number of bytes in queue ④. When sending data outwards, the read pointer is fixedly incremented by the number of bytes contained in the stored data. Finally, queue ⑤ is concatenated into the final output single large-width data (0x0102340567089a0b). Finally, the image data undergoes pixel rearrangement, bit stuffing, and bit width conversion after passing through xfifo and sfifo, enabling the normalization of audio and video data transmission and reception. Internally, it is compatible with all image formats through bit width conversion and pixel rearrangement.

[0259] Through the embodiments of this application, data transmission consistency verification can be performed that is compatible with all data formats, and the normalization of all business data supported by the HSMT protocol can be achieved, solving the problem that different business tests rely on different verification test environments.

[0260] Scenario 2:

[0261] The first transmission module 301 in the data transmission verification device 30 is also used to convert the first data stored in the target data format into the first data format for transmission.

[0262] It is understandable that when the first transmission module 301, as the data sender, stores the first data to be sent in the target data format, it will convert it to the first data format before sending it.

[0263] Optionally, the first transmission module 301, acting as a data transmitter, can convert the first data stored in the target bit-width data format into a first bit-width data format, and then perform bit stuffing and rearrangement on the pixels of the first data after bit-width conversion before sending it, thereby realizing the conversion of the first data stored in the target data format into the first data format for transmission.

[0264] Taking the data sender as an example, refer to the data normalization principle of the data receiver shown in Figure 11. The mirroring function can be achieved by reversing the process through sfifo and xfifo, which will not be elaborated further here. Based on this data normalization principle, the transmission and reception of audio and video data services can be normalized. Internally, through bit-width conversion and pixel rearrangement, it can be compatible with all image formats.

[0265] Through the embodiments of this application, data transmission consistency verification can be performed that is compatible with all data formats, and the normalization of all business data supported by the HSMT protocol can be achieved, solving the problem that different business tests rely on different verification test environments.

[0266] In addition, this application also provides a data transmission verification device, which includes, but is not limited to, a host computer control board and the data transmission verification device shown in any one of Figures 3 to 8 above.

[0267] For details, please refer to Figure 12, which is a schematic diagram of the structure of a data transmission verification device provided in an embodiment of this application.

[0268] As shown in Figure 12, the data transmission verification device 120 includes a host computer control board 40 and the data transmission verification device 30 shown in Figure 3 above.

[0269] The host computer control board 40 includes a SoC, and the data transmission verification device 30 includes a first interface. The data transmission verification device 30 is connected to the SoC through the first interface.

[0270] Optionally, the data transmission verification device 30 can be mounted on the host computer control board 40.

[0271] Optionally, the first interface can be a PCIe interface, which enables the SoC of the host computer control board 40 to manage and control the data transmission verification device 30 through the PCIe interface.

[0272] It is understandable that the data transmission verification device 30 can receive instructions from the SoC of the host computer control board 40 through the first interface, and verify the data transmission consistency of the data conversion device under the instruction of the instructions.

[0273] Optionally, the host computer and the host computer control board are connected via an Ethernet interface. Users can issue commands through the host computer to indirectly control the data transmission verification device (FPGA) to run target functions. The host computer control board uses an ScC chip as a control transfer intermediary and connects to the FPGA development board via a PCIe interface, thus realizing the control forwarding function. Ultimately, users can perform human-computer interaction through the host computer.

[0274] The data transmission verification device 120 in this embodiment can support independent connection with the serializer chip for data transmission consistency verification, or it can support independent connection with the deserializer chip for data transmission consistency verification. This enables decoupling of the two chips during data transmission consistency verification, so that if one chip has a problem or is replaced, it will not affect the testing and verification of the other chip.

[0275] For example, the data transmission verification device 120 in this application embodiment can implement the protocol functions of serializer and deserializer based on the HSMT protocol. Therefore, it can be used as a general test instrument to test and verify the consistency of data transmission protocol based on the HSMT protocol, and can effectively ensure the verification of HSMT protocol consistency.

[0276] In one possible embodiment, the host computer control board 40 also includes a third interface.

[0277] The third interface connects to the host computer.

[0278] Understandably, the host computer control board 40 can receive a second instruction from the host computer through the third interface, and under the instruction of the second instruction, instruct the data transmission verification device 30 to verify the data transmission consistency of the data conversion device.

[0279] Optionally, the third interface can be an Ethernet interface.

[0280] In one possible embodiment, the data transmission verification device 30 further includes a second interface.

[0281] The second interface can connect to at least one of the following peripherals:

[0282] Audio and video data acquisition devices, display devices, and audio playback devices.

[0283] The audio and video data acquisition device can be a camera, etc., used to acquire audio and video data and transmit it to the data transmission verification device. The display device can include, but is not limited to, a display tool, a regular display screen, etc. The display tool is used for displaying MIPI images based on the CSI protocol, and the regular display screen is used for displaying MIPI interface images based on the DSI protocol.

[0284] Optionally, the data transmission verification device 120 in this application embodiment may also include, but is not limited to, one or more peripherals connected through the second interface as described above. This application embodiment does not impose any restrictions on this.

[0285] In addition, this application also provides a data transmission verification system, which includes a data conversion device and a data transmission verification device as shown in any one of Figures 3 to 8 above, or a data transmission verification device as shown in Figure 12 above.

[0286] Optionally, the data conversion device is used to convert the data transmission format, and the data transmission verification device or data transmission verification equipment is used to verify the data transmission consistency of the data conversion device.

[0287] In addition, this application also provides a mobile terminal, which includes the data transmission verification device shown in any one of Figures 3 to 8, or the data transmission verification equipment shown in Figure 12, or the data transmission verification system.

[0288] It should be understood that the mobile terminals involved in this application can include intelligent terminals or means of transportation such as vehicles, robots, drones, ships, and vessels. Among them, "vehicle" is a vehicle in a broad sense, and can be means of transportation (such as commercial vehicles, passenger cars, motorcycles, flying cars, trains, etc.), industrial vehicles (such as forklifts, trailers, tractors, etc.), engineering vehicles (such as excavators, bulldozers, cranes, etc.), agricultural equipment (such as lawnmowers, harvesters, etc.). Similarly, "robot" can refer to intelligent guided vehicles (AGVs), walking conversational robots, service robots, etc.

[0289] It should be understood that the embodiments shown in Figures 3 to 8 and 12 above are merely illustrative examples of several possible data transmission verification devices and data transmission verification equipment provided in this application, and should not be construed as limiting this application. Any new embodiments obtained by reasonable modifications, additions or combinations of the embodiments shown in Figures 3 to 8 and 12 above shall fall within the protection scope of this application.

[0290] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A data transmission verification device, characterized in that, The data transmission verification device includes: First transmission module, second transmission module, verification module; The first transmission module is used to send first data to the data conversion device, wherein the transmission format of the first data is a first transmission format; The second transmission module is used to receive second data from the data conversion device. The second data is transmitted in a second transmission format. The second data includes the data output after the first data is input to the data conversion device. The first transmission format and the second transmission format are different. The verification module is used to verify the data transmission consistency of the data conversion device based at least on the second data.

2. The data transmission verification device according to claim 1, characterized in that, The first transmission module is further configured to send the input service data as the first data; The second transmission module is also used to deserialize the second data.

3. The data transmission verification device according to claim 1, characterized in that, The first transmission module is also used to serialize the input service data to obtain the first data.

4. The data transmission verification device according to any one of claims 1 to 3, characterized in that, The data transmission verification device further includes: Control register; The control register is used to configure the second transmission module to enable or disable the deserialization function, or to configure the first transmission module to enable or disable the serialization function.

5. The data transmission verification device according to any one of claims 1 to 4, characterized in that, The data transmission verification device further includes: Data generation module; The data generation module is used to generate business data and input the business data into the first transmission module.

6. The data transmission verification device according to claim 5, characterized in that, The business data includes data that has been injected with faults.

7. The data transmission verification device according to any one of claims 1 to 6, characterized in that, The verification module is used to verify the data transmission consistency of the data conversion device based at least on the second data, including: The verification module is used to verify whether the unserialized first data and the deserialized second data are consistent.

8. The data transmission verification device according to claim 7, characterized in that, The verification module is further configured to perform at least one of the following based on the unserialized first data and the deserialized second data: Error statistics, frame format verification, and time slot statistics.

9. The data transmission verification device according to any one of claims 1 to 8, characterized in that, The data transmission verification device further includes a first interface, which is connected to the system-on-a-chip (SoC). The data transmission verification device receives a first instruction through the first interface, the first instruction being used to instruct the data transmission consistency of the data conversion device to be verified.

10. The data transmission verification device according to any one of claims 1 to 9, characterized in that, The data transmission verification device further includes a second interface, which is connected to at least one of the following peripherals: Audio and video data acquisition devices, display devices, and audio playback devices.

11. The data transmission verification device according to any one of claims 1 to 10, characterized in that, The verification module is used to verify the data transmission consistency of the data conversion device based at least on the second data, including: The verification module is used to obtain the first check code corresponding to the unserialized first data and the second check code corresponding to the deserialized second data. The verification module is further configured to instruct the storage of the deserialized second data at a first storage address when the first verification code and the second verification code are the same, wherein the first storage address is the storage address corresponding to the unserialized first data; The verification module is further configured to instruct the storage of the deserialized second data at a second storage address, which is different from the first storage address, when the first verification code and the second verification code are different.

12. The data transmission verification device according to any one of claims 1 to 11, characterized in that, The data transmission verification device is connected to the data conversion device at the physical layer; or, the data transmission verification device is connected to the data conversion device at the protocol layer through specified field-programmable gate array (FPGA) pins.

13. The data transmission verification device according to any one of claims 1 to 12, characterized in that, The second transmission module is further configured to convert the second data in the second data format into the target data format for storage.

14. The data transmission verification device according to any one of claims 1 to 13, characterized in that, The first transmission module is further configured to convert the first data stored in the target data format into a first data format for transmission.

15. A data transmission verification device, characterized in that, Includes a host computer control board and a data transmission verification device according to any one of claims 1 to 14; The host computer control board includes a system-on-a-chip (SoC), and the data transmission verification device includes a first interface, which is connected to the SoC.

16. The data transmission verification device according to claim 15, characterized in that, The host computer control board also includes a third interface, which is connected to the host computer. The host computer control board receives a second instruction from the host computer through the third interface, and instructs the data transmission verification device to verify the data transmission consistency of the data conversion device under the instruction of the second instruction.

17. A data transmission verification system, characterized in that, It includes a data conversion device, and a data transmission verification device as claimed in any one of claims 1 to 14 or a data transmission verification device as claimed in any one of claims 15 to 16.

18. A mobile terminal, characterized in that, It includes the data transmission verification device as described in any one of claims 1 to 14, the data transmission verification equipment as described in any one of claims 15 to 16, or the data transmission verification system as described in claim 17.

Images