Measurement method, measurement system, and inspection device

Abstract

Provided is a measurement method comprising: a step for projecting a pattern on a measurement target; a step for receiving light of a first reflection pattern which is obtained by reflection of the pattern by the measurement target; a step for projecting the pattern on a reference surface which serves as a reference for parallelism; a step for receiving light of a second reflection pattern which is obtained by reflection of the pattern by the reference surface; a step for observing the first reflection pattern and the second reflection pattern; and a step for measuring the parallelism between the measurement target and the reference surface on the basis of the difference between the first reflection pattern and the second reflection pattern.

Description

Measurement method, measurement system, and inspection device

[0001] The present disclosure relates to a measurement method, a measurement system, and an inspection apparatus.

[0002] There is a technology for measuring the parallelism between an object to be measured and a reference surface. For example, Patent Document 1 discloses an inspection device that includes a support base for supporting an object under test, and a parallelism detection means that is provided above the support base and is made up of an imaging device for detecting the parallelism between the object under test and a probing card, and that presses the tip of the probing card against the object under test to form a trace that is detected by the parallelism detection means.

[0003] Japanese Patent Application Publication No. 4-207047

[0004] The present disclosure provides a technique for accurately measuring the parallelism between a measurement object and a reference surface.

[0005] According to one aspect of the present disclosure, there is provided a measurement method comprising the steps of: projecting a pattern onto a measurement object; receiving a first reflected pattern obtained by reflecting the pattern by the measurement object; projecting the pattern onto a reference surface that serves as a reference for parallelism; receiving a second reflected pattern obtained by reflecting the pattern by the reference surface; observing the first reflected pattern and the second reflected pattern; and measuring the parallelism between the measurement object and the reference surface based on the difference between the first reflected pattern and the second reflected pattern.

[0006] According to one aspect, the parallelism between the measurement object and the reference surface can be measured with high precision.

[0007] FIG. 1 is a schematic cross-sectional view showing an example of an inspection apparatus. FIG. 2 is a schematic cross-sectional view showing an example of a camera unit according to the first embodiment. FIG. 3 is a block diagram showing an example of the hardware configuration of a computer. FIG. 4 is a block diagram showing an example of the functional configuration of a control device. FIG. 5 is a diagram showing an example of a captured image when a measurement target and a reference surface are parallel. FIG. 6 is a diagram showing an example of a captured image when a measurement target and a reference surface are not parallel. FIG. 7 is a diagram showing an example of a parallelism measurement method according to the first embodiment. FIG. 8A is a diagram showing an example of the linearity of irradiated light when the light source is an LED. FIG. 8B is a diagram showing an example of the linearity of irradiated light when the light source is a VcseI. FIG. 8C is a diagram showing an example of the linearity of irradiated light when the light source is a Laser. FIG. 9A is a diagram showing an example of a dot size when a semiconductor wafer and a reference surface are parallel. FIG. 9B is a diagram showing an example of a dot size when a semiconductor wafer and a reference surface are not parallel. FIG. 10 is a diagram showing an example of the relationship between the presence or absence of tilt and a captured image. FIG. 11 is a flowchart showing an example of an inspection method. FIG. 12 is a schematic cross-sectional view showing an example of a camera unit according to the second embodiment. FIG. 13 is a diagram showing a modified example of the parallelism measuring method according to the second embodiment.

[0008] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and redundant explanations may be omitted.

[0009] First Embodiment One embodiment of the present disclosure is an inspection apparatus that inspects an object under test. The object under test may include, for example, a semiconductor device, a photonic integrated circuit (PIC), or a co-package optics (CPO). In this embodiment, the inspection apparatus may inspect electrical characteristics of a semiconductor device formed on a semiconductor wafer by contacting needle tips of probes provided on a probe card with electrodes (test pads) provided on the semiconductor wafer. The inspection apparatus may inspect optical characteristics of a photonic integrated circuit using a ferrule or a waveguide.

[0010] In recent years, inspection equipment has been required to have higher-precision alignment performance. For example, optical inspection of silicon photonics requires alignment accuracy on the submicron level. Therefore, in order to improve the parallelism between the mounting stage on which the test object is placed and the probe card, a technology is needed to measure the parallelism between the mounting stage and the probe card with high precision.

[0011] The inspection device according to this embodiment is an example of a measurement system that measures the parallelism between a measurement object and a reference surface. The inspection device includes a camera unit for measuring the parallelism between a semiconductor wafer, which is an example of the measurement object, and the reference surface. Based on the parallelism measured using the camera unit, the inspection device adjusts a mounting table on which the semiconductor wafer is placed, and brings probe tips into contact with test pads.

[0012] The reference plane is, for example, a plane including the tips of the probes provided on the probe card. The camera unit is adjusted in advance so as to capture an image of the semiconductor wafer in a direction perpendicular to the reference plane.

[0013] In one aspect, this embodiment allows the parallelism between the semiconductor wafer and the reference surface to be measured with high precision. In another aspect, this embodiment allows the mounting table to be adjusted based on the measured parallelism so that the semiconductor wafer is parallel to the reference surface, thereby allowing the probe tips to be brought into contact with the test pads with high precision.

[0014] <Inspection Apparatus> An example of an inspection apparatus according to this embodiment will be described with reference to Fig. 1. Fig. 1 is a schematic cross-sectional view showing an example of the inspection apparatus.

[0015] As shown in Fig. 1, the inspection apparatus 10 includes an inspection apparatus main body 20 and a control device 50. The inspection apparatus main body 20 includes a hollow housing 21. A movement mechanism 23 is provided in the approximate center of the housing 21, which moves a mounting table 25 in the vertical direction (the z-axis direction shown in Fig. 1) and the horizontal direction (directions within the xy plane parallel to the x-axis and y-axis shown in Fig. 1). A semiconductor wafer W is placed on the upper surface of the mounting table 25. The mounting table 25 holds the semiconductor wafer W placed on its upper surface by suction using a vacuum chuck or the like.

[0016] A camera unit 41 is provided on the side of the mounting table 25. The camera unit 41 is movable to a position facing a probe card 33, which will be described later. For example, the mounting table 25 is moved by the movement mechanism 23, which causes the camera unit 41 provided on the side of the mounting table 25 to move. The movement mechanism 23 is controlled by the control device 50. The amount of movement of the movement mechanism 23 is managed by the control device 50. The position of the camera unit 41 within the housing 21 is managed by the control device 50.

[0017] A camera unit 42 is provided within the housing 21. The camera unit 42 is movable to a position facing the mounting table 25. The camera unit 42 is adjusted in advance so that it can capture an image of the mounting table 25 or the semiconductor wafer W mounted on the mounting table 25. The position of the camera unit 42 within the housing 21 is managed by the control device 50.

[0018] The camera unit 42 is configured to project a predetermined pattern in a predetermined direction. In this embodiment, the predetermined pattern is a dot pattern in which a plurality of dots are arranged. The camera unit 42 is provided to project the dot pattern in an imaging direction. When the camera unit 42 projects the dot pattern in the imaging direction at a position facing the mounting table 25, the dot pattern is projected onto the surface of the semiconductor wafer W placed on the upper surface of the mounting table 25.

[0019] The camera unit 42 is configured to receive light incident from a predetermined direction. In this embodiment, the camera unit 42 is configured to receive light incident from the imaging direction. The camera unit 42 projects a dot pattern onto the semiconductor wafer W at a position opposite the mounting table 25, and can therefore receive the dot pattern reflected by the semiconductor wafer W.

[0020] The camera unit 42 observes the projected dot pattern and captures an image including the observed dot pattern. Furthermore, the camera unit 42 observes the received dot pattern and captures an image including the observed dot pattern. In this embodiment, the camera unit 42 is configured to simultaneously observe the projected dot pattern and the received dot pattern and capture an image in which the projected dot pattern and the received dot pattern are superimposed. However, the camera unit 42 may separately capture an image including the projected dot pattern and an image including the received dot pattern. Furthermore, the camera unit 42 may observe the projected dot pattern and the received dot pattern at different times.

[0021] The housing 21 has a substantially circular opening at the top. A test head 30 is provided in the opening of the housing 21. The test head 30 is connected to a probe card 33 provided with a plurality of probes 34 via an interface 32. The interface 32 detachably holds the probe card 33 at its bottom. The plurality of probes 34 provided on the probe card 33 are provided on the probe card 33 with their needle tips facing downward. The probe card 33 may have probes 34 capable of optical inspection.

[0022] The probe card 33 has a plurality of probes 34 arranged so that when the semiconductor wafer W placed on the mounting table 25 is moved to a position for testing, the needle tips of the probes 34 come into contact with test pads provided on the semiconductor wafer W. The probes 34 are connected to wiring provided on the probe card 33. The wiring provided on the probe card 33 may include optical fibers and electric cables. The wiring provided on the probe card 33 is connected to the test head 30 via wiring provided on the interface 32. An external tester 31 is connected to the test head 30.

[0023] When inspecting the semiconductor wafer W placed on the mounting table 25, the control device 50 moves the camera unit 41 to a position facing the mounting table 25. The control device 50 adjusts the position and orientation of the mounting table 25 based on the image captured by the camera unit 41. Specifically, the control device 50 controls the position of the mounting table 25 in the xy plane and the inclination of the mounting table 25 with respect to the z axis using the movement mechanism 23 so that the tips of the probes 34 and the test pads on the semiconductor wafer W placed on the mounting table 25 are positioned opposite each other. Note that the position of the mounting table 25 in the xy plane may already be adjusted.

[0024] After adjusting the position and orientation of the mounting table 25, the control device 50 raises the mounting table 25 to bring the tips of the probes 34 into contact with the test pads on the semiconductor wafer W. The control device 50 then controls the external tester 31 to output predetermined test signals to the test head 30. The test signals may include electrical signals and optical signals. The test head 30 outputs the test signals output from the external tester 31 to the probe card 33 via the interface 32. The test signals output to the probe card 33 are supplied to the probes 34 via wiring within the probe card 33. The test signals supplied to the probes 34 are output to the semiconductor wafer W via the probes 34.

[0025] The inspection signal output from the semiconductor wafer W is input to the probe 34. The inspection signal input to the probe 34 is output to the test head 30 via wiring in the probe card 33 and wiring in the interface 32. The inspection signal output to the test head 30 is output to the external tester 31.

[0026] The external tester 31 evaluates the electrical and optical characteristics of the semiconductor wafer W based on the electrical and optical signals output to the test head 30 and the electrical and optical signals output from the test head 30, and outputs the evaluation results to the control device 50.

[0027] <Camera Unit> The configuration of the camera unit 42 according to this embodiment will be described with reference to Fig. 2. Fig. 2 is a schematic cross-sectional view showing an example of the camera unit according to the first embodiment.

[0028] As shown in FIG. 2, the camera unit 42 includes a projection unit 61 , a bright field illuminator 62 , an imaging unit 63 , a mirror 64 , dark field illuminators 65 - 1 and 65 - 2 , a half mirror 66 , a mirror 67 , a prism 68 , and a mirror 69 .

[0029] The projection unit 61 includes a white light source 71 and an aperture substrate 72. The white light source 71 emits strong white light. For example, the white light source 71 may be a light-emitting diode (LED) or a semiconductor laser (LD). In this embodiment, the white light source 71 is an LED light source.

[0030] The aperture substrate 72 forms a predetermined pattern in the strong white light irradiated from the white light source 71. As an example, the aperture substrate 72 may be a multilayer pure chromium substrate with a thickness of 2000 Å. A predetermined pattern may be formed on the multilayer pure chromium substrate, which is an example of the aperture substrate 72, by dry etching. In this embodiment, the aperture substrate 72 divides the strong white light into a plurality of dots, thereby forming a dot pattern including a plurality of dots. Hereinafter, the dot pattern formed in the strong white light will be referred to as a "projection pattern." The projection pattern is an example of a pattern.

[0031] The strong white light on which the projection pattern has been formed by the aperture substrate 72 is incident on the prism 68. The prism 68 transmits the incident strong white light in the irradiation direction and branches the light in directions perpendicular to the irradiation direction.

[0032] The strong white light transmitted through the prism 68 passes through the half mirror 66 and the mirror 64 and is projected downward. As a result, a projection pattern formed in the strong white light is projected onto the semiconductor wafer W. The projection pattern projected onto the semiconductor wafer W can be observed at the focal point FP by illumination from the dark field illuminations 65-1 and 65-2. The working distance WD is the distance between the camera unit 42 and the focal point FP.

[0033] The strong white light branched by the prism 68 is reflected by the mirror 69, passes through the prism 68, and is irradiated onto the imaging unit 63. The reflected light reflected by the mirror 69 contains a dot pattern formed in the strong white light by the aperture substrate 72. This makes it possible for the imaging unit 63 to capture an image of the projection pattern formed in the strong monochromatic light. The mirror 69 is pre-adjusted to be parallel to the reference plane R. Hereinafter, the dot pattern contained in the reflected light will be referred to as the "reflection pattern." The dot pattern contained in the reflected light reflected by the mirror 69 is an example of a second reflection pattern. The prism 68 is an example of a second light-receiving unit.

[0034] The bright field illumination 62 is an illumination that emits visible light. The visible light emitted by the bright field illumination 62 passes through a mirror 67 and a half mirror 66 and is emitted in the direction of the strong white light. The visible light emitted by the bright field illumination 62 merges with the strong white light emitted by the white light source 71 at the half mirror 66. The visible light emitted by the bright field illumination 62 makes it possible to inspect the surface of the semiconductor wafer W for abnormalities.

[0035] The projection pattern projected from the camera unit 42 onto the semiconductor wafer W is reflected by the surface of the semiconductor wafer W in the direction of the camera unit 42. The camera unit 42 receives the incident reflected light by the mirror 64. The reflected light incident on the camera unit 42 includes a dot pattern formed in the strong white light by the aperture substrate 72. The dot pattern included in the reflected light reflected by the surface of the semiconductor wafer W is an example of a first reflected pattern.

[0036] The mirror 64 reflects the reflected light incident on the camera unit 42 in a direction that allows it to be captured by the imaging section 63. The reflected light reflected by the mirror 64 passes through the half mirror 66 and the prism 68 and is then irradiated onto the imaging section 63. This allows the reflection pattern contained in the reflected light to be captured by the imaging section 63. The mirror 64 is an example of a first light receiving section.

[0037] The imaging unit 63 observes the strong white light reflected by the mirror 69 and the light reflected by the semiconductor wafer W, and captures an image including the first reflection pattern and the second reflection pattern. The first reflection pattern and the second reflection pattern are merged by the prism 68 and irradiated onto the imaging unit 63. Therefore, the imaging unit 63 can simultaneously capture the first reflection pattern and the second reflection pattern. The image captured by the imaging unit 63 has the first reflection pattern and the second reflection pattern superimposed thereon. Hereinafter, the image captured with the first reflection pattern and the second reflection pattern superimposed thereon will be referred to as the "captured image."

[0038] <Control Device> The control device 50 is realized by a computer having a hardware configuration as shown in Fig. 3. Fig. 3 is a block diagram showing an example of the hardware configuration of a computer.

[0039] 3, the computer 500 includes an input device 501, an output device 502, an external I / F (interface) 503, a RAM (random access memory) 504, a ROM (read only memory) 505, a CPU (central processing unit) 506, a communication I / F 507, and an HDD (hard disk drive) 508, all of which are interconnected by a bus B. The input device 501 and the output device 502 may be connected and used when necessary.

[0040] The input device 501 is a keyboard, mouse, touch panel, etc., and is used by an operator or the like to input various operation signals. The output device 502 is a display, etc., and displays the results of processing by the computer 500. The communication I / F 507 is an interface that connects the computer 500 to a network. The HDD 508 is an example of a non-volatile storage device that stores programs and data.

[0041] The external I / F 503 is an interface with an external device. The computer 500 can read and / or write data from and to a recording medium 503a such as an SD (Secure Digital) memory card via the external I / F 503. The ROM 505 is an example of a non-volatile semiconductor memory (storage device) that stores programs and data. The RAM 504 is an example of a volatile semiconductor memory (storage device) that temporarily stores programs and data.

[0042] The CPU 506 is a computing device that reads programs and data from storage devices such as the ROM 505 and HDD 508 onto the RAM 504 and executes processing to realize overall control and functions of the computer 500 .

[0043] <Functional Configuration> The functional configuration of the control device 50 will be described with reference to Fig. 4. Fig. 4 is a diagram showing an example of the functional configuration of the control device.

[0044] 4, the control device 50 includes a projection control unit 101, a light-receiving control unit 102, an image acquisition unit 103, a dot selection unit 104, a parallelism measurement unit 105, and a mounting table adjustment unit 106. For example, the projection control unit 101, the light-receiving control unit 102, the image acquisition unit 103, the dot selection unit 104, the parallelism measurement unit 105, and the mounting table adjustment unit 106 are realized by the CPU 506 shown in FIG. 3 executing a program loaded on the RAM 504.

[0045] The projection control unit 101 controls the camera unit 42 to project a projection pattern. The projection control unit 101 may also control the camera unit 42 to change the brightness of the projection pattern projected from the camera unit 42 depending on the height of the mounting table 25.

[0046] The light reception control unit 102 controls the camera unit 42 to receive the reflection pattern reflected by the semiconductor wafer W. The control to cause the camera unit 42 to receive the reflection pattern includes control to move the camera unit 42 to a position where the reflection pattern can be received.

[0047] The image acquisition unit 103 controls the camera unit 42 to capture a photographed image. The image acquisition unit 103 acquires the photographed image captured by the imaging unit 63 of the camera unit 42. If optical distortion occurs in the photographed image, the image acquisition unit 103 may correct the optical distortion.

[0048] The dot selection unit 104 selects dots to be used for measuring parallelism from among a plurality of dots included in the captured image. Specifically, the dot selection unit 104 excludes dots for which the distance between a dot included in the projection pattern and a dot included in the reflection pattern indicates an abnormal value from the dots to be used for measuring parallelism. The abnormal distance value may be determined based on the distribution of the distances of each dot included in the captured image.

[0049] In this embodiment, the parallelism between the semiconductor wafer W and the reference surface R is measured based on the distance between the dots included in the projected pattern and the dots included in the reflected pattern. If the semiconductor wafer W is parallel to the reference surface R, the distance between the dots included in the projected pattern and the dots included in the reflected pattern will be minimal. Conversely, the distance between the dots included in the projected pattern and the dots included in the reflected pattern indicates the degree of inclination of the semiconductor wafer W with respect to the reference surface R. However, the inclination of the semiconductor wafer W is not the only cause of the distance between the dots included in the projected pattern and the dots included in the reflected pattern. For example, if the semiconductor wafer W is locally soiled or scratched, the distance between the projected pattern and the reflected pattern may be large for some dots. By excluding dots for which the distance between the dots included in the projected pattern and the dots included in the reflected pattern indicates an abnormal value from the dots used in measuring the parallelism, the parallelism between the semiconductor wafer W and the reference surface R can be measured more accurately.

[0050] The parallelism measurement unit 105 measures the parallelism between the semiconductor wafer W and the reference surface R based on the captured image acquired by the image acquisition unit 103. Specifically, the parallelism measurement unit 105 detects the inclination of the semiconductor wafer W with respect to the reference surface R based on the difference between the projected pattern and the reflected pattern included in the captured image. At this time, the parallelism measurement unit 105 may measure the parallelism between the semiconductor wafer W and the reference surface R using only the dots selected by the dot selection unit 104 from among the dots included in the captured image.

[0051] The mounting table adjustment unit 106 controls the adjustment of the mounting table 25. The mounting table adjustment unit 106 adjusts the inclination of the mounting table 25 based on the parallelism between the semiconductor wafer W and the reference surface R measured by the parallelism measurement unit 105.

[0052] The mounting table adjustment unit 106 controls the lifting of the mounting table 25 so that the tips of the probes 34 come into contact with the test pads on the semiconductor wafer W. When the mounting table adjustment unit 106 changes the height of the mounting table 25, it may notify the projection control unit 101 of the amount of change in height. The projection control unit 101 may adjust the brightness of the projection pattern according to the amount of change in height.

[0053] <<Photographed Image>> A photographed image captured by the camera unit 42 will be described with reference to Fig. 5 and Fig. 6. Fig. 5 is a diagram showing an example of a photographed image when the measurement object and the reference surface are parallel. Fig. 6 is a diagram showing an example of a photographed image when the measurement object and the reference surface are not parallel.

[0054] As shown in Figures 5 and 6, a dot pattern including a plurality of dots is captured in the captured image 100. The plurality of dots may be randomly arranged within the dot pattern. The plurality of dots may be arranged within the dot pattern so as to be asymmetric with respect to a predetermined axis. The predetermined axis may be the x-axis or y-axis in the image coordinate system. The axis along which the plurality of dots are asymmetric is not limited to the x-axis or y-axis, and any axis may be set.

[0055] 5, when a semiconductor wafer W, which is an example of a measurement target, is parallel to a reference plane R, the dots included in the projected pattern and the dots included in the reflected pattern are positioned substantially identically. In addition, the dots captured in the captured image are of substantially uniform size overall.

[0056] As shown in FIG. 6 , if a semiconductor wafer W, which is an example of a measurement target, is not parallel to the reference surface R, the dots included in the projected pattern and the dots included in the reflected pattern will be misaligned. In this embodiment, the tilt of the semiconductor wafer W is assumed to be minimal, so the dots included in the projected pattern and the dots included in the reflected pattern will partially overlap. As a result, the dots appear in the captured image as elliptical or capsule-shaped (cylindrical shapes with hemispherical ends). Furthermore, because the tilt of the semiconductor wafer W causes the distance between the semiconductor wafer W and the camera unit 42 to be non-uniform, the dots captured in the captured image will have a non-uniform size.

[0057] <<Measurement of Parallelism>> A method for measuring the parallelism between a measurement object and a reference surface based on a captured image according to this embodiment will be described with reference to Fig. 7. Fig. 7 is a diagram showing an example of the parallelism measurement method according to the first embodiment.

[0058] 7, when the semiconductor wafer W is not parallel to the reference plane R, the center position O1 of the dot D1 included in the projection pattern and the center position O2 of the dot D2 included in the reflection pattern are at different positions. The greater the inclination of the semiconductor wafer W with respect to the reference plane R, the greater the distance L1 between the center position O1 and the center position O2.

[0059] Therefore, by calculating the distance between the center positions of each dot captured in the captured image, the inclination of the semiconductor wafer W with respect to the reference surface R can be detected. Furthermore, based on the magnitude of the inclination detected for each dot, the parallelism between the semiconductor wafer W and the reference surface R can be measured. In this embodiment, the greater the distance between the center positions, the greater the inclination of the semiconductor wafer W with respect to the reference surface R, and the lower the parallelism between the semiconductor wafer W and the reference surface R.

[0060] <<Type of Light Source>> If a light source with low linearity is used as the light source that projects the dot pattern, the parallelism between the semiconductor wafer W and the reference surface R can be measured with higher accuracy. In the present embodiment, as an example, the white light source 71 that projects the dot pattern is configured as an LED light source.

[0061] 8A to 8C are diagrams showing examples of the linearity of the irradiated light for each light source. Fig. 8A shows an example of the linearity of the irradiated light when the light source is an LED. Fig. 8B shows an example of the linearity of the irradiated light when the light source is a VcseI (Vertical Cavity Surface Emitting Laser). Fig. 8C shows an example of the linearity of the irradiated light when the light source is a Laser.

[0062] As shown in Figure 8C, the laser has high linearity, and the range of light irradiation is narrow even if the irradiation distance is long. On the other hand, as shown in Figure 8A, the LED has low linearity, and the range of light irradiation becomes wider as the irradiation distance becomes longer. Note that, as shown in Figure 8B, the linearity of Vcse is intermediate between that of the LED and the laser.

[0063] 9A and 9B are diagrams showing an example of dot size according to parallelism. Fig. 9A shows an example of dot size when the semiconductor wafer W is parallel to the reference surface R. Fig. 9B shows an example of dot size when the semiconductor wafer W is not parallel to the reference surface R.

[0064] 9A, when the semiconductor wafer W and the reference surface R are parallel, the sizes S1, S2, and S3 of the projected dots D1, D2, and D3 are approximately the same. On the other hand, as shown in FIG. 9B, when the semiconductor wafer W and the reference surface R are not parallel, the sizes S1, S2, and S3 of the projected dots D1, D2, and D3 are different. Specifically, the shorter the irradiation distance, the smaller the dot size, and the longer the irradiation distance, the larger the dot size.

[0065] In this case, if the light has low linearity, the difference in the light irradiation range caused by the difference in irradiation distance becomes larger. For example, if the light source is an LED, the difference in sizes S1, S2, and S3 in Figures 9A and 9B will be larger than when the light source is a laser. In other words, if a dot pattern is projected using a light source with low linearity, the difference in dot size becomes more noticeable, and the inclination of the semiconductor wafer W can be detected with higher accuracy.

[0066] Fig. 10 is a diagram showing an example of the relationship between the presence or absence of tilt and the captured image. Fig. 10 shows a captured image when the semiconductor wafer W is tilted (in other words, when the semiconductor wafer W is parallel to the reference surface R) and a captured image when the semiconductor wafer W is not tilted (in other words, when the semiconductor wafer W is not parallel to the reference surface R). Fig. 10 also shows the distance (shooting distance) between the semiconductor wafer W and the camera unit 42 for each captured image.

[0067] As shown in Fig. 10, when the semiconductor wafer W is not tilted, the shooting distance is approximately uniform over the entire semiconductor wafer W, and the size of each dot included in the captured image is approximately uniform. On the other hand, when the semiconductor wafer W is tilted, the shooting distance is non-uniform over the entire semiconductor wafer W. Specifically, the dots in the direction of the tilt of the semiconductor wafer W (toward the left in Fig. 10) have a longer shooting distance, and the size of the dots captured in the captured image becomes larger. Therefore, the direction and magnitude of the tilt of the semiconductor wafer W can be detected based on the distribution of dot sizes in the captured image.

[0068] <Processing Procedure> The inspection method executed by the inspection device 10 will be described with reference to Fig. 11. Fig. 11 is a flowchart showing an example of the inspection method.

[0069] In step S101, the projection control unit 101 of the control device 50 controls the camera unit 42 to project a dot pattern. The camera unit 42 projects the dot pattern onto the semiconductor wafer W using the projection unit 61 in accordance with the control of the control device 50. The dot pattern projected onto the semiconductor wafer W (projection pattern) is reflected by the semiconductor wafer W and enters the camera unit 42. Inside the camera unit 42, the dot pattern (second reflection pattern) reflected by the mirror 69 can be imaged by the imaging unit 63.

[0070] In step S102, the light receiving control unit 102 of the control device 50 controls the camera unit 42 to receive the dot pattern reflected by the semiconductor wafer W. The camera unit 42 starts receiving the dot pattern reflected by the semiconductor wafer W (first reflection pattern) in accordance with the control of the control device 50.

[0071] In step S103, the image acquisition unit 103 of the control device 50 controls the camera unit 42 to capture a photographed image. The camera unit 42 captures a photographed image in which the first reflection pattern and the second reflection pattern are superimposed, using the imaging unit 63, in accordance with the control of the control device 50. The image acquisition unit 103 acquires the photographed image from the camera unit 42 and sends it to the dot selection unit 104 and the parallelism measurement unit 105.

[0072] In step S104, the dot selection unit 104 of the control device 50 selects dots to be used in measuring the parallelism from among the multiple dots included in the captured image captured in step S103. Specifically, the dot selection unit 104 excludes dots for which the distance between the dots included in the first reflection pattern and the dots included in the second reflection pattern indicates an abnormal value from the dots to be used in measuring the parallelism. The dot selection unit 104 sends information indicating the selected dots to the parallelism measurement unit 105.

[0073] In step S105, the parallelism measurement unit 105 of the control device 50 measures the parallelism between the semiconductor wafer W and the reference surface R based on the dots selected in step S104 from among the dots included in the captured image taken in step S103. Specifically, the parallelism measurement unit 105 detects the inclination of the semiconductor wafer W with respect to the reference surface R based on the difference between the first reflection pattern and the second reflection pattern included in the captured image. The parallelism measurement unit 105 sends information indicating the measured parallelism to the mounting table adjustment unit 106.

[0074] In step S106, the mounting table adjustment unit 106 of the control device 50 controls the moving mechanism 23 to adjust the mounting table 25 based on the parallelism measured in step S105. Specifically, the mounting table adjustment unit 106 controls the moving mechanism 23 to change the inclination of the mounting table 25 with respect to the z-axis so as to increase the parallelism between the semiconductor wafer W and the reference surface R.

[0075] In step S107, the mounting table adjustment unit 106 of the control device 50 controls the moving mechanism 23 so that the tips of the probes 34 come into contact with the test pads provided on the semiconductor wafer W placed on the mounting table 25. The mounting table adjustment unit 106 raises the mounting table 25, the position and orientation of which have been adjusted in step S106, until the tips of the probes 34 come into contact with the test pads on the semiconductor wafer W.

[0076] When the tips of the probes 34 come into contact with the test pads on the semiconductor wafer W, the control device 50 controls the external tester 31 to evaluate the electrical and optical characteristics of the semiconductor wafer W. The control device 50 receives the evaluation results of the electrical and optical characteristics of the semiconductor wafer W from the external tester 31 and outputs the evaluation results.

[0077] Advantages of First Embodiment The inspection device 10 according to this embodiment projects a pattern onto a measurement object, receives a first reflected pattern resulting from the pattern being reflected by the measurement object, projects the pattern onto a reference surface that serves as a reference for parallelism, receives a second reflected pattern resulting from the pattern being reflected by the reference surface, and measures the parallelism between the measurement object and the reference surface based on the difference between the first reflected pattern and the second reflected pattern. In one aspect, this embodiment enables the parallelism between the measurement object and the reference surface to be measured with high accuracy.

[0078] The inspection device 10 may observe the first reflection pattern and the second reflection pattern simultaneously. The inspection device 10 may capture an image in which the first reflection pattern and the second reflection pattern are superimposed. According to one aspect, the present embodiment allows the first reflection pattern and the second reflection pattern to be observed simultaneously, making it possible to easily evaluate the difference between the first reflection pattern and the second reflection pattern.

[0079] The pattern may include a plurality of dots. The plurality of dots may be arranged asymmetrically with respect to a predetermined axis. According to one aspect, the present embodiment makes it possible to accurately measure the parallelism between the measurement target and the reference surface based on the differences between the plurality of dots.

[0080] The inspection device 10 may select dots to use in measuring parallelism based on the difference between dots included in the first reflection pattern and dots included in the second reflection pattern. The difference between dots may not be caused only by the tilt of the measurement object. According to one aspect, this embodiment can eliminate differences caused by factors other than the tilt of the measurement object.

[0081] The inspection device 10 may measure the parallelism based on the center-to-center distance between the dots included in the first reflection pattern and the dots included in the second reflection pattern. The center-to-center distance between the dots included in the first reflection pattern and the dots included in the second reflection pattern increases as the tilt of the measurement object increases. In one aspect, according to this embodiment, the magnitude of the tilt of the measurement object can be detected accurately for each dot.

[0082] The inspection device 10 may project a pattern using illumination that uses a light-emitting diode as a light source. Because the light emitted by the light-emitting diode has low linearity, the difference between the first reflection pattern and the second reflection pattern becomes large when the measurement object is tilted. In one aspect, according to this embodiment, the difference between the first reflection pattern and the second reflection pattern can be accurately evaluated.

[0083] Second Embodiment In the first embodiment, the control device 50 is configured to measure the parallelism between the semiconductor wafer W, which is an example of a measurement object, and the reference surface R based on the distance between the centers of dots included in the captured image. In the second embodiment, the camera unit 42 is configured to color the first reflection pattern and the second reflection pattern in different colors. Furthermore, the control device 50 is configured to measure the parallelism between the semiconductor wafer W and the reference surface R based on the area of ​​the color included in the captured image.

[0084] The inspection device 10 according to the second embodiment will be described below, focusing on the differences from the first embodiment. Unless otherwise specified, the inspection device 10 according to the second embodiment may be configured similarly to the first embodiment.

[0085] <Camera Unit> The configuration of the camera unit 42 according to this embodiment will be described with reference to Fig. 12. Fig. 12 is a schematic cross-sectional view showing an example of a camera unit according to the second embodiment.

[0086] 12, the camera unit 42 includes a projection unit 61, bright field illumination 62, an imaging unit 63, a mirror 64, dark field illumination 65-1 and 65-2, a half mirror 66, a mirror 67, a prism 68, a mirror 69, a band pass filter 81, and a band pass filter 82. That is, the camera unit 42 according to this embodiment differs from the first embodiment (see FIG. 2) in that it includes a band pass filter 81 and a band pass filter 82.

[0087] The bandpass filter 81 is configured to transmit only wavelengths corresponding to a first color. The first color may be any color, and may be red, for example. The bandpass filter 81 is disposed between the prism 68 and the mirror 69. The bandpass filter 81 transmits only the first color component of the strong white light branched by the prism 68. In other words, the bandpass filter 81 colors the strong white light on which the projection pattern is formed, the first color. The strong white light colored in the first color is reflected by the mirror 69 and enters the imaging unit 63 via the prism 68. This enables the imaging unit 63 to capture an image including a dot pattern colored in the first color.

[0088] The bandpass filter 82 is configured to transmit only wavelengths corresponding to the second color. The second color may be any color, and may be blue, for example. The bandpass filter 82 is provided between the mirror 64 and the half mirror 66. The bandpass filter 82 transmits only the second color component of the light reflected by the semiconductor wafer W. In other words, the bandpass filter 82 colors the reflected light including the reflection pattern in the second color. The reflected light colored in the second color is incident on the imaging unit 63 via the prism 68. This enables the imaging unit 63 to capture an image including a dot pattern colored in the second color.

[0089] The first color and the second color can be selected arbitrarily as long as they are different colors. However, from the viewpoint of distinguishing the first reflection pattern and the second reflection pattern in the captured image, it is preferable that the first color and the second color have a large hue difference. In this embodiment, an example is shown in which red is used as the first color and blue is used as the second color, but the first color and the second color may be reversed, or at least one of the first color and the second color may be different colors.

[0090] <<Measurement of Parallelism>> A method for measuring the parallelism between a measurement object and a reference surface based on a captured image according to this embodiment will be described with reference to Fig. 13. Fig. 13 is a diagram showing an example of a parallelism measurement method according to the second embodiment.

[0091] 13 , when the semiconductor wafer W is not parallel to the reference plane R, the overlapping area between the dots D1 included in the projection pattern and the dots D2 included in the reflection pattern becomes smaller. Since the dots D1 are colored with a first color C1 (e.g., red) and the dots D2 are colored with a second color C2 (e.g., blue), the overlapping area between the dots D1 and D2 is imaged as a mixed color C3 (e.g., purple) of the first color C1 and the second color C2.

[0092] Therefore, by calculating the area of ​​the mixed color of the first color and the second color for each dot captured in the captured image, the inclination of the semiconductor wafer W with respect to the reference surface R can be detected. Furthermore, based on the magnitude of the inclination detected for each dot, the parallelism between the semiconductor wafer W and the reference surface R can be measured. In this embodiment, the smaller the area of ​​the mixed color, the greater the inclination of the semiconductor wafer W with respect to the reference surface R, and the lower the parallelism between the semiconductor wafer W and the reference surface R.

[0093] Advantages of the Second Embodiment The inspection device 10 according to this embodiment observes a first reflection pattern colored a first color and a second reflection pattern colored a second color. According to one aspect of this embodiment, the first reflection pattern and the second reflection pattern are colored differently, making it easy to distinguish between the first reflection pattern and the second reflection pattern.

[0094] The inspection device 10 may measure the parallelism based on the area of ​​the mixture of the first color and the second color. The overlapping area between the dots included in the first reflection pattern and the dots included in the second reflection pattern decreases as the tilt of the measurement object increases. In one aspect, according to this embodiment, the magnitude of the tilt of the measurement object can be detected accurately for each dot.

[0095] [Supplementary Note] The configuration of the inspection device 10 in the above-described embodiment is an example, and at least a part of the processing performed by the control device 50 may be executed by another information processing device connected to the control device 50 so as to be able to perform data communication. For example, the other information processing device connected to the control device 50 so as to be able to perform data communication may be a computer that provides a cloud service.

[0096] The embodiments disclosed herein are illustrative in all respects and are not limiting. The embodiments can be modified and improved in various ways without departing from the scope and spirit of the appended claims. The features described in the above embodiments can be configured in other ways within a consistent range, and can be combined within a consistent range.

[0097] This application claims priority from Japanese Patent Application No. 2024-152504, filed on September 4, 2024, with the Japan Patent Office, the entire contents of which are incorporated herein by reference.

[0098] W: Semiconductor wafer 10: Inspection device 23: Moving mechanism 25: Mounting table 30: Test head 31: External tester 32: Interface 33: Probe card 34: Probe 41, 42: Camera unit 50: Control device 61: Projection unit 62: Bright field illumination 63: Imaging unit 64, 67, 69: Mirror 65: Dark field illumination 66: Half mirror 68: Prism 71: White light source 72: Aperture substrate 81, 82: Band pass filter 101: Projection control unit 102: Light receiving control unit 103: Image acquisition unit 104: Dot selection unit 105: Parallelism measurement unit 106: Mounting table adjustment unit

Claims

1. A measurement method comprising the steps of: projecting a pattern onto an object to be measured; receiving a first reflected pattern resulting from the pattern being reflected by the object to be measured; projecting the pattern onto a reference surface that serves as a reference for parallelism; receiving a second reflected pattern resulting from the pattern being reflected by the reference surface; observing the first reflected pattern and the second reflected pattern; and measuring the parallelism between the object to be measured and the reference surface based on the difference between the first reflected pattern and the second reflected pattern.

2. The measurement method according to claim 1, wherein the observing step observes the first reflection pattern and the second reflection pattern simultaneously.

3. The measurement method according to claim 1, wherein the pattern is an arrangement of a plurality of dots.

4. The measurement method according to claim 3, wherein the plurality of dots are arranged asymmetrically with respect to a predetermined axis.

5. The measurement method according to claim 3, further comprising a step of selecting the dots to be used in measuring the parallelism based on the difference between the dots included in the first reflection pattern and the dots included in the second reflection pattern.

6. A measurement method according to any one of claims 3 to 5, wherein the measuring step measures the parallelism based on the center distance between the dots included in the first reflection pattern and the dots included in the second reflection pattern.

7. A measurement method according to any one of claims 1 to 5, wherein the step of projecting projects the pattern using illumination with a light-emitting diode as a light source.

8. A measurement method according to any one of claims 1 to 5, wherein the observing step observes the first reflection pattern colored with a first color and the second reflection pattern colored with a second color.

9. The measuring method according to claim 8, wherein the measuring step measures the parallelism based on an area of ​​a mixture of the first color and the second color.

10. A measurement system comprising: a projection unit that projects a pattern onto a measurement object and a reference surface that serves as a reference for parallelism; a first light-receiving unit that receives a first reflected pattern of the pattern reflected by the measurement object; a second light-receiving unit that receives a second reflected pattern of the pattern reflected by the reference surface; an imaging unit that images the first reflected pattern and the second reflected pattern; and a parallelism measurement unit that measures the parallelism between the measurement object and the reference surface based on the difference between the first reflected pattern and the second reflected pattern.

11. The measurement system according to claim 10, wherein the imaging unit captures an image in which the first reflection pattern and the second reflection pattern are superimposed.

12. An inspection device that inspects an object under test by contacting the tips of probes provided on a probe card with electrodes provided on the object under test, comprising: a projection unit that projects a pattern onto the object under test placed on a mounting table and onto a reference surface that serves as a reference for parallelism; a first light-receiving unit that receives a first reflected pattern of the pattern reflected by the object under test; a second light-receiving unit that receives a second reflected pattern of the pattern reflected by the reference surface; an imaging unit that images the first reflected pattern and the second reflected pattern; a measurement unit that measures the parallelism between the object under test and the reference surface based on the difference between the first reflected pattern and the second reflected pattern; and an adjustment unit that adjusts the mounting table based on the parallelism.

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