Examination method, examination system, and tester system
The test system addresses processing load challenges in semiconductor testing by distributing processing across tester and semiconductor manufacturer resources, enhancing throughput and efficiency through auxiliary computing.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-08-29
- Publication Date
- 2026-03-19
AI Technical Summary
Conventional semiconductor testing using adaptive techniques faces challenges in processing load due to computationally intensive algorithms, which are difficult to implement without upgrading tester manufacturer resources.
A test system that distributes the processing load by utilizing resources from both the tester manufacturer and semiconductor manufacturer, employing an auxiliary computing device to perform general-purpose processing and analysis of test results, allowing for computationally intensive algorithms without upgrading tester resources.
Enables efficient and effective adaptive testing by leveraging resources from both manufacturers, improving throughput and reducing communication load while enabling the use of complex algorithms.
Smart Images

Figure JP2025030516_19032026_PF_FP_ABST
Abstract
Description
Test Method, Test System, and Tester System
[0001] The present disclosure relates to a test method, a test system, and a tester system.
[0002] In conventional semiconductor testing, a technique called adaptive testing is used. Adaptive testing is a technique for dynamically optimizing test patterns such as test content and test flow using test results. For example, in adaptive testing in semiconductor testing by a tester, dynamic optimization of test patterns may be performed using resources on the tester manufacturer side.
[0003] Japanese Patent Laid-Open No. 5-126918
[0004] The present disclosure provides a technique for suppressing the processing load of a tester system that performs testing according to a dynamic test pattern based on test results.
[0005] One aspect of the present disclosure is a test method for a tester system in which a tester tests a device under test, the tester system collecting test results obtained by the tester according to a test pattern, transmitting the collected test results to an analysis system, receiving, as a next test pattern, a test pattern generated or selected by the analysis system based on the test results, and causing the tester to perform testing according to the next test pattern to be performed.
[0006] According to the present disclosure, it is possible to provide a technique for suppressing the processing load of a tester system that performs testing according to a dynamic test pattern based on test results.
[0007] A configuration diagram of an example of a test system according to this embodiment. A hardware configuration diagram of an example of a computer. A functional block diagram showing an example of a tester system and an analysis system according to this embodiment. A sequence diagram of an example of the processing of the test system according to this embodiment. A flowchart of an example of the processing of step S18. A flowchart of an example of the processing of step S22.
[0008] Hereinafter, this embodiment will be described with reference to the drawings.
[0009] <System Configuration> Figure 1 is a configuration diagram of an example of a test system 1 according to this embodiment. The test system 1 shown in Figure 1 includes a tester 10, an auxiliary computing device 12, and an analysis system 14. The tester 10 and the auxiliary computing device 12 constitute an example of a tester system 2, which is a resource on the tester manufacturer's side. The analysis system 14 is an example of a resource on the semiconductor manufacturer's side. For example, a semiconductor manufacturer is a customer of the tester manufacturer. The tester 10, the auxiliary computing device 12, and the analysis system 14 are connected to each other via networks N1 and N2, such as the Internet or a LAN (Local Area Network).
[0010] Tester 10 is an example of a test device that tests a device under test according to test patterns included in a test program. The test program is provided, for example, by the semiconductor manufacturer. Tester 10 performs tests to confirm the logic operation of the device under test. Tester 10 also performs tests to confirm characteristics such as voltage, current, or time of the device under test.
[0011] The auxiliary computing device 12 is an example of a resource on the tester manufacturer's side. The auxiliary computing device 12 is a computer such as a PC (Personal Computer). The auxiliary computing device 12 performs general processing, such as the analysis of characteristic data of the test results from the tester 10, between the tester 10 and the analysis system 14.
[0012] Based on the test results obtained when the tester 10 tests the device under test according to the test pattern, the analysis system 14 generates or selects the next test pattern for the tester 10 to perform, as described later. The analysis system 14 also includes the generated or selected next test pattern for the tester 10 in a test program and sends it to the tester 10. The analysis system 14 may be implemented as a cloud service or as one or more server devices.
[0013] The test system 1 shown in Figure 1 is just one example, and it goes without saying that there are various system configurations depending on the application and purpose. The classification of the devices such as the tester 10, auxiliary calculation device 12, and analysis system 14 in Figure 1 is just one example. For example, the auxiliary calculation device 12 and the analysis system 14 may be in an integrated configuration or they may be in a further separated configuration. The auxiliary calculation device 12 may be installed inside the housing of the tester 10.
[0014] In the test system 1 shown in Figure 1, adaptive testing techniques are used, for example, in semiconductor testing of a semiconductor device, which is an example of a device under test.
[0015] When generating or selecting test patterns for adaptive testing in semiconductor testing is performed using the tester manufacturer's resources, it is difficult to adopt computationally intensive algorithms for generating or selecting test patterns from the perspective of the tester manufacturer's resources and throughput. Furthermore, adopting computationally intensive algorithms for generating or selecting test patterns requires improving the specifications of the tester manufacturer's resources.
[0016] In the test system 1 according to this embodiment, the process of generating or selecting test patterns necessary for adaptive testing in semiconductor testing is performed using not only the resources of the tester manufacturer but also the resources of the semiconductor manufacturer. By effectively utilizing the resources of both the tester manufacturer and the semiconductor manufacturer, the test system 1 according to this embodiment can employ computationally intensive algorithms for generating or selecting test patterns without improving the specifications of the tester manufacturer's resources.
[0017] Furthermore, the test system 1 according to this embodiment includes an auxiliary computing device 12 for general-purpose processing between the tester 10 and the resources on the semiconductor manufacturer's side. The auxiliary computing device 12 improves the throughput of the tester system 2 by performing processing that can be completed by a general-purpose processor, such as analyzing characteristic data of test results performed according to test patterns, on behalf of the tester 10.
[0018] Furthermore, the test system 1 according to this embodiment can reduce the amount of communication with the analysis system 14 by completing the analysis of characteristic data of test results performed according to the test pattern in the tester system 2.
[0019] <Hardware Configuration> The tester 10 shown in Figure 1 has a PC (tester PC). The tester PC, auxiliary computing device 12, and analysis system 14 may be implemented by a computer with the hardware configuration shown in Figure 2, for example. Figure 2 is a hardware configuration diagram of an example of a computer 500.
[0020] The computer 500 in Figure 2 includes an input device 501, an output device 502, an external interface 503, a RAM (Random Access Memory) 504, a ROM (Read Only Memory) 505, a CPU (Central Processing Unit) 506, a communication interface 507, and an HDD (Hard Disk Drive) 508, all of which are interconnected via bus B. The input device 501 and the output device 502 may be connected and used only when necessary.
[0021] The input device 501 is a keyboard, mouse, touch panel, etc., and is used by operators to input operation signals. The output device 502 is a display, etc., which displays the processing results from the computer 500. The communication I / F 507 is an interface that connects the computer 500 to networks N1 and N2 shown in Figure 1. The HDD 508 is an example of a non-volatile storage device that stores programs and data.
[0022] The external interface 503 is an interface to an external device. The computer 500 can read from the recording medium 503a, such as an SD (Secure Digital) memory card, via the external interface 503. The external interface 503 may also be able to write to the recording medium 503a, such as an SD memory card, via the external interface 503.
[0023] ROM 505 is an example of a non-volatile semiconductor memory (storage device) in which programs and data are stored. RAM 504 is an example of a volatile semiconductor memory (storage device) that temporarily holds programs and data. CPU 506 is an arithmetic unit that controls and realizes the functions of the entire computer 500 by reading programs and data from storage devices such as ROM 505 or HDD 508 onto RAM 504 and executing processing.
[0024] The tester PC, auxiliary calculation device 12, and analysis system 14 of the test system 1 shown in Figure 1 perform various functions by executing programs on the computer 500 shown in Figure 2.
[0025] <Functional Configuration> The tester system 2 and analysis system 14 according to this embodiment are implemented using functional blocks as shown in Figure 3. Figure 3 is a functional block diagram showing an example of the tester system 2 and analysis system 14 according to this embodiment. Note that the functional block diagram in Figure 3 omits the illustration of components that are not necessary for the explanation of this embodiment.
[0026] The tester 10 in Figure 3 implements the receiving unit 22 and the test execution unit 24 by executing a program for the tester 10. The auxiliary arithmetic unit 12 implements the collection unit 26, the data processing unit 28, and the transmission unit 30 by executing a program for the auxiliary arithmetic unit 12. The analysis system 14 implements the analysis unit 32 by executing a program for the analysis system 14.
[0027] The receiving unit 22 of the tester 10 receives a test program containing the next test pattern from the analysis system 14. The test execution unit 24 of the tester 10 tests the device under test 20 according to the test pattern included in the test program received by the receiving unit 22 and obtains the test result.
[0028] The collection unit 26 of the auxiliary computing unit 12 collects the test results performed by the tester 10 on the device under test 20 according to the test pattern. The data processing unit 28 of the auxiliary computing unit 12 performs general-purpose processing such as saving the test results from the tester 10, analyzing the characteristic data of the test results, and compressing the data. The transmission unit 30 transmits the test results from the tester 10 collected by the collection unit 26, the characteristic data of the test results analyzed by the data processing unit 28, or the compressed characteristic data to the analysis system 14.
[0029] The analysis unit 32 of the analysis system 14 generates or selects the next test pattern to be performed by the tester 10 based on the test results received from the tester system 2. The analysis unit 32 can use AI (artificial intelligence) or a rule-based approach to generate or select the next test pattern to be performed by the tester 10.
[0030] For example, the analysis unit 32 generates or selects the next test pattern to be performed by the tester 10 by using a machine learning model that studies the relationship between test results and test patterns based on the test results received from the tester system 2. The selection of a test pattern is the process of selecting the next test pattern to be performed by the tester 10 from a plurality of pre-generated test patterns.
[0031] For example, the analysis unit 32 may generate or select the next test pattern to be performed by the tester 10 using a table that associates the test results with the next test pattern to be performed by the tester 10, based on the test results received from the tester system 2.
[0032] The analysis system 14 transmits a test program to the tester 10 that includes a test pattern generated or selected based on the test results obtained by the tester 10 when testing the device 20 under test, as the next test pattern to be performed by the tester 10.
[0033] Thus, in the test system 1 according to this embodiment, the processing of generating or selecting test patterns necessary for adaptive testing of the device under test 20 is performed by an analysis system 14 external to the tester system 2. This distributes the processing load of the test system 1, allowing for effective utilization of resources not only from the tester manufacturer but also from the semiconductor manufacturer.
[0034] Furthermore, in the test system 1 according to this embodiment, by distributing the processing load of the test system 1, it is possible to employ computationally intensive algorithms for generating or selecting test patterns necessary for adaptive testing of the device under test 20 without improving the resource specifications on the tester manufacturer's side.
[0035] <Processing> The test system 1 according to this embodiment performs adaptive testing of the device under test 20 using the processing procedure shown in Figure 4, for example. Figure 4 is a sequence diagram of an example of the processing of the test system 1 according to this embodiment.
[0036] In step S10, the tester 10 receives a test program including a test pattern from the analysis system 14. The test pattern indicates the content of the next test that the tester 10 will perform on the device under test 20. The test pattern may consist of multiple test parts. The tester 10 may also receive the test program via a source other than the analysis system 14, such as a test program server.
[0037] In step S12, the tester 10 tests the device under test 20 according to the test pattern included in the received test program, and obtains the test result in step S14. The test result may be a test result that confirms the logical operation of the device under test 20, or a test result that confirms the characteristics of the device under test 20, such as voltage, current, or time.
[0038] In step S16, the tester 10 transmits the test results, which were obtained according to the test patterns included in the received test program, to the auxiliary arithmetic unit 12.
[0039] In step S18, the auxiliary computing unit 12 collects the test results that the tester 10 performed on the device under test 20 according to the test pattern. The auxiliary computing unit 12 performs general-purpose processing between the tester 10 and the analysis system 14. General-purpose processing performed by the auxiliary computing unit 12 includes, for example, saving the test results from the tester 10, analyzing the characteristic data of the test results, and compressing the data.
[0040] The process of step S18 is performed, for example, according to the procedure shown in FIG. 5. FIG. 5 is a flowchart of an example of the process of step S18.
[0041] In step S40, the auxiliary arithmetic unit 12 collects the test results by receiving the test results from the tester 10. In step S42, the auxiliary arithmetic unit 12 stores the collected test results in the memory. In step S44, the auxiliary arithmetic unit 12 analyzes the collected test results to obtain characteristic data of the test results. Also, in step S46, the auxiliary arithmetic unit 12 compresses the collected test results or the characteristic data of the test results.
[0042] Note that the process of the flowchart in FIG. 5 is an example, and a configuration in which at least one of steps S44 or S46 is omitted may be used.
[0043] Returning to FIG. 4, in step S20, the auxiliary arithmetic unit 12 transmits to the analysis system 14 the test results by the tester 10 collected by the collection unit 26, the characteristic data of the test results analyzed by the data processing unit 28, or the characteristic data compressed by the data processing unit 28.
[0044] In step S22, based on the test results or the characteristic data of the test results received from the tester system 2 side, the analysis system 14 generates or selects a dynamic test pattern for the next test to be performed by the tester 10.
[0045] For example, the analysis system 14 can generate or select a dynamic test pattern for the next test to be performed by the tester 10 based on the test results or the characteristic data of the test results obtained for the test target device 20 by using AI or a rule base.
[0046] The analysis system 14 using AI performs the process of step S22 according to, for example, the procedure shown in FIG. 6. FIG. 6 is a flowchart of an example of the process of step S22.
[0047] In step S60, the analysis system 14 receives the test results or the characteristic data of the test results from the tester system 2 side.
[0048] In step S62, the analysis system 14 uses a model obtained by machine learning the relationship between the test result and the test pattern. The analysis system 14 may use a model obtained by machine learning the relationship between the characteristic data of the test result and the test pattern.
[0049] The model obtained by machine learning the relationship between the test result and the test pattern has its internal parameters adjusted so that when the received test result is input, it generates or selects a test pattern associated with the input test result. The test pattern associated with the test result is the test pattern to be used in the next test when that test result is obtained.
[0050] The model obtained by machine learning the relationship between the characteristic data of the test result and the test pattern has its internal parameters adjusted so that when the received characteristic data of the test result is input, it generates or selects a test pattern associated with the input characteristic data of the test result. The test pattern associated with the characteristic data of the test result is the test pattern to be used in the next test when the characteristic data of that test result is obtained.
[0051] The analysis system 14 generates or selects a test pattern associated with the test result or the characteristic data of the test result received from the tester system 2 side in step S60 using a model obtained by machine learning the relationship between the test result or the characteristic data of the test result and the test pattern.
[0052] Returning to FIGURE 4, the analysis system 14 using a rule base uses, for example, a table associating the test result or the characteristic data of the test result with the test pattern. The table associating the test result or the characteristic data of the test result with the test pattern associates the test result or the characteristic data of the test result with the test pattern to be used in the next test when that test result or the characteristic data of that test result is obtained. The analysis system 14 generates or selects a test pattern associated with the test result or the characteristic data of the test result received from the tester system 2 side using a table associating the test result or the characteristic data of the test result with the test pattern.
[0053] In step S24, the analysis system 14 sends a test program to the tester 10 that uses a test pattern generated or selected based on the test results or characteristic data of the test results of the device under test 20 as the next test pattern to be performed. The tester 10 receives the test program containing the next test pattern from the analysis system 14.
[0054] In step S26, the tester 10 tests the device under test 20 according to the next test pattern included in the received test program, and obtains the test result in step S28. After the processing in step S28, the test system 1 repeats the processing in steps S16 to S28 until it reaches the completion state of the adaptive test.
[0055] The test system 1 according to this embodiment effectively utilizes not only the resources of the tester manufacturer but also the resources of the semiconductor manufacturer, allowing for the adoption of computationally intensive algorithms for generating or selecting test patterns without improving the specifications of the tester manufacturer's resources. As a result, the test system 1 according to this embodiment can achieve more effective and efficient adaptive testing.
[0056] Furthermore, since the test system 1 according to this embodiment has an auxiliary computing device 12 as a resource on the tester manufacturer's side, the overall throughput of the test system 1 can be improved by having the auxiliary computing device 12 replace the tester 10 with a general-purpose processor for processing that can be completed by the tester 10.
[0057] Furthermore, since the test system 1 according to this embodiment has an auxiliary computing device 12 as a resource on the tester manufacturer's side, processing such as analysis of characteristic data of test results and data compression can be performed on the tester manufacturer's resources, and the amount of data communicated with the semiconductor manufacturer's resources can be reduced.
[0058] Although preferred embodiments of this embodiment have been described in detail above, this embodiment is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of this embodiment.
[0059] It goes without saying that the test system 1 described herein is not limited to the configuration shown in Figure 1, and there are various system configuration examples depending on the application and purpose. According to this disclosure, it is possible to realize a test method, test system 1, and test system 2 that suppress the processing load of a tester system that performs tests according to a dynamic test pattern based on test results.
[0060] Although the present invention has been described above based on examples, the present invention is not limited to the above examples, and various modifications are possible within the scope of the claims. This application claims priority to Basic Application No. 2024-158213 filed with the Japan Patent Office on September 12, 2024, the entire contents of which are incorporated herein by reference.
[0061] 1 Test System 10 Tester 12 Auxiliary Calculation Unit 14 Analysis System 20 Device under Test 22 Receiving Unit 24 Test Execution Unit 26 Data Acquisition Unit 28 Data Processing Unit 30 Transmission Unit 32 Analysis Unit
Claims
1. A test method for a tester system in which a tester tests a device under test, the tester system comprising: collecting test results performed by the tester according to a test pattern; transmitting the collected test results to an analysis system; receiving a test pattern generated or selected by the analysis system based on the test results as the next test pattern; and causing the tester to perform a test according to the next test pattern.
2. The test method according to claim 1, wherein the test system comprises the tester and an auxiliary calculation device, the auxiliary calculation device analyzes the characteristic data of the test result, transmits the test result or the characteristic data to the analysis system, the tester receives a test pattern generated or selected by the analysis system based on the test result or the characteristic data as the next test pattern, and performs a test according to the next test pattern.
3. The test method according to claim 2, wherein the auxiliary computing device compresses the test results or characteristic data and then transmits it to the analysis system.
4. The test method according to any one of claims 1 to 3, wherein the analysis system generates or selects the test pattern using a machine learning model that has acquired the relationship between the test result and the test pattern, or a table that associates the test result and the test pattern.
5. A test system comprising: a tester system in which a tester tests a device under test; and an analysis system for generating or selecting test patterns for the tests performed by the tester, wherein the tester system comprises: a collection unit for collecting test results performed by the tester according to the test patterns; a transmission unit for transmitting the collected test results to the analysis system; a receiving unit for receiving a test pattern generated or selected by the analysis system based on the test results as the next test pattern; and a test execution unit for causing the tester to perform tests according to the next test pattern, and the analysis system comprises: an analysis unit for generating or selecting the test patterns based on the test results.
6. A tester system that is data-communicable connected to an analysis system for generating or selecting test patterns, and tests a device under test according to the test patterns, comprising: a collection unit for collecting test results performed by the tester according to the test patterns; a transmission unit for transmitting the collected test results to the analysis system; a receiving unit for receiving a test pattern generated or selected by the analysis system based on the test results as the next test pattern; and a test execution unit for causing the tester to perform tests according to the next test pattern.
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